1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _RXPT_CLASSIFY_INFO_H_ 20 #define _RXPT_CLASSIFY_INFO_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_RXPT_CLASSIFY_INFO 1 25 26 27 struct rxpt_classify_info { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t reo_destination_indication : 5, 30 lmac_peer_id_msb : 2, 31 use_flow_id_toeplitz_clfy : 1, 32 pkt_selection_fp_ucast_data : 1, 33 pkt_selection_fp_mcast_data : 1, 34 pkt_selection_fp_1000 : 1, 35 rxdma0_source_ring_selection : 3, 36 rxdma0_destination_ring_selection : 3, 37 mcast_echo_drop_enable : 1, 38 wds_learning_detect_en : 1, 39 intrabss_check_en : 1, 40 use_ppe : 1, 41 ppe_routing_enable : 1, 42 reserved_0b : 10; 43 #else 44 uint32_t reserved_0b : 10, 45 ppe_routing_enable : 1, 46 use_ppe : 1, 47 intrabss_check_en : 1, 48 wds_learning_detect_en : 1, 49 mcast_echo_drop_enable : 1, 50 rxdma0_destination_ring_selection : 3, 51 rxdma0_source_ring_selection : 3, 52 pkt_selection_fp_1000 : 1, 53 pkt_selection_fp_mcast_data : 1, 54 pkt_selection_fp_ucast_data : 1, 55 use_flow_id_toeplitz_clfy : 1, 56 lmac_peer_id_msb : 2, 57 reo_destination_indication : 5; 58 #endif 59 }; 60 61 62 63 64 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_OFFSET 0x00000000 65 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_LSB 0 66 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MSB 4 67 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MASK 0x0000001f 68 69 70 71 72 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_OFFSET 0x00000000 73 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_LSB 5 74 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MSB 6 75 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MASK 0x00000060 76 77 78 79 80 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x00000000 81 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 82 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MSB 7 83 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x00000080 84 85 86 87 88 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x00000000 89 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_LSB 8 90 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MSB 8 91 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MASK 0x00000100 92 93 94 95 96 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x00000000 97 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_LSB 9 98 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MSB 9 99 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MASK 0x00000200 100 101 102 103 104 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_OFFSET 0x00000000 105 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_LSB 10 106 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MSB 10 107 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MASK 0x00000400 108 109 110 111 112 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x00000000 113 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_LSB 11 114 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MSB 13 115 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MASK 0x00003800 116 117 118 119 120 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x00000000 121 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_LSB 14 122 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MSB 16 123 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x0001c000 124 125 126 127 128 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_OFFSET 0x00000000 129 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_LSB 17 130 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MSB 17 131 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MASK 0x00020000 132 133 134 135 136 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_OFFSET 0x00000000 137 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_LSB 18 138 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MSB 18 139 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MASK 0x00040000 140 141 142 143 144 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_OFFSET 0x00000000 145 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_LSB 19 146 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MSB 19 147 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MASK 0x00080000 148 149 150 151 152 #define RXPT_CLASSIFY_INFO_USE_PPE_OFFSET 0x00000000 153 #define RXPT_CLASSIFY_INFO_USE_PPE_LSB 20 154 #define RXPT_CLASSIFY_INFO_USE_PPE_MSB 20 155 #define RXPT_CLASSIFY_INFO_USE_PPE_MASK 0x00100000 156 157 158 159 160 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_OFFSET 0x00000000 161 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_LSB 21 162 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MSB 21 163 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MASK 0x00200000 164 165 166 167 168 #define RXPT_CLASSIFY_INFO_RESERVED_0B_OFFSET 0x00000000 169 #define RXPT_CLASSIFY_INFO_RESERVED_0B_LSB 22 170 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MSB 31 171 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MASK 0xffc00000 172 173 174 175 #endif 176