1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _TX_FES_STATUS_START_PPDU_H_ 20 #define _TX_FES_STATUS_START_PPDU_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_TX_FES_STATUS_START_PPDU 4 25 26 #define NUM_OF_QWORDS_TX_FES_STATUS_START_PPDU 2 27 28 29 struct tx_fes_status_start_ppdu { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t ppdu_timestamp_lower_32 : 32; 32 uint32_t ppdu_timestamp_upper_32 : 32; 33 uint32_t subband_mask : 16, 34 ndp_frame : 2, 35 reserved_2b : 2, 36 coex_based_tx_bw : 3, 37 coex_based_ant_mask : 8, 38 reserved_2c : 1; 39 uint32_t coex_based_tx_pwr_shared_ant : 8, 40 coex_based_tx_pwr_ant : 8, 41 concurrent_bt_tx : 1, 42 concurrent_wlan_tx : 1, 43 concurrent_wan_tx : 1, 44 concurrent_wan_rx : 1, 45 coex_pwr_reduction_bt : 1, 46 coex_pwr_reduction_wlan : 1, 47 coex_pwr_reduction_wan : 1, 48 coex_result_alt_based : 1, 49 request_packet_bw : 3, 50 response_type : 5; 51 #else 52 uint32_t ppdu_timestamp_lower_32 : 32; 53 uint32_t ppdu_timestamp_upper_32 : 32; 54 uint32_t reserved_2c : 1, 55 coex_based_ant_mask : 8, 56 coex_based_tx_bw : 3, 57 reserved_2b : 2, 58 ndp_frame : 2, 59 subband_mask : 16; 60 uint32_t response_type : 5, 61 request_packet_bw : 3, 62 coex_result_alt_based : 1, 63 coex_pwr_reduction_wan : 1, 64 coex_pwr_reduction_wlan : 1, 65 coex_pwr_reduction_bt : 1, 66 concurrent_wan_rx : 1, 67 concurrent_wan_tx : 1, 68 concurrent_wlan_tx : 1, 69 concurrent_bt_tx : 1, 70 coex_based_tx_pwr_ant : 8, 71 coex_based_tx_pwr_shared_ant : 8; 72 #endif 73 }; 74 75 76 77 78 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_OFFSET 0x0000000000000000 79 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_LSB 0 80 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_MSB 31 81 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_MASK 0x00000000ffffffff 82 83 84 85 86 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_OFFSET 0x0000000000000000 87 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_LSB 32 88 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_MSB 63 89 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_MASK 0xffffffff00000000 90 91 92 93 94 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_OFFSET 0x0000000000000008 95 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_LSB 0 96 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_MSB 15 97 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_MASK 0x000000000000ffff 98 99 100 101 102 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_OFFSET 0x0000000000000008 103 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_LSB 16 104 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_MSB 17 105 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_MASK 0x0000000000030000 106 107 108 109 110 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_OFFSET 0x0000000000000008 111 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_LSB 18 112 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_MSB 19 113 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_MASK 0x00000000000c0000 114 115 116 117 118 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_OFFSET 0x0000000000000008 119 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_LSB 20 120 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_MSB 22 121 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_MASK 0x0000000000700000 122 123 124 125 126 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_OFFSET 0x0000000000000008 127 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_LSB 23 128 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_MSB 30 129 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_MASK 0x000000007f800000 130 131 132 133 134 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_OFFSET 0x0000000000000008 135 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_LSB 31 136 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_MSB 31 137 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_MASK 0x0000000080000000 138 139 140 141 142 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_OFFSET 0x0000000000000008 143 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_LSB 32 144 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_MSB 39 145 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_MASK 0x000000ff00000000 146 147 148 149 150 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_OFFSET 0x0000000000000008 151 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_LSB 40 152 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_MSB 47 153 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_MASK 0x0000ff0000000000 154 155 156 157 158 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_OFFSET 0x0000000000000008 159 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_LSB 48 160 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_MSB 48 161 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_MASK 0x0001000000000000 162 163 164 165 166 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_OFFSET 0x0000000000000008 167 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_LSB 49 168 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_MSB 49 169 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_MASK 0x0002000000000000 170 171 172 173 174 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_OFFSET 0x0000000000000008 175 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_LSB 50 176 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_MSB 50 177 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_MASK 0x0004000000000000 178 179 180 181 182 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_OFFSET 0x0000000000000008 183 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_LSB 51 184 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_MSB 51 185 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_MASK 0x0008000000000000 186 187 188 189 190 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_OFFSET 0x0000000000000008 191 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_LSB 52 192 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_MSB 52 193 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_MASK 0x0010000000000000 194 195 196 197 198 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_OFFSET 0x0000000000000008 199 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_LSB 53 200 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_MSB 53 201 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_MASK 0x0020000000000000 202 203 204 205 206 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_OFFSET 0x0000000000000008 207 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_LSB 54 208 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_MSB 54 209 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_MASK 0x0040000000000000 210 211 212 213 214 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_OFFSET 0x0000000000000008 215 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_LSB 55 216 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_MSB 55 217 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_MASK 0x0080000000000000 218 219 220 221 222 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_OFFSET 0x0000000000000008 223 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_LSB 56 224 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_MSB 58 225 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_MASK 0x0700000000000000 226 227 228 229 230 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_OFFSET 0x0000000000000008 231 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_LSB 59 232 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_MSB 63 233 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_MASK 0xf800000000000000 234 235 236 237 #endif 238