1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _TX_RATE_STATS_INFO_H_ 20 #define _TX_RATE_STATS_INFO_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_TX_RATE_STATS_INFO 2 25 26 27 struct tx_rate_stats_info { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t tx_rate_stats_info_valid : 1, 30 transmit_bw : 3, 31 transmit_pkt_type : 4, 32 transmit_stbc : 1, 33 transmit_ldpc : 1, 34 transmit_sgi : 2, 35 transmit_mcs : 4, 36 ofdma_transmission : 1, 37 tones_in_ru : 12, 38 transmit_nss : 3; 39 uint32_t ppdu_transmission_tsf : 32; 40 #else 41 uint32_t transmit_nss : 3, 42 tones_in_ru : 12, 43 ofdma_transmission : 1, 44 transmit_mcs : 4, 45 transmit_sgi : 2, 46 transmit_ldpc : 1, 47 transmit_stbc : 1, 48 transmit_pkt_type : 4, 49 transmit_bw : 3, 50 tx_rate_stats_info_valid : 1; 51 uint32_t ppdu_transmission_tsf : 32; 52 #endif 53 }; 54 55 56 57 58 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000000 59 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_LSB 0 60 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_MSB 0 61 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_MASK 0x00000001 62 63 64 65 66 #define TX_RATE_STATS_INFO_TRANSMIT_BW_OFFSET 0x00000000 67 #define TX_RATE_STATS_INFO_TRANSMIT_BW_LSB 1 68 #define TX_RATE_STATS_INFO_TRANSMIT_BW_MSB 3 69 #define TX_RATE_STATS_INFO_TRANSMIT_BW_MASK 0x0000000e 70 71 72 73 74 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_OFFSET 0x00000000 75 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_LSB 4 76 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_MSB 7 77 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_MASK 0x000000f0 78 79 80 81 82 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_OFFSET 0x00000000 83 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_LSB 8 84 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_MSB 8 85 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_MASK 0x00000100 86 87 88 89 90 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_OFFSET 0x00000000 91 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_LSB 9 92 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_MSB 9 93 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_MASK 0x00000200 94 95 96 97 98 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_OFFSET 0x00000000 99 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_LSB 10 100 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_MSB 11 101 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_MASK 0x00000c00 102 103 104 105 106 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_OFFSET 0x00000000 107 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_LSB 12 108 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_MSB 15 109 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_MASK 0x0000f000 110 111 112 113 114 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_OFFSET 0x00000000 115 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_LSB 16 116 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_MSB 16 117 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_MASK 0x00010000 118 119 120 121 122 #define TX_RATE_STATS_INFO_TONES_IN_RU_OFFSET 0x00000000 123 #define TX_RATE_STATS_INFO_TONES_IN_RU_LSB 17 124 #define TX_RATE_STATS_INFO_TONES_IN_RU_MSB 28 125 #define TX_RATE_STATS_INFO_TONES_IN_RU_MASK 0x1ffe0000 126 127 128 129 130 #define TX_RATE_STATS_INFO_TRANSMIT_NSS_OFFSET 0x00000000 131 #define TX_RATE_STATS_INFO_TRANSMIT_NSS_LSB 29 132 #define TX_RATE_STATS_INFO_TRANSMIT_NSS_MSB 31 133 #define TX_RATE_STATS_INFO_TRANSMIT_NSS_MASK 0xe0000000 134 135 136 137 138 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_OFFSET 0x00000004 139 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_LSB 0 140 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_MSB 31 141 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_MASK 0xffffffff 142 143 144 145 #endif 146