1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _TXPCU_USER_BUFFER_STATUS_H_ 20 #define _TXPCU_USER_BUFFER_STATUS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "txpcu_buffer_basics.h" 25 #define NUM_OF_DWORDS_TXPCU_USER_BUFFER_STATUS 2 26 27 #define NUM_OF_QWORDS_TXPCU_USER_BUFFER_STATUS 1 28 29 30 struct txpcu_user_buffer_status { 31 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 32 struct txpcu_buffer_basics txpcu_basic_buffer_info; 33 uint32_t stored_word_count_user : 14, 34 reserved_1a : 1, 35 msdu_end : 1, 36 tx_data_sync_value : 16; 37 #else 38 struct txpcu_buffer_basics txpcu_basic_buffer_info; 39 uint32_t tx_data_sync_value : 16, 40 msdu_end : 1, 41 reserved_1a : 1, 42 stored_word_count_user : 14; 43 #endif 44 }; 45 46 47 48 49 50 51 52 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_AVAILABLE_MEMORY_OFFSET 0x0000000000000000 53 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_AVAILABLE_MEMORY_LSB 0 54 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_AVAILABLE_MEMORY_MSB 7 55 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_AVAILABLE_MEMORY_MASK 0x00000000000000ff 56 57 58 59 60 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000 61 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_LSB 8 62 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MSB 15 63 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MASK 0x000000000000ff00 64 65 66 67 68 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000 69 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_TX_DATA_TLV_COUNT_LSB 16 70 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_TX_DATA_TLV_COUNT_MSB 31 71 #define TXPCU_USER_BUFFER_STATUS_TXPCU_BASIC_BUFFER_INFO_TX_DATA_TLV_COUNT_MASK 0x00000000ffff0000 72 73 74 75 76 #define TXPCU_USER_BUFFER_STATUS_STORED_WORD_COUNT_USER_OFFSET 0x0000000000000000 77 #define TXPCU_USER_BUFFER_STATUS_STORED_WORD_COUNT_USER_LSB 32 78 #define TXPCU_USER_BUFFER_STATUS_STORED_WORD_COUNT_USER_MSB 45 79 #define TXPCU_USER_BUFFER_STATUS_STORED_WORD_COUNT_USER_MASK 0x00003fff00000000 80 81 82 83 84 #define TXPCU_USER_BUFFER_STATUS_RESERVED_1A_OFFSET 0x0000000000000000 85 #define TXPCU_USER_BUFFER_STATUS_RESERVED_1A_LSB 46 86 #define TXPCU_USER_BUFFER_STATUS_RESERVED_1A_MSB 46 87 #define TXPCU_USER_BUFFER_STATUS_RESERVED_1A_MASK 0x0000400000000000 88 89 90 91 92 #define TXPCU_USER_BUFFER_STATUS_MSDU_END_OFFSET 0x0000000000000000 93 #define TXPCU_USER_BUFFER_STATUS_MSDU_END_LSB 47 94 #define TXPCU_USER_BUFFER_STATUS_MSDU_END_MSB 47 95 #define TXPCU_USER_BUFFER_STATUS_MSDU_END_MASK 0x0000800000000000 96 97 98 99 100 #define TXPCU_USER_BUFFER_STATUS_TX_DATA_SYNC_VALUE_OFFSET 0x0000000000000000 101 #define TXPCU_USER_BUFFER_STATUS_TX_DATA_SYNC_VALUE_LSB 48 102 #define TXPCU_USER_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MSB 63 103 #define TXPCU_USER_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MASK 0xffff000000000000 104 105 106 107 #endif 108