xref: /wlan-driver/fw-api/hw/qca5424/unallocated_ru_160_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
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2 /*
3  * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4  * SPDX-License-Identifier: ISC
5  */
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19 #ifndef _UNALLOCATED_RU_160_INFO_H_
20 #define _UNALLOCATED_RU_160_INFO_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 #define NUM_OF_DWORDS_UNALLOCATED_RU_160_INFO 1
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26 
27 struct unallocated_ru_160_info {
28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
29              uint32_t subband80_0_cc0                                         :  8,
30                       subband80_0_cc1                                         :  8,
31                       subband80_1_cc0                                         :  8,
32                       subband80_1_cc1                                         :  8;
33 #else
34              uint32_t subband80_1_cc1                                         :  8,
35                       subband80_1_cc0                                         :  8,
36                       subband80_0_cc1                                         :  8,
37                       subband80_0_cc0                                         :  8;
38 #endif
39 };
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44 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC0_OFFSET                              0x00000000
45 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC0_LSB                                 0
46 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC0_MSB                                 7
47 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC0_MASK                                0x000000ff
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52 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC1_OFFSET                              0x00000000
53 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC1_LSB                                 8
54 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC1_MSB                                 15
55 #define UNALLOCATED_RU_160_INFO_SUBBAND80_0_CC1_MASK                                0x0000ff00
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60 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC0_OFFSET                              0x00000000
61 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC0_LSB                                 16
62 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC0_MSB                                 23
63 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC0_MASK                                0x00ff0000
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68 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC1_OFFSET                              0x00000000
69 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC1_LSB                                 24
70 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC1_MSB                                 31
71 #define UNALLOCATED_RU_160_INFO_SUBBAND80_1_CC1_MASK                                0xff000000
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75 #endif
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