1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _UNIFORM_DESCRIPTOR_HEADER_H_ 20 #define _UNIFORM_DESCRIPTOR_HEADER_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_UNIFORM_DESCRIPTOR_HEADER 1 25 26 27 struct uniform_descriptor_header { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t owner : 4, 30 buffer_type : 4, 31 tx_mpdu_queue_number : 20, 32 reserved_0a : 4; 33 #else 34 uint32_t reserved_0a : 4, 35 tx_mpdu_queue_number : 20, 36 buffer_type : 4, 37 owner : 4; 38 #endif 39 }; 40 41 42 43 44 #define UNIFORM_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 45 #define UNIFORM_DESCRIPTOR_HEADER_OWNER_LSB 0 46 #define UNIFORM_DESCRIPTOR_HEADER_OWNER_MSB 3 47 #define UNIFORM_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 48 49 50 51 52 #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 53 #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 54 #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 55 #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 56 57 58 59 60 #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 61 #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 62 #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 63 #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 64 65 66 67 68 #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 69 #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_LSB 28 70 #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 71 #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 72 73 74 75 #endif 76