xref: /wlan-driver/fw-api/hw/qca6290/11ax/v1/reo_flush_queue.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
5*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
6*5113495bSYour Name  * above copyright notice and this permission notice appear in all
7*5113495bSYour Name  * copies.
8*5113495bSYour Name  *
9*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
17*5113495bSYour Name  */
18*5113495bSYour Name 
19*5113495bSYour Name #ifndef _REO_FLUSH_QUEUE_H_
20*5113495bSYour Name #define _REO_FLUSH_QUEUE_H_
21*5113495bSYour Name #if !defined(__ASSEMBLER__)
22*5113495bSYour Name #endif
23*5113495bSYour Name 
24*5113495bSYour Name #include "uniform_reo_cmd_header.h"
25*5113495bSYour Name 
26*5113495bSYour Name // ################ START SUMMARY #################
27*5113495bSYour Name //
28*5113495bSYour Name //	Dword	Fields
29*5113495bSYour Name //	0	struct uniform_reo_cmd_header cmd_header;
30*5113495bSYour Name //	1	flush_desc_addr_31_0[31:0]
31*5113495bSYour Name //	2	flush_desc_addr_39_32[7:0], block_desc_addr_usage_after_flush[8], block_resource_index[10:9], reserved_2a[31:11]
32*5113495bSYour Name //	3	reserved_3a[31:0]
33*5113495bSYour Name //	4	reserved_4a[31:0]
34*5113495bSYour Name //	5	reserved_5a[31:0]
35*5113495bSYour Name //	6	reserved_6a[31:0]
36*5113495bSYour Name //	7	reserved_7a[31:0]
37*5113495bSYour Name //	8	reserved_8a[31:0]
38*5113495bSYour Name //
39*5113495bSYour Name // ################ END SUMMARY #################
40*5113495bSYour Name 
41*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_QUEUE 9
42*5113495bSYour Name 
43*5113495bSYour Name struct reo_flush_queue {
44*5113495bSYour Name     struct            uniform_reo_cmd_header                       cmd_header;
45*5113495bSYour Name              uint32_t flush_desc_addr_31_0            : 32; //[31:0]
46*5113495bSYour Name              uint32_t flush_desc_addr_39_32           :  8, //[7:0]
47*5113495bSYour Name                       block_desc_addr_usage_after_flush:  1, //[8]
48*5113495bSYour Name                       block_resource_index            :  2, //[10:9]
49*5113495bSYour Name                       reserved_2a                     : 21; //[31:11]
50*5113495bSYour Name              uint32_t reserved_3a                     : 32; //[31:0]
51*5113495bSYour Name              uint32_t reserved_4a                     : 32; //[31:0]
52*5113495bSYour Name              uint32_t reserved_5a                     : 32; //[31:0]
53*5113495bSYour Name              uint32_t reserved_6a                     : 32; //[31:0]
54*5113495bSYour Name              uint32_t reserved_7a                     : 32; //[31:0]
55*5113495bSYour Name              uint32_t reserved_8a                     : 32; //[31:0]
56*5113495bSYour Name };
57*5113495bSYour Name 
58*5113495bSYour Name /*
59*5113495bSYour Name 
60*5113495bSYour Name struct uniform_reo_cmd_header cmd_header
61*5113495bSYour Name 
62*5113495bSYour Name 			Consumer: REO
63*5113495bSYour Name 
64*5113495bSYour Name 			Producer: SW
65*5113495bSYour Name 
66*5113495bSYour Name 
67*5113495bSYour Name 
68*5113495bSYour Name 			Details for command execution tracking purposes.
69*5113495bSYour Name 
70*5113495bSYour Name flush_desc_addr_31_0
71*5113495bSYour Name 
72*5113495bSYour Name 			Consumer: REO
73*5113495bSYour Name 
74*5113495bSYour Name 			Producer: SW
75*5113495bSYour Name 
76*5113495bSYour Name 
77*5113495bSYour Name 
78*5113495bSYour Name 			Address (lower 32 bits) of the descriptor to flush
79*5113495bSYour Name 
80*5113495bSYour Name 			<legal all>
81*5113495bSYour Name 
82*5113495bSYour Name flush_desc_addr_39_32
83*5113495bSYour Name 
84*5113495bSYour Name 			Consumer: REO
85*5113495bSYour Name 
86*5113495bSYour Name 			Producer: SW
87*5113495bSYour Name 
88*5113495bSYour Name 
89*5113495bSYour Name 
90*5113495bSYour Name 			Address (upper 8 bits) of the descriptor to flush
91*5113495bSYour Name 
92*5113495bSYour Name 			<legal all>
93*5113495bSYour Name 
94*5113495bSYour Name block_desc_addr_usage_after_flush
95*5113495bSYour Name 
96*5113495bSYour Name 			When set, REO shall not re-fetch this address till SW
97*5113495bSYour Name 			explicitly unblocked this address
98*5113495bSYour Name 
99*5113495bSYour Name 
100*5113495bSYour Name 
101*5113495bSYour Name 			If the blocking resource was already used, this command
102*5113495bSYour Name 			shall fail and an error is reported
103*5113495bSYour Name 
104*5113495bSYour Name 
105*5113495bSYour Name 
106*5113495bSYour Name 			<legal all>
107*5113495bSYour Name 
108*5113495bSYour Name block_resource_index
109*5113495bSYour Name 
110*5113495bSYour Name 			Field only valid when 'Block_desc_addr_usage_after_flush
111*5113495bSYour Name 			' is set.
112*5113495bSYour Name 
113*5113495bSYour Name 
114*5113495bSYour Name 
115*5113495bSYour Name 			Indicates which of the four blocking resources in REO
116*5113495bSYour Name 			will be assigned for managing the blocking of this address.
117*5113495bSYour Name 
118*5113495bSYour Name 			<legal all>
119*5113495bSYour Name 
120*5113495bSYour Name reserved_2a
121*5113495bSYour Name 
122*5113495bSYour Name 			<legal 0>
123*5113495bSYour Name 
124*5113495bSYour Name reserved_3a
125*5113495bSYour Name 
126*5113495bSYour Name 			<legal 0>
127*5113495bSYour Name 
128*5113495bSYour Name reserved_4a
129*5113495bSYour Name 
130*5113495bSYour Name 			<legal 0>
131*5113495bSYour Name 
132*5113495bSYour Name reserved_5a
133*5113495bSYour Name 
134*5113495bSYour Name 			<legal 0>
135*5113495bSYour Name 
136*5113495bSYour Name reserved_6a
137*5113495bSYour Name 
138*5113495bSYour Name 			<legal 0>
139*5113495bSYour Name 
140*5113495bSYour Name reserved_7a
141*5113495bSYour Name 
142*5113495bSYour Name 			<legal 0>
143*5113495bSYour Name 
144*5113495bSYour Name reserved_8a
145*5113495bSYour Name 
146*5113495bSYour Name 			<legal 0>
147*5113495bSYour Name */
148*5113495bSYour Name 
149*5113495bSYour Name #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET   0x00000000
150*5113495bSYour Name #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB      0
151*5113495bSYour Name #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK     0xffffffff
152*5113495bSYour Name 
153*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0
154*5113495bSYour Name 
155*5113495bSYour Name 			Consumer: REO
156*5113495bSYour Name 
157*5113495bSYour Name 			Producer: SW
158*5113495bSYour Name 
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name 			Address (lower 32 bits) of the descriptor to flush
162*5113495bSYour Name 
163*5113495bSYour Name 			<legal all>
164*5113495bSYour Name */
165*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_OFFSET                0x00000004
166*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_LSB                   0
167*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_MASK                  0xffffffff
168*5113495bSYour Name 
169*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32
170*5113495bSYour Name 
171*5113495bSYour Name 			Consumer: REO
172*5113495bSYour Name 
173*5113495bSYour Name 			Producer: SW
174*5113495bSYour Name 
175*5113495bSYour Name 
176*5113495bSYour Name 
177*5113495bSYour Name 			Address (upper 8 bits) of the descriptor to flush
178*5113495bSYour Name 
179*5113495bSYour Name 			<legal all>
180*5113495bSYour Name */
181*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_OFFSET               0x00000008
182*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_LSB                  0
183*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_MASK                 0x000000ff
184*5113495bSYour Name 
185*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH
186*5113495bSYour Name 
187*5113495bSYour Name 			When set, REO shall not re-fetch this address till SW
188*5113495bSYour Name 			explicitly unblocked this address
189*5113495bSYour Name 
190*5113495bSYour Name 
191*5113495bSYour Name 
192*5113495bSYour Name 			If the blocking resource was already used, this command
193*5113495bSYour Name 			shall fail and an error is reported
194*5113495bSYour Name 
195*5113495bSYour Name 
196*5113495bSYour Name 
197*5113495bSYour Name 			<legal all>
198*5113495bSYour Name */
199*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_OFFSET   0x00000008
200*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_LSB      8
201*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_MASK     0x00000100
202*5113495bSYour Name 
203*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX
204*5113495bSYour Name 
205*5113495bSYour Name 			Field only valid when 'Block_desc_addr_usage_after_flush
206*5113495bSYour Name 			' is set.
207*5113495bSYour Name 
208*5113495bSYour Name 
209*5113495bSYour Name 
210*5113495bSYour Name 			Indicates which of the four blocking resources in REO
211*5113495bSYour Name 			will be assigned for managing the blocking of this address.
212*5113495bSYour Name 
213*5113495bSYour Name 			<legal all>
214*5113495bSYour Name */
215*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_OFFSET                0x00000008
216*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_LSB                   9
217*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_MASK                  0x00000600
218*5113495bSYour Name 
219*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_2_RESERVED_2A
220*5113495bSYour Name 
221*5113495bSYour Name 			<legal 0>
222*5113495bSYour Name */
223*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_OFFSET                         0x00000008
224*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_LSB                            11
225*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_MASK                           0xfffff800
226*5113495bSYour Name 
227*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_3_RESERVED_3A
228*5113495bSYour Name 
229*5113495bSYour Name 			<legal 0>
230*5113495bSYour Name */
231*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_OFFSET                         0x0000000c
232*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_LSB                            0
233*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_MASK                           0xffffffff
234*5113495bSYour Name 
235*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_4_RESERVED_4A
236*5113495bSYour Name 
237*5113495bSYour Name 			<legal 0>
238*5113495bSYour Name */
239*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_OFFSET                         0x00000010
240*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_LSB                            0
241*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_MASK                           0xffffffff
242*5113495bSYour Name 
243*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_5_RESERVED_5A
244*5113495bSYour Name 
245*5113495bSYour Name 			<legal 0>
246*5113495bSYour Name */
247*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_OFFSET                         0x00000014
248*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_LSB                            0
249*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_MASK                           0xffffffff
250*5113495bSYour Name 
251*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_6_RESERVED_6A
252*5113495bSYour Name 
253*5113495bSYour Name 			<legal 0>
254*5113495bSYour Name */
255*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_OFFSET                         0x00000018
256*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_LSB                            0
257*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_MASK                           0xffffffff
258*5113495bSYour Name 
259*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_7_RESERVED_7A
260*5113495bSYour Name 
261*5113495bSYour Name 			<legal 0>
262*5113495bSYour Name */
263*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_OFFSET                         0x0000001c
264*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_LSB                            0
265*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_MASK                           0xffffffff
266*5113495bSYour Name 
267*5113495bSYour Name /* Description		REO_FLUSH_QUEUE_8_RESERVED_8A
268*5113495bSYour Name 
269*5113495bSYour Name 			<legal 0>
270*5113495bSYour Name */
271*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_OFFSET                         0x00000020
272*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_LSB                            0
273*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_MASK                           0xffffffff
274*5113495bSYour Name 
275*5113495bSYour Name 
276*5113495bSYour Name #endif // _REO_FLUSH_QUEUE_H_
277