1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _REO_UPDATE_RX_REO_QUEUE_H_ 20 #define _REO_UPDATE_RX_REO_QUEUE_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "uniform_reo_cmd_header.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0 struct uniform_reo_cmd_header cmd_header; 30 // 1 rx_reo_queue_desc_addr_31_0[31:0] 31 // 2 rx_reo_queue_desc_addr_39_32[7:0], update_receive_queue_number[8], update_vld[9], update_associated_link_descriptor_counter[10], update_disable_duplicate_detection[11], update_soft_reorder_enable[12], update_ac[13], update_bar[14], update_rty[15], update_chk_2k_mode[16], update_oor_mode[17], update_ba_window_size[18], update_pn_check_needed[19], update_pn_shall_be_even[20], update_pn_shall_be_uneven[21], update_pn_handling_enable[22], update_pn_size[23], update_ignore_ampdu_flag[24], update_svld[25], update_ssn[26], update_seq_2k_error_detected_flag[27], update_pn_error_detected_flag[28], update_pn_valid[29], update_pn[30], clear_stat_counters[31] 32 // 3 receive_queue_number[15:0], vld[16], associated_link_descriptor_counter[18:17], disable_duplicate_detection[19], soft_reorder_enable[20], ac[22:21], bar[23], rty[24], chk_2k_mode[25], oor_mode[26], pn_check_needed[27], pn_shall_be_even[28], pn_shall_be_uneven[29], pn_handling_enable[30], ignore_ampdu_flag[31] 33 // 4 ba_window_size[7:0], pn_size[9:8], svld[10], ssn[22:11], seq_2k_error_detected_flag[23], pn_error_detected_flag[24], pn_valid[25], flush_from_cache[26], reserved_4a[31:27] 34 // 5 pn_31_0[31:0] 35 // 6 pn_63_32[31:0] 36 // 7 pn_95_64[31:0] 37 // 8 pn_127_96[31:0] 38 // 39 // ################ END SUMMARY ################# 40 41 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 9 42 43 struct reo_update_rx_reo_queue { 44 struct uniform_reo_cmd_header cmd_header; 45 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 46 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 47 update_receive_queue_number : 1, //[8] 48 update_vld : 1, //[9] 49 update_associated_link_descriptor_counter: 1, //[10] 50 update_disable_duplicate_detection: 1, //[11] 51 update_soft_reorder_enable : 1, //[12] 52 update_ac : 1, //[13] 53 update_bar : 1, //[14] 54 update_rty : 1, //[15] 55 update_chk_2k_mode : 1, //[16] 56 update_oor_mode : 1, //[17] 57 update_ba_window_size : 1, //[18] 58 update_pn_check_needed : 1, //[19] 59 update_pn_shall_be_even : 1, //[20] 60 update_pn_shall_be_uneven : 1, //[21] 61 update_pn_handling_enable : 1, //[22] 62 update_pn_size : 1, //[23] 63 update_ignore_ampdu_flag : 1, //[24] 64 update_svld : 1, //[25] 65 update_ssn : 1, //[26] 66 update_seq_2k_error_detected_flag: 1, //[27] 67 update_pn_error_detected_flag : 1, //[28] 68 update_pn_valid : 1, //[29] 69 update_pn : 1, //[30] 70 clear_stat_counters : 1; //[31] 71 uint32_t receive_queue_number : 16, //[15:0] 72 vld : 1, //[16] 73 associated_link_descriptor_counter: 2, //[18:17] 74 disable_duplicate_detection : 1, //[19] 75 soft_reorder_enable : 1, //[20] 76 ac : 2, //[22:21] 77 bar : 1, //[23] 78 rty : 1, //[24] 79 chk_2k_mode : 1, //[25] 80 oor_mode : 1, //[26] 81 pn_check_needed : 1, //[27] 82 pn_shall_be_even : 1, //[28] 83 pn_shall_be_uneven : 1, //[29] 84 pn_handling_enable : 1, //[30] 85 ignore_ampdu_flag : 1; //[31] 86 uint32_t ba_window_size : 8, //[7:0] 87 pn_size : 2, //[9:8] 88 svld : 1, //[10] 89 ssn : 12, //[22:11] 90 seq_2k_error_detected_flag : 1, //[23] 91 pn_error_detected_flag : 1, //[24] 92 pn_valid : 1, //[25] 93 flush_from_cache : 1, //[26] 94 reserved_4a : 5; //[31:27] 95 uint32_t pn_31_0 : 32; //[31:0] 96 uint32_t pn_63_32 : 32; //[31:0] 97 uint32_t pn_95_64 : 32; //[31:0] 98 uint32_t pn_127_96 : 32; //[31:0] 99 }; 100 101 /* 102 103 struct uniform_reo_cmd_header cmd_header 104 105 Consumer: REO 106 107 Producer: SW 108 109 110 111 Details for command execution tracking purposes. 112 113 rx_reo_queue_desc_addr_31_0 114 115 Consumer: REO 116 117 Producer: SW 118 119 120 121 Address (lower 32 bits) of the REO queue descriptor 122 123 <legal all> 124 125 rx_reo_queue_desc_addr_39_32 126 127 Consumer: REO 128 129 Producer: SW 130 131 132 133 Address (upper 8 bits) of the REO queue descriptor 134 135 <legal all> 136 137 update_receive_queue_number 138 139 Consumer: REO 140 141 Producer: SW 142 143 When set, receive_queue_number from this command will be 144 updated in the descriptor. 145 146 <legal all> 147 148 update_vld 149 150 Consumer: REO 151 152 Producer: SW 153 154 155 156 When clear, REO will NOT update the VLD bit setting. For 157 this setting, SW MUST set the Flush_from_cache bit in this 158 command. 159 160 161 162 When set, VLD from this command will be updated in the 163 descriptor. 164 165 <legal all> 166 167 update_associated_link_descriptor_counter 168 169 Consumer: REO 170 171 Producer: SW 172 173 When set, Associated_link_descriptor_counter from this 174 command will be updated in the descriptor. 175 176 <legal all> 177 178 update_disable_duplicate_detection 179 180 Consumer: REO 181 182 Producer: SW 183 184 When set, Disable_duplicate_detection from this command 185 will be updated in the descriptor. 186 187 <legal all> 188 189 update_soft_reorder_enable 190 191 Consumer: REO 192 193 Producer: SW 194 195 When set, Soft_reorder_enable from this command will be 196 updated in the descriptor. 197 198 <legal all> 199 200 update_ac 201 202 Consumer: REO 203 204 Producer: SW 205 206 When set, AC from this command will be updated in the 207 descriptor. 208 209 <legal all> 210 211 update_bar 212 213 Consumer: REO 214 215 Producer: SW 216 217 When set, BAR from this command will be updated in the 218 descriptor. 219 220 <legal all> 221 222 update_rty 223 224 Consumer: REO 225 226 Producer: SW 227 228 When set, RTY from this command will be updated in the 229 descriptor. 230 231 <legal all> 232 233 update_chk_2k_mode 234 235 Consumer: REO 236 237 Producer: SW 238 239 When set, Chk_2k_mode from this command will be updated 240 in the descriptor. 241 242 <legal all> 243 244 update_oor_mode 245 246 Consumer: REO 247 248 Producer: SW 249 250 When set, OOR_Mode from this command will be updated in 251 the descriptor. 252 253 <legal all> 254 255 update_ba_window_size 256 257 Consumer: REO 258 259 Producer: SW 260 261 When set, BA_window_size from this command will be 262 updated in the descriptor. 263 264 <legal all> 265 266 update_pn_check_needed 267 268 Consumer: REO 269 270 Producer: SW 271 272 When set, Pn_check_needed from this command will be 273 updated in the descriptor. 274 275 <legal all> 276 277 update_pn_shall_be_even 278 279 Consumer: REO 280 281 Producer: SW 282 283 When set, Pn_shall_be_even from this command will be 284 updated in the descriptor. 285 286 <legal all> 287 288 update_pn_shall_be_uneven 289 290 Consumer: REO 291 292 Producer: SW 293 294 When set, Pn_shall_be_uneven from this command will be 295 updated in the descriptor. 296 297 <legal all> 298 299 update_pn_handling_enable 300 301 Consumer: REO 302 303 Producer: SW 304 305 When set, Pn_handling_enable from this command will be 306 updated in the descriptor. 307 308 <legal all> 309 310 update_pn_size 311 312 Consumer: REO 313 314 Producer: SW 315 316 When set, Pn_size from this command will be updated in 317 the descriptor. 318 319 <legal all> 320 321 update_ignore_ampdu_flag 322 323 Consumer: REO 324 325 Producer: SW 326 327 When set, Ignore_ampdu_flag from this command will be 328 updated in the descriptor. 329 330 <legal all> 331 332 update_svld 333 334 Consumer: REO 335 336 Producer: SW 337 338 When set, Svld from this command will be updated in the 339 descriptor. 340 341 <legal all> 342 343 update_ssn 344 345 Consumer: REO 346 347 Producer: SW 348 349 When set, SSN from this command will be updated in the 350 descriptor. 351 352 <legal all> 353 354 update_seq_2k_error_detected_flag 355 356 Consumer: REO 357 358 Producer: SW 359 360 When set, Seq_2k_error_detected_flag from this command 361 will be updated in the descriptor. 362 363 <legal all> 364 365 update_pn_error_detected_flag 366 367 Consumer: REO 368 369 Producer: SW 370 371 When set, pn_error_detected_flag from this command will 372 be updated in the descriptor. 373 374 <legal all> 375 376 update_pn_valid 377 378 Consumer: REO 379 380 Producer: SW 381 382 When set, pn_valid from this command will be updated in 383 the descriptor. 384 385 <legal all> 386 387 update_pn 388 389 Consumer: REO 390 391 Producer: SW 392 393 When set, all pn_... fields from this command will be 394 updated in the descriptor. 395 396 <legal all> 397 398 clear_stat_counters 399 400 Consumer: REO 401 402 Producer: SW 403 404 When set, REO will clear (=> set to 0) the following 405 stat counters in the REO_QUEUE_STRUCT 406 407 408 409 Last_rx_enqueue_TimeStamp 410 411 Last_rx_dequeue_Timestamp 412 413 Rx_bitmap (not a counter, but bitmap is cleared) 414 415 Timeout_count 416 417 Forward_due_to_bar_count 418 419 Duplicate_count 420 421 Frames_in_order_count 422 423 BAR_received_count 424 425 MPDU_Frames_processed_count 426 427 MSDU_Frames_processed_count 428 429 Total_processed_byte_count 430 431 Late_receive_MPDU_count 432 433 window_jump_2k 434 435 Hole_count 436 437 438 439 <legal all> 440 441 receive_queue_number 442 443 444 445 446 Field value to be copied over into the RX_REO_QUEUE 447 descriptor. 448 449 <legal all> 450 451 vld 452 453 Field only valid when Update_VLD is set 454 455 456 457 Field value to be copied over into the RX_REO_QUEUE 458 descriptor. 459 460 <legal all> 461 462 associated_link_descriptor_counter 463 464 Field only valid when 465 Update_Associated_link_descriptor_counter is set 466 467 468 469 Field value to be copied over into the RX_REO_QUEUE 470 descriptor. 471 472 <legal all> 473 474 disable_duplicate_detection 475 476 Field only valid when Update_Disable_duplicate_detection 477 is set 478 479 480 481 Field value to be copied over into the RX_REO_QUEUE 482 descriptor. 483 484 <legal all> 485 486 soft_reorder_enable 487 488 Field only valid when Update_Soft_reorder_enable is set 489 490 491 492 Field value to be copied over into the RX_REO_QUEUE 493 descriptor. 494 495 <legal all> 496 497 ac 498 499 Field only valid when Update_AC is set 500 501 502 503 Field value to be copied over into the RX_REO_QUEUE 504 descriptor. 505 506 <legal all> 507 508 bar 509 510 Field only valid when Update_BAR is set 511 512 513 514 Field value to be copied over into the RX_REO_QUEUE 515 descriptor. 516 517 <legal all> 518 519 rty 520 521 Field only valid when Update_RTY is set 522 523 524 525 Field value to be copied over into the RX_REO_QUEUE 526 descriptor. 527 528 <legal all> 529 530 chk_2k_mode 531 532 Field only valid when Update_Chk_2k_Mode is set 533 534 535 536 Field value to be copied over into the RX_REO_QUEUE 537 descriptor. 538 539 <legal all> 540 541 oor_mode 542 543 Field only valid when Update_OOR_Mode is set 544 545 546 547 Field value to be copied over into the RX_REO_QUEUE 548 descriptor. 549 550 <legal all> 551 552 pn_check_needed 553 554 Field only valid when Update_Pn_check_needed is set 555 556 557 558 Field value to be copied over into the RX_REO_QUEUE 559 descriptor. 560 561 <legal all> 562 563 pn_shall_be_even 564 565 Field only valid when Update_Pn_shall_be_even is set 566 567 568 569 Field value to be copied over into the RX_REO_QUEUE 570 descriptor. 571 572 <legal all> 573 574 pn_shall_be_uneven 575 576 Field only valid when Update_Pn_shall_be_uneven is set 577 578 579 580 Field value to be copied over into the RX_REO_QUEUE 581 descriptor. 582 583 <legal all> 584 585 pn_handling_enable 586 587 Field only valid when Update_Pn_handling_enable is set 588 589 590 591 Field value to be copied over into the RX_REO_QUEUE 592 descriptor. 593 594 <legal all> 595 596 ignore_ampdu_flag 597 598 Field only valid when Update_Ignore_ampdu_flag is set 599 600 601 602 Field value to be copied over into the RX_REO_QUEUE 603 descriptor. 604 605 <legal all> 606 607 ba_window_size 608 609 Field only valid when Update_BA_window_size is set 610 611 612 613 Field value to be copied over into the RX_REO_QUEUE 614 descriptor. 615 616 <legal all> 617 618 pn_size 619 620 Field only valid when Update_Pn_size is set 621 622 623 624 Field value to be copied over into the RX_REO_QUEUE 625 descriptor. 626 627 628 629 <enum 0 pn_size_24> 630 631 <enum 1 pn_size_48> 632 633 <enum 2 pn_size_128> 634 635 636 637 <legal 0-2> 638 639 svld 640 641 Field only valid when Update_Svld is set 642 643 644 645 Field value to be copied over into the RX_REO_QUEUE 646 descriptor. 647 648 <legal all> 649 650 ssn 651 652 Field only valid when Update_SSN is set 653 654 655 656 Field value to be copied over into the RX_REO_QUEUE 657 descriptor. 658 659 <legal all> 660 661 seq_2k_error_detected_flag 662 663 Field only valid when Update_Seq_2k_error_detected_flag 664 is set 665 666 667 668 Field value to be copied over into the RX_REO_QUEUE 669 descriptor. 670 671 <legal all> 672 673 pn_error_detected_flag 674 675 Field only valid when Update_pn_error_detected_flag is 676 set 677 678 679 680 Field value to be copied over into the RX_REO_QUEUE 681 descriptor. 682 683 <legal all> 684 685 pn_valid 686 687 Field only valid when Update_pn_valid is set 688 689 690 691 Field value to be copied over into the RX_REO_QUEUE 692 descriptor. 693 694 <legal all> 695 696 flush_from_cache 697 698 When set, REO shall, after finishing the execution of 699 this command, flush the related descriptor from the cache. 700 701 <legal all> 702 703 reserved_4a 704 705 <legal 0> 706 707 pn_31_0 708 709 Field only valid when Update_Pn is set 710 711 712 713 Field value to be copied over into the RX_REO_QUEUE 714 descriptor. 715 716 <legal all> 717 718 pn_63_32 719 720 Field only valid when Update_pn is set 721 722 723 724 Field value to be copied over into the RX_REO_QUEUE 725 descriptor. 726 727 <legal all> 728 729 pn_95_64 730 731 Field only valid when Update_pn is set 732 733 734 735 Field value to be copied over into the RX_REO_QUEUE 736 descriptor. 737 738 <legal all> 739 740 pn_127_96 741 742 Field only valid when Update_pn is set 743 744 745 746 Field value to be copied over into the RX_REO_QUEUE 747 descriptor. 748 749 <legal all> 750 */ 751 752 #define REO_UPDATE_RX_REO_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000 753 #define REO_UPDATE_RX_REO_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0 754 #define REO_UPDATE_RX_REO_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff 755 756 /* Description REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0 757 758 Consumer: REO 759 760 Producer: SW 761 762 763 764 Address (lower 32 bits) of the REO queue descriptor 765 766 <legal all> 767 */ 768 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 769 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 770 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 771 772 /* Description REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32 773 774 Consumer: REO 775 776 Producer: SW 777 778 779 780 Address (upper 8 bits) of the REO queue descriptor 781 782 <legal all> 783 */ 784 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 785 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 786 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 787 788 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER 789 790 Consumer: REO 791 792 Producer: SW 793 794 When set, receive_queue_number from this command will be 795 updated in the descriptor. 796 797 <legal all> 798 */ 799 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008 800 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_LSB 8 801 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_MASK 0x00000100 802 803 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD 804 805 Consumer: REO 806 807 Producer: SW 808 809 810 811 When clear, REO will NOT update the VLD bit setting. For 812 this setting, SW MUST set the Flush_from_cache bit in this 813 command. 814 815 816 817 When set, VLD from this command will be updated in the 818 descriptor. 819 820 <legal all> 821 */ 822 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_OFFSET 0x00000008 823 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_LSB 9 824 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_MASK 0x00000200 825 826 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER 827 828 Consumer: REO 829 830 Producer: SW 831 832 When set, Associated_link_descriptor_counter from this 833 command will be updated in the descriptor. 834 835 <legal all> 836 */ 837 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008 838 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10 839 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000400 840 841 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION 842 843 Consumer: REO 844 845 Producer: SW 846 847 When set, Disable_duplicate_detection from this command 848 will be updated in the descriptor. 849 850 <legal all> 851 */ 852 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008 853 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11 854 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000800 855 856 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE 857 858 Consumer: REO 859 860 Producer: SW 861 862 When set, Soft_reorder_enable from this command will be 863 updated in the descriptor. 864 865 <legal all> 866 */ 867 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_OFFSET 0x00000008 868 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_LSB 12 869 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_MASK 0x00001000 870 871 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC 872 873 Consumer: REO 874 875 Producer: SW 876 877 When set, AC from this command will be updated in the 878 descriptor. 879 880 <legal all> 881 */ 882 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_OFFSET 0x00000008 883 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_LSB 13 884 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_MASK 0x00002000 885 886 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR 887 888 Consumer: REO 889 890 Producer: SW 891 892 When set, BAR from this command will be updated in the 893 descriptor. 894 895 <legal all> 896 */ 897 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_OFFSET 0x00000008 898 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_LSB 14 899 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_MASK 0x00004000 900 901 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY 902 903 Consumer: REO 904 905 Producer: SW 906 907 When set, RTY from this command will be updated in the 908 descriptor. 909 910 <legal all> 911 */ 912 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_OFFSET 0x00000008 913 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_LSB 15 914 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_MASK 0x00008000 915 916 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE 917 918 Consumer: REO 919 920 Producer: SW 921 922 When set, Chk_2k_mode from this command will be updated 923 in the descriptor. 924 925 <legal all> 926 */ 927 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_OFFSET 0x00000008 928 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_LSB 16 929 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_MASK 0x00010000 930 931 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE 932 933 Consumer: REO 934 935 Producer: SW 936 937 When set, OOR_Mode from this command will be updated in 938 the descriptor. 939 940 <legal all> 941 */ 942 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_OFFSET 0x00000008 943 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_LSB 17 944 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_MASK 0x00020000 945 946 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE 947 948 Consumer: REO 949 950 Producer: SW 951 952 When set, BA_window_size from this command will be 953 updated in the descriptor. 954 955 <legal all> 956 */ 957 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_OFFSET 0x00000008 958 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_LSB 18 959 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_MASK 0x00040000 960 961 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED 962 963 Consumer: REO 964 965 Producer: SW 966 967 When set, Pn_check_needed from this command will be 968 updated in the descriptor. 969 970 <legal all> 971 */ 972 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_OFFSET 0x00000008 973 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_LSB 19 974 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_MASK 0x00080000 975 976 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN 977 978 Consumer: REO 979 980 Producer: SW 981 982 When set, Pn_shall_be_even from this command will be 983 updated in the descriptor. 984 985 <legal all> 986 */ 987 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_OFFSET 0x00000008 988 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_LSB 20 989 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_MASK 0x00100000 990 991 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN 992 993 Consumer: REO 994 995 Producer: SW 996 997 When set, Pn_shall_be_uneven from this command will be 998 updated in the descriptor. 999 1000 <legal all> 1001 */ 1002 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET 0x00000008 1003 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_LSB 21 1004 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_MASK 0x00200000 1005 1006 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE 1007 1008 Consumer: REO 1009 1010 Producer: SW 1011 1012 When set, Pn_handling_enable from this command will be 1013 updated in the descriptor. 1014 1015 <legal all> 1016 */ 1017 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_OFFSET 0x00000008 1018 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_LSB 22 1019 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_MASK 0x00400000 1020 1021 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE 1022 1023 Consumer: REO 1024 1025 Producer: SW 1026 1027 When set, Pn_size from this command will be updated in 1028 the descriptor. 1029 1030 <legal all> 1031 */ 1032 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_OFFSET 0x00000008 1033 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_LSB 23 1034 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_MASK 0x00800000 1035 1036 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG 1037 1038 Consumer: REO 1039 1040 Producer: SW 1041 1042 When set, Ignore_ampdu_flag from this command will be 1043 updated in the descriptor. 1044 1045 <legal all> 1046 */ 1047 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_OFFSET 0x00000008 1048 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_LSB 24 1049 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_MASK 0x01000000 1050 1051 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD 1052 1053 Consumer: REO 1054 1055 Producer: SW 1056 1057 When set, Svld from this command will be updated in the 1058 descriptor. 1059 1060 <legal all> 1061 */ 1062 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_OFFSET 0x00000008 1063 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_LSB 25 1064 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_MASK 0x02000000 1065 1066 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN 1067 1068 Consumer: REO 1069 1070 Producer: SW 1071 1072 When set, SSN from this command will be updated in the 1073 descriptor. 1074 1075 <legal all> 1076 */ 1077 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_OFFSET 0x00000008 1078 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_LSB 26 1079 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_MASK 0x04000000 1080 1081 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG 1082 1083 Consumer: REO 1084 1085 Producer: SW 1086 1087 When set, Seq_2k_error_detected_flag from this command 1088 will be updated in the descriptor. 1089 1090 <legal all> 1091 */ 1092 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000008 1093 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27 1094 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x08000000 1095 1096 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG 1097 1098 Consumer: REO 1099 1100 Producer: SW 1101 1102 When set, pn_error_detected_flag from this command will 1103 be updated in the descriptor. 1104 1105 <legal all> 1106 */ 1107 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000008 1108 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_LSB 28 1109 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x10000000 1110 1111 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID 1112 1113 Consumer: REO 1114 1115 Producer: SW 1116 1117 When set, pn_valid from this command will be updated in 1118 the descriptor. 1119 1120 <legal all> 1121 */ 1122 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_OFFSET 0x00000008 1123 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_LSB 29 1124 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_MASK 0x20000000 1125 1126 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN 1127 1128 Consumer: REO 1129 1130 Producer: SW 1131 1132 When set, all pn_... fields from this command will be 1133 updated in the descriptor. 1134 1135 <legal all> 1136 */ 1137 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_OFFSET 0x00000008 1138 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_LSB 30 1139 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_MASK 0x40000000 1140 1141 /* Description REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS 1142 1143 Consumer: REO 1144 1145 Producer: SW 1146 1147 When set, REO will clear (=> set to 0) the following 1148 stat counters in the REO_QUEUE_STRUCT 1149 1150 1151 1152 Last_rx_enqueue_TimeStamp 1153 1154 Last_rx_dequeue_Timestamp 1155 1156 Rx_bitmap (not a counter, but bitmap is cleared) 1157 1158 Timeout_count 1159 1160 Forward_due_to_bar_count 1161 1162 Duplicate_count 1163 1164 Frames_in_order_count 1165 1166 BAR_received_count 1167 1168 MPDU_Frames_processed_count 1169 1170 MSDU_Frames_processed_count 1171 1172 Total_processed_byte_count 1173 1174 Late_receive_MPDU_count 1175 1176 window_jump_2k 1177 1178 Hole_count 1179 1180 1181 1182 <legal all> 1183 */ 1184 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_OFFSET 0x00000008 1185 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_LSB 31 1186 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_MASK 0x80000000 1187 1188 /* Description REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER 1189 1190 1191 1192 1193 Field value to be copied over into the RX_REO_QUEUE 1194 descriptor. 1195 1196 <legal all> 1197 */ 1198 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 1199 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_LSB 0 1200 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 1201 1202 /* Description REO_UPDATE_RX_REO_QUEUE_3_VLD 1203 1204 Field only valid when Update_VLD is set 1205 1206 1207 1208 Field value to be copied over into the RX_REO_QUEUE 1209 descriptor. 1210 1211 <legal all> 1212 */ 1213 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_OFFSET 0x0000000c 1214 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_LSB 16 1215 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_MASK 0x00010000 1216 1217 /* Description REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER 1218 1219 Field only valid when 1220 Update_Associated_link_descriptor_counter is set 1221 1222 1223 1224 Field value to be copied over into the RX_REO_QUEUE 1225 descriptor. 1226 1227 <legal all> 1228 */ 1229 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000c 1230 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 17 1231 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00060000 1232 1233 /* Description REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION 1234 1235 Field only valid when Update_Disable_duplicate_detection 1236 is set 1237 1238 1239 1240 Field value to be copied over into the RX_REO_QUEUE 1241 descriptor. 1242 1243 <legal all> 1244 */ 1245 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000c 1246 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_LSB 19 1247 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_MASK 0x00080000 1248 1249 /* Description REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE 1250 1251 Field only valid when Update_Soft_reorder_enable is set 1252 1253 1254 1255 Field value to be copied over into the RX_REO_QUEUE 1256 descriptor. 1257 1258 <legal all> 1259 */ 1260 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_OFFSET 0x0000000c 1261 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_LSB 20 1262 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_MASK 0x00100000 1263 1264 /* Description REO_UPDATE_RX_REO_QUEUE_3_AC 1265 1266 Field only valid when Update_AC is set 1267 1268 1269 1270 Field value to be copied over into the RX_REO_QUEUE 1271 descriptor. 1272 1273 <legal all> 1274 */ 1275 #define REO_UPDATE_RX_REO_QUEUE_3_AC_OFFSET 0x0000000c 1276 #define REO_UPDATE_RX_REO_QUEUE_3_AC_LSB 21 1277 #define REO_UPDATE_RX_REO_QUEUE_3_AC_MASK 0x00600000 1278 1279 /* Description REO_UPDATE_RX_REO_QUEUE_3_BAR 1280 1281 Field only valid when Update_BAR is set 1282 1283 1284 1285 Field value to be copied over into the RX_REO_QUEUE 1286 descriptor. 1287 1288 <legal all> 1289 */ 1290 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_OFFSET 0x0000000c 1291 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_LSB 23 1292 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_MASK 0x00800000 1293 1294 /* Description REO_UPDATE_RX_REO_QUEUE_3_RTY 1295 1296 Field only valid when Update_RTY is set 1297 1298 1299 1300 Field value to be copied over into the RX_REO_QUEUE 1301 descriptor. 1302 1303 <legal all> 1304 */ 1305 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_OFFSET 0x0000000c 1306 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_LSB 24 1307 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_MASK 0x01000000 1308 1309 /* Description REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE 1310 1311 Field only valid when Update_Chk_2k_Mode is set 1312 1313 1314 1315 Field value to be copied over into the RX_REO_QUEUE 1316 descriptor. 1317 1318 <legal all> 1319 */ 1320 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_OFFSET 0x0000000c 1321 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_LSB 25 1322 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_MASK 0x02000000 1323 1324 /* Description REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE 1325 1326 Field only valid when Update_OOR_Mode is set 1327 1328 1329 1330 Field value to be copied over into the RX_REO_QUEUE 1331 descriptor. 1332 1333 <legal all> 1334 */ 1335 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_OFFSET 0x0000000c 1336 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_LSB 26 1337 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_MASK 0x04000000 1338 1339 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED 1340 1341 Field only valid when Update_Pn_check_needed is set 1342 1343 1344 1345 Field value to be copied over into the RX_REO_QUEUE 1346 descriptor. 1347 1348 <legal all> 1349 */ 1350 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_OFFSET 0x0000000c 1351 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_LSB 27 1352 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_MASK 0x08000000 1353 1354 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN 1355 1356 Field only valid when Update_Pn_shall_be_even is set 1357 1358 1359 1360 Field value to be copied over into the RX_REO_QUEUE 1361 descriptor. 1362 1363 <legal all> 1364 */ 1365 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_OFFSET 0x0000000c 1366 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_LSB 28 1367 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_MASK 0x10000000 1368 1369 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN 1370 1371 Field only valid when Update_Pn_shall_be_uneven is set 1372 1373 1374 1375 Field value to be copied over into the RX_REO_QUEUE 1376 descriptor. 1377 1378 <legal all> 1379 */ 1380 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000c 1381 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_LSB 29 1382 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_MASK 0x20000000 1383 1384 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE 1385 1386 Field only valid when Update_Pn_handling_enable is set 1387 1388 1389 1390 Field value to be copied over into the RX_REO_QUEUE 1391 descriptor. 1392 1393 <legal all> 1394 */ 1395 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_OFFSET 0x0000000c 1396 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_LSB 30 1397 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_MASK 0x40000000 1398 1399 /* Description REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG 1400 1401 Field only valid when Update_Ignore_ampdu_flag is set 1402 1403 1404 1405 Field value to be copied over into the RX_REO_QUEUE 1406 descriptor. 1407 1408 <legal all> 1409 */ 1410 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_OFFSET 0x0000000c 1411 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_LSB 31 1412 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_MASK 0x80000000 1413 1414 /* Description REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE 1415 1416 Field only valid when Update_BA_window_size is set 1417 1418 1419 1420 Field value to be copied over into the RX_REO_QUEUE 1421 descriptor. 1422 1423 <legal all> 1424 */ 1425 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_OFFSET 0x00000010 1426 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_LSB 0 1427 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_MASK 0x000000ff 1428 1429 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE 1430 1431 Field only valid when Update_Pn_size is set 1432 1433 1434 1435 Field value to be copied over into the RX_REO_QUEUE 1436 descriptor. 1437 1438 1439 1440 <enum 0 pn_size_24> 1441 1442 <enum 1 pn_size_48> 1443 1444 <enum 2 pn_size_128> 1445 1446 1447 1448 <legal 0-2> 1449 */ 1450 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_OFFSET 0x00000010 1451 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_LSB 8 1452 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_MASK 0x00000300 1453 1454 /* Description REO_UPDATE_RX_REO_QUEUE_4_SVLD 1455 1456 Field only valid when Update_Svld is set 1457 1458 1459 1460 Field value to be copied over into the RX_REO_QUEUE 1461 descriptor. 1462 1463 <legal all> 1464 */ 1465 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_OFFSET 0x00000010 1466 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_LSB 10 1467 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_MASK 0x00000400 1468 1469 /* Description REO_UPDATE_RX_REO_QUEUE_4_SSN 1470 1471 Field only valid when Update_SSN is set 1472 1473 1474 1475 Field value to be copied over into the RX_REO_QUEUE 1476 descriptor. 1477 1478 <legal all> 1479 */ 1480 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_OFFSET 0x00000010 1481 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_LSB 11 1482 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_MASK 0x007ff800 1483 1484 /* Description REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG 1485 1486 Field only valid when Update_Seq_2k_error_detected_flag 1487 is set 1488 1489 1490 1491 Field value to be copied over into the RX_REO_QUEUE 1492 descriptor. 1493 1494 <legal all> 1495 */ 1496 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000010 1497 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_LSB 23 1498 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x00800000 1499 1500 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG 1501 1502 Field only valid when Update_pn_error_detected_flag is 1503 set 1504 1505 1506 1507 Field value to be copied over into the RX_REO_QUEUE 1508 descriptor. 1509 1510 <legal all> 1511 */ 1512 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000010 1513 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_LSB 24 1514 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_MASK 0x01000000 1515 1516 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_VALID 1517 1518 Field only valid when Update_pn_valid is set 1519 1520 1521 1522 Field value to be copied over into the RX_REO_QUEUE 1523 descriptor. 1524 1525 <legal all> 1526 */ 1527 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_OFFSET 0x00000010 1528 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_LSB 25 1529 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_MASK 0x02000000 1530 1531 /* Description REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE 1532 1533 When set, REO shall, after finishing the execution of 1534 this command, flush the related descriptor from the cache. 1535 1536 <legal all> 1537 */ 1538 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_OFFSET 0x00000010 1539 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_LSB 26 1540 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_MASK 0x04000000 1541 1542 /* Description REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A 1543 1544 <legal 0> 1545 */ 1546 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_OFFSET 0x00000010 1547 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_LSB 27 1548 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_MASK 0xf8000000 1549 1550 /* Description REO_UPDATE_RX_REO_QUEUE_5_PN_31_0 1551 1552 Field only valid when Update_Pn is set 1553 1554 1555 1556 Field value to be copied over into the RX_REO_QUEUE 1557 descriptor. 1558 1559 <legal all> 1560 */ 1561 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_OFFSET 0x00000014 1562 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_LSB 0 1563 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_MASK 0xffffffff 1564 1565 /* Description REO_UPDATE_RX_REO_QUEUE_6_PN_63_32 1566 1567 Field only valid when Update_pn is set 1568 1569 1570 1571 Field value to be copied over into the RX_REO_QUEUE 1572 descriptor. 1573 1574 <legal all> 1575 */ 1576 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_OFFSET 0x00000018 1577 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_LSB 0 1578 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_MASK 0xffffffff 1579 1580 /* Description REO_UPDATE_RX_REO_QUEUE_7_PN_95_64 1581 1582 Field only valid when Update_pn is set 1583 1584 1585 1586 Field value to be copied over into the RX_REO_QUEUE 1587 descriptor. 1588 1589 <legal all> 1590 */ 1591 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_OFFSET 0x0000001c 1592 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_LSB 0 1593 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_MASK 0xffffffff 1594 1595 /* Description REO_UPDATE_RX_REO_QUEUE_8_PN_127_96 1596 1597 Field only valid when Update_pn is set 1598 1599 1600 1601 Field value to be copied over into the RX_REO_QUEUE 1602 descriptor. 1603 1604 <legal all> 1605 */ 1606 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_OFFSET 0x00000020 1607 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_LSB 0 1608 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_MASK 0xffffffff 1609 1610 1611 #endif // _REO_UPDATE_RX_REO_QUEUE_H_ 1612