xref: /wlan-driver/fw-api/hw/qca6290/11ax/v1/rx_rxpcu_classification_overview.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
20 #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 
25 // ################ START SUMMARY #################
26 //
27 //	Dword	Fields
28 //	0	filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], phyrx_abort_received[6], reserved_0[15:7], phy_ppdu_id[31:16]
29 //
30 // ################ END SUMMARY #################
31 
32 #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1
33 
34 struct rx_rxpcu_classification_overview {
35              uint32_t filter_pass_mpdus               :  1, //[0]
36                       filter_pass_mpdus_fcs_ok        :  1, //[1]
37                       monitor_direct_mpdus            :  1, //[2]
38                       monitor_direct_mpdus_fcs_ok     :  1, //[3]
39                       monitor_other_mpdus             :  1, //[4]
40                       monitor_other_mpdus_fcs_ok      :  1, //[5]
41                       phyrx_abort_received            :  1, //[6]
42                       reserved_0                      :  9, //[15:7]
43                       phy_ppdu_id                     : 16; //[31:16]
44 };
45 
46 /*
47 
48 filter_pass_mpdus
49 
50 			When set, at least one Filter Pass MPDU has been
51 			received. FCS might or might not have been passing.
52 
53 
54 
55 			For MU UL, in  TLVs RX_PPDU_END and
56 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
57 			users.
58 
59 			<legal all>
60 
61 filter_pass_mpdus_fcs_ok
62 
63 			When set, at least one Filter Pass MPDU has been
64 			received that has a correct FCS.
65 
66 
67 
68 			For MU UL, in  TLVs RX_PPDU_END and
69 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
70 			users.
71 
72 
73 
74 			<legal all>
75 
76 monitor_direct_mpdus
77 
78 			When set, at least one Monitor Direct MPDU has been
79 			received. FCS might or might not have been passing
80 
81 
82 
83 			For MU UL, in  TLVs RX_PPDU_END and
84 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
85 			users.
86 
87 			<legal all>
88 
89 monitor_direct_mpdus_fcs_ok
90 
91 			When set, at least one Monitor Direct MPDU has been
92 			received that has a correct FCS.
93 
94 
95 
96 			For MU UL, in  TLVs RX_PPDU_END and
97 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
98 			users.
99 
100 
101 
102 			<legal all>
103 
104 monitor_other_mpdus
105 
106 			When set, at least one Monitor Direct MPDU has been
107 			received. FCS might or might not have been passing.
108 
109 
110 
111 			For MU UL, in  TLVs RX_PPDU_END and
112 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
113 			users.
114 
115 			<legal all>
116 
117 monitor_other_mpdus_fcs_ok
118 
119 			When set, at least one Monitor Direct MPDU has been
120 			received that has a correct FCS.
121 
122 
123 
124 			For MU UL, in  TLVs RX_PPDU_END and
125 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
126 			users.
127 
128 			<legal all>
129 
130 phyrx_abort_received
131 
132 			When set, PPDU reception was aborted by the PHY
133 
134 			<legal all>
135 
136 reserved_0
137 
138 			<legal 0>
139 
140 phy_ppdu_id
141 
142 			A ppdu counter value that PHY increments for every PPDU
143 			received. The counter value wraps around
144 
145 			<legal all>
146 */
147 
148 
149 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS
150 
151 			When set, at least one Filter Pass MPDU has been
152 			received. FCS might or might not have been passing.
153 
154 
155 
156 			For MU UL, in  TLVs RX_PPDU_END and
157 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
158 			users.
159 
160 			<legal all>
161 */
162 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET  0x00000000
163 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB     0
164 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK    0x00000001
165 
166 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK
167 
168 			When set, at least one Filter Pass MPDU has been
169 			received that has a correct FCS.
170 
171 
172 
173 			For MU UL, in  TLVs RX_PPDU_END and
174 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
175 			users.
176 
177 
178 
179 			<legal all>
180 */
181 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000
182 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1
183 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002
184 
185 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS
186 
187 			When set, at least one Monitor Direct MPDU has been
188 			received. FCS might or might not have been passing
189 
190 
191 
192 			For MU UL, in  TLVs RX_PPDU_END and
193 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
194 			users.
195 
196 			<legal all>
197 */
198 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000
199 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB  2
200 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004
201 
202 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK
203 
204 			When set, at least one Monitor Direct MPDU has been
205 			received that has a correct FCS.
206 
207 
208 
209 			For MU UL, in  TLVs RX_PPDU_END and
210 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
211 			users.
212 
213 
214 
215 			<legal all>
216 */
217 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000
218 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
219 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008
220 
221 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS
222 
223 			When set, at least one Monitor Direct MPDU has been
224 			received. FCS might or might not have been passing.
225 
226 
227 
228 			For MU UL, in  TLVs RX_PPDU_END and
229 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
230 			users.
231 
232 			<legal all>
233 */
234 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000
235 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB   4
236 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK  0x00000010
237 
238 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK
239 
240 			When set, at least one Monitor Direct MPDU has been
241 			received that has a correct FCS.
242 
243 
244 
245 			For MU UL, in  TLVs RX_PPDU_END and
246 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
247 			users.
248 
249 			<legal all>
250 */
251 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000
252 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
253 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020
254 
255 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED
256 
257 			When set, PPDU reception was aborted by the PHY
258 
259 			<legal all>
260 */
261 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000
262 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_LSB  6
263 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_MASK 0x00000040
264 
265 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0
266 
267 			<legal 0>
268 */
269 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET         0x00000000
270 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB            7
271 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK           0x0000ff80
272 
273 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID
274 
275 			A ppdu counter value that PHY increments for every PPDU
276 			received. The counter value wraps around
277 
278 			<legal all>
279 */
280 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET        0x00000000
281 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB           16
282 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK          0xffff0000
283 
284 
285 #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
286