1 /* 2 * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _REO_FLUSH_QUEUE_STATUS_H_ 20 #define _REO_FLUSH_QUEUE_STATUS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "uniform_reo_status_header.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0-1 struct uniform_reo_status_header status_header; 30 // 2 error_detected[0], reserved_2a[31:1] 31 // 3 reserved_3a[31:0] 32 // 4 reserved_4a[31:0] 33 // 5 reserved_5a[31:0] 34 // 6 reserved_6a[31:0] 35 // 7 reserved_7a[31:0] 36 // 8 reserved_8a[31:0] 37 // 9 reserved_9a[31:0] 38 // 10 reserved_10a[31:0] 39 // 11 reserved_11a[31:0] 40 // 12 reserved_12a[31:0] 41 // 13 reserved_13a[31:0] 42 // 14 reserved_14a[31:0] 43 // 15 reserved_15a[31:0] 44 // 16 reserved_16a[31:0] 45 // 17 reserved_17a[31:0] 46 // 18 reserved_18a[31:0] 47 // 19 reserved_19a[31:0] 48 // 20 reserved_20a[31:0] 49 // 21 reserved_21a[31:0] 50 // 22 reserved_22a[31:0] 51 // 23 reserved_23a[31:0] 52 // 24 reserved_24a[27:0], looping_count[31:28] 53 // 54 // ################ END SUMMARY ################# 55 56 #define NUM_OF_DWORDS_REO_FLUSH_QUEUE_STATUS 25 57 58 struct reo_flush_queue_status { 59 struct uniform_reo_status_header status_header; 60 uint32_t error_detected : 1, //[0] 61 reserved_2a : 31; //[31:1] 62 uint32_t reserved_3a : 32; //[31:0] 63 uint32_t reserved_4a : 32; //[31:0] 64 uint32_t reserved_5a : 32; //[31:0] 65 uint32_t reserved_6a : 32; //[31:0] 66 uint32_t reserved_7a : 32; //[31:0] 67 uint32_t reserved_8a : 32; //[31:0] 68 uint32_t reserved_9a : 32; //[31:0] 69 uint32_t reserved_10a : 32; //[31:0] 70 uint32_t reserved_11a : 32; //[31:0] 71 uint32_t reserved_12a : 32; //[31:0] 72 uint32_t reserved_13a : 32; //[31:0] 73 uint32_t reserved_14a : 32; //[31:0] 74 uint32_t reserved_15a : 32; //[31:0] 75 uint32_t reserved_16a : 32; //[31:0] 76 uint32_t reserved_17a : 32; //[31:0] 77 uint32_t reserved_18a : 32; //[31:0] 78 uint32_t reserved_19a : 32; //[31:0] 79 uint32_t reserved_20a : 32; //[31:0] 80 uint32_t reserved_21a : 32; //[31:0] 81 uint32_t reserved_22a : 32; //[31:0] 82 uint32_t reserved_23a : 32; //[31:0] 83 uint32_t reserved_24a : 28, //[27:0] 84 looping_count : 4; //[31:28] 85 }; 86 87 /* 88 89 struct uniform_reo_status_header status_header 90 91 Consumer: SW 92 93 Producer: REO 94 95 96 97 Details that can link this status with the original 98 command. It also contains info on how long REO took to 99 execute this command. 100 101 error_detected 102 103 Status of the blocking resource 104 105 0: No error has been detected while executing this 106 command 107 108 1: Error detected: The resource to be used for blocking 109 was already in use. 110 111 reserved_2a 112 113 <legal 0> 114 115 reserved_3a 116 117 <legal 0> 118 119 reserved_4a 120 121 <legal 0> 122 123 reserved_5a 124 125 <legal 0> 126 127 reserved_6a 128 129 <legal 0> 130 131 reserved_7a 132 133 <legal 0> 134 135 reserved_8a 136 137 <legal 0> 138 139 reserved_9a 140 141 <legal 0> 142 143 reserved_10a 144 145 <legal 0> 146 147 reserved_11a 148 149 <legal 0> 150 151 reserved_12a 152 153 <legal 0> 154 155 reserved_13a 156 157 <legal 0> 158 159 reserved_14a 160 161 <legal 0> 162 163 reserved_15a 164 165 <legal 0> 166 167 reserved_16a 168 169 <legal 0> 170 171 reserved_17a 172 173 <legal 0> 174 175 reserved_18a 176 177 <legal 0> 178 179 reserved_19a 180 181 <legal 0> 182 183 reserved_20a 184 185 <legal 0> 186 187 reserved_21a 188 189 <legal 0> 190 191 reserved_22a 192 193 <legal 0> 194 195 reserved_23a 196 197 <legal 0> 198 199 reserved_24a 200 201 <legal 0> 202 203 looping_count 204 205 A count value that indicates the number of times the 206 producer of entries into this Ring has looped around the 207 ring. 208 209 At initialization time, this value is set to 0. On the 210 first loop, this value is set to 1. After the max value is 211 reached allowed by the number of bits for this field, the 212 count value continues with 0 again. 213 214 215 216 In case SW is the consumer of the ring entries, it can 217 use this field to figure out up to where the producer of 218 entries has created new entries. This eliminates the need to 219 check where the head pointer' of the ring is located once 220 the SW starts processing an interrupt indicating that new 221 entries have been put into this ring... 222 223 224 225 Also note that SW if it wants only needs to look at the 226 LSB bit of this count value. 227 228 <legal all> 229 */ 230 231 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000 232 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 233 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 234 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004 235 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 236 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 237 238 /* Description REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED 239 240 Status of the blocking resource 241 242 0: No error has been detected while executing this 243 command 244 245 1: Error detected: The resource to be used for blocking 246 was already in use. 247 */ 248 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_OFFSET 0x00000008 249 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_LSB 0 250 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_MASK 0x00000001 251 252 /* Description REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A 253 254 <legal 0> 255 */ 256 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_OFFSET 0x00000008 257 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_LSB 1 258 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_MASK 0xfffffffe 259 260 /* Description REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A 261 262 <legal 0> 263 */ 264 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_OFFSET 0x0000000c 265 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_LSB 0 266 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_MASK 0xffffffff 267 268 /* Description REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A 269 270 <legal 0> 271 */ 272 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_OFFSET 0x00000010 273 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_LSB 0 274 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_MASK 0xffffffff 275 276 /* Description REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A 277 278 <legal 0> 279 */ 280 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_OFFSET 0x00000014 281 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_LSB 0 282 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_MASK 0xffffffff 283 284 /* Description REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A 285 286 <legal 0> 287 */ 288 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_OFFSET 0x00000018 289 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_LSB 0 290 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_MASK 0xffffffff 291 292 /* Description REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A 293 294 <legal 0> 295 */ 296 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_OFFSET 0x0000001c 297 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_LSB 0 298 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_MASK 0xffffffff 299 300 /* Description REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A 301 302 <legal 0> 303 */ 304 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_OFFSET 0x00000020 305 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_LSB 0 306 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_MASK 0xffffffff 307 308 /* Description REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A 309 310 <legal 0> 311 */ 312 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_OFFSET 0x00000024 313 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_LSB 0 314 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_MASK 0xffffffff 315 316 /* Description REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A 317 318 <legal 0> 319 */ 320 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_OFFSET 0x00000028 321 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_LSB 0 322 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_MASK 0xffffffff 323 324 /* Description REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A 325 326 <legal 0> 327 */ 328 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 329 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_LSB 0 330 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_MASK 0xffffffff 331 332 /* Description REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A 333 334 <legal 0> 335 */ 336 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_OFFSET 0x00000030 337 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_LSB 0 338 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_MASK 0xffffffff 339 340 /* Description REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A 341 342 <legal 0> 343 */ 344 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_OFFSET 0x00000034 345 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_LSB 0 346 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_MASK 0xffffffff 347 348 /* Description REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A 349 350 <legal 0> 351 */ 352 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_OFFSET 0x00000038 353 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_LSB 0 354 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_MASK 0xffffffff 355 356 /* Description REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A 357 358 <legal 0> 359 */ 360 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 361 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_LSB 0 362 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_MASK 0xffffffff 363 364 /* Description REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A 365 366 <legal 0> 367 */ 368 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_OFFSET 0x00000040 369 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_LSB 0 370 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_MASK 0xffffffff 371 372 /* Description REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A 373 374 <legal 0> 375 */ 376 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_OFFSET 0x00000044 377 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_LSB 0 378 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_MASK 0xffffffff 379 380 /* Description REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A 381 382 <legal 0> 383 */ 384 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_OFFSET 0x00000048 385 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_LSB 0 386 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_MASK 0xffffffff 387 388 /* Description REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A 389 390 <legal 0> 391 */ 392 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 393 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_LSB 0 394 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_MASK 0xffffffff 395 396 /* Description REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A 397 398 <legal 0> 399 */ 400 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_OFFSET 0x00000050 401 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_LSB 0 402 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_MASK 0xffffffff 403 404 /* Description REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A 405 406 <legal 0> 407 */ 408 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_OFFSET 0x00000054 409 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_LSB 0 410 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_MASK 0xffffffff 411 412 /* Description REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A 413 414 <legal 0> 415 */ 416 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_OFFSET 0x00000058 417 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_LSB 0 418 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_MASK 0xffffffff 419 420 /* Description REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A 421 422 <legal 0> 423 */ 424 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 425 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_LSB 0 426 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_MASK 0xffffffff 427 428 /* Description REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A 429 430 <legal 0> 431 */ 432 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_OFFSET 0x00000060 433 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_LSB 0 434 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_MASK 0x0fffffff 435 436 /* Description REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT 437 438 A count value that indicates the number of times the 439 producer of entries into this Ring has looped around the 440 ring. 441 442 At initialization time, this value is set to 0. On the 443 first loop, this value is set to 1. After the max value is 444 reached allowed by the number of bits for this field, the 445 count value continues with 0 again. 446 447 448 449 In case SW is the consumer of the ring entries, it can 450 use this field to figure out up to where the producer of 451 entries has created new entries. This eliminates the need to 452 check where the head pointer' of the ring is located once 453 the SW starts processing an interrupt indicating that new 454 entries have been put into this ring... 455 456 457 458 Also note that SW if it wants only needs to look at the 459 LSB bit of this count value. 460 461 <legal all> 462 */ 463 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 464 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_LSB 28 465 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 466 467 468 #endif // _REO_FLUSH_QUEUE_STATUS_H_ 469