xref: /wlan-driver/fw-api/hw/qca6290/11ax/v2/rx_msdu_start.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _RX_MSDU_START_H_
20 #define _RX_MSDU_START_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 
25 // ################ START SUMMARY #################
26 //
27 //	Dword	Fields
28 //	0	rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16]
29 //	1	msdu_length[13:0], reserved_1a[14], ipsec_esp[15], l3_offset[22:16], ipsec_ah[23], l4_offset[31:24]
30 //	2	msdu_number[7:0], decap_format[9:8], ipv4_proto[10], ipv6_proto[11], tcp_proto[12], udp_proto[13], ip_frag[14], tcp_only_ack[15], da_is_bcast_mcast[16], toeplitz_hash_sel[18:17], ip_fixed_header_valid[19], ip_extn_header_valid[20], tcp_udp_header_valid[21], mesh_control_present[22], reserved_2a[23], ip4_protocol_ip6_next_header[31:24]
31 //	3	toeplitz_hash_2_or_4[31:0]
32 //	4	flow_id_toeplitz[31:0]
33 //	5	user_rssi[7:0], pkt_type[11:8], stbc[12], sgi[14:13], rate_mcs[18:15], receive_bandwidth[20:19], reception_type[23:21], mimo_ss_bitmap[31:24]
34 //	6	ppdu_start_timestamp[31:0]
35 //	7	sw_phy_meta_data[31:0]
36 //
37 // ################ END SUMMARY #################
38 
39 #define NUM_OF_DWORDS_RX_MSDU_START 8
40 
41 struct rx_msdu_start {
42              uint32_t rxpcu_mpdu_filter_in_category   :  2, //[1:0]
43                       sw_frame_group_id               :  7, //[8:2]
44                       reserved_0                      :  7, //[15:9]
45                       phy_ppdu_id                     : 16; //[31:16]
46              uint32_t msdu_length                     : 14, //[13:0]
47                       reserved_1a                     :  1, //[14]
48                       ipsec_esp                       :  1, //[15]
49                       l3_offset                       :  7, //[22:16]
50                       ipsec_ah                        :  1, //[23]
51                       l4_offset                       :  8; //[31:24]
52              uint32_t msdu_number                     :  8, //[7:0]
53                       decap_format                    :  2, //[9:8]
54                       ipv4_proto                      :  1, //[10]
55                       ipv6_proto                      :  1, //[11]
56                       tcp_proto                       :  1, //[12]
57                       udp_proto                       :  1, //[13]
58                       ip_frag                         :  1, //[14]
59                       tcp_only_ack                    :  1, //[15]
60                       da_is_bcast_mcast               :  1, //[16]
61                       toeplitz_hash_sel               :  2, //[18:17]
62                       ip_fixed_header_valid           :  1, //[19]
63                       ip_extn_header_valid            :  1, //[20]
64                       tcp_udp_header_valid            :  1, //[21]
65                       mesh_control_present            :  1, //[22]
66                       reserved_2a                     :  1, //[23]
67                       ip4_protocol_ip6_next_header    :  8; //[31:24]
68              uint32_t toeplitz_hash_2_or_4            : 32; //[31:0]
69              uint32_t flow_id_toeplitz                : 32; //[31:0]
70              uint32_t user_rssi                       :  8, //[7:0]
71                       pkt_type                        :  4, //[11:8]
72                       stbc                            :  1, //[12]
73                       sgi                             :  2, //[14:13]
74                       rate_mcs                        :  4, //[18:15]
75                       receive_bandwidth               :  2, //[20:19]
76                       reception_type                  :  3, //[23:21]
77                       mimo_ss_bitmap                  :  8; //[31:24]
78              uint32_t ppdu_start_timestamp            : 32; //[31:0]
79              uint32_t sw_phy_meta_data                : 32; //[31:0]
80 };
81 
82 /*
83 
84 rxpcu_mpdu_filter_in_category
85 
86 			Field indicates what the reason was that this MPDU frame
87 			was allowed to come into the receive path by RXPCU
88 
89 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
90 			frame filter programming of rxpcu
91 
92 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
93 			regular frame filter and would have been dropped, were it
94 			not for the frame fitting into the 'monitor_client'
95 			category.
96 
97 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
98 			regular frame filter and also did not pass the
99 			rxpcu_monitor_client filter. It would have been dropped
100 			accept that it did pass the 'monitor_other' category.
101 
102 			<legal 0-2>
103 
104 sw_frame_group_id
105 
106 			SW processes frames based on certain classifications.
107 			This field indicates to what sw classification this MPDU is
108 			mapped.
109 
110 			The classification is given in priority order
111 
112 
113 
114 			<enum 0 sw_frame_group_NDP_frame>
115 
116 
117 
118 			<enum 1 sw_frame_group_Multicast_data>
119 
120 			<enum 2 sw_frame_group_Unicast_data>
121 
122 			<enum 3 sw_frame_group_Null_data > This includes mpdus
123 			of type Data Null as well as QoS Data Null
124 
125 
126 
127 			<enum 4 sw_frame_group_mgmt_0000 >
128 
129 			<enum 5 sw_frame_group_mgmt_0001 >
130 
131 			<enum 6 sw_frame_group_mgmt_0010 >
132 
133 			<enum 7 sw_frame_group_mgmt_0011 >
134 
135 			<enum 8 sw_frame_group_mgmt_0100 >
136 
137 			<enum 9 sw_frame_group_mgmt_0101 >
138 
139 			<enum 10 sw_frame_group_mgmt_0110 >
140 
141 			<enum 11 sw_frame_group_mgmt_0111 >
142 
143 			<enum 12 sw_frame_group_mgmt_1000 >
144 
145 			<enum 13 sw_frame_group_mgmt_1001 >
146 
147 			<enum 14 sw_frame_group_mgmt_1010 >
148 
149 			<enum 15 sw_frame_group_mgmt_1011 >
150 
151 			<enum 16 sw_frame_group_mgmt_1100 >
152 
153 			<enum 17 sw_frame_group_mgmt_1101 >
154 
155 			<enum 18 sw_frame_group_mgmt_1110 >
156 
157 			<enum 19 sw_frame_group_mgmt_1111 >
158 
159 
160 
161 			<enum 20 sw_frame_group_ctrl_0000 >
162 
163 			<enum 21 sw_frame_group_ctrl_0001 >
164 
165 			<enum 22 sw_frame_group_ctrl_0010 >
166 
167 			<enum 23 sw_frame_group_ctrl_0011 >
168 
169 			<enum 24 sw_frame_group_ctrl_0100 >
170 
171 			<enum 25 sw_frame_group_ctrl_0101 >
172 
173 			<enum 26 sw_frame_group_ctrl_0110 >
174 
175 			<enum 27 sw_frame_group_ctrl_0111 >
176 
177 			<enum 28 sw_frame_group_ctrl_1000 >
178 
179 			<enum 29 sw_frame_group_ctrl_1001 >
180 
181 			<enum 30 sw_frame_group_ctrl_1010 >
182 
183 			<enum 31 sw_frame_group_ctrl_1011 >
184 
185 			<enum 32 sw_frame_group_ctrl_1100 >
186 
187 			<enum 33 sw_frame_group_ctrl_1101 >
188 
189 			<enum 34 sw_frame_group_ctrl_1110 >
190 
191 			<enum 35 sw_frame_group_ctrl_1111 >
192 
193 
194 
195 			<enum 36 sw_frame_group_unsupported> This covers type 3
196 			and protocol version != 0
197 
198 
199 
200 
201 
202 
203 			<legal 0-37>
204 
205 reserved_0
206 
207 			<legal 0>
208 
209 phy_ppdu_id
210 
211 			A ppdu counter value that PHY increments for every PPDU
212 			received. The counter value wraps around
213 
214 			<legal all>
215 
216 msdu_length
217 
218 			MSDU length in bytes after decapsulation.
219 
220 
221 
222 			This field is still valid for MPDU frames without
223 
224 reserved_1a
225 
226 			<legal 0>
227 
228 ipsec_esp
229 
230 			Set if IPv4/v6 packet is using IPsec ESP
231 
232 l3_offset
233 
234 			Depending upon mode bit, this field either indicates the
235 			L3 offset in bytes from the start of the RX_HEADER or the IP
236 			offset in bytes from the start of the packet after
237 			decapsulation.  The latter is only valid if ipv4_proto or
238 			ipv6_proto is set.
239 
240 ipsec_ah
241 
242 			Set if IPv4/v6 packet is using IPsec AH
243 
244 l4_offset
245 
246 			Depending upon mode bit, this field either indicates the
247 			L4 offset nin bytes from the start of RX_HEADER(only valid
248 			if either ipv4_proto or ipv6_proto is set to 1) or indicates
249 			the offset in bytes to the start of TCP or UDP header from
250 			the start of the IP header after decapsulation(Only valid if
251 			tcp_proto or udp_proto is set).  The value 0 indicates that
252 			the offset is longer than 127 bytes.
253 
254 msdu_number
255 
256 			Indicates the MSDU number within a MPDU.  This value is
257 			reset to zero at the start of each MPDU.  If the number of
258 			MSDU exceeds 255 this number will wrap using modulo 256.
259 
260 decap_format
261 
262 			Indicates the format after decapsulation:
263 
264 
265 
266 			<enum 0 RAW> No encapsulation
267 
268 			<enum 1 Native_WiFi>
269 
270 			<enum 2 Ethernet> Ethernet 2 (DIX)  or 802.3 (uses
271 			SNAP/LLC)
272 
273 			<enum 3 802_3> Indicate Ethernet
274 
275 
276 
277 			<legal all>
278 
279 ipv4_proto
280 
281 			Set if L2 layer indicates IPv4 protocol.
282 
283 ipv6_proto
284 
285 			Set if L2 layer indicates IPv6 protocol.
286 
287 tcp_proto
288 
289 			Set if the ipv4_proto or ipv6_proto are set and the IP
290 			protocol indicates TCP.
291 
292 udp_proto
293 
294 			Set if the ipv4_proto or ipv6_proto are set and the IP
295 			protocol indicates UDP.
296 
297 ip_frag
298 
299 			Indicates that either the IP More frag bit is set or IP
300 			frag number is non-zero.  If set indicates that this is a
301 			fragmented IP packet.
302 
303 tcp_only_ack
304 
305 			Set if only the TCP Ack bit is set in the TCP flags and
306 			if the TCP payload is 0.
307 
308 da_is_bcast_mcast
309 
310 			The destination address is broadcast or multicast.
311 
312 toeplitz_hash_sel
313 
314 			Actual choosen Hash.
315 
316 
317 
318 			0 -> Toeplitz hash of 2-tuple (IP source address, IP
319 			destination address)1 -> Toeplitz hash of 4-tuple (IP source
320 			address, IP destination address, L4 (TCP/UDP) source port,
321 			L4 (TCP/UDP) destination port)
322 
323 			2 -> Toeplitz of flow_id
324 
325 			3 -> Zero is used
326 
327 			<legal all>
328 
329 ip_fixed_header_valid
330 
331 			Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
332 			fully within first 256 bytes of the packet
333 
334 ip_extn_header_valid
335 
336 			IPv6/IPv6 header, including IPv4 options and
337 			recognizable extension headers parsed fully within first 256
338 			bytes of the packet
339 
340 tcp_udp_header_valid
341 
342 			Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
343 			header parsed fully within first 256 bytes of the packet
344 
345 mesh_control_present
346 
347 			When set, this MSDU includes the 'Mesh Control' field
348 
349 			<legal all>
350 
351 reserved_2a
352 
353 			<legal 0>
354 
355 ip4_protocol_ip6_next_header
356 
357 			For IPv4 this is the 8 bit protocol field (when
358 			ipv4_proto is set).  For IPv6 this is the 8 bit next_header
359 			field (when ipv6_proto is set).
360 
361 toeplitz_hash_2_or_4
362 
363 			Controlled by RxOLE register - If register bit set to 0,
364 			Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
365 			addresses; otherwise, toeplitz hash is computed over 4-tuple
366 			IPv4 or IPv6 src/dest addresses and src/dest ports
367 
368 flow_id_toeplitz
369 
370 			Toeplitz hash of 5-tuple
371 
372 			{IP source address, IP destination address, IP source
373 			port, IP destination port, L4 protocol}  in case of
374 			non-IPSec.
375 
376 			In case of IPSec - Toeplitz hash of 4-tuple
377 
378 			{IP source address, IP destination address, SPI, L4
379 			protocol}
380 
381 
382 
383 			The relevant Toeplitz key registers are provided in
384 			RxOLE's instance of common parser module. These registers
385 			are separate from the Toeplitz keys used by ASE/FSE modules
386 			inside RxOLE.The actual value will be passed on from common
387 			parser module to RxOLE in one of the WHO_* TLVs.
388 
389 			<legal all>
390 
391 user_rssi
392 
393 			RSSI for this user
394 
395 			<legal all>
396 
397 pkt_type
398 
399 			Packet type:
400 
401 			<enum 0 dot11a>802.11a PPDU type
402 
403 			<enum 1 dot11b>802.11b PPDU type
404 
405 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
406 
407 			<enum 3 dot11ac>802.11ac PPDU type
408 
409 			<enum 4 dot11ax>802.11ax PPDU type
410 
411 stbc
412 
413 			When set, use STBC transmission rates
414 
415 sgi
416 
417 			Field only valid when pkt type is HT, VHT or HE.
418 
419 
420 
421 			<enum 0     0_8_us_sgi > Legacy normal GI. Can also be
422 			used for HE
423 
424 			<enum 1     0_4_us_sgi > Legacy short GI. Can also be
425 			used for HE
426 
427 			<enum 2     1_6_us_sgi > HE related GI
428 
429 			<enum 3     3_2_us_sgi > HE related GI
430 
431 			<legal 0 - 3>
432 
433 rate_mcs
434 
435 			For details, refer to  MCS_TYPE description
436 
437 			Note: This is rate in case of 11a/11b
438 
439 
440 
441 			<legal all>
442 
443 receive_bandwidth
444 
445 			Full receive Bandwidth
446 
447 
448 
449 			<enum 0     full_rx_bw_20_mhz>
450 
451 			<enum 1      full_rx_bw_40_mhz>
452 
453 			<enum 2      full_rx_bw_80_mhz>
454 
455 			<enum 3      full_rx_bw_160_mhz>
456 
457 
458 
459 			<legal 0-3>
460 
461 reception_type
462 
463 			Indicates what type of reception this is.
464 
465 			<enum 0     reception_type_SU > Basic SU reception (not
466 			part of OFDMA or MIMO)
467 
468 			<enum 1     reception_type_MU_MIMO > This is related to
469 			DL type of reception
470 
471 			<enum 2     reception_type_MU_OFDMA >  This is related
472 			to DL type of reception
473 
474 			<enum 3     reception_type_MU_OFDMA_MIMO >  This is
475 			related to DL type of reception
476 
477 			<enum 4     reception_type_UL_MU_MIMO > This is related
478 			to UL type of reception
479 
480 			<enum 5     reception_type_UL_MU_OFDMA >  This is
481 			related to UL type of reception
482 
483 			<enum 6     reception_type_UL_MU_OFDMA_MIMO >  This is
484 			related to UL type of reception
485 
486 
487 
488 			<legal 0-6>
489 
490 mimo_ss_bitmap
491 
492 			Field only valid when Reception_type =
493 			reception_type_MU_MIMO or reception_type_MU_OFDMA_MIMO
494 
495 
496 
497 			Bitmap, with each bit indicating if the related spatial
498 			stream is used for this STA
499 
500 			LSB related to SS 0
501 
502 
503 
504 			0: spatial stream not used for this reception
505 
506 			1: spatial stream used for this reception
507 
508 
509 
510 			<legal all>
511 
512 ppdu_start_timestamp
513 
514 			Timestamp that indicates when the PPDU that contained
515 			this MPDU started on the medium.
516 
517 			<legal all>
518 
519 sw_phy_meta_data
520 
521 			SW programmed Meta data provided by the PHY.
522 
523 
524 
525 			Can be used for SW to indicate the channel the device is
526 			on.
527 
528 			<legal all>
529 */
530 
531 
532 /* Description		RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY
533 
534 			Field indicates what the reason was that this MPDU frame
535 			was allowed to come into the receive path by RXPCU
536 
537 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
538 			frame filter programming of rxpcu
539 
540 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
541 			regular frame filter and would have been dropped, were it
542 			not for the frame fitting into the 'monitor_client'
543 			category.
544 
545 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
546 			regular frame filter and also did not pass the
547 			rxpcu_monitor_client filter. It would have been dropped
548 			accept that it did pass the 'monitor_other' category.
549 
550 			<legal 0-2>
551 */
552 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET         0x00000000
553 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB            0
554 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK           0x00000003
555 
556 /* Description		RX_MSDU_START_0_SW_FRAME_GROUP_ID
557 
558 			SW processes frames based on certain classifications.
559 			This field indicates to what sw classification this MPDU is
560 			mapped.
561 
562 			The classification is given in priority order
563 
564 
565 
566 			<enum 0 sw_frame_group_NDP_frame>
567 
568 
569 
570 			<enum 1 sw_frame_group_Multicast_data>
571 
572 			<enum 2 sw_frame_group_Unicast_data>
573 
574 			<enum 3 sw_frame_group_Null_data > This includes mpdus
575 			of type Data Null as well as QoS Data Null
576 
577 
578 
579 			<enum 4 sw_frame_group_mgmt_0000 >
580 
581 			<enum 5 sw_frame_group_mgmt_0001 >
582 
583 			<enum 6 sw_frame_group_mgmt_0010 >
584 
585 			<enum 7 sw_frame_group_mgmt_0011 >
586 
587 			<enum 8 sw_frame_group_mgmt_0100 >
588 
589 			<enum 9 sw_frame_group_mgmt_0101 >
590 
591 			<enum 10 sw_frame_group_mgmt_0110 >
592 
593 			<enum 11 sw_frame_group_mgmt_0111 >
594 
595 			<enum 12 sw_frame_group_mgmt_1000 >
596 
597 			<enum 13 sw_frame_group_mgmt_1001 >
598 
599 			<enum 14 sw_frame_group_mgmt_1010 >
600 
601 			<enum 15 sw_frame_group_mgmt_1011 >
602 
603 			<enum 16 sw_frame_group_mgmt_1100 >
604 
605 			<enum 17 sw_frame_group_mgmt_1101 >
606 
607 			<enum 18 sw_frame_group_mgmt_1110 >
608 
609 			<enum 19 sw_frame_group_mgmt_1111 >
610 
611 
612 
613 			<enum 20 sw_frame_group_ctrl_0000 >
614 
615 			<enum 21 sw_frame_group_ctrl_0001 >
616 
617 			<enum 22 sw_frame_group_ctrl_0010 >
618 
619 			<enum 23 sw_frame_group_ctrl_0011 >
620 
621 			<enum 24 sw_frame_group_ctrl_0100 >
622 
623 			<enum 25 sw_frame_group_ctrl_0101 >
624 
625 			<enum 26 sw_frame_group_ctrl_0110 >
626 
627 			<enum 27 sw_frame_group_ctrl_0111 >
628 
629 			<enum 28 sw_frame_group_ctrl_1000 >
630 
631 			<enum 29 sw_frame_group_ctrl_1001 >
632 
633 			<enum 30 sw_frame_group_ctrl_1010 >
634 
635 			<enum 31 sw_frame_group_ctrl_1011 >
636 
637 			<enum 32 sw_frame_group_ctrl_1100 >
638 
639 			<enum 33 sw_frame_group_ctrl_1101 >
640 
641 			<enum 34 sw_frame_group_ctrl_1110 >
642 
643 			<enum 35 sw_frame_group_ctrl_1111 >
644 
645 
646 
647 			<enum 36 sw_frame_group_unsupported> This covers type 3
648 			and protocol version != 0
649 
650 
651 
652 
653 
654 
655 			<legal 0-37>
656 */
657 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_OFFSET                     0x00000000
658 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_LSB                        2
659 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_MASK                       0x000001fc
660 
661 /* Description		RX_MSDU_START_0_RESERVED_0
662 
663 			<legal 0>
664 */
665 #define RX_MSDU_START_0_RESERVED_0_OFFSET                            0x00000000
666 #define RX_MSDU_START_0_RESERVED_0_LSB                               9
667 #define RX_MSDU_START_0_RESERVED_0_MASK                              0x0000fe00
668 
669 /* Description		RX_MSDU_START_0_PHY_PPDU_ID
670 
671 			A ppdu counter value that PHY increments for every PPDU
672 			received. The counter value wraps around
673 
674 			<legal all>
675 */
676 #define RX_MSDU_START_0_PHY_PPDU_ID_OFFSET                           0x00000000
677 #define RX_MSDU_START_0_PHY_PPDU_ID_LSB                              16
678 #define RX_MSDU_START_0_PHY_PPDU_ID_MASK                             0xffff0000
679 
680 /* Description		RX_MSDU_START_1_MSDU_LENGTH
681 
682 			MSDU length in bytes after decapsulation.
683 
684 
685 
686 			This field is still valid for MPDU frames without
687 */
688 #define RX_MSDU_START_1_MSDU_LENGTH_OFFSET                           0x00000004
689 #define RX_MSDU_START_1_MSDU_LENGTH_LSB                              0
690 #define RX_MSDU_START_1_MSDU_LENGTH_MASK                             0x00003fff
691 
692 /* Description		RX_MSDU_START_1_RESERVED_1A
693 
694 			<legal 0>
695 */
696 #define RX_MSDU_START_1_RESERVED_1A_OFFSET                           0x00000004
697 #define RX_MSDU_START_1_RESERVED_1A_LSB                              14
698 #define RX_MSDU_START_1_RESERVED_1A_MASK                             0x00004000
699 
700 /* Description		RX_MSDU_START_1_IPSEC_ESP
701 
702 			Set if IPv4/v6 packet is using IPsec ESP
703 */
704 #define RX_MSDU_START_1_IPSEC_ESP_OFFSET                             0x00000004
705 #define RX_MSDU_START_1_IPSEC_ESP_LSB                                15
706 #define RX_MSDU_START_1_IPSEC_ESP_MASK                               0x00008000
707 
708 /* Description		RX_MSDU_START_1_L3_OFFSET
709 
710 			Depending upon mode bit, this field either indicates the
711 			L3 offset in bytes from the start of the RX_HEADER or the IP
712 			offset in bytes from the start of the packet after
713 			decapsulation.  The latter is only valid if ipv4_proto or
714 			ipv6_proto is set.
715 */
716 #define RX_MSDU_START_1_L3_OFFSET_OFFSET                             0x00000004
717 #define RX_MSDU_START_1_L3_OFFSET_LSB                                16
718 #define RX_MSDU_START_1_L3_OFFSET_MASK                               0x007f0000
719 
720 /* Description		RX_MSDU_START_1_IPSEC_AH
721 
722 			Set if IPv4/v6 packet is using IPsec AH
723 */
724 #define RX_MSDU_START_1_IPSEC_AH_OFFSET                              0x00000004
725 #define RX_MSDU_START_1_IPSEC_AH_LSB                                 23
726 #define RX_MSDU_START_1_IPSEC_AH_MASK                                0x00800000
727 
728 /* Description		RX_MSDU_START_1_L4_OFFSET
729 
730 			Depending upon mode bit, this field either indicates the
731 			L4 offset nin bytes from the start of RX_HEADER(only valid
732 			if either ipv4_proto or ipv6_proto is set to 1) or indicates
733 			the offset in bytes to the start of TCP or UDP header from
734 			the start of the IP header after decapsulation(Only valid if
735 			tcp_proto or udp_proto is set).  The value 0 indicates that
736 			the offset is longer than 127 bytes.
737 */
738 #define RX_MSDU_START_1_L4_OFFSET_OFFSET                             0x00000004
739 #define RX_MSDU_START_1_L4_OFFSET_LSB                                24
740 #define RX_MSDU_START_1_L4_OFFSET_MASK                               0xff000000
741 
742 /* Description		RX_MSDU_START_2_MSDU_NUMBER
743 
744 			Indicates the MSDU number within a MPDU.  This value is
745 			reset to zero at the start of each MPDU.  If the number of
746 			MSDU exceeds 255 this number will wrap using modulo 256.
747 */
748 #define RX_MSDU_START_2_MSDU_NUMBER_OFFSET                           0x00000008
749 #define RX_MSDU_START_2_MSDU_NUMBER_LSB                              0
750 #define RX_MSDU_START_2_MSDU_NUMBER_MASK                             0x000000ff
751 
752 /* Description		RX_MSDU_START_2_DECAP_FORMAT
753 
754 			Indicates the format after decapsulation:
755 
756 
757 
758 			<enum 0 RAW> No encapsulation
759 
760 			<enum 1 Native_WiFi>
761 
762 			<enum 2 Ethernet> Ethernet 2 (DIX)  or 802.3 (uses
763 			SNAP/LLC)
764 
765 			<enum 3 802_3> Indicate Ethernet
766 
767 
768 
769 			<legal all>
770 */
771 #define RX_MSDU_START_2_DECAP_FORMAT_OFFSET                          0x00000008
772 #define RX_MSDU_START_2_DECAP_FORMAT_LSB                             8
773 #define RX_MSDU_START_2_DECAP_FORMAT_MASK                            0x00000300
774 
775 /* Description		RX_MSDU_START_2_IPV4_PROTO
776 
777 			Set if L2 layer indicates IPv4 protocol.
778 */
779 #define RX_MSDU_START_2_IPV4_PROTO_OFFSET                            0x00000008
780 #define RX_MSDU_START_2_IPV4_PROTO_LSB                               10
781 #define RX_MSDU_START_2_IPV4_PROTO_MASK                              0x00000400
782 
783 /* Description		RX_MSDU_START_2_IPV6_PROTO
784 
785 			Set if L2 layer indicates IPv6 protocol.
786 */
787 #define RX_MSDU_START_2_IPV6_PROTO_OFFSET                            0x00000008
788 #define RX_MSDU_START_2_IPV6_PROTO_LSB                               11
789 #define RX_MSDU_START_2_IPV6_PROTO_MASK                              0x00000800
790 
791 /* Description		RX_MSDU_START_2_TCP_PROTO
792 
793 			Set if the ipv4_proto or ipv6_proto are set and the IP
794 			protocol indicates TCP.
795 */
796 #define RX_MSDU_START_2_TCP_PROTO_OFFSET                             0x00000008
797 #define RX_MSDU_START_2_TCP_PROTO_LSB                                12
798 #define RX_MSDU_START_2_TCP_PROTO_MASK                               0x00001000
799 
800 /* Description		RX_MSDU_START_2_UDP_PROTO
801 
802 			Set if the ipv4_proto or ipv6_proto are set and the IP
803 			protocol indicates UDP.
804 */
805 #define RX_MSDU_START_2_UDP_PROTO_OFFSET                             0x00000008
806 #define RX_MSDU_START_2_UDP_PROTO_LSB                                13
807 #define RX_MSDU_START_2_UDP_PROTO_MASK                               0x00002000
808 
809 /* Description		RX_MSDU_START_2_IP_FRAG
810 
811 			Indicates that either the IP More frag bit is set or IP
812 			frag number is non-zero.  If set indicates that this is a
813 			fragmented IP packet.
814 */
815 #define RX_MSDU_START_2_IP_FRAG_OFFSET                               0x00000008
816 #define RX_MSDU_START_2_IP_FRAG_LSB                                  14
817 #define RX_MSDU_START_2_IP_FRAG_MASK                                 0x00004000
818 
819 /* Description		RX_MSDU_START_2_TCP_ONLY_ACK
820 
821 			Set if only the TCP Ack bit is set in the TCP flags and
822 			if the TCP payload is 0.
823 */
824 #define RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET                          0x00000008
825 #define RX_MSDU_START_2_TCP_ONLY_ACK_LSB                             15
826 #define RX_MSDU_START_2_TCP_ONLY_ACK_MASK                            0x00008000
827 
828 /* Description		RX_MSDU_START_2_DA_IS_BCAST_MCAST
829 
830 			The destination address is broadcast or multicast.
831 */
832 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_OFFSET                     0x00000008
833 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_LSB                        16
834 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_MASK                       0x00010000
835 
836 /* Description		RX_MSDU_START_2_TOEPLITZ_HASH_SEL
837 
838 			Actual choosen Hash.
839 
840 
841 
842 			0 -> Toeplitz hash of 2-tuple (IP source address, IP
843 			destination address)1 -> Toeplitz hash of 4-tuple (IP source
844 			address, IP destination address, L4 (TCP/UDP) source port,
845 			L4 (TCP/UDP) destination port)
846 
847 			2 -> Toeplitz of flow_id
848 
849 			3 -> Zero is used
850 
851 			<legal all>
852 */
853 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_OFFSET                     0x00000008
854 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_LSB                        17
855 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_MASK                       0x00060000
856 
857 /* Description		RX_MSDU_START_2_IP_FIXED_HEADER_VALID
858 
859 			Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
860 			fully within first 256 bytes of the packet
861 */
862 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_OFFSET                 0x00000008
863 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_LSB                    19
864 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_MASK                   0x00080000
865 
866 /* Description		RX_MSDU_START_2_IP_EXTN_HEADER_VALID
867 
868 			IPv6/IPv6 header, including IPv4 options and
869 			recognizable extension headers parsed fully within first 256
870 			bytes of the packet
871 */
872 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_OFFSET                  0x00000008
873 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_LSB                     20
874 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_MASK                    0x00100000
875 
876 /* Description		RX_MSDU_START_2_TCP_UDP_HEADER_VALID
877 
878 			Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
879 			header parsed fully within first 256 bytes of the packet
880 */
881 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_OFFSET                  0x00000008
882 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_LSB                     21
883 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_MASK                    0x00200000
884 
885 /* Description		RX_MSDU_START_2_MESH_CONTROL_PRESENT
886 
887 			When set, this MSDU includes the 'Mesh Control' field
888 
889 			<legal all>
890 */
891 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_OFFSET                  0x00000008
892 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_LSB                     22
893 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_MASK                    0x00400000
894 
895 /* Description		RX_MSDU_START_2_RESERVED_2A
896 
897 			<legal 0>
898 */
899 #define RX_MSDU_START_2_RESERVED_2A_OFFSET                           0x00000008
900 #define RX_MSDU_START_2_RESERVED_2A_LSB                              23
901 #define RX_MSDU_START_2_RESERVED_2A_MASK                             0x00800000
902 
903 /* Description		RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER
904 
905 			For IPv4 this is the 8 bit protocol field (when
906 			ipv4_proto is set).  For IPv6 this is the 8 bit next_header
907 			field (when ipv6_proto is set).
908 */
909 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET          0x00000008
910 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB             24
911 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK            0xff000000
912 
913 /* Description		RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4
914 
915 			Controlled by RxOLE register - If register bit set to 0,
916 			Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
917 			addresses; otherwise, toeplitz hash is computed over 4-tuple
918 			IPv4 or IPv6 src/dest addresses and src/dest ports
919 */
920 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_OFFSET                  0x0000000c
921 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_LSB                     0
922 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_MASK                    0xffffffff
923 
924 /* Description		RX_MSDU_START_4_FLOW_ID_TOEPLITZ
925 
926 			Toeplitz hash of 5-tuple
927 
928 			{IP source address, IP destination address, IP source
929 			port, IP destination port, L4 protocol}  in case of
930 			non-IPSec.
931 
932 			In case of IPSec - Toeplitz hash of 4-tuple
933 
934 			{IP source address, IP destination address, SPI, L4
935 			protocol}
936 
937 
938 
939 			The relevant Toeplitz key registers are provided in
940 			RxOLE's instance of common parser module. These registers
941 			are separate from the Toeplitz keys used by ASE/FSE modules
942 			inside RxOLE.The actual value will be passed on from common
943 			parser module to RxOLE in one of the WHO_* TLVs.
944 
945 			<legal all>
946 */
947 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET                      0x00000010
948 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB                         0
949 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK                        0xffffffff
950 
951 /* Description		RX_MSDU_START_5_USER_RSSI
952 
953 			RSSI for this user
954 
955 			<legal all>
956 */
957 #define RX_MSDU_START_5_USER_RSSI_OFFSET                             0x00000014
958 #define RX_MSDU_START_5_USER_RSSI_LSB                                0
959 #define RX_MSDU_START_5_USER_RSSI_MASK                               0x000000ff
960 
961 /* Description		RX_MSDU_START_5_PKT_TYPE
962 
963 			Packet type:
964 
965 			<enum 0 dot11a>802.11a PPDU type
966 
967 			<enum 1 dot11b>802.11b PPDU type
968 
969 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
970 
971 			<enum 3 dot11ac>802.11ac PPDU type
972 
973 			<enum 4 dot11ax>802.11ax PPDU type
974 */
975 #define RX_MSDU_START_5_PKT_TYPE_OFFSET                              0x00000014
976 #define RX_MSDU_START_5_PKT_TYPE_LSB                                 8
977 #define RX_MSDU_START_5_PKT_TYPE_MASK                                0x00000f00
978 
979 /* Description		RX_MSDU_START_5_STBC
980 
981 			When set, use STBC transmission rates
982 */
983 #define RX_MSDU_START_5_STBC_OFFSET                                  0x00000014
984 #define RX_MSDU_START_5_STBC_LSB                                     12
985 #define RX_MSDU_START_5_STBC_MASK                                    0x00001000
986 
987 /* Description		RX_MSDU_START_5_SGI
988 
989 			Field only valid when pkt type is HT, VHT or HE.
990 
991 
992 
993 			<enum 0     0_8_us_sgi > Legacy normal GI. Can also be
994 			used for HE
995 
996 			<enum 1     0_4_us_sgi > Legacy short GI. Can also be
997 			used for HE
998 
999 			<enum 2     1_6_us_sgi > HE related GI
1000 
1001 			<enum 3     3_2_us_sgi > HE related GI
1002 
1003 			<legal 0 - 3>
1004 */
1005 #define RX_MSDU_START_5_SGI_OFFSET                                   0x00000014
1006 #define RX_MSDU_START_5_SGI_LSB                                      13
1007 #define RX_MSDU_START_5_SGI_MASK                                     0x00006000
1008 
1009 /* Description		RX_MSDU_START_5_RATE_MCS
1010 
1011 			For details, refer to  MCS_TYPE description
1012 
1013 			Note: This is rate in case of 11a/11b
1014 
1015 
1016 
1017 			<legal all>
1018 */
1019 #define RX_MSDU_START_5_RATE_MCS_OFFSET                              0x00000014
1020 #define RX_MSDU_START_5_RATE_MCS_LSB                                 15
1021 #define RX_MSDU_START_5_RATE_MCS_MASK                                0x00078000
1022 
1023 /* Description		RX_MSDU_START_5_RECEIVE_BANDWIDTH
1024 
1025 			Full receive Bandwidth
1026 
1027 
1028 
1029 			<enum 0     full_rx_bw_20_mhz>
1030 
1031 			<enum 1      full_rx_bw_40_mhz>
1032 
1033 			<enum 2      full_rx_bw_80_mhz>
1034 
1035 			<enum 3      full_rx_bw_160_mhz>
1036 
1037 
1038 
1039 			<legal 0-3>
1040 */
1041 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET                     0x00000014
1042 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB                        19
1043 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK                       0x00180000
1044 
1045 /* Description		RX_MSDU_START_5_RECEPTION_TYPE
1046 
1047 			Indicates what type of reception this is.
1048 
1049 			<enum 0     reception_type_SU > Basic SU reception (not
1050 			part of OFDMA or MIMO)
1051 
1052 			<enum 1     reception_type_MU_MIMO > This is related to
1053 			DL type of reception
1054 
1055 			<enum 2     reception_type_MU_OFDMA >  This is related
1056 			to DL type of reception
1057 
1058 			<enum 3     reception_type_MU_OFDMA_MIMO >  This is
1059 			related to DL type of reception
1060 
1061 			<enum 4     reception_type_UL_MU_MIMO > This is related
1062 			to UL type of reception
1063 
1064 			<enum 5     reception_type_UL_MU_OFDMA >  This is
1065 			related to UL type of reception
1066 
1067 			<enum 6     reception_type_UL_MU_OFDMA_MIMO >  This is
1068 			related to UL type of reception
1069 
1070 
1071 
1072 			<legal 0-6>
1073 */
1074 #define RX_MSDU_START_5_RECEPTION_TYPE_OFFSET                        0x00000014
1075 #define RX_MSDU_START_5_RECEPTION_TYPE_LSB                           21
1076 #define RX_MSDU_START_5_RECEPTION_TYPE_MASK                          0x00e00000
1077 
1078 /* Description		RX_MSDU_START_5_MIMO_SS_BITMAP
1079 
1080 			Field only valid when Reception_type =
1081 			reception_type_MU_MIMO or reception_type_MU_OFDMA_MIMO
1082 
1083 
1084 
1085 			Bitmap, with each bit indicating if the related spatial
1086 			stream is used for this STA
1087 
1088 			LSB related to SS 0
1089 
1090 
1091 
1092 			0: spatial stream not used for this reception
1093 
1094 			1: spatial stream used for this reception
1095 
1096 
1097 
1098 			<legal all>
1099 */
1100 #define RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET                        0x00000014
1101 #define RX_MSDU_START_5_MIMO_SS_BITMAP_LSB                           24
1102 #define RX_MSDU_START_5_MIMO_SS_BITMAP_MASK                          0xff000000
1103 
1104 /* Description		RX_MSDU_START_6_PPDU_START_TIMESTAMP
1105 
1106 			Timestamp that indicates when the PPDU that contained
1107 			this MPDU started on the medium.
1108 
1109 			<legal all>
1110 */
1111 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_OFFSET                  0x00000018
1112 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_LSB                     0
1113 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_MASK                    0xffffffff
1114 
1115 /* Description		RX_MSDU_START_7_SW_PHY_META_DATA
1116 
1117 			SW programmed Meta data provided by the PHY.
1118 
1119 
1120 
1121 			Can be used for SW to indicate the channel the device is
1122 			on.
1123 
1124 			<legal all>
1125 */
1126 #define RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET                      0x0000001c
1127 #define RX_MSDU_START_7_SW_PHY_META_DATA_LSB                         0
1128 #define RX_MSDU_START_7_SW_PHY_META_DATA_MASK                        0xffffffff
1129 
1130 
1131 #endif // _RX_MSDU_START_H_
1132