1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.1 12/1/2017 22*5113495bSYour Name // User Name:gunjans 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 29*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 30*5113495bSYour Name 31*5113495bSYour Name #ifdef SCALE_INCLUDES 32*5113495bSYour Name #include "HALhwio.h" 33*5113495bSYour Name #else 34*5113495bSYour Name #include "msmhwio.h" 35*5113495bSYour Name #endif 36*5113495bSYour Name 37*5113495bSYour Name #ifndef SOC_WCSS_BASE_ADDR 38*5113495bSYour Name #if ( defined(WCSS_BASE) && ( WCSS_BASE != 0x0 ) ) 39*5113495bSYour Name #error WCSS_BASE incorrectly redefined! 40*5113495bSYour Name #endif 41*5113495bSYour Name #define SOC_WCSS_BASE_ADDR 0x0 42*5113495bSYour Name #else 43*5113495bSYour Name #if ( SOC_WCSS_BASE_ADDR != 0x0 ) 44*5113495bSYour Name #error SOC_WCSS_BASE_ADDR incorrectly redefined! 45*5113495bSYour Name #endif 46*5113495bSYour Name #endif 47*5113495bSYour Name 48*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 49*5113495bSYour Name // Instance Relative Offsets from Block wcss 50*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 51*5113495bSYour Name 52*5113495bSYour Name #define SEQ_WCSS_ECAHB_OFFSET 0x00008400 53*5113495bSYour Name #define SEQ_WCSS_ECAHB_TSLV_OFFSET 0x00009000 54*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 55*5113495bSYour Name #define SEQ_WCSS_MPSS_OFFSET 0x00200000 56*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0PDMEM_MPSS_WFAX_PCSS_PDMEM_OFFSET 0x00200000 57*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_MPSS_WFAX_PCSS_OFFSET 0x00280000 58*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_MPSS_WFAX_PCSS_DUAL_TIMER_OFFSET 0x00281800 59*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_MPSS_WFAX_PCSS_WATCHDOG_OFFSET 0x00281c00 60*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00400000 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00400000 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00480000 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00480400 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00480800 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00480c00 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00481000 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00481400 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00481800 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00481c00 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC5_REG_MAP_OFFSET 0x00482c00 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00484000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x00488000 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_NPRA1_REG_MAP_OFFSET 0x00490000 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00500000 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x00520000 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x00528000 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00530000 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x005a0000 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x005d4c00 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_BS_OFFSET 0x005d5000 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_BIST_OFFSET 0x005d5040 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_PC_OFFSET 0x005d5080 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_AC_OFFSET 0x005d50c0 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x005d5400 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 91*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 92*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6080 93*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d60c0 94*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6100 95*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d6140 96*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x005d6200 97*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x005d6800 98*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x005d6840 99*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x005d6880 100*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x005d68c0 101*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6900 102*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d6940 103*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a00 104*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x005d7c00 105*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_OFFSET 0x005d8000 106*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_MC_OFFSET 0x005d8000 107*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_RX_OFFSET 0x005d8400 108*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_BS_OFFSET 0x005d8800 109*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x005d8880 110*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_BIST_OFFSET 0x005d88c0 111*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_PC_OFFSET 0x005d8940 112*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_AC_OFFSET 0x005d8980 113*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x005dc000 114*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH2_OFFSET 0x005dc000 115*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH1_OFFSET 0x005dc400 116*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH0_OFFSET 0x005dc600 117*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x005dc800 118*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x005dc840 119*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x005dc880 120*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x005dc8c0 121*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 122*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x005e0000 123*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x005e0400 124*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x005e0800 125*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x005e1000 126*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x005e1300 127*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x005e1600 128*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_2G_CH0_OFFSET 0x005e1640 129*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x005e2000 130*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x005e2400 131*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x005e2500 132*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x005e2580 133*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x005e2590 134*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x005e2600 135*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x005e26c0 136*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x005e2740 137*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x005e2768 138*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x005e4000 139*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x005e8000 140*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x005e8400 141*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x005e8800 142*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x005e9180 143*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x005e9480 144*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x005e9600 145*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_5G_CH0_OFFSET 0x005e9640 146*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x005ea000 147*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x005ea400 148*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x005ea500 149*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x005ea580 150*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x005ea590 151*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x005ea600 152*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x005ea6c0 153*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x005ea740 154*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x005ea768 155*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x005ec000 156*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x005f0000 157*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x005f0400 158*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x005f0800 159*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x005f1000 160*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x005f1300 161*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x005f1600 162*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_2G_CH1_OFFSET 0x005f1640 163*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x005f2000 164*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x005f2400 165*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x005f2500 166*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x005f2580 167*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x005f2590 168*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x005f2600 169*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x005f26c0 170*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x005f2740 171*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x005f2768 172*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x005f4000 173*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x005f8000 174*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x005f8400 175*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x005f8800 176*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x005f9180 177*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x005f9480 178*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x005f9600 179*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_5G_CH1_OFFSET 0x005f9640 180*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x005fa000 181*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x005fa400 182*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x005fa500 183*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x005fa580 184*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x005fa590 185*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x005fa600 186*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x005fa6c0 187*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x005fa740 188*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x005fa768 189*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x005fc000 190*5113495bSYour Name #define SEQ_WCSS_PHYB_OFFSET 0x00600000 191*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00600000 192*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_B_REG_MAP_OFFSET 0x00680000 193*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00680400 194*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00680800 195*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00680c00 196*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00681000 197*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00681400 198*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00681800 199*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00681c00 200*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC5_B_REG_MAP_OFFSET 0x00682c00 201*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_NOC_B_REG_MAP_OFFSET 0x00684000 202*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXTD_B_REG_MAP_OFFSET 0x00688000 203*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXFD_B_REG_MAP_OFFSET 0x00700000 204*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_ROBE_B_REG_MAP_OFFSET 0x00720000 205*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_RXTD_B_REG_MAP_OFFSET 0x00728000 206*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00730000 207*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PHYRF_B_REG_MAP_OFFSET 0x007a0000 208*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_OFFSET 0x007c0000 209*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x007d4000 210*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x007d4000 211*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x007d4300 212*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4800 213*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x007d4c00 214*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_BS_OFFSET 0x007d5000 215*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_BIST_OFFSET 0x007d5040 216*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_PC_OFFSET 0x007d5080 217*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_AC_OFFSET 0x007d50c0 218*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x007d5400 219*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000 220*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040 221*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d6080 222*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x007d60c0 223*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x007d6100 224*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x007d6140 225*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x007d6200 226*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x007d6800 227*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x007d6840 228*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x007d6880 229*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x007d68c0 230*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6900 231*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d6940 232*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x007d6a00 233*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x007d7c00 234*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_OFFSET 0x007d8000 235*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_MC_OFFSET 0x007d8000 236*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_RX_OFFSET 0x007d8400 237*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_BS_OFFSET 0x007d8800 238*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x007d8880 239*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_BIST_OFFSET 0x007d88c0 240*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_PC_OFFSET 0x007d8940 241*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_AC_OFFSET 0x007d8980 242*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_OFFSET 0x007dc000 243*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH2_OFFSET 0x007dc000 244*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH1_OFFSET 0x007dc400 245*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH0_OFFSET 0x007dc600 246*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x007dc800 247*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x007dc840 248*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x007dc880 249*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x007dc8c0 250*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x007e0000 251*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x007e0000 252*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x007e0400 253*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x007e0800 254*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x007e1000 255*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x007e1300 256*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x007e1600 257*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_2G_CH0_OFFSET 0x007e1640 258*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x007e2000 259*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x007e2400 260*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x007e2500 261*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x007e2580 262*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x007e2590 263*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x007e2600 264*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x007e26c0 265*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x007e2740 266*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x007e2768 267*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x007e4000 268*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x007e8000 269*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x007e8400 270*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x007e8800 271*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x007e9180 272*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x007e9480 273*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x007e9600 274*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_5G_CH0_OFFSET 0x007e9640 275*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x007ea000 276*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x007ea400 277*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x007ea500 278*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x007ea580 279*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x007ea590 280*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x007ea600 281*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x007ea6c0 282*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x007ea740 283*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x007ea768 284*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x007ec000 285*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x007f0000 286*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x007f0400 287*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x007f0800 288*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x007f1000 289*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x007f1300 290*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x007f1600 291*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_2G_CH1_OFFSET 0x007f1640 292*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x007f2000 293*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x007f2400 294*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x007f2500 295*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x007f2580 296*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x007f2590 297*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x007f2600 298*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x007f26c0 299*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x007f2740 300*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x007f2768 301*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x007f4000 302*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x007f8000 303*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x007f8400 304*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x007f8800 305*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x007f9180 306*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x007f9480 307*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x007f9600 308*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_5G_CH1_OFFSET 0x007f9640 309*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x007fa000 310*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x007fa400 311*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x007fa500 312*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x007fa580 313*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x007fa590 314*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x007fa600 315*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x007fa6c0 316*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x007fa740 317*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x007fa768 318*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x007fc000 319*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 320*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_OFFSET 0x00a00000 321*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00a00000 322*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00a01000 323*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00a02000 324*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00a03000 325*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00a04000 326*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00a05000 327*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00a06000 328*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00a07000 329*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00a08000 330*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00a09000 331*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x00a0a000 332*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x00a0b000 333*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x00a0c000 334*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x00a0d000 335*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x00a0e000 336*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x00a0f000 337*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00a10000 338*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00a11000 339*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00a12000 340*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00a13000 341*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00a14000 342*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00a15000 343*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00a16000 344*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00a17000 345*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00a18000 346*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 347*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 348*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 349*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 350*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 351*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 352*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 353*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 354*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 355*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 356*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 357*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 358*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 359*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_REG_OFFSET 0x00a47000 360*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CCE_REG_OFFSET 0x00a4a000 361*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 362*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 363*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 364*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 365*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 366*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 367*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 368*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 369*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 370*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 371*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 372*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 373*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 374*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 375*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 376*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 377*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 378*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 379*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA1_REG_OFFSET 0x00ab6000 380*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_LPEC_REG_OFFSET 0x00ab9000 381*5113495bSYour Name #define SEQ_WCSS_WMAC1_OFFSET 0x00b00000 382*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_PDG_REG_OFFSET 0x00b00000 383*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXDMA_REG_OFFSET 0x00b03000 384*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA_REG_OFFSET 0x00b06000 385*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MCMN_REG_OFFSET 0x00b09000 386*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXPCU_REG_OFFSET 0x00b0c000 387*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXPCU_REG_OFFSET 0x00b0f000 388*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_AMPI_REG_OFFSET 0x00b12000 389*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_REG_OFFSET 0x00b15000 390*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_PARSER_REG_OFFSET 0x00b18000 391*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CCE_REG_OFFSET 0x00b1b000 392*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_REG_OFFSET 0x00b1e000 393*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_PARSER_REG_OFFSET 0x00b21000 394*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RRI_REG_OFFSET 0x00b24000 395*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CRYPTO_REG_OFFSET 0x00b27000 396*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_HWSCH_REG_OFFSET 0x00b2a000 397*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MXI_REG_OFFSET 0x00b30000 398*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_SFM_REG_OFFSET 0x00b33000 399*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA1_REG_OFFSET 0x00b36000 400*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_LPEC_REG_OFFSET 0x00b39000 401*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 402*5113495bSYour Name #define SEQ_WCSS_WCMN_OFFSET 0x00b50000 403*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 404*5113495bSYour Name #define SEQ_WCSS_PMM_OFFSET 0x00b70000 405*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 406*5113495bSYour Name #define SEQ_WCSS_DBG_ROM_WCSS_DBG_DAPROM_OFFSET 0x00b90000 407*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 408*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 409*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_24T_8CH_OFFSET 0x00b94000 410*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 411*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 412*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_OFFSET 0x00b98000 413*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00b98280 414*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00b98000 415*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_OFFSET 0x00b99000 416*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00b99280 417*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00b99000 418*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_TPDA_S2_W64_D2_M64_CS4C2456A_OFFSET 0x00b9a000 419*5113495bSYour Name #define SEQ_WCSS_DBG_FUN_CXATBFUNNEL_128W8SP_OFFSET 0x00b9b000 420*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W8K_OFFSET 0x00b9c000 421*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_NOC_UMAC_NOC_OFFSET 0x00ba0000 422*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bb0000 423*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_CTI_QC_CTI_10T_8CH_OFFSET 0x00bb1000 424*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_NOC_PHYA_NOC_OFFSET 0x00bb6000 425*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_CPU0_M3_AHB_AP_OFFSET 0x00bbe000 426*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc0000 427*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_CTI_QC_CTI_10T_8CH_OFFSET 0x00bc1000 428*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_NOC_PHYB_NOC_OFFSET 0x00bc6000 429*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_CPU0_M3_AHB_AP_OFFSET 0x00bce000 430*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_CPU_M3_AHB_AP_OFFSET 0x00bf0000 431*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00bf1000 432*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c10000 433*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00c20000 434*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00c30000 435*5113495bSYour Name #define SEQ_WCSS_ACMT_OFFSET 0x00c40000 436*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_OFFSET 0x00d00000 437*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_QDSP6SS_PUB_OFFSET 0x00d00000 438*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_OFFSET 0x00d80000 439*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_CSR_OFFSET 0x00d80000 440*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_L2VIC_OFFSET 0x00d90000 441*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_QTMR_AC_OFFSET 0x00da0000 442*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F0_OFFSET 0x00da1000 443*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F1_OFFSET 0x00da2000 444*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F2_OFFSET 0x00da3000 445*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_SAW2_OFFSET 0x00db0000 446*5113495bSYour Name 447*5113495bSYour Name 448*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 449*5113495bSYour Name // Instance Relative Offsets from Block mpss_top 450*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 451*5113495bSYour Name 452*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0PDMEM_MPSS_WFAX_PCSS_PDMEM_OFFSET 0x00000000 453*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_MPSS_WFAX_PCSS_OFFSET 0x00080000 454*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_MPSS_WFAX_PCSS_DUAL_TIMER_OFFSET 0x00081800 455*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_MPSS_WFAX_PCSS_WATCHDOG_OFFSET 0x00081c00 456*5113495bSYour Name 457*5113495bSYour Name 458*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 459*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 460*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 461*5113495bSYour Name 462*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 463*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 464*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 465*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 466*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 467*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 468*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 469*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 470*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 471*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC5_REG_MAP_OFFSET 0x00082c00 472*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00084000 473*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x00088000 474*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_NPRA1_REG_MAP_OFFSET 0x00090000 475*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00100000 476*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x00120000 477*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x00128000 478*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00130000 479*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x001a0000 480*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x001c0000 481*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x001d4000 482*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 483*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300 484*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800 485*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x001d4c00 486*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_BS_OFFSET 0x001d5000 487*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_BIST_OFFSET 0x001d5040 488*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_PC_OFFSET 0x001d5080 489*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_AC_OFFSET 0x001d50c0 490*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x001d5400 491*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 492*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 493*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6080 494*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d60c0 495*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6100 496*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d6140 497*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x001d6200 498*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 499*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 500*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d6880 501*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d68c0 502*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6900 503*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6940 504*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a00 505*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x001d7c00 506*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_OFFSET 0x001d8000 507*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_MC_OFFSET 0x001d8000 508*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_RX_OFFSET 0x001d8400 509*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_BS_OFFSET 0x001d8800 510*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x001d8880 511*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_BIST_OFFSET 0x001d88c0 512*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_PC_OFFSET 0x001d8940 513*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_FM_FM_SYNTH_AC_OFFSET 0x001d8980 514*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x001dc000 515*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH2_OFFSET 0x001dc000 516*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH1_OFFSET 0x001dc400 517*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH0_OFFSET 0x001dc600 518*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x001dc800 519*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x001dc840 520*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x001dc880 521*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x001dc8c0 522*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x001e0000 523*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x001e0000 524*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x001e0400 525*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x001e0800 526*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x001e1000 527*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x001e1300 528*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x001e1600 529*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_2G_CH0_OFFSET 0x001e1640 530*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x001e2000 531*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x001e2400 532*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x001e2500 533*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x001e2580 534*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x001e2590 535*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x001e2600 536*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x001e26c0 537*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x001e2740 538*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x001e2768 539*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x001e4000 540*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x001e8000 541*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x001e8400 542*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x001e8800 543*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x001e9180 544*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x001e9480 545*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x001e9600 546*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_5G_CH0_OFFSET 0x001e9640 547*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x001ea000 548*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x001ea400 549*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x001ea500 550*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x001ea580 551*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x001ea590 552*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x001ea600 553*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x001ea6c0 554*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x001ea740 555*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x001ea768 556*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x001ec000 557*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x001f0000 558*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x001f0400 559*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x001f0800 560*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x001f1000 561*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x001f1300 562*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x001f1600 563*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_2G_CH1_OFFSET 0x001f1640 564*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x001f2000 565*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x001f2400 566*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x001f2500 567*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x001f2580 568*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x001f2590 569*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x001f2600 570*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x001f26c0 571*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x001f2740 572*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x001f2768 573*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x001f4000 574*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x001f8000 575*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x001f8400 576*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x001f8800 577*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x001f9180 578*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x001f9480 579*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x001f9600 580*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_5G_CH1_OFFSET 0x001f9640 581*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x001fa000 582*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x001fa400 583*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x001fa500 584*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x001fa580 585*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x001fa590 586*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x001fa600 587*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x001fa6c0 588*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x001fa740 589*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x001fa768 590*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x001fc000 591*5113495bSYour Name 592*5113495bSYour Name 593*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 594*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 595*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 596*5113495bSYour Name 597*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 598*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 599*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 600*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 601*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BTFMPLL_OFFSET 0x00014c00 602*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_BS_OFFSET 0x00015000 603*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_BIST_OFFSET 0x00015040 604*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_PC_OFFSET 0x00015080 605*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_AC_OFFSET 0x000150c0 606*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00015400 607*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 608*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 609*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016080 610*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x000160c0 611*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016100 612*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x00016140 613*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016200 614*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00016800 615*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00016840 616*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00016880 617*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x000168c0 618*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016900 619*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00016940 620*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00016a00 621*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_DRM_REG_OFFSET 0x00017c00 622*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_OFFSET 0x00018000 623*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_MC_OFFSET 0x00018000 624*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_RX_OFFSET 0x00018400 625*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_SYNTH_BS_OFFSET 0x00018800 626*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x00018880 627*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_SYNTH_BIST_OFFSET 0x000188c0 628*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_SYNTH_PC_OFFSET 0x00018940 629*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_FM_FM_SYNTH_AC_OFFSET 0x00018980 630*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET 0x0001c000 631*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_CH2_OFFSET 0x0001c000 632*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_CH1_OFFSET 0x0001c400 633*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_CH0_OFFSET 0x0001c600 634*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BS_OFFSET 0x0001c800 635*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BIST_OFFSET 0x0001c840 636*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_PC_OFFSET 0x0001c880 637*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_AC_OFFSET 0x0001c8c0 638*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 639*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00020000 640*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00020400 641*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00020800 642*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00021000 643*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00021300 644*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x00021600 645*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_2G_CH0_OFFSET 0x00021640 646*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00022000 647*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00022400 648*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x00022500 649*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00022580 650*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x00022590 651*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x00022600 652*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x000226c0 653*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00022740 654*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x00022768 655*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00024000 656*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00028000 657*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00028400 658*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00028800 659*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00029180 660*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00029480 661*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x00029600 662*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_5G_CH0_OFFSET 0x00029640 663*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0002a000 664*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0002a400 665*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x0002a500 666*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0002a580 667*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x0002a590 668*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x0002a600 669*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x0002a6c0 670*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0002a740 671*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x0002a768 672*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0002c000 673*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00030000 674*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00030400 675*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00030800 676*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00031000 677*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00031300 678*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x00031600 679*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_2G_CH1_OFFSET 0x00031640 680*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00032000 681*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00032400 682*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x00032500 683*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00032580 684*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x00032590 685*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x00032600 686*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x000326c0 687*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00032740 688*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x00032768 689*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00034000 690*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00038000 691*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00038400 692*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00038800 693*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00039180 694*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00039480 695*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x00039600 696*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_5G_CH1_OFFSET 0x00039640 697*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0003a000 698*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0003a400 699*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x0003a500 700*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0003a580 701*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x0003a590 702*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x0003a600 703*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x0003a6c0 704*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0003a740 705*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x0003a768 706*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0003c000 707*5113495bSYour Name 708*5113495bSYour Name 709*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 710*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 711*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 712*5113495bSYour Name 713*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 714*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 715*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 716*5113495bSYour Name #define SEQ_RFA_CMN_BTFMPLL_OFFSET 0x00000c00 717*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_BS_OFFSET 0x00001000 718*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_BIST_OFFSET 0x00001040 719*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_PC_OFFSET 0x00001080 720*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_AC_OFFSET 0x000010c0 721*5113495bSYour Name #define SEQ_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00001400 722*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 723*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 724*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002080 725*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x000020c0 726*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002100 727*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x00002140 728*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002200 729*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00002800 730*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00002840 731*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00002880 732*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x000028c0 733*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002900 734*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00002940 735*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00002a00 736*5113495bSYour Name #define SEQ_RFA_CMN_DRM_REG_OFFSET 0x00003c00 737*5113495bSYour Name 738*5113495bSYour Name 739*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 740*5113495bSYour Name // Instance Relative Offsets from Block rfa_fm 741*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 742*5113495bSYour Name 743*5113495bSYour Name #define SEQ_RFA_FM_FM_MC_OFFSET 0x00000000 744*5113495bSYour Name #define SEQ_RFA_FM_FM_RX_OFFSET 0x00000400 745*5113495bSYour Name #define SEQ_RFA_FM_FM_SYNTH_BS_OFFSET 0x00000800 746*5113495bSYour Name #define SEQ_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x00000880 747*5113495bSYour Name #define SEQ_RFA_FM_FM_SYNTH_BIST_OFFSET 0x000008c0 748*5113495bSYour Name #define SEQ_RFA_FM_FM_SYNTH_PC_OFFSET 0x00000940 749*5113495bSYour Name #define SEQ_RFA_FM_FM_SYNTH_AC_OFFSET 0x00000980 750*5113495bSYour Name 751*5113495bSYour Name 752*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 753*5113495bSYour Name // Instance Relative Offsets from Block rfa_bt 754*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 755*5113495bSYour Name 756*5113495bSYour Name #define SEQ_RFA_BT_BT_CH2_OFFSET 0x00000000 757*5113495bSYour Name #define SEQ_RFA_BT_BT_CH1_OFFSET 0x00000400 758*5113495bSYour Name #define SEQ_RFA_BT_BT_CH0_OFFSET 0x00000600 759*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BS_OFFSET 0x00000800 760*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BIST_OFFSET 0x00000840 761*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_PC_OFFSET 0x00000880 762*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_AC_OFFSET 0x000008c0 763*5113495bSYour Name 764*5113495bSYour Name 765*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 766*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 767*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 768*5113495bSYour Name 769*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00000000 770*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00000400 771*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00000800 772*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00001000 773*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00001300 774*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x00001600 775*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_2G_CH0_OFFSET 0x00001640 776*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00002000 777*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00002400 778*5113495bSYour Name #define SEQ_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x00002500 779*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00002580 780*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x00002590 781*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x00002600 782*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x000026c0 783*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00002740 784*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x00002768 785*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00004000 786*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00008000 787*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00008400 788*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00008800 789*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00009180 790*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00009480 791*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x00009600 792*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_5G_CH0_OFFSET 0x00009640 793*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0000a000 794*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0000a400 795*5113495bSYour Name #define SEQ_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x0000a500 796*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0000a580 797*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x0000a590 798*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x0000a600 799*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x0000a6c0 800*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0000a740 801*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x0000a768 802*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0000c000 803*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00010000 804*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00010400 805*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00010800 806*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00011000 807*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00011300 808*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x00011600 809*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_2G_CH1_OFFSET 0x00011640 810*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00012000 811*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00012400 812*5113495bSYour Name #define SEQ_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x00012500 813*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00012580 814*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x00012590 815*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x00012600 816*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x000126c0 817*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00012740 818*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x00012768 819*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00014000 820*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00018000 821*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00018400 822*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00018800 823*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00019180 824*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00019480 825*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x00019600 826*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_5G_CH1_OFFSET 0x00019640 827*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0001a000 828*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0001a400 829*5113495bSYour Name #define SEQ_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x0001a500 830*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0001a580 831*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x0001a590 832*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x0001a600 833*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x0001a6c0 834*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0001a740 835*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x0001a768 836*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0001c000 837*5113495bSYour Name 838*5113495bSYour Name 839*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 840*5113495bSYour Name // Instance Relative Offsets from Block wfax_top_b 841*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 842*5113495bSYour Name 843*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00000000 844*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_B_REG_MAP_OFFSET 0x00080000 845*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00080400 846*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00080800 847*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00080c00 848*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00081000 849*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00081400 850*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00081800 851*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00081c00 852*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC5_B_REG_MAP_OFFSET 0x00082c00 853*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_NOC_B_REG_MAP_OFFSET 0x00084000 854*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXTD_B_REG_MAP_OFFSET 0x00088000 855*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXFD_B_REG_MAP_OFFSET 0x00100000 856*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_ROBE_B_REG_MAP_OFFSET 0x00120000 857*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_RXTD_B_REG_MAP_OFFSET 0x00128000 858*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00130000 859*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PHYRF_B_REG_MAP_OFFSET 0x001a0000 860*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_OFFSET 0x001c0000 861*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x001d4000 862*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 863*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300 864*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800 865*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x001d4c00 866*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_BS_OFFSET 0x001d5000 867*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_BIST_OFFSET 0x001d5040 868*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_PC_OFFSET 0x001d5080 869*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_AC_OFFSET 0x001d50c0 870*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x001d5400 871*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 872*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 873*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6080 874*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d60c0 875*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6100 876*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d6140 877*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x001d6200 878*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 879*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 880*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d6880 881*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d68c0 882*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6900 883*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6940 884*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a00 885*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x001d7c00 886*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_OFFSET 0x001d8000 887*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_MC_OFFSET 0x001d8000 888*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_RX_OFFSET 0x001d8400 889*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_BS_OFFSET 0x001d8800 890*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_CLBS_OFFSET 0x001d8880 891*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_BIST_OFFSET 0x001d88c0 892*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_PC_OFFSET 0x001d8940 893*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_FM_FM_SYNTH_AC_OFFSET 0x001d8980 894*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_OFFSET 0x001dc000 895*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH2_OFFSET 0x001dc000 896*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH1_OFFSET 0x001dc400 897*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_CH0_OFFSET 0x001dc600 898*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x001dc800 899*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x001dc840 900*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x001dc880 901*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x001dc8c0 902*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x001e0000 903*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x001e0000 904*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x001e0400 905*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x001e0800 906*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x001e1000 907*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x001e1300 908*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH0_OFFSET 0x001e1600 909*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_2G_CH0_OFFSET 0x001e1640 910*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x001e2000 911*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x001e2400 912*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_2G_CH0_OFFSET 0x001e2500 913*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x001e2580 914*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH0_OFFSET 0x001e2590 915*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH0_OFFSET 0x001e2600 916*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH0_OFFSET 0x001e26c0 917*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x001e2740 918*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH0_OFFSET 0x001e2768 919*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x001e4000 920*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x001e8000 921*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x001e8400 922*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x001e8800 923*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x001e9180 924*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x001e9480 925*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH0_OFFSET 0x001e9600 926*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_5G_CH0_OFFSET 0x001e9640 927*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x001ea000 928*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x001ea400 929*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_5G_CH0_OFFSET 0x001ea500 930*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x001ea580 931*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH0_OFFSET 0x001ea590 932*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH0_OFFSET 0x001ea600 933*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH0_OFFSET 0x001ea6c0 934*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x001ea740 935*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH0_OFFSET 0x001ea768 936*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x001ec000 937*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x001f0000 938*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x001f0400 939*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x001f0800 940*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x001f1000 941*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x001f1300 942*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_2G_CH1_OFFSET 0x001f1600 943*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_2G_CH1_OFFSET 0x001f1640 944*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x001f2000 945*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x001f2400 946*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_2G_CH1_OFFSET 0x001f2500 947*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x001f2580 948*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_2G_CH1_OFFSET 0x001f2590 949*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_2G_CH1_OFFSET 0x001f2600 950*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_2G_CH1_OFFSET 0x001f26c0 951*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x001f2740 952*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_2G_CH1_OFFSET 0x001f2768 953*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x001f4000 954*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x001f8000 955*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x001f8400 956*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x001f8800 957*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x001f9180 958*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x001f9480 959*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_PAL_5G_CH1_OFFSET 0x001f9600 960*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_LO_5G_CH1_OFFSET 0x001f9640 961*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x001fa000 962*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x001fa400 963*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_5G_CH1_OFFSET 0x001fa500 964*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x001fa580 965*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_CALIB_5G_CH1_OFFSET 0x001fa590 966*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_REGARRAY_5G_CH1_OFFSET 0x001fa600 967*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BB_CLKGEN_5G_CH1_OFFSET 0x001fa6c0 968*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x001fa740 969*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BB_CLKGEN_5G_CH1_OFFSET 0x001fa768 970*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x001fc000 971*5113495bSYour Name 972*5113495bSYour Name 973*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 974*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 975*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 976*5113495bSYour Name 977*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_OFFSET 0x00000000 978*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 979*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 980*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 981*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 982*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 983*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 984*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 985*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 986*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 987*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 988*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 989*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 990*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 991*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 992*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 993*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 994*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 995*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 996*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 997*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 998*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 999*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 1000*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 1001*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 1002*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 1003*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 1004*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 1005*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 1006*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 1007*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 1008*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 1009*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 1010*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 1011*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 1012*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 1013*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 1014*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 1015*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 1016*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_REG_OFFSET 0x00047000 1017*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0004a000 1018*5113495bSYour Name 1019*5113495bSYour Name 1020*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1021*5113495bSYour Name // Instance Relative Offsets from Block wfss_ce_reg 1022*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1023*5113495bSYour Name 1024*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 1025*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 1026*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 1027*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 1028*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 1029*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 1030*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 1031*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 1032*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 1033*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 1034*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 1035*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 1036*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 1037*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 1038*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 1039*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 1040*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 1041*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 1042*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 1043*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 1044*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 1045*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 1046*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 1047*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 1048*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 1049*5113495bSYour Name 1050*5113495bSYour Name 1051*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1052*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 1053*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1054*5113495bSYour Name 1055*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 1056*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 1057*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 1058*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 1059*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 1060*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 1061*5113495bSYour Name 1062*5113495bSYour Name 1063*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1064*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 1065*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1066*5113495bSYour Name 1067*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 1068*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 1069*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 1070*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 1071*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 1072*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 1073*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 1074*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 1075*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 1076*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 1077*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 1078*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 1079*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 1080*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 1081*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 1082*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 1083*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 1084*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA1_REG_OFFSET 0x00036000 1085*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_LPEC_REG_OFFSET 0x00039000 1086*5113495bSYour Name 1087*5113495bSYour Name 1088*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1089*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg_napier 1090*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1091*5113495bSYour Name 1092*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_ROM_WCSS_DBG_DAPROM_OFFSET 0x00000000 1093*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 1094*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TSGEN_CXTSGEN_OFFSET 0x00002000 1095*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTIDBG_QC_CTI_24T_8CH_OFFSET 0x00004000 1096*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 1097*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 1098*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_OFFSET 0x00008000 1099*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00008280 1100*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00008000 1101*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_OFFSET 0x00009000 1102*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00009280 1103*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00009000 1104*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDA_TPDA_S2_W64_D2_M64_CS4C2456A_OFFSET 0x0000a000 1105*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_FUN_CXATBFUNNEL_128W8SP_OFFSET 0x0000b000 1106*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TMC_CXTMC_F128W8K_OFFSET 0x0000c000 1107*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_UMAC_NOC_UMAC_NOC_OFFSET 0x00010000 1108*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00020000 1109*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_CTI_QC_CTI_10T_8CH_OFFSET 0x00021000 1110*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_NOC_PHYA_NOC_OFFSET 0x00026000 1111*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_CPU0_M3_AHB_AP_OFFSET 0x0002e000 1112*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00030000 1113*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_CTI_QC_CTI_10T_8CH_OFFSET 0x00031000 1114*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_NOC_PHYB_NOC_OFFSET 0x00036000 1115*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_CPU0_M3_AHB_AP_OFFSET 0x0003e000 1116*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_UMAC_CPU_M3_AHB_AP_OFFSET 0x00060000 1117*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_BUS_TIMEOUT_OFFSET 0x00061000 1118*5113495bSYour Name 1119*5113495bSYour Name 1120*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1121*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 1122*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1123*5113495bSYour Name 1124*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 1125*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 1126*5113495bSYour Name 1127*5113495bSYour Name 1128*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1129*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb32_dsb64_csf49237bd 1130*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1131*5113495bSYour Name 1132*5113495bSYour Name #define SEQ_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00000280 1133*5113495bSYour Name #define SEQ_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00000000 1134*5113495bSYour Name 1135*5113495bSYour Name 1136*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1137*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_public 1138*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1139*5113495bSYour Name 1140*5113495bSYour Name #define SEQ_QDSP6SS_PUBLIC_QDSP6SS_PUB_OFFSET 0x00000000 1141*5113495bSYour Name 1142*5113495bSYour Name 1143*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1144*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_private 1145*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1146*5113495bSYour Name 1147*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_CSR_OFFSET 0x00000000 1148*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_L2VIC_OFFSET 0x00010000 1149*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00020000 1150*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F0_OFFSET 0x00021000 1151*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F1_OFFSET 0x00022000 1152*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F2_OFFSET 0x00023000 1153*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_SAW2_OFFSET 0x00030000 1154*5113495bSYour Name 1155*5113495bSYour Name 1156*5113495bSYour Name #endif 1157*5113495bSYour Name 1158