1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _REO_FLUSH_TIMEOUT_LIST_STATUS_H_ 25 #define _REO_FLUSH_TIMEOUT_LIST_STATUS_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "uniform_reo_status_header.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0-1 struct uniform_reo_status_header status_header; 35 // 2 error_detected[0], timout_list_empty[1], reserved_2a[31:2] 36 // 3 release_desc_count[15:0], forward_buf_count[31:16] 37 // 4 reserved_4a[31:0] 38 // 5 reserved_5a[31:0] 39 // 6 reserved_6a[31:0] 40 // 7 reserved_7a[31:0] 41 // 8 reserved_8a[31:0] 42 // 9 reserved_9a[31:0] 43 // 10 reserved_10a[31:0] 44 // 11 reserved_11a[31:0] 45 // 12 reserved_12a[31:0] 46 // 13 reserved_13a[31:0] 47 // 14 reserved_14a[31:0] 48 // 15 reserved_15a[31:0] 49 // 16 reserved_16a[31:0] 50 // 17 reserved_17a[31:0] 51 // 18 reserved_18a[31:0] 52 // 19 reserved_19a[31:0] 53 // 20 reserved_20a[31:0] 54 // 21 reserved_21a[31:0] 55 // 22 reserved_22a[31:0] 56 // 23 reserved_23a[31:0] 57 // 24 reserved_24a[27:0], looping_count[31:28] 58 // 59 // ################ END SUMMARY ################# 60 61 #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST_STATUS 25 62 63 struct reo_flush_timeout_list_status { 64 struct uniform_reo_status_header status_header; 65 uint32_t error_detected : 1, //[0] 66 timout_list_empty : 1, //[1] 67 reserved_2a : 30; //[31:2] 68 uint32_t release_desc_count : 16, //[15:0] 69 forward_buf_count : 16; //[31:16] 70 uint32_t reserved_4a : 32; //[31:0] 71 uint32_t reserved_5a : 32; //[31:0] 72 uint32_t reserved_6a : 32; //[31:0] 73 uint32_t reserved_7a : 32; //[31:0] 74 uint32_t reserved_8a : 32; //[31:0] 75 uint32_t reserved_9a : 32; //[31:0] 76 uint32_t reserved_10a : 32; //[31:0] 77 uint32_t reserved_11a : 32; //[31:0] 78 uint32_t reserved_12a : 32; //[31:0] 79 uint32_t reserved_13a : 32; //[31:0] 80 uint32_t reserved_14a : 32; //[31:0] 81 uint32_t reserved_15a : 32; //[31:0] 82 uint32_t reserved_16a : 32; //[31:0] 83 uint32_t reserved_17a : 32; //[31:0] 84 uint32_t reserved_18a : 32; //[31:0] 85 uint32_t reserved_19a : 32; //[31:0] 86 uint32_t reserved_20a : 32; //[31:0] 87 uint32_t reserved_21a : 32; //[31:0] 88 uint32_t reserved_22a : 32; //[31:0] 89 uint32_t reserved_23a : 32; //[31:0] 90 uint32_t reserved_24a : 28, //[27:0] 91 looping_count : 4; //[31:28] 92 }; 93 94 /* 95 96 struct uniform_reo_status_header status_header 97 98 Consumer: SW 99 100 Producer: REO 101 102 103 104 Details that can link this status with the original 105 command. It also contains info on how long REO took to 106 execute this command. 107 108 error_detected 109 110 0: No error has been detected while executing this 111 command 112 113 1: command not properly executed and returned with an 114 error 115 116 117 118 NOTE: Current no error is defined, but field is put in 119 place to avoid data structure changes in future... 120 121 timout_list_empty 122 123 When set, REO has depleted the timeout list and all 124 entries are gone. 125 126 <legal all> 127 128 reserved_2a 129 130 <legal 0> 131 132 release_desc_count 133 134 Consumer: REO 135 136 Producer: SW 137 138 139 140 The number of link descriptors released 141 142 <legal all> 143 144 forward_buf_count 145 146 Consumer: REO 147 148 Producer: SW 149 150 151 152 The number of buffers forwarded to the REO destination 153 rings 154 155 <legal all> 156 157 reserved_4a 158 159 <legal 0> 160 161 reserved_5a 162 163 <legal 0> 164 165 reserved_6a 166 167 <legal 0> 168 169 reserved_7a 170 171 <legal 0> 172 173 reserved_8a 174 175 <legal 0> 176 177 reserved_9a 178 179 <legal 0> 180 181 reserved_10a 182 183 <legal 0> 184 185 reserved_11a 186 187 <legal 0> 188 189 reserved_12a 190 191 <legal 0> 192 193 reserved_13a 194 195 <legal 0> 196 197 reserved_14a 198 199 <legal 0> 200 201 reserved_15a 202 203 <legal 0> 204 205 reserved_16a 206 207 <legal 0> 208 209 reserved_17a 210 211 <legal 0> 212 213 reserved_18a 214 215 <legal 0> 216 217 reserved_19a 218 219 <legal 0> 220 221 reserved_20a 222 223 <legal 0> 224 225 reserved_21a 226 227 <legal 0> 228 229 reserved_22a 230 231 <legal 0> 232 233 reserved_23a 234 235 <legal 0> 236 237 reserved_24a 238 239 <legal 0> 240 241 looping_count 242 243 A count value that indicates the number of times the 244 producer of entries into this Ring has looped around the 245 ring. 246 247 At initialization time, this value is set to 0. On the 248 first loop, this value is set to 1. After the max value is 249 reached allowed by the number of bits for this field, the 250 count value continues with 0 again. 251 252 253 254 In case SW is the consumer of the ring entries, it can 255 use this field to figure out up to where the producer of 256 entries has created new entries. This eliminates the need to 257 check where the head pointer' of the ring is located once 258 the SW starts processing an interrupt indicating that new 259 entries have been put into this ring... 260 261 262 263 Also note that SW if it wants only needs to look at the 264 LSB bit of this count value. 265 266 <legal all> 267 */ 268 269 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000 270 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 271 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 272 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004 273 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 274 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 275 276 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED 277 278 0: No error has been detected while executing this 279 command 280 281 1: command not properly executed and returned with an 282 error 283 284 285 286 NOTE: Current no error is defined, but field is put in 287 place to avoid data structure changes in future... 288 */ 289 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_OFFSET 0x00000008 290 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_LSB 0 291 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_MASK 0x00000001 292 293 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY 294 295 When set, REO has depleted the timeout list and all 296 entries are gone. 297 298 <legal all> 299 */ 300 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_OFFSET 0x00000008 301 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_LSB 1 302 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_MASK 0x00000002 303 304 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A 305 306 <legal 0> 307 */ 308 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_OFFSET 0x00000008 309 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_LSB 2 310 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_MASK 0xfffffffc 311 312 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT 313 314 Consumer: REO 315 316 Producer: SW 317 318 319 320 The number of link descriptors released 321 322 <legal all> 323 */ 324 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_OFFSET 0x0000000c 325 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_LSB 0 326 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_MASK 0x0000ffff 327 328 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT 329 330 Consumer: REO 331 332 Producer: SW 333 334 335 336 The number of buffers forwarded to the REO destination 337 rings 338 339 <legal all> 340 */ 341 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_OFFSET 0x0000000c 342 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_LSB 16 343 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_MASK 0xffff0000 344 345 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A 346 347 <legal 0> 348 */ 349 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_OFFSET 0x00000010 350 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_LSB 0 351 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_MASK 0xffffffff 352 353 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A 354 355 <legal 0> 356 */ 357 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_OFFSET 0x00000014 358 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_LSB 0 359 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_MASK 0xffffffff 360 361 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A 362 363 <legal 0> 364 */ 365 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_OFFSET 0x00000018 366 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_LSB 0 367 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_MASK 0xffffffff 368 369 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A 370 371 <legal 0> 372 */ 373 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_OFFSET 0x0000001c 374 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_LSB 0 375 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_MASK 0xffffffff 376 377 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A 378 379 <legal 0> 380 */ 381 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_OFFSET 0x00000020 382 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_LSB 0 383 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_MASK 0xffffffff 384 385 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A 386 387 <legal 0> 388 */ 389 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_OFFSET 0x00000024 390 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_LSB 0 391 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_MASK 0xffffffff 392 393 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A 394 395 <legal 0> 396 */ 397 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_OFFSET 0x00000028 398 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_LSB 0 399 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_MASK 0xffffffff 400 401 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A 402 403 <legal 0> 404 */ 405 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 406 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_LSB 0 407 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_MASK 0xffffffff 408 409 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A 410 411 <legal 0> 412 */ 413 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_OFFSET 0x00000030 414 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_LSB 0 415 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_MASK 0xffffffff 416 417 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A 418 419 <legal 0> 420 */ 421 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_OFFSET 0x00000034 422 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_LSB 0 423 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_MASK 0xffffffff 424 425 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A 426 427 <legal 0> 428 */ 429 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_OFFSET 0x00000038 430 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_LSB 0 431 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_MASK 0xffffffff 432 433 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A 434 435 <legal 0> 436 */ 437 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 438 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_LSB 0 439 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_MASK 0xffffffff 440 441 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A 442 443 <legal 0> 444 */ 445 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_OFFSET 0x00000040 446 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_LSB 0 447 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_MASK 0xffffffff 448 449 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A 450 451 <legal 0> 452 */ 453 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_OFFSET 0x00000044 454 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_LSB 0 455 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_MASK 0xffffffff 456 457 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A 458 459 <legal 0> 460 */ 461 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_OFFSET 0x00000048 462 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_LSB 0 463 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_MASK 0xffffffff 464 465 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A 466 467 <legal 0> 468 */ 469 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 470 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_LSB 0 471 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_MASK 0xffffffff 472 473 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A 474 475 <legal 0> 476 */ 477 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_OFFSET 0x00000050 478 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_LSB 0 479 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_MASK 0xffffffff 480 481 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A 482 483 <legal 0> 484 */ 485 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_OFFSET 0x00000054 486 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_LSB 0 487 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_MASK 0xffffffff 488 489 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A 490 491 <legal 0> 492 */ 493 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_OFFSET 0x00000058 494 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_LSB 0 495 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_MASK 0xffffffff 496 497 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A 498 499 <legal 0> 500 */ 501 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 502 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_LSB 0 503 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_MASK 0xffffffff 504 505 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A 506 507 <legal 0> 508 */ 509 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_OFFSET 0x00000060 510 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_LSB 0 511 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_MASK 0x0fffffff 512 513 /* Description REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT 514 515 A count value that indicates the number of times the 516 producer of entries into this Ring has looped around the 517 ring. 518 519 At initialization time, this value is set to 0. On the 520 first loop, this value is set to 1. After the max value is 521 reached allowed by the number of bits for this field, the 522 count value continues with 0 again. 523 524 525 526 In case SW is the consumer of the ring entries, it can 527 use this field to figure out up to where the producer of 528 entries has created new entries. This eliminates the need to 529 check where the head pointer' of the ring is located once 530 the SW starts processing an interrupt indicating that new 531 entries have been put into this ring... 532 533 534 535 Also note that SW if it wants only needs to look at the 536 LSB bit of this count value. 537 538 <legal all> 539 */ 540 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 541 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_LSB 28 542 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 543 544 545 #endif // _REO_FLUSH_TIMEOUT_LIST_STATUS_H_ 546