1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name // $ATH_LICENSE_HW_HDR_C$ 20*5113495bSYour Name // 21*5113495bSYour Name // DO NOT EDIT! This file is automatically generated 22*5113495bSYour Name // These definitions are tied to a particular hardware layout 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name #ifndef _RX_MPDU_END_H_ 26*5113495bSYour Name #define _RX_MPDU_END_H_ 27*5113495bSYour Name #if !defined(__ASSEMBLER__) 28*5113495bSYour Name #endif 29*5113495bSYour Name 30*5113495bSYour Name 31*5113495bSYour Name // ################ START SUMMARY ################# 32*5113495bSYour Name // 33*5113495bSYour Name // Dword Fields 34*5113495bSYour Name // 0 rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16] 35*5113495bSYour Name // 1 reserved_1a[10:0], unsup_ktype_short_frame[11], rx_in_tx_decrypt_byp[12], overflow_err[13], mpdu_length_err[14], tkip_mic_err[15], decrypt_err[16], unencrypted_frame_err[17], pn_fields_contain_valid_info[18], fcs_err[19], msdu_length_err[20], rxdma0_destination_ring[22:21], rxdma1_destination_ring[24:23], decrypt_status_code[27:25], rx_bitmap_not_updated[28], reserved_1b[31:29] 36*5113495bSYour Name // 37*5113495bSYour Name // ################ END SUMMARY ################# 38*5113495bSYour Name 39*5113495bSYour Name #define NUM_OF_DWORDS_RX_MPDU_END 2 40*5113495bSYour Name 41*5113495bSYour Name struct rx_mpdu_end { 42*5113495bSYour Name uint32_t rxpcu_mpdu_filter_in_category : 2, //[1:0] 43*5113495bSYour Name sw_frame_group_id : 7, //[8:2] 44*5113495bSYour Name reserved_0 : 7, //[15:9] 45*5113495bSYour Name phy_ppdu_id : 16; //[31:16] 46*5113495bSYour Name uint32_t reserved_1a : 11, //[10:0] 47*5113495bSYour Name unsup_ktype_short_frame : 1, //[11] 48*5113495bSYour Name rx_in_tx_decrypt_byp : 1, //[12] 49*5113495bSYour Name overflow_err : 1, //[13] 50*5113495bSYour Name mpdu_length_err : 1, //[14] 51*5113495bSYour Name tkip_mic_err : 1, //[15] 52*5113495bSYour Name decrypt_err : 1, //[16] 53*5113495bSYour Name unencrypted_frame_err : 1, //[17] 54*5113495bSYour Name pn_fields_contain_valid_info : 1, //[18] 55*5113495bSYour Name fcs_err : 1, //[19] 56*5113495bSYour Name msdu_length_err : 1, //[20] 57*5113495bSYour Name rxdma0_destination_ring : 2, //[22:21] 58*5113495bSYour Name rxdma1_destination_ring : 2, //[24:23] 59*5113495bSYour Name decrypt_status_code : 3, //[27:25] 60*5113495bSYour Name rx_bitmap_not_updated : 1, //[28] 61*5113495bSYour Name reserved_1b : 3; //[31:29] 62*5113495bSYour Name }; 63*5113495bSYour Name 64*5113495bSYour Name /* 65*5113495bSYour Name 66*5113495bSYour Name rxpcu_mpdu_filter_in_category 67*5113495bSYour Name 68*5113495bSYour Name Field indicates what the reason was that this MPDU frame 69*5113495bSYour Name was allowed to come into the receive path by RXPCU 70*5113495bSYour Name 71*5113495bSYour Name <enum 0 rxpcu_filter_pass> This MPDU passed the normal 72*5113495bSYour Name frame filter programming of rxpcu 73*5113495bSYour Name 74*5113495bSYour Name <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 75*5113495bSYour Name regular frame filter and would have been dropped, were it 76*5113495bSYour Name not for the frame fitting into the 'monitor_client' 77*5113495bSYour Name category. 78*5113495bSYour Name 79*5113495bSYour Name <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 80*5113495bSYour Name regular frame filter and also did not pass the 81*5113495bSYour Name rxpcu_monitor_client filter. It would have been dropped 82*5113495bSYour Name accept that it did pass the 'monitor_other' category. 83*5113495bSYour Name 84*5113495bSYour Name <legal 0-2> 85*5113495bSYour Name 86*5113495bSYour Name sw_frame_group_id 87*5113495bSYour Name 88*5113495bSYour Name SW processes frames based on certain classifications. 89*5113495bSYour Name This field indicates to what sw classification this MPDU is 90*5113495bSYour Name mapped. 91*5113495bSYour Name 92*5113495bSYour Name The classification is given in priority order 93*5113495bSYour Name 94*5113495bSYour Name 95*5113495bSYour Name 96*5113495bSYour Name <enum 0 sw_frame_group_NDP_frame> 97*5113495bSYour Name 98*5113495bSYour Name 99*5113495bSYour Name 100*5113495bSYour Name <enum 1 sw_frame_group_Multicast_data> 101*5113495bSYour Name 102*5113495bSYour Name <enum 2 sw_frame_group_Unicast_data> 103*5113495bSYour Name 104*5113495bSYour Name <enum 3 sw_frame_group_Null_data > This includes mpdus 105*5113495bSYour Name of type Data Null as well as QoS Data Null 106*5113495bSYour Name 107*5113495bSYour Name 108*5113495bSYour Name 109*5113495bSYour Name <enum 4 sw_frame_group_mgmt_0000 > 110*5113495bSYour Name 111*5113495bSYour Name <enum 5 sw_frame_group_mgmt_0001 > 112*5113495bSYour Name 113*5113495bSYour Name <enum 6 sw_frame_group_mgmt_0010 > 114*5113495bSYour Name 115*5113495bSYour Name <enum 7 sw_frame_group_mgmt_0011 > 116*5113495bSYour Name 117*5113495bSYour Name <enum 8 sw_frame_group_mgmt_0100 > 118*5113495bSYour Name 119*5113495bSYour Name <enum 9 sw_frame_group_mgmt_0101 > 120*5113495bSYour Name 121*5113495bSYour Name <enum 10 sw_frame_group_mgmt_0110 > 122*5113495bSYour Name 123*5113495bSYour Name <enum 11 sw_frame_group_mgmt_0111 > 124*5113495bSYour Name 125*5113495bSYour Name <enum 12 sw_frame_group_mgmt_1000 > 126*5113495bSYour Name 127*5113495bSYour Name <enum 13 sw_frame_group_mgmt_1001 > 128*5113495bSYour Name 129*5113495bSYour Name <enum 14 sw_frame_group_mgmt_1010 > 130*5113495bSYour Name 131*5113495bSYour Name <enum 15 sw_frame_group_mgmt_1011 > 132*5113495bSYour Name 133*5113495bSYour Name <enum 16 sw_frame_group_mgmt_1100 > 134*5113495bSYour Name 135*5113495bSYour Name <enum 17 sw_frame_group_mgmt_1101 > 136*5113495bSYour Name 137*5113495bSYour Name <enum 18 sw_frame_group_mgmt_1110 > 138*5113495bSYour Name 139*5113495bSYour Name <enum 19 sw_frame_group_mgmt_1111 > 140*5113495bSYour Name 141*5113495bSYour Name 142*5113495bSYour Name 143*5113495bSYour Name <enum 20 sw_frame_group_ctrl_0000 > 144*5113495bSYour Name 145*5113495bSYour Name <enum 21 sw_frame_group_ctrl_0001 > 146*5113495bSYour Name 147*5113495bSYour Name <enum 22 sw_frame_group_ctrl_0010 > 148*5113495bSYour Name 149*5113495bSYour Name <enum 23 sw_frame_group_ctrl_0011 > 150*5113495bSYour Name 151*5113495bSYour Name <enum 24 sw_frame_group_ctrl_0100 > 152*5113495bSYour Name 153*5113495bSYour Name <enum 25 sw_frame_group_ctrl_0101 > 154*5113495bSYour Name 155*5113495bSYour Name <enum 26 sw_frame_group_ctrl_0110 > 156*5113495bSYour Name 157*5113495bSYour Name <enum 27 sw_frame_group_ctrl_0111 > 158*5113495bSYour Name 159*5113495bSYour Name <enum 28 sw_frame_group_ctrl_1000 > 160*5113495bSYour Name 161*5113495bSYour Name <enum 29 sw_frame_group_ctrl_1001 > 162*5113495bSYour Name 163*5113495bSYour Name <enum 30 sw_frame_group_ctrl_1010 > 164*5113495bSYour Name 165*5113495bSYour Name <enum 31 sw_frame_group_ctrl_1011 > 166*5113495bSYour Name 167*5113495bSYour Name <enum 32 sw_frame_group_ctrl_1100 > 168*5113495bSYour Name 169*5113495bSYour Name <enum 33 sw_frame_group_ctrl_1101 > 170*5113495bSYour Name 171*5113495bSYour Name <enum 34 sw_frame_group_ctrl_1110 > 172*5113495bSYour Name 173*5113495bSYour Name <enum 35 sw_frame_group_ctrl_1111 > 174*5113495bSYour Name 175*5113495bSYour Name 176*5113495bSYour Name 177*5113495bSYour Name <enum 36 sw_frame_group_unsupported> This covers type 3 178*5113495bSYour Name and protocol version != 0 179*5113495bSYour Name 180*5113495bSYour Name 181*5113495bSYour Name 182*5113495bSYour Name 183*5113495bSYour Name 184*5113495bSYour Name 185*5113495bSYour Name <legal 0-37> 186*5113495bSYour Name 187*5113495bSYour Name reserved_0 188*5113495bSYour Name 189*5113495bSYour Name <legal 0> 190*5113495bSYour Name 191*5113495bSYour Name phy_ppdu_id 192*5113495bSYour Name 193*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 194*5113495bSYour Name received. The counter value wraps around 195*5113495bSYour Name 196*5113495bSYour Name <legal all> 197*5113495bSYour Name 198*5113495bSYour Name reserved_1a 199*5113495bSYour Name 200*5113495bSYour Name <legal 0> 201*5113495bSYour Name 202*5113495bSYour Name unsup_ktype_short_frame 203*5113495bSYour Name 204*5113495bSYour Name This bit will be '1' when WEP or TKIP or WAPI key type 205*5113495bSYour Name is received for 11ah short frame. Crypto will bypass the 206*5113495bSYour Name received packet without decryption to RxOLE after setting 207*5113495bSYour Name this bit. 208*5113495bSYour Name 209*5113495bSYour Name rx_in_tx_decrypt_byp 210*5113495bSYour Name 211*5113495bSYour Name Indicates that RX packet is not decrypted as Crypto is 212*5113495bSYour Name busy with TX packet processing. 213*5113495bSYour Name 214*5113495bSYour Name overflow_err 215*5113495bSYour Name 216*5113495bSYour Name RXPCU Receive FIFO ran out of space to receive the full 217*5113495bSYour Name MPDU. Therefor this MPDU is terminated early and is thus 218*5113495bSYour Name corrupted. 219*5113495bSYour Name 220*5113495bSYour Name 221*5113495bSYour Name 222*5113495bSYour Name This MPDU will not be ACKed. 223*5113495bSYour Name 224*5113495bSYour Name RXPCU might still be able to correctly receive the 225*5113495bSYour Name following MPDUs in the PPDU if enough fifo space became 226*5113495bSYour Name available in time 227*5113495bSYour Name 228*5113495bSYour Name mpdu_length_err 229*5113495bSYour Name 230*5113495bSYour Name Set by RXPCU if the expected MPDU length does not 231*5113495bSYour Name correspond with the actually received number of bytes in the 232*5113495bSYour Name MPDU. 233*5113495bSYour Name 234*5113495bSYour Name tkip_mic_err 235*5113495bSYour Name 236*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected a TKIP MIC error 237*5113495bSYour Name for this MPDU 238*5113495bSYour Name 239*5113495bSYour Name decrypt_err 240*5113495bSYour Name 241*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected a decrypt error 242*5113495bSYour Name for this MPDU or CRYPTO received an encrypted frame, but did 243*5113495bSYour Name not get a valid corresponding key id in the peer entry. 244*5113495bSYour Name 245*5113495bSYour Name unencrypted_frame_err 246*5113495bSYour Name 247*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected an unencrypted 248*5113495bSYour Name frame while in the peer entry field 249*5113495bSYour Name 'All_frames_shall_be_encrypted' is set. 250*5113495bSYour Name 251*5113495bSYour Name pn_fields_contain_valid_info 252*5113495bSYour Name 253*5113495bSYour Name Set by RX CRYPTO to indicate that there is a valid PN 254*5113495bSYour Name field present in this MPDU 255*5113495bSYour Name 256*5113495bSYour Name fcs_err 257*5113495bSYour Name 258*5113495bSYour Name Set by RXPCU when there is an FCS error detected for 259*5113495bSYour Name this MPDU 260*5113495bSYour Name 261*5113495bSYour Name msdu_length_err 262*5113495bSYour Name 263*5113495bSYour Name Set by RXOLE when there is an msdu length error detected 264*5113495bSYour Name in at least 1 of the MSDUs embedded within the MPDU 265*5113495bSYour Name 266*5113495bSYour Name rxdma0_destination_ring 267*5113495bSYour Name 268*5113495bSYour Name The ring to which RXDMA0 shall push the frame, assuming 269*5113495bSYour Name no MPDU level errors are detected. In case of MPDU level 270*5113495bSYour Name errors, RXDMA0 might change the RXDMA0 destination 271*5113495bSYour Name 272*5113495bSYour Name 273*5113495bSYour Name 274*5113495bSYour Name <enum 0 rxdma_release_ring > RXDMA0 shall push the 275*5113495bSYour Name frame to the Release ring. Effectively this means the frame 276*5113495bSYour Name needs to be dropped. 277*5113495bSYour Name 278*5113495bSYour Name 279*5113495bSYour Name 280*5113495bSYour Name <enum 1 rxdma2fw_ring > RXDMA0 shall push the frame to 281*5113495bSYour Name the FW ring 282*5113495bSYour Name 283*5113495bSYour Name 284*5113495bSYour Name 285*5113495bSYour Name <enum 2 rxdma2sw_ring > RXDMA0 shall push the frame to 286*5113495bSYour Name the SW ring 287*5113495bSYour Name 288*5113495bSYour Name 289*5113495bSYour Name 290*5113495bSYour Name <enum 3 rxdma2reo_ring > RXDMA0 shall push the frame 291*5113495bSYour Name to the REO entrance ring 292*5113495bSYour Name 293*5113495bSYour Name 294*5113495bSYour Name 295*5113495bSYour Name <legal all> 296*5113495bSYour Name 297*5113495bSYour Name rxdma1_destination_ring 298*5113495bSYour Name 299*5113495bSYour Name The ring to which RXDMA1 shall push the frame, assuming 300*5113495bSYour Name no MPDU level errors are detected. In case of MPDU level 301*5113495bSYour Name errors, RXDMA1 might change the RXDMA destination 302*5113495bSYour Name 303*5113495bSYour Name 304*5113495bSYour Name 305*5113495bSYour Name <enum 0 rxdma_release_ring > RXDMA1 shall push the 306*5113495bSYour Name frame to the Release ring. Effectively this means the frame 307*5113495bSYour Name needs to be dropped. 308*5113495bSYour Name 309*5113495bSYour Name 310*5113495bSYour Name 311*5113495bSYour Name <enum 1 rxdma2fw_ring > RXDMA1 shall push the frame to 312*5113495bSYour Name the FW ring 313*5113495bSYour Name 314*5113495bSYour Name 315*5113495bSYour Name 316*5113495bSYour Name <enum 2 rxdma2sw_ring > RXDMA1 shall push the frame to 317*5113495bSYour Name the SW ring 318*5113495bSYour Name 319*5113495bSYour Name 320*5113495bSYour Name 321*5113495bSYour Name <enum 3 rxdma2reo_ring > RXDMA1 shall push the frame 322*5113495bSYour Name to the REO entrance ring 323*5113495bSYour Name 324*5113495bSYour Name 325*5113495bSYour Name 326*5113495bSYour Name <legal all> 327*5113495bSYour Name 328*5113495bSYour Name decrypt_status_code 329*5113495bSYour Name 330*5113495bSYour Name Field provides insight into the decryption performed 331*5113495bSYour Name 332*5113495bSYour Name 333*5113495bSYour Name 334*5113495bSYour Name <enum 0 decrypt_ok> Frame had protection enabled and 335*5113495bSYour Name decrypted properly 336*5113495bSYour Name 337*5113495bSYour Name <enum 1 decrypt_unprotected_frame > Frame is unprotected 338*5113495bSYour Name and hence bypassed 339*5113495bSYour Name 340*5113495bSYour Name <enum 2 decrypt_data_err > Frame has protection enabled 341*5113495bSYour Name and could not be properly decrypted due to MIC/ICV mismatch 342*5113495bSYour Name etc. 343*5113495bSYour Name 344*5113495bSYour Name <enum 3 decrypt_key_invalid > Frame has protection 345*5113495bSYour Name enabled but the key that was required to decrypt this frame 346*5113495bSYour Name was not valid 347*5113495bSYour Name 348*5113495bSYour Name <enum 4 decrypt_peer_entry_invalid > Frame has 349*5113495bSYour Name protection enabled but the key that was required to decrypt 350*5113495bSYour Name this frame was not valid 351*5113495bSYour Name 352*5113495bSYour Name <enum 5 decrypt_other > Reserved for other indications 353*5113495bSYour Name 354*5113495bSYour Name 355*5113495bSYour Name 356*5113495bSYour Name <legal 0 - 5> 357*5113495bSYour Name 358*5113495bSYour Name rx_bitmap_not_updated 359*5113495bSYour Name 360*5113495bSYour Name Frame is received, but RXPCU could not update the 361*5113495bSYour Name receive bitmap due to (temporary) fifo contraints. 362*5113495bSYour Name 363*5113495bSYour Name <legal all> 364*5113495bSYour Name 365*5113495bSYour Name reserved_1b 366*5113495bSYour Name 367*5113495bSYour Name <legal 0> 368*5113495bSYour Name */ 369*5113495bSYour Name 370*5113495bSYour Name 371*5113495bSYour Name /* Description RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY 372*5113495bSYour Name 373*5113495bSYour Name Field indicates what the reason was that this MPDU frame 374*5113495bSYour Name was allowed to come into the receive path by RXPCU 375*5113495bSYour Name 376*5113495bSYour Name <enum 0 rxpcu_filter_pass> This MPDU passed the normal 377*5113495bSYour Name frame filter programming of rxpcu 378*5113495bSYour Name 379*5113495bSYour Name <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 380*5113495bSYour Name regular frame filter and would have been dropped, were it 381*5113495bSYour Name not for the frame fitting into the 'monitor_client' 382*5113495bSYour Name category. 383*5113495bSYour Name 384*5113495bSYour Name <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 385*5113495bSYour Name regular frame filter and also did not pass the 386*5113495bSYour Name rxpcu_monitor_client filter. It would have been dropped 387*5113495bSYour Name accept that it did pass the 'monitor_other' category. 388*5113495bSYour Name 389*5113495bSYour Name <legal 0-2> 390*5113495bSYour Name */ 391*5113495bSYour Name #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000 392*5113495bSYour Name #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 393*5113495bSYour Name #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003 394*5113495bSYour Name 395*5113495bSYour Name /* Description RX_MPDU_END_0_SW_FRAME_GROUP_ID 396*5113495bSYour Name 397*5113495bSYour Name SW processes frames based on certain classifications. 398*5113495bSYour Name This field indicates to what sw classification this MPDU is 399*5113495bSYour Name mapped. 400*5113495bSYour Name 401*5113495bSYour Name The classification is given in priority order 402*5113495bSYour Name 403*5113495bSYour Name 404*5113495bSYour Name 405*5113495bSYour Name <enum 0 sw_frame_group_NDP_frame> 406*5113495bSYour Name 407*5113495bSYour Name 408*5113495bSYour Name 409*5113495bSYour Name <enum 1 sw_frame_group_Multicast_data> 410*5113495bSYour Name 411*5113495bSYour Name <enum 2 sw_frame_group_Unicast_data> 412*5113495bSYour Name 413*5113495bSYour Name <enum 3 sw_frame_group_Null_data > This includes mpdus 414*5113495bSYour Name of type Data Null as well as QoS Data Null 415*5113495bSYour Name 416*5113495bSYour Name 417*5113495bSYour Name 418*5113495bSYour Name <enum 4 sw_frame_group_mgmt_0000 > 419*5113495bSYour Name 420*5113495bSYour Name <enum 5 sw_frame_group_mgmt_0001 > 421*5113495bSYour Name 422*5113495bSYour Name <enum 6 sw_frame_group_mgmt_0010 > 423*5113495bSYour Name 424*5113495bSYour Name <enum 7 sw_frame_group_mgmt_0011 > 425*5113495bSYour Name 426*5113495bSYour Name <enum 8 sw_frame_group_mgmt_0100 > 427*5113495bSYour Name 428*5113495bSYour Name <enum 9 sw_frame_group_mgmt_0101 > 429*5113495bSYour Name 430*5113495bSYour Name <enum 10 sw_frame_group_mgmt_0110 > 431*5113495bSYour Name 432*5113495bSYour Name <enum 11 sw_frame_group_mgmt_0111 > 433*5113495bSYour Name 434*5113495bSYour Name <enum 12 sw_frame_group_mgmt_1000 > 435*5113495bSYour Name 436*5113495bSYour Name <enum 13 sw_frame_group_mgmt_1001 > 437*5113495bSYour Name 438*5113495bSYour Name <enum 14 sw_frame_group_mgmt_1010 > 439*5113495bSYour Name 440*5113495bSYour Name <enum 15 sw_frame_group_mgmt_1011 > 441*5113495bSYour Name 442*5113495bSYour Name <enum 16 sw_frame_group_mgmt_1100 > 443*5113495bSYour Name 444*5113495bSYour Name <enum 17 sw_frame_group_mgmt_1101 > 445*5113495bSYour Name 446*5113495bSYour Name <enum 18 sw_frame_group_mgmt_1110 > 447*5113495bSYour Name 448*5113495bSYour Name <enum 19 sw_frame_group_mgmt_1111 > 449*5113495bSYour Name 450*5113495bSYour Name 451*5113495bSYour Name 452*5113495bSYour Name <enum 20 sw_frame_group_ctrl_0000 > 453*5113495bSYour Name 454*5113495bSYour Name <enum 21 sw_frame_group_ctrl_0001 > 455*5113495bSYour Name 456*5113495bSYour Name <enum 22 sw_frame_group_ctrl_0010 > 457*5113495bSYour Name 458*5113495bSYour Name <enum 23 sw_frame_group_ctrl_0011 > 459*5113495bSYour Name 460*5113495bSYour Name <enum 24 sw_frame_group_ctrl_0100 > 461*5113495bSYour Name 462*5113495bSYour Name <enum 25 sw_frame_group_ctrl_0101 > 463*5113495bSYour Name 464*5113495bSYour Name <enum 26 sw_frame_group_ctrl_0110 > 465*5113495bSYour Name 466*5113495bSYour Name <enum 27 sw_frame_group_ctrl_0111 > 467*5113495bSYour Name 468*5113495bSYour Name <enum 28 sw_frame_group_ctrl_1000 > 469*5113495bSYour Name 470*5113495bSYour Name <enum 29 sw_frame_group_ctrl_1001 > 471*5113495bSYour Name 472*5113495bSYour Name <enum 30 sw_frame_group_ctrl_1010 > 473*5113495bSYour Name 474*5113495bSYour Name <enum 31 sw_frame_group_ctrl_1011 > 475*5113495bSYour Name 476*5113495bSYour Name <enum 32 sw_frame_group_ctrl_1100 > 477*5113495bSYour Name 478*5113495bSYour Name <enum 33 sw_frame_group_ctrl_1101 > 479*5113495bSYour Name 480*5113495bSYour Name <enum 34 sw_frame_group_ctrl_1110 > 481*5113495bSYour Name 482*5113495bSYour Name <enum 35 sw_frame_group_ctrl_1111 > 483*5113495bSYour Name 484*5113495bSYour Name 485*5113495bSYour Name 486*5113495bSYour Name <enum 36 sw_frame_group_unsupported> This covers type 3 487*5113495bSYour Name and protocol version != 0 488*5113495bSYour Name 489*5113495bSYour Name 490*5113495bSYour Name 491*5113495bSYour Name 492*5113495bSYour Name 493*5113495bSYour Name 494*5113495bSYour Name <legal 0-37> 495*5113495bSYour Name */ 496*5113495bSYour Name #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_OFFSET 0x00000000 497*5113495bSYour Name #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_LSB 2 498*5113495bSYour Name #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_MASK 0x000001fc 499*5113495bSYour Name 500*5113495bSYour Name /* Description RX_MPDU_END_0_RESERVED_0 501*5113495bSYour Name 502*5113495bSYour Name <legal 0> 503*5113495bSYour Name */ 504*5113495bSYour Name #define RX_MPDU_END_0_RESERVED_0_OFFSET 0x00000000 505*5113495bSYour Name #define RX_MPDU_END_0_RESERVED_0_LSB 9 506*5113495bSYour Name #define RX_MPDU_END_0_RESERVED_0_MASK 0x0000fe00 507*5113495bSYour Name 508*5113495bSYour Name /* Description RX_MPDU_END_0_PHY_PPDU_ID 509*5113495bSYour Name 510*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 511*5113495bSYour Name received. The counter value wraps around 512*5113495bSYour Name 513*5113495bSYour Name <legal all> 514*5113495bSYour Name */ 515*5113495bSYour Name #define RX_MPDU_END_0_PHY_PPDU_ID_OFFSET 0x00000000 516*5113495bSYour Name #define RX_MPDU_END_0_PHY_PPDU_ID_LSB 16 517*5113495bSYour Name #define RX_MPDU_END_0_PHY_PPDU_ID_MASK 0xffff0000 518*5113495bSYour Name 519*5113495bSYour Name /* Description RX_MPDU_END_1_RESERVED_1A 520*5113495bSYour Name 521*5113495bSYour Name <legal 0> 522*5113495bSYour Name */ 523*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1A_OFFSET 0x00000004 524*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1A_LSB 0 525*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1A_MASK 0x000007ff 526*5113495bSYour Name 527*5113495bSYour Name /* Description RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME 528*5113495bSYour Name 529*5113495bSYour Name This bit will be '1' when WEP or TKIP or WAPI key type 530*5113495bSYour Name is received for 11ah short frame. Crypto will bypass the 531*5113495bSYour Name received packet without decryption to RxOLE after setting 532*5113495bSYour Name this bit. 533*5113495bSYour Name */ 534*5113495bSYour Name #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_OFFSET 0x00000004 535*5113495bSYour Name #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_LSB 11 536*5113495bSYour Name #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_MASK 0x00000800 537*5113495bSYour Name 538*5113495bSYour Name /* Description RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP 539*5113495bSYour Name 540*5113495bSYour Name Indicates that RX packet is not decrypted as Crypto is 541*5113495bSYour Name busy with TX packet processing. 542*5113495bSYour Name */ 543*5113495bSYour Name #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET 0x00000004 544*5113495bSYour Name #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB 12 545*5113495bSYour Name #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK 0x00001000 546*5113495bSYour Name 547*5113495bSYour Name /* Description RX_MPDU_END_1_OVERFLOW_ERR 548*5113495bSYour Name 549*5113495bSYour Name RXPCU Receive FIFO ran out of space to receive the full 550*5113495bSYour Name MPDU. Therefor this MPDU is terminated early and is thus 551*5113495bSYour Name corrupted. 552*5113495bSYour Name 553*5113495bSYour Name 554*5113495bSYour Name 555*5113495bSYour Name This MPDU will not be ACKed. 556*5113495bSYour Name 557*5113495bSYour Name RXPCU might still be able to correctly receive the 558*5113495bSYour Name following MPDUs in the PPDU if enough fifo space became 559*5113495bSYour Name available in time 560*5113495bSYour Name */ 561*5113495bSYour Name #define RX_MPDU_END_1_OVERFLOW_ERR_OFFSET 0x00000004 562*5113495bSYour Name #define RX_MPDU_END_1_OVERFLOW_ERR_LSB 13 563*5113495bSYour Name #define RX_MPDU_END_1_OVERFLOW_ERR_MASK 0x00002000 564*5113495bSYour Name 565*5113495bSYour Name /* Description RX_MPDU_END_1_MPDU_LENGTH_ERR 566*5113495bSYour Name 567*5113495bSYour Name Set by RXPCU if the expected MPDU length does not 568*5113495bSYour Name correspond with the actually received number of bytes in the 569*5113495bSYour Name MPDU. 570*5113495bSYour Name */ 571*5113495bSYour Name #define RX_MPDU_END_1_MPDU_LENGTH_ERR_OFFSET 0x00000004 572*5113495bSYour Name #define RX_MPDU_END_1_MPDU_LENGTH_ERR_LSB 14 573*5113495bSYour Name #define RX_MPDU_END_1_MPDU_LENGTH_ERR_MASK 0x00004000 574*5113495bSYour Name 575*5113495bSYour Name /* Description RX_MPDU_END_1_TKIP_MIC_ERR 576*5113495bSYour Name 577*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected a TKIP MIC error 578*5113495bSYour Name for this MPDU 579*5113495bSYour Name */ 580*5113495bSYour Name #define RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET 0x00000004 581*5113495bSYour Name #define RX_MPDU_END_1_TKIP_MIC_ERR_LSB 15 582*5113495bSYour Name #define RX_MPDU_END_1_TKIP_MIC_ERR_MASK 0x00008000 583*5113495bSYour Name 584*5113495bSYour Name /* Description RX_MPDU_END_1_DECRYPT_ERR 585*5113495bSYour Name 586*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected a decrypt error 587*5113495bSYour Name for this MPDU or CRYPTO received an encrypted frame, but did 588*5113495bSYour Name not get a valid corresponding key id in the peer entry. 589*5113495bSYour Name */ 590*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_ERR_OFFSET 0x00000004 591*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_ERR_LSB 16 592*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_ERR_MASK 0x00010000 593*5113495bSYour Name 594*5113495bSYour Name /* Description RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR 595*5113495bSYour Name 596*5113495bSYour Name Set by RX CRYPTO when CRYPTO detected an unencrypted 597*5113495bSYour Name frame while in the peer entry field 598*5113495bSYour Name 'All_frames_shall_be_encrypted' is set. 599*5113495bSYour Name */ 600*5113495bSYour Name #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_OFFSET 0x00000004 601*5113495bSYour Name #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_LSB 17 602*5113495bSYour Name #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_MASK 0x00020000 603*5113495bSYour Name 604*5113495bSYour Name /* Description RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO 605*5113495bSYour Name 606*5113495bSYour Name Set by RX CRYPTO to indicate that there is a valid PN 607*5113495bSYour Name field present in this MPDU 608*5113495bSYour Name */ 609*5113495bSYour Name #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000004 610*5113495bSYour Name #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_LSB 18 611*5113495bSYour Name #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00040000 612*5113495bSYour Name 613*5113495bSYour Name /* Description RX_MPDU_END_1_FCS_ERR 614*5113495bSYour Name 615*5113495bSYour Name Set by RXPCU when there is an FCS error detected for 616*5113495bSYour Name this MPDU 617*5113495bSYour Name */ 618*5113495bSYour Name #define RX_MPDU_END_1_FCS_ERR_OFFSET 0x00000004 619*5113495bSYour Name #define RX_MPDU_END_1_FCS_ERR_LSB 19 620*5113495bSYour Name #define RX_MPDU_END_1_FCS_ERR_MASK 0x00080000 621*5113495bSYour Name 622*5113495bSYour Name /* Description RX_MPDU_END_1_MSDU_LENGTH_ERR 623*5113495bSYour Name 624*5113495bSYour Name Set by RXOLE when there is an msdu length error detected 625*5113495bSYour Name in at least 1 of the MSDUs embedded within the MPDU 626*5113495bSYour Name */ 627*5113495bSYour Name #define RX_MPDU_END_1_MSDU_LENGTH_ERR_OFFSET 0x00000004 628*5113495bSYour Name #define RX_MPDU_END_1_MSDU_LENGTH_ERR_LSB 20 629*5113495bSYour Name #define RX_MPDU_END_1_MSDU_LENGTH_ERR_MASK 0x00100000 630*5113495bSYour Name 631*5113495bSYour Name /* Description RX_MPDU_END_1_RXDMA0_DESTINATION_RING 632*5113495bSYour Name 633*5113495bSYour Name The ring to which RXDMA0 shall push the frame, assuming 634*5113495bSYour Name no MPDU level errors are detected. In case of MPDU level 635*5113495bSYour Name errors, RXDMA0 might change the RXDMA0 destination 636*5113495bSYour Name 637*5113495bSYour Name 638*5113495bSYour Name 639*5113495bSYour Name <enum 0 rxdma_release_ring > RXDMA0 shall push the 640*5113495bSYour Name frame to the Release ring. Effectively this means the frame 641*5113495bSYour Name needs to be dropped. 642*5113495bSYour Name 643*5113495bSYour Name 644*5113495bSYour Name 645*5113495bSYour Name <enum 1 rxdma2fw_ring > RXDMA0 shall push the frame to 646*5113495bSYour Name the FW ring 647*5113495bSYour Name 648*5113495bSYour Name 649*5113495bSYour Name 650*5113495bSYour Name <enum 2 rxdma2sw_ring > RXDMA0 shall push the frame to 651*5113495bSYour Name the SW ring 652*5113495bSYour Name 653*5113495bSYour Name 654*5113495bSYour Name 655*5113495bSYour Name <enum 3 rxdma2reo_ring > RXDMA0 shall push the frame 656*5113495bSYour Name to the REO entrance ring 657*5113495bSYour Name 658*5113495bSYour Name 659*5113495bSYour Name 660*5113495bSYour Name <legal all> 661*5113495bSYour Name */ 662*5113495bSYour Name #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_OFFSET 0x00000004 663*5113495bSYour Name #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_LSB 21 664*5113495bSYour Name #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_MASK 0x00600000 665*5113495bSYour Name 666*5113495bSYour Name /* Description RX_MPDU_END_1_RXDMA1_DESTINATION_RING 667*5113495bSYour Name 668*5113495bSYour Name The ring to which RXDMA1 shall push the frame, assuming 669*5113495bSYour Name no MPDU level errors are detected. In case of MPDU level 670*5113495bSYour Name errors, RXDMA1 might change the RXDMA destination 671*5113495bSYour Name 672*5113495bSYour Name 673*5113495bSYour Name 674*5113495bSYour Name <enum 0 rxdma_release_ring > RXDMA1 shall push the 675*5113495bSYour Name frame to the Release ring. Effectively this means the frame 676*5113495bSYour Name needs to be dropped. 677*5113495bSYour Name 678*5113495bSYour Name 679*5113495bSYour Name 680*5113495bSYour Name <enum 1 rxdma2fw_ring > RXDMA1 shall push the frame to 681*5113495bSYour Name the FW ring 682*5113495bSYour Name 683*5113495bSYour Name 684*5113495bSYour Name 685*5113495bSYour Name <enum 2 rxdma2sw_ring > RXDMA1 shall push the frame to 686*5113495bSYour Name the SW ring 687*5113495bSYour Name 688*5113495bSYour Name 689*5113495bSYour Name 690*5113495bSYour Name <enum 3 rxdma2reo_ring > RXDMA1 shall push the frame 691*5113495bSYour Name to the REO entrance ring 692*5113495bSYour Name 693*5113495bSYour Name 694*5113495bSYour Name 695*5113495bSYour Name <legal all> 696*5113495bSYour Name */ 697*5113495bSYour Name #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_OFFSET 0x00000004 698*5113495bSYour Name #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_LSB 23 699*5113495bSYour Name #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_MASK 0x01800000 700*5113495bSYour Name 701*5113495bSYour Name /* Description RX_MPDU_END_1_DECRYPT_STATUS_CODE 702*5113495bSYour Name 703*5113495bSYour Name Field provides insight into the decryption performed 704*5113495bSYour Name 705*5113495bSYour Name 706*5113495bSYour Name 707*5113495bSYour Name <enum 0 decrypt_ok> Frame had protection enabled and 708*5113495bSYour Name decrypted properly 709*5113495bSYour Name 710*5113495bSYour Name <enum 1 decrypt_unprotected_frame > Frame is unprotected 711*5113495bSYour Name and hence bypassed 712*5113495bSYour Name 713*5113495bSYour Name <enum 2 decrypt_data_err > Frame has protection enabled 714*5113495bSYour Name and could not be properly decrypted due to MIC/ICV mismatch 715*5113495bSYour Name etc. 716*5113495bSYour Name 717*5113495bSYour Name <enum 3 decrypt_key_invalid > Frame has protection 718*5113495bSYour Name enabled but the key that was required to decrypt this frame 719*5113495bSYour Name was not valid 720*5113495bSYour Name 721*5113495bSYour Name <enum 4 decrypt_peer_entry_invalid > Frame has 722*5113495bSYour Name protection enabled but the key that was required to decrypt 723*5113495bSYour Name this frame was not valid 724*5113495bSYour Name 725*5113495bSYour Name <enum 5 decrypt_other > Reserved for other indications 726*5113495bSYour Name 727*5113495bSYour Name 728*5113495bSYour Name 729*5113495bSYour Name <legal 0 - 5> 730*5113495bSYour Name */ 731*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_OFFSET 0x00000004 732*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_LSB 25 733*5113495bSYour Name #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_MASK 0x0e000000 734*5113495bSYour Name 735*5113495bSYour Name /* Description RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED 736*5113495bSYour Name 737*5113495bSYour Name Frame is received, but RXPCU could not update the 738*5113495bSYour Name receive bitmap due to (temporary) fifo contraints. 739*5113495bSYour Name 740*5113495bSYour Name <legal all> 741*5113495bSYour Name */ 742*5113495bSYour Name #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_OFFSET 0x00000004 743*5113495bSYour Name #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_LSB 28 744*5113495bSYour Name #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_MASK 0x10000000 745*5113495bSYour Name 746*5113495bSYour Name /* Description RX_MPDU_END_1_RESERVED_1B 747*5113495bSYour Name 748*5113495bSYour Name <legal 0> 749*5113495bSYour Name */ 750*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1B_OFFSET 0x00000004 751*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1B_LSB 29 752*5113495bSYour Name #define RX_MPDU_END_1_RESERVED_1B_MASK 0xe0000000 753*5113495bSYour Name 754*5113495bSYour Name 755*5113495bSYour Name #endif // _RX_MPDU_END_H_ 756