1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // $ATH_LICENSE_HW_HDR_C$ 20 // 21 // DO NOT EDIT! This file is automatically generated 22 // These definitions are tied to a particular hardware layout 23 24 25 #ifndef _RX_MSDU_DESC_INFO_H_ 26 #define _RX_MSDU_DESC_INFO_H_ 27 #if !defined(__ASSEMBLER__) 28 #endif 29 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 first_msdu_in_mpdu_flag[0], last_msdu_in_mpdu_flag[1], msdu_continuation[2], msdu_length[16:3], reo_destination_indication[21:17], msdu_drop[22], sa_is_valid[23], sa_idx_timeout[24], da_is_valid[25], da_is_mcbc[26], da_idx_timeout[27], reserved_0a[31:28] 35 // 1 reserved_1a[31:0] 36 // 37 // ################ END SUMMARY ################# 38 39 #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 2 40 41 struct rx_msdu_desc_info { 42 uint32_t first_msdu_in_mpdu_flag : 1, //[0] 43 last_msdu_in_mpdu_flag : 1, //[1] 44 msdu_continuation : 1, //[2] 45 msdu_length : 14, //[16:3] 46 reo_destination_indication : 5, //[21:17] 47 msdu_drop : 1, //[22] 48 sa_is_valid : 1, //[23] 49 sa_idx_timeout : 1, //[24] 50 da_is_valid : 1, //[25] 51 da_is_mcbc : 1, //[26] 52 da_idx_timeout : 1, //[27] 53 reserved_0a : 4; //[31:28] 54 uint32_t reserved_1a : 32; //[31:0] 55 }; 56 57 /* 58 59 first_msdu_in_mpdu_flag 60 61 <enum 0 Not_first_msdu> This is not the first MSDU in 62 the MPDU. 63 64 <enum 1 first_msdu> This MSDU is the first one in the 65 MPDU. <legal all> 66 67 last_msdu_in_mpdu_flag 68 69 Consumer: WBM/REO/SW/FW 70 71 Producer: RXDMA 72 73 74 75 76 77 <enum 0 Not_last_msdu> There are more MSDUs linked to 78 this MSDU that belongs to this MPDU 79 80 <enum 1 Last_msdu> this MSDU is the last one in the 81 MPDU. This setting is only allowed in combination with 82 'Msdu_continuation' set to 0. This implies that when an msdu 83 is spread out over multiple buffers and thus 84 msdu_continuation is set, only for the very last buffer of 85 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 86 87 88 89 When both first_msdu_in_mpdu_flag and 90 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 91 belongs to only contains a single MSDU. 92 93 <legal all> 94 95 msdu_continuation 96 97 When set, this MSDU buffer was not able to hold the 98 entire MSDU. The next buffer will therefor contain 99 additional information related to this MSDU. 100 101 102 103 <legal all> 104 105 msdu_length 106 107 Field is only valid in combination with the 108 'first_msdu_in_mpdu_flag ' being set. When the 109 'first_msdu_in_mpdu_flag ' is not set, this field shall be 110 0. 111 112 113 114 Full MSDU length in bytes after decapsulation. 115 116 117 118 This field is still valid for MPDU frames without 119 A-MSDU. It still represents MSDU length after decapsulation 120 121 122 123 Or in case of RAW MPDUs, it indicates the length of the 124 entire MPDU (without FCS field) 125 126 <legal all> 127 128 reo_destination_indication 129 130 The ID of the REO exit ring where the MSDU frame shall 131 push after (MPDU level) reordering has finished. 132 133 134 135 <enum 0 reo_destination_tcl> Reo will push the frame 136 into the REO2TCL ring 137 138 <enum 1 reo_destination_sw1> Reo will push the frame 139 into the REO2SW1 ring 140 141 <enum 2 reo_destination_sw2> Reo will push the frame 142 into the REO2SW1 ring 143 144 <enum 3 reo_destination_sw3> Reo will push the frame 145 into the REO2SW1 ring 146 147 <enum 4 reo_destination_sw4> Reo will push the frame 148 into the REO2SW1 ring 149 150 <enum 5 reo_destination_release> Reo will push the frame 151 into the REO_release ring 152 153 <enum 6 reo_destination_fw> Reo will push the frame into 154 the REO2FW ring 155 156 <enum 7 reo_destination_7> REO remaps this 157 158 <enum 8 reo_destination_8> REO remaps this <enum 9 159 reo_destination_9> REO remaps this <enum 10 160 reo_destination_10> REO remaps this 161 162 <enum 11 reo_destination_11> REO remaps this 163 164 <enum 12 reo_destination_12> REO remaps this <enum 13 165 reo_destination_13> REO remaps this 166 167 <enum 14 reo_destination_14> REO remaps this 168 169 <enum 15 reo_destination_15> REO remaps this 170 171 <enum 16 reo_destination_16> REO remaps this 172 173 <enum 17 reo_destination_17> REO remaps this 174 175 <enum 18 reo_destination_18> REO remaps this 176 177 <enum 19 reo_destination_19> REO remaps this 178 179 <enum 20 reo_destination_20> REO remaps this 180 181 <enum 21 reo_destination_21> REO remaps this 182 183 <enum 22 reo_destination_22> REO remaps this 184 185 <enum 23 reo_destination_23> REO remaps this 186 187 <enum 24 reo_destination_24> REO remaps this 188 189 <enum 25 reo_destination_25> REO remaps this 190 191 <enum 26 reo_destination_26> REO remaps this 192 193 <enum 27 reo_destination_27> REO remaps this 194 195 <enum 28 reo_destination_28> REO remaps this 196 197 <enum 29 reo_destination_29> REO remaps this 198 199 <enum 30 reo_destination_30> REO remaps this 200 201 <enum 31 reo_destination_31> REO remaps this 202 203 204 205 <legal all> 206 207 msdu_drop 208 209 When set, REO shall drop this MSDU and not forward it to 210 any other ring... 211 212 <legal all> 213 214 sa_is_valid 215 216 Indicates that OLE found a valid SA entry for this MSDU 217 218 <legal all> 219 220 sa_idx_timeout 221 222 Indicates an unsuccessful MAC source address search due 223 to the expiring of the search timer for this MSDU 224 225 <legal all> 226 227 da_is_valid 228 229 Indicates that OLE found a valid DA entry for this MSDU 230 231 <legal all> 232 233 da_is_mcbc 234 235 Field Only valid if da_is_valid is set 236 237 238 239 Indicates the DA address was a Multicast of Broadcast 240 address for this MSDU 241 242 <legal all> 243 244 da_idx_timeout 245 246 Indicates an unsuccessful MAC destination address search 247 due to the expiring of the search timer for this MSDU 248 249 <legal all> 250 251 reserved_0a 252 253 <legal 0> 254 255 reserved_1a 256 257 <legal 0> 258 */ 259 260 261 /* Description RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG 262 263 <enum 0 Not_first_msdu> This is not the first MSDU in 264 the MPDU. 265 266 <enum 1 first_msdu> This MSDU is the first one in the 267 MPDU. <legal all> 268 */ 269 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 270 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 271 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 272 273 /* Description RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG 274 275 Consumer: WBM/REO/SW/FW 276 277 Producer: RXDMA 278 279 280 281 282 283 <enum 0 Not_last_msdu> There are more MSDUs linked to 284 this MSDU that belongs to this MPDU 285 286 <enum 1 Last_msdu> this MSDU is the last one in the 287 MPDU. This setting is only allowed in combination with 288 'Msdu_continuation' set to 0. This implies that when an msdu 289 is spread out over multiple buffers and thus 290 msdu_continuation is set, only for the very last buffer of 291 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 292 293 294 295 When both first_msdu_in_mpdu_flag and 296 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 297 belongs to only contains a single MSDU. 298 299 <legal all> 300 */ 301 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 302 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB 1 303 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 304 305 /* Description RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION 306 307 When set, this MSDU buffer was not able to hold the 308 entire MSDU. The next buffer will therefor contain 309 additional information related to this MSDU. 310 311 312 313 <legal all> 314 */ 315 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET 0x00000000 316 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB 2 317 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK 0x00000004 318 319 /* Description RX_MSDU_DESC_INFO_0_MSDU_LENGTH 320 321 Field is only valid in combination with the 322 'first_msdu_in_mpdu_flag ' being set. When the 323 'first_msdu_in_mpdu_flag ' is not set, this field shall be 324 0. 325 326 327 328 Full MSDU length in bytes after decapsulation. 329 330 331 332 This field is still valid for MPDU frames without 333 A-MSDU. It still represents MSDU length after decapsulation 334 335 336 337 Or in case of RAW MPDUs, it indicates the length of the 338 entire MPDU (without FCS field) 339 340 <legal all> 341 */ 342 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET 0x00000000 343 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB 3 344 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK 0x0001fff8 345 346 /* Description RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION 347 348 The ID of the REO exit ring where the MSDU frame shall 349 push after (MPDU level) reordering has finished. 350 351 352 353 <enum 0 reo_destination_tcl> Reo will push the frame 354 into the REO2TCL ring 355 356 <enum 1 reo_destination_sw1> Reo will push the frame 357 into the REO2SW1 ring 358 359 <enum 2 reo_destination_sw2> Reo will push the frame 360 into the REO2SW1 ring 361 362 <enum 3 reo_destination_sw3> Reo will push the frame 363 into the REO2SW1 ring 364 365 <enum 4 reo_destination_sw4> Reo will push the frame 366 into the REO2SW1 ring 367 368 <enum 5 reo_destination_release> Reo will push the frame 369 into the REO_release ring 370 371 <enum 6 reo_destination_fw> Reo will push the frame into 372 the REO2FW ring 373 374 <enum 7 reo_destination_7> REO remaps this 375 376 <enum 8 reo_destination_8> REO remaps this <enum 9 377 reo_destination_9> REO remaps this <enum 10 378 reo_destination_10> REO remaps this 379 380 <enum 11 reo_destination_11> REO remaps this 381 382 <enum 12 reo_destination_12> REO remaps this <enum 13 383 reo_destination_13> REO remaps this 384 385 <enum 14 reo_destination_14> REO remaps this 386 387 <enum 15 reo_destination_15> REO remaps this 388 389 <enum 16 reo_destination_16> REO remaps this 390 391 <enum 17 reo_destination_17> REO remaps this 392 393 <enum 18 reo_destination_18> REO remaps this 394 395 <enum 19 reo_destination_19> REO remaps this 396 397 <enum 20 reo_destination_20> REO remaps this 398 399 <enum 21 reo_destination_21> REO remaps this 400 401 <enum 22 reo_destination_22> REO remaps this 402 403 <enum 23 reo_destination_23> REO remaps this 404 405 <enum 24 reo_destination_24> REO remaps this 406 407 <enum 25 reo_destination_25> REO remaps this 408 409 <enum 26 reo_destination_26> REO remaps this 410 411 <enum 27 reo_destination_27> REO remaps this 412 413 <enum 28 reo_destination_28> REO remaps this 414 415 <enum 29 reo_destination_29> REO remaps this 416 417 <enum 30 reo_destination_30> REO remaps this 418 419 <enum 31 reo_destination_31> REO remaps this 420 421 422 423 <legal all> 424 */ 425 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000 426 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB 17 427 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK 0x003e0000 428 429 /* Description RX_MSDU_DESC_INFO_0_MSDU_DROP 430 431 When set, REO shall drop this MSDU and not forward it to 432 any other ring... 433 434 <legal all> 435 */ 436 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_OFFSET 0x00000000 437 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_LSB 22 438 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_MASK 0x00400000 439 440 /* Description RX_MSDU_DESC_INFO_0_SA_IS_VALID 441 442 Indicates that OLE found a valid SA entry for this MSDU 443 444 <legal all> 445 */ 446 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET 0x00000000 447 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_LSB 23 448 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK 0x00800000 449 450 /* Description RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT 451 452 Indicates an unsuccessful MAC source address search due 453 to the expiring of the search timer for this MSDU 454 455 <legal all> 456 */ 457 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET 0x00000000 458 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_LSB 24 459 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK 0x01000000 460 461 /* Description RX_MSDU_DESC_INFO_0_DA_IS_VALID 462 463 Indicates that OLE found a valid DA entry for this MSDU 464 465 <legal all> 466 */ 467 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET 0x00000000 468 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_LSB 25 469 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK 0x02000000 470 471 /* Description RX_MSDU_DESC_INFO_0_DA_IS_MCBC 472 473 Field Only valid if da_is_valid is set 474 475 476 477 Indicates the DA address was a Multicast of Broadcast 478 address for this MSDU 479 480 <legal all> 481 */ 482 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET 0x00000000 483 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_LSB 26 484 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK 0x04000000 485 486 /* Description RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT 487 488 Indicates an unsuccessful MAC destination address search 489 due to the expiring of the search timer for this MSDU 490 491 <legal all> 492 */ 493 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET 0x00000000 494 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_LSB 27 495 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK 0x08000000 496 497 /* Description RX_MSDU_DESC_INFO_0_RESERVED_0A 498 499 <legal 0> 500 */ 501 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_OFFSET 0x00000000 502 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_LSB 28 503 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_MASK 0xf0000000 504 505 /* Description RX_MSDU_DESC_INFO_1_RESERVED_1A 506 507 <legal 0> 508 */ 509 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_OFFSET 0x00000004 510 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_LSB 0 511 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_MASK 0xffffffff 512 513 514 #endif // _RX_MSDU_DESC_INFO_H_ 515