1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // $ATH_LICENSE_HW_HDR_C$ 20 // 21 // DO NOT EDIT! This file is automatically generated 22 // These definitions are tied to a particular hardware layout 23 24 25 #ifndef _RX_MSDU_LINK_H_ 26 #define _RX_MSDU_LINK_H_ 27 #if !defined(__ASSEMBLER__) 28 #endif 29 30 #include "uniform_descriptor_header.h" 31 #include "buffer_addr_info.h" 32 #include "rx_msdu_details.h" 33 34 // ################ START SUMMARY ################# 35 // 36 // Dword Fields 37 // 0 struct uniform_descriptor_header descriptor_header; 38 // 1-2 struct buffer_addr_info next_msdu_link_desc_addr_info; 39 // 3 receive_queue_number[15:0], first_rx_msdu_link_struct[16], reserved_3a[31:17] 40 // 4 pn_31_0[31:0] 41 // 5 pn_63_32[31:0] 42 // 6 pn_95_64[31:0] 43 // 7 pn_127_96[31:0] 44 // 8-11 struct rx_msdu_details msdu_0; 45 // 12-15 struct rx_msdu_details msdu_1; 46 // 16-19 struct rx_msdu_details msdu_2; 47 // 20-23 struct rx_msdu_details msdu_3; 48 // 24-27 struct rx_msdu_details msdu_4; 49 // 28-31 struct rx_msdu_details msdu_5; 50 // 51 // ################ END SUMMARY ################# 52 53 #define NUM_OF_DWORDS_RX_MSDU_LINK 32 54 55 struct rx_msdu_link { 56 struct uniform_descriptor_header descriptor_header; 57 struct buffer_addr_info next_msdu_link_desc_addr_info; 58 uint32_t receive_queue_number : 16, //[15:0] 59 first_rx_msdu_link_struct : 1, //[16] 60 reserved_3a : 15; //[31:17] 61 uint32_t pn_31_0 : 32; //[31:0] 62 uint32_t pn_63_32 : 32; //[31:0] 63 uint32_t pn_95_64 : 32; //[31:0] 64 uint32_t pn_127_96 : 32; //[31:0] 65 struct rx_msdu_details msdu_0; 66 struct rx_msdu_details msdu_1; 67 struct rx_msdu_details msdu_2; 68 struct rx_msdu_details msdu_3; 69 struct rx_msdu_details msdu_4; 70 struct rx_msdu_details msdu_5; 71 }; 72 73 /* 74 75 struct uniform_descriptor_header descriptor_header 76 77 Details about which module owns this struct. 78 79 Note that sub field Buffer_type shall be set to 80 Receive_MSDU_Link_descriptor 81 82 struct buffer_addr_info next_msdu_link_desc_addr_info 83 84 Details of the physical address of the next MSDU link 85 descriptor that contains info about additional MSDUs that 86 are part of this MPDU. 87 88 receive_queue_number 89 90 Indicates the Receive queue to which this MPDU 91 descriptor belongs 92 93 Used for tracking, finding bugs and debugging. 94 95 <legal all> 96 97 first_rx_msdu_link_struct 98 99 When set, this RX_MSDU_link descriptor is the first one 100 in the MSDU link list. Field MSDU_0 points to the very first 101 MSDU buffer descriptor in the MPDU 102 103 <legal all> 104 105 reserved_3a 106 107 <legal 0> 108 109 pn_31_0 110 111 112 113 114 31-0 bits of the 256-bit packet number bitmap. 115 116 <legal all> 117 118 pn_63_32 119 120 121 122 123 63-32 bits of the 256-bit packet number bitmap. 124 125 <legal all> 126 127 pn_95_64 128 129 130 131 132 95-64 bits of the 256-bit packet number bitmap. 133 134 <legal all> 135 136 pn_127_96 137 138 139 140 141 127-96 bits of the 256-bit packet number bitmap. 142 143 <legal all> 144 145 struct rx_msdu_details msdu_0 146 147 When First_RX_MSDU_link_struct is set, this MSDU is the 148 first in the MPDU 149 150 151 152 When First_RX_MSDU_link_struct is NOT set, this MSDU 153 follows the last MSDU in the previous RX_MSDU_link data 154 structure 155 156 struct rx_msdu_details msdu_1 157 158 Details of next MSDU in this (MSDU flow) linked list 159 160 struct rx_msdu_details msdu_2 161 162 Details of next MSDU in this (MSDU flow) linked list 163 164 struct rx_msdu_details msdu_3 165 166 Details of next MSDU in this (MSDU flow) linked list 167 168 struct rx_msdu_details msdu_4 169 170 Details of next MSDU in this (MSDU flow) linked list 171 172 struct rx_msdu_details msdu_5 173 174 Details of next MSDU in this (MSDU flow) linked list 175 */ 176 177 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_OFFSET 0x00000000 178 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_LSB 0 179 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_MASK 0xffffffff 180 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_OFFSET 0x00000004 181 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_LSB 0 182 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_MASK 0xffffffff 183 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_OFFSET 0x00000008 184 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_LSB 0 185 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_MASK 0xffffffff 186 187 /* Description RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER 188 189 Indicates the Receive queue to which this MPDU 190 descriptor belongs 191 192 Used for tracking, finding bugs and debugging. 193 194 <legal all> 195 */ 196 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 197 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_LSB 0 198 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 199 200 /* Description RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT 201 202 When set, this RX_MSDU_link descriptor is the first one 203 in the MSDU link list. Field MSDU_0 points to the very first 204 MSDU buffer descriptor in the MPDU 205 206 <legal all> 207 */ 208 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_OFFSET 0x0000000c 209 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_LSB 16 210 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_MASK 0x00010000 211 212 /* Description RX_MSDU_LINK_3_RESERVED_3A 213 214 <legal 0> 215 */ 216 #define RX_MSDU_LINK_3_RESERVED_3A_OFFSET 0x0000000c 217 #define RX_MSDU_LINK_3_RESERVED_3A_LSB 17 218 #define RX_MSDU_LINK_3_RESERVED_3A_MASK 0xfffe0000 219 220 /* Description RX_MSDU_LINK_4_PN_31_0 221 222 223 224 225 31-0 bits of the 256-bit packet number bitmap. 226 227 <legal all> 228 */ 229 #define RX_MSDU_LINK_4_PN_31_0_OFFSET 0x00000010 230 #define RX_MSDU_LINK_4_PN_31_0_LSB 0 231 #define RX_MSDU_LINK_4_PN_31_0_MASK 0xffffffff 232 233 /* Description RX_MSDU_LINK_5_PN_63_32 234 235 236 237 238 63-32 bits of the 256-bit packet number bitmap. 239 240 <legal all> 241 */ 242 #define RX_MSDU_LINK_5_PN_63_32_OFFSET 0x00000014 243 #define RX_MSDU_LINK_5_PN_63_32_LSB 0 244 #define RX_MSDU_LINK_5_PN_63_32_MASK 0xffffffff 245 246 /* Description RX_MSDU_LINK_6_PN_95_64 247 248 249 250 251 95-64 bits of the 256-bit packet number bitmap. 252 253 <legal all> 254 */ 255 #define RX_MSDU_LINK_6_PN_95_64_OFFSET 0x00000018 256 #define RX_MSDU_LINK_6_PN_95_64_LSB 0 257 #define RX_MSDU_LINK_6_PN_95_64_MASK 0xffffffff 258 259 /* Description RX_MSDU_LINK_7_PN_127_96 260 261 262 263 264 127-96 bits of the 256-bit packet number bitmap. 265 266 <legal all> 267 */ 268 #define RX_MSDU_LINK_7_PN_127_96_OFFSET 0x0000001c 269 #define RX_MSDU_LINK_7_PN_127_96_LSB 0 270 #define RX_MSDU_LINK_7_PN_127_96_MASK 0xffffffff 271 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000020 272 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_LSB 0 273 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 274 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000024 275 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_LSB 0 276 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 277 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000028 278 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_LSB 0 279 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 280 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x0000002c 281 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_LSB 0 282 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 283 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000030 284 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_LSB 0 285 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 286 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000034 287 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_LSB 0 288 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 289 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000038 290 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_LSB 0 291 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 292 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x0000003c 293 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_LSB 0 294 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 295 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000040 296 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_LSB 0 297 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 298 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000044 299 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_LSB 0 300 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 301 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000048 302 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_LSB 0 303 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 304 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x0000004c 305 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_LSB 0 306 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 307 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000050 308 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_LSB 0 309 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 310 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000054 311 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_LSB 0 312 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 313 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000058 314 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_LSB 0 315 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 316 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x0000005c 317 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_LSB 0 318 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 319 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000060 320 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_LSB 0 321 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 322 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000064 323 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_LSB 0 324 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 325 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000068 326 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_LSB 0 327 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 328 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x0000006c 329 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_LSB 0 330 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 331 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000070 332 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_LSB 0 333 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 334 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000074 335 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_LSB 0 336 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 337 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000078 338 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_LSB 0 339 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 340 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x0000007c 341 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_LSB 0 342 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 343 344 345 #endif // _RX_MSDU_LINK_H_ 346