1 /* 2 * Copyright (c) 2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _RX_PPDU_END_USER_STATS_H_ 20 #define _RX_PPDU_END_USER_STATS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "rx_rxpcu_classification_overview.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 30 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], odma_info_valid[20], ofdma_low_ru_index[27:21], reserved_1a[31:28] 31 // 2 ofdma_high_ru_index[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 32 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], reserved_3a[15:13], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 33 // 4 ast_index[15:0], frame_control_field[31:16] 34 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 35 // 6 ht_control_field[31:0] 36 // 7 fcs_ok_bitmap_31_0[31:0] 37 // 8 fcs_ok_bitmap_63_32[31:0] 38 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 39 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 40 // 11 sw_response_reference_ptr[31:0] 41 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 42 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 43 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 44 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 45 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 46 // 47 // ################ END SUMMARY ################# 48 49 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 17 50 51 struct rx_ppdu_end_user_stats { 52 struct rx_rxpcu_classification_overview rxpcu_classification_details; 53 uint32_t sta_full_aid : 13, //[12:0] 54 mcs : 4, //[16:13] 55 nss : 3, //[19:17] 56 odma_info_valid : 1, //[20] 57 ofdma_low_ru_index : 7, //[27:21] 58 reserved_1a : 4; //[31:28] 59 uint32_t ofdma_high_ru_index : 7, //[6:0] 60 reserved_2a : 1, //[7] 61 user_receive_quality : 8, //[15:8] 62 mpdu_cnt_fcs_err : 10, //[25:16] 63 wbm2rxdma_buf_source_used : 1, //[26] 64 fw2rxdma_buf_source_used : 1, //[27] 65 sw2rxdma_buf_source_used : 1, //[28] 66 reserved_2b : 3; //[31:29] 67 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 68 frame_control_info_valid : 1, //[9] 69 qos_control_info_valid : 1, //[10] 70 ht_control_info_valid : 1, //[11] 71 data_sequence_control_info_valid: 1, //[12] 72 reserved_3a : 3, //[15:13] 73 rxdma2reo_ring_used : 1, //[16] 74 rxdma2fw_ring_used : 1, //[17] 75 rxdma2sw_ring_used : 1, //[18] 76 rxdma_release_ring_used : 1, //[19] 77 ht_control_field_pkt_type : 4, //[23:20] 78 reserved_3b : 8; //[31:24] 79 uint32_t ast_index : 16, //[15:0] 80 frame_control_field : 16; //[31:16] 81 uint32_t first_data_seq_ctrl : 16, //[15:0] 82 qos_control_field : 16; //[31:16] 83 uint32_t ht_control_field : 32; //[31:0] 84 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 85 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 86 uint32_t udp_msdu_count : 16, //[15:0] 87 tcp_msdu_count : 16; //[31:16] 88 uint32_t other_msdu_count : 16, //[15:0] 89 tcp_ack_msdu_count : 16; //[31:16] 90 uint32_t sw_response_reference_ptr : 32; //[31:0] 91 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 92 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 93 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 94 qosctrl_15_8_tid1 : 8, //[15:8] 95 qosctrl_15_8_tid2 : 8, //[23:16] 96 qosctrl_15_8_tid3 : 8; //[31:24] 97 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 98 qosctrl_15_8_tid5 : 8, //[15:8] 99 qosctrl_15_8_tid6 : 8, //[23:16] 100 qosctrl_15_8_tid7 : 8; //[31:24] 101 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 102 qosctrl_15_8_tid9 : 8, //[15:8] 103 qosctrl_15_8_tid10 : 8, //[23:16] 104 qosctrl_15_8_tid11 : 8; //[31:24] 105 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 106 qosctrl_15_8_tid13 : 8, //[15:8] 107 qosctrl_15_8_tid14 : 8, //[23:16] 108 qosctrl_15_8_tid15 : 8; //[31:24] 109 }; 110 111 /* 112 113 struct rx_rxpcu_classification_overview rxpcu_classification_details 114 115 Details related to what RXPCU classification types of 116 MPDUs have been received 117 118 sta_full_aid 119 120 Consumer: FW 121 122 Producer: RXPCU 123 124 125 126 The full AID of this station. 127 128 129 130 <legal all> 131 132 mcs 133 134 MCS of the received frame 135 136 137 138 For details, refer to MCS_TYPE description 139 140 <legal all> 141 142 nss 143 144 Number of spatial streams. 145 146 147 148 <enum 0 1_spatial_stream>Single spatial stream 149 150 <enum 1 2_spatial_streams>2 spatial streams 151 152 <enum 2 3_spatial_streams>3 spatial streams 153 154 <enum 3 4_spatial_streams>4 spatial streams 155 156 <enum 4 5_spatial_streams>5 spatial streams 157 158 <enum 5 6_spatial_streams>6 spatial streams 159 160 <enum 6 7_spatial_streams>7 spatial streams 161 162 <enum 7 8_spatial_streams>8 spatial streams 163 164 odma_info_valid 165 166 When set, ofdma RU related info in the following fields 167 is valid 168 169 <legal all> 170 171 ofdma_low_ru_index 172 173 The index of the lowerest RU used by this STA. 174 175 <legal all> 176 177 reserved_1a 178 179 <legal 0> 180 181 ofdma_high_ru_index 182 183 The index of the highest RU used by this STA. 184 185 <legal all> 186 187 reserved_2a 188 189 <legal 0> 190 191 user_receive_quality 192 193 RSSI / EVM for this user ??? 194 195 196 197 Details TBD 198 199 <legal all> 200 201 mpdu_cnt_fcs_err 202 203 The number of MPDUs received from this STA in this PPDU 204 with FCS errors 205 206 <legal all> 207 208 wbm2rxdma_buf_source_used 209 210 Field filled in by RXDMA 211 212 213 214 When set, RXDMA has used the wbm2rxdma_buf ring as 215 source for at least one of the frames in this PPDU. 216 217 fw2rxdma_buf_source_used 218 219 Field filled in by RXDMA 220 221 222 223 When set, RXDMA has used the fw2rxdma_buf ring as source 224 for at least one of the frames in this PPDU. 225 226 sw2rxdma_buf_source_used 227 228 Field filled in by RXDMA 229 230 231 232 When set, RXDMA has used the sw2rxdma_buf ring as source 233 for at least one of the frames in this PPDU. 234 235 reserved_2b 236 237 <legal 0> 238 239 mpdu_cnt_fcs_ok 240 241 The number of MPDUs received from this STA in this PPDU 242 with correct FCS 243 244 <legal all> 245 246 frame_control_info_valid 247 248 When set, the frame_control_info field contains valid 249 information 250 251 <legal all> 252 253 qos_control_info_valid 254 255 When set, the QoS_control_info field contains valid 256 information 257 258 <legal all> 259 260 ht_control_info_valid 261 262 When set, the HT_control_info field contains valid 263 information 264 265 <legal all> 266 267 data_sequence_control_info_valid 268 269 When set, the First_data_seq_ctrl field contains valid 270 information 271 272 <legal all> 273 274 reserved_3a 275 276 <legal 0> 277 278 rxdma2reo_ring_used 279 280 Field filled in by RXDMA 281 282 283 284 Set when at least one frame during this PPDU got pushed 285 to this ring by RXDMA 286 287 rxdma2fw_ring_used 288 289 Field filled in by RXDMA 290 291 292 293 Set when at least one frame during this PPDU got pushed 294 to this ring by RXDMA 295 296 rxdma2sw_ring_used 297 298 Field filled in by RXDMA 299 300 301 302 Set when at least one frame during this PPDU got pushed 303 to this ring by RXDMA 304 305 rxdma_release_ring_used 306 307 Field filled in by RXDMA 308 309 310 311 Set when at least one frame during this PPDU got pushed 312 to this ring by RXDMA 313 314 ht_control_field_pkt_type 315 316 Field only valid when HT_control_info_valid is set. 317 318 319 320 Indicates what the PHY receive type was for receiving 321 this frame. Can help determine if the HT_CONTROL field shall 322 be interpreted as HT/VHT or HE. 323 324 325 326 <enum 0 dot11a>802.11a PPDU type 327 328 <enum 1 dot11b>802.11b PPDU type 329 330 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 331 332 <enum 3 dot11ac>802.11ac PPDU type 333 334 <enum 4 dot11ax>802.11ax PPDU type 335 336 reserved_3b 337 338 <legal 0> 339 340 ast_index 341 342 This field indicates the index of the AST entry 343 corresponding to this MPDU. It is provided by the GSE module 344 instantiated in RXPCU. 345 346 A value of 0xFFFF indicates an invalid AST index, 347 meaning that No AST entry was found or NO AST search was 348 performed 349 350 <legal all> 351 352 frame_control_field 353 354 Field only valid when Frame_control_info_valid is set. 355 356 357 358 Last successfully received Frame_control field of data 359 frame (excluding Data NULL/ QoS Null) for this user 360 361 Mainly used to track the PM state of the transmitted 362 device 363 364 365 366 NOTE: only data frame info is needed, as control and 367 management frames are already routed to the FW. 368 369 <legal all> 370 371 first_data_seq_ctrl 372 373 Field only valid when Data_sequence_control_info_valid 374 is set. 375 376 377 378 Sequence control field of the first data frame 379 (excluding Data NULL or QoS Data null) received for this 380 user with correct FCS 381 382 383 384 NOTE: only data frame info is needed, as control and 385 management frames are already routed to the FW. 386 387 <legal all> 388 389 qos_control_field 390 391 Field only valid when QoS_control_info_valid is set. 392 393 394 395 Last successfully received QoS_control field of data 396 frame (excluding Data NULL/ QoS Null) for this user 397 398 399 400 Note that in case of multi TID, this field can only 401 reflect the last properly received MPDU, and thus can not 402 indicate all potentially different TIDs that had been 403 received earlier. 404 405 406 407 There are however per TID fields, that will contain 408 among other things all buffer status info: See 409 410 QoSCtrl_15_8_tid??? 411 412 <legal all> 413 414 ht_control_field 415 416 Field only valid when HT_control_info_valid is set. 417 418 419 420 Last successfully received 421 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 422 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 423 Null are excluded here because these frames are always 424 already routed to the FW by RXDMA. 425 426 427 428 See field HT_control_field_pkt_type in case pkt_type 429 influences if this fields interpretation as HT/VHT/HE 430 CONTROL 431 432 <legal all> 433 434 fcs_ok_bitmap_31_0 435 436 Bitmap indicates in order of received MPDUs, which MPDUs 437 had an passing FCS or had an error. 438 439 1: FCS OK 440 441 0: FCS error 442 443 <legal all> 444 445 fcs_ok_bitmap_63_32 446 447 Bitmap indicates in order of received MPDUs, which MPDUs 448 had an passing FCS or had an error. 449 450 1: FCS OK 451 452 0: FCS error 453 454 455 456 NOTE: for users 0, 1, 2 and 3, additional bitmap info 457 (up to 256 bitmap window) is provided in 458 RX_PPDU_END_USER_STATS_EXT TLV 459 460 <legal all> 461 462 udp_msdu_count 463 464 Field filled in by RX OLE 465 466 Set to 0 by RXPCU 467 468 469 470 The number of MSDUs that are part of MPDUs without FCS 471 error, that contain UDP frames. 472 473 <legal all> 474 475 tcp_msdu_count 476 477 Field filled in by RX OLE 478 479 Set to 0 by RXPCU 480 481 482 483 The number of MSDUs that are part of MPDUs without FCS 484 error, that contain TCP frames. 485 486 487 488 (Note: This does NOT include TCP-ACK) 489 490 <legal all> 491 492 other_msdu_count 493 494 Field filled in by RX OLE 495 496 Set to 0 by RXPCU 497 498 499 500 The number of MSDUs that are part of MPDUs without FCS 501 error, that contain neither UDP or TCP frames. 502 503 504 505 Includes Management and control frames. 506 507 508 509 <legal all> 510 511 tcp_ack_msdu_count 512 513 Field filled in by RX OLE 514 515 Set to 0 by RXPCU 516 517 518 519 The number of MSDUs that are part of MPDUs without FCS 520 error, that contain TCP ack frames. 521 522 <legal all> 523 524 sw_response_reference_ptr 525 526 Pointer that SW uses to refer back to an expected 527 response reception. Used for Rate adaptation purposes. 528 529 When a reception occurrs that is not tied to an expected 530 response, this field is set to 0x0 531 532 <legal all> 533 534 received_qos_data_tid_bitmap 535 536 Whenever a QoS Data frame is received, the bit in this 537 field that corresponds to the received TID shall be set. 538 539 ...Bitmap[0] = TID0 540 541 ...Bitmap[1] = TID1 542 543 Etc. 544 545 <legal all> 546 547 received_qos_data_tid_eosp_bitmap 548 549 Field initialized to 0 550 551 For every QoS Data frame that is correctly received, the 552 EOSP bit of that frame is copied over into the corresponding 553 TID related field. 554 555 Note that this implies that the bits here represent the 556 EOSP bit status for each TID of the last MPDU received for 557 that TID. 558 559 560 561 received TID shall be set. 562 563 ...eosp_bitmap[0] = eosp of TID0 564 565 ...eosp_bitmap[1] = eosp of TID1 566 567 Etc. 568 569 <legal all> 570 571 qosctrl_15_8_tid0 572 573 Field only valid when Received_qos_data_tid_bitmap[0] is 574 set 575 576 577 578 QoS control field bits 15-8 of the last properly 579 received MPDU with TID0 580 581 qosctrl_15_8_tid1 582 583 Field only valid when Received_qos_data_tid_bitmap[1] is 584 set 585 586 587 588 QoS control field bits 15-8 of the last properly 589 received MPDU with TID1 590 591 qosctrl_15_8_tid2 592 593 Field only valid when Received_qos_data_tid_bitmap[2] is 594 set 595 596 597 598 QoS control field bits 15-8 of the last properly 599 received MPDU with TID2 600 601 qosctrl_15_8_tid3 602 603 Field only valid when Received_qos_data_tid_bitmap[3] is 604 set 605 606 607 608 QoS control field bits 15-8 of the last properly 609 received MPDU with TID3 610 611 qosctrl_15_8_tid4 612 613 Field only valid when Received_qos_data_tid_bitmap[4] is 614 set 615 616 617 618 QoS control field bits 15-8 of the last properly 619 received MPDU with TID4 620 621 qosctrl_15_8_tid5 622 623 Field only valid when Received_qos_data_tid_bitmap[5] is 624 set 625 626 627 628 QoS control field bits 15-8 of the last properly 629 received MPDU with TID5 630 631 qosctrl_15_8_tid6 632 633 Field only valid when Received_qos_data_tid_bitmap[6] is 634 set 635 636 637 638 QoS control field bits 15-8 of the last properly 639 received MPDU with TID6 640 641 qosctrl_15_8_tid7 642 643 Field only valid when Received_qos_data_tid_bitmap[7] is 644 set 645 646 647 648 QoS control field bits 15-8 of the last properly 649 received MPDU with TID7 650 651 qosctrl_15_8_tid8 652 653 Field only valid when Received_qos_data_tid_bitmap[8] is 654 set 655 656 657 658 QoS control field bits 15-8 of the last properly 659 received MPDU with TID8 660 661 qosctrl_15_8_tid9 662 663 Field only valid when Received_qos_data_tid_bitmap[9] is 664 set 665 666 667 668 QoS control field bits 15-8 of the last properly 669 received MPDU with TID9 670 671 qosctrl_15_8_tid10 672 673 Field only valid when Received_qos_data_tid_bitmap[10] 674 is set 675 676 677 678 QoS control field bits 15-8 of the last properly 679 received MPDU with TID10 680 681 qosctrl_15_8_tid11 682 683 Field only valid when Received_qos_data_tid_bitmap[11] 684 is set 685 686 687 688 QoS control field bits 15-8 of the last properly 689 received MPDU with TID11 690 691 qosctrl_15_8_tid12 692 693 Field only valid when Received_qos_data_tid_bitmap[12] 694 is set 695 696 697 698 QoS control field bits 15-8 of the last properly 699 received MPDU with TID12 700 701 qosctrl_15_8_tid13 702 703 Field only valid when Received_qos_data_tid_bitmap[13] 704 is set 705 706 707 708 QoS control field bits 15-8 of the last properly 709 received MPDU with TID13 710 711 qosctrl_15_8_tid14 712 713 Field only valid when Received_qos_data_tid_bitmap[14] 714 is set 715 716 717 718 QoS control field bits 15-8 of the last properly 719 received MPDU with TID14 720 721 qosctrl_15_8_tid15 722 723 Field only valid when Received_qos_data_tid_bitmap[15] 724 is set 725 726 727 728 QoS control field bits 15-8 of the last properly 729 received MPDU with TID15 730 */ 731 732 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000 733 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 24 734 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff 735 736 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 737 738 Consumer: FW 739 740 Producer: RXPCU 741 742 743 744 The full AID of this station. 745 746 747 748 <legal all> 749 */ 750 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 751 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 752 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 753 754 /* Description RX_PPDU_END_USER_STATS_1_MCS 755 756 MCS of the received frame 757 758 759 760 For details, refer to MCS_TYPE description 761 762 <legal all> 763 */ 764 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 765 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 766 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 767 768 /* Description RX_PPDU_END_USER_STATS_1_NSS 769 770 Number of spatial streams. 771 772 773 774 <enum 0 1_spatial_stream>Single spatial stream 775 776 <enum 1 2_spatial_streams>2 spatial streams 777 778 <enum 2 3_spatial_streams>3 spatial streams 779 780 <enum 3 4_spatial_streams>4 spatial streams 781 782 <enum 4 5_spatial_streams>5 spatial streams 783 784 <enum 5 6_spatial_streams>6 spatial streams 785 786 <enum 6 7_spatial_streams>7 spatial streams 787 788 <enum 7 8_spatial_streams>8 spatial streams 789 */ 790 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 791 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 792 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 793 794 /* Description RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID 795 796 When set, ofdma RU related info in the following fields 797 is valid 798 799 <legal all> 800 */ 801 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_OFFSET 0x00000004 802 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_LSB 20 803 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_MASK 0x00100000 804 805 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX 806 807 The index of the lowerest RU used by this STA. 808 809 <legal all> 810 */ 811 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_OFFSET 0x00000004 812 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_LSB 21 813 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_MASK 0x0fe00000 814 815 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 816 817 <legal 0> 818 */ 819 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 820 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 821 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 822 823 /* Description RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX 824 825 The index of the highest RU used by this STA. 826 827 <legal all> 828 */ 829 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_OFFSET 0x00000008 830 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_LSB 0 831 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_MASK 0x0000007f 832 833 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 834 835 <legal 0> 836 */ 837 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 838 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 839 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 840 841 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 842 843 RSSI / EVM for this user ??? 844 845 846 847 Details TBD 848 849 <legal all> 850 */ 851 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 852 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 853 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 854 855 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 856 857 The number of MPDUs received from this STA in this PPDU 858 with FCS errors 859 860 <legal all> 861 */ 862 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 863 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 864 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 865 866 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 867 868 Field filled in by RXDMA 869 870 871 872 When set, RXDMA has used the wbm2rxdma_buf ring as 873 source for at least one of the frames in this PPDU. 874 */ 875 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 876 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 877 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 878 879 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 880 881 Field filled in by RXDMA 882 883 884 885 When set, RXDMA has used the fw2rxdma_buf ring as source 886 for at least one of the frames in this PPDU. 887 */ 888 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 889 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 890 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 891 892 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 893 894 Field filled in by RXDMA 895 896 897 898 When set, RXDMA has used the sw2rxdma_buf ring as source 899 for at least one of the frames in this PPDU. 900 */ 901 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 902 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 903 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 904 905 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 906 907 <legal 0> 908 */ 909 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 910 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 911 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 912 913 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 914 915 The number of MPDUs received from this STA in this PPDU 916 with correct FCS 917 918 <legal all> 919 */ 920 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 921 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 922 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 923 924 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 925 926 When set, the frame_control_info field contains valid 927 information 928 929 <legal all> 930 */ 931 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 932 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 933 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 934 935 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 936 937 When set, the QoS_control_info field contains valid 938 information 939 940 <legal all> 941 */ 942 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 943 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 944 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 945 946 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 947 948 When set, the HT_control_info field contains valid 949 information 950 951 <legal all> 952 */ 953 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 954 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 955 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 956 957 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 958 959 When set, the First_data_seq_ctrl field contains valid 960 information 961 962 <legal all> 963 */ 964 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 965 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 966 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 967 968 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 969 970 <legal 0> 971 */ 972 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 973 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 13 974 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000e000 975 976 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 977 978 Field filled in by RXDMA 979 980 981 982 Set when at least one frame during this PPDU got pushed 983 to this ring by RXDMA 984 */ 985 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 986 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 987 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 988 989 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 990 991 Field filled in by RXDMA 992 993 994 995 Set when at least one frame during this PPDU got pushed 996 to this ring by RXDMA 997 */ 998 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 999 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1000 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1001 1002 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1003 1004 Field filled in by RXDMA 1005 1006 1007 1008 Set when at least one frame during this PPDU got pushed 1009 to this ring by RXDMA 1010 */ 1011 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1012 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1013 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1014 1015 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1016 1017 Field filled in by RXDMA 1018 1019 1020 1021 Set when at least one frame during this PPDU got pushed 1022 to this ring by RXDMA 1023 */ 1024 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1025 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1026 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1027 1028 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1029 1030 Field only valid when HT_control_info_valid is set. 1031 1032 1033 1034 Indicates what the PHY receive type was for receiving 1035 this frame. Can help determine if the HT_CONTROL field shall 1036 be interpreted as HT/VHT or HE. 1037 1038 1039 1040 <enum 0 dot11a>802.11a PPDU type 1041 1042 <enum 1 dot11b>802.11b PPDU type 1043 1044 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1045 1046 <enum 3 dot11ac>802.11ac PPDU type 1047 1048 <enum 4 dot11ax>802.11ax PPDU type 1049 */ 1050 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1051 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1052 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1053 1054 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1055 1056 <legal 0> 1057 */ 1058 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1059 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1060 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1061 1062 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1063 1064 This field indicates the index of the AST entry 1065 corresponding to this MPDU. It is provided by the GSE module 1066 instantiated in RXPCU. 1067 1068 A value of 0xFFFF indicates an invalid AST index, 1069 meaning that No AST entry was found or NO AST search was 1070 performed 1071 1072 <legal all> 1073 */ 1074 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1075 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1076 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1077 1078 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1079 1080 Field only valid when Frame_control_info_valid is set. 1081 1082 1083 1084 Last successfully received Frame_control field of data 1085 frame (excluding Data NULL/ QoS Null) for this user 1086 1087 Mainly used to track the PM state of the transmitted 1088 device 1089 1090 1091 1092 NOTE: only data frame info is needed, as control and 1093 management frames are already routed to the FW. 1094 1095 <legal all> 1096 */ 1097 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1098 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1099 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1100 1101 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1102 1103 Field only valid when Data_sequence_control_info_valid 1104 is set. 1105 1106 1107 1108 Sequence control field of the first data frame 1109 (excluding Data NULL or QoS Data null) received for this 1110 user with correct FCS 1111 1112 1113 1114 NOTE: only data frame info is needed, as control and 1115 management frames are already routed to the FW. 1116 1117 <legal all> 1118 */ 1119 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1120 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1121 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1122 1123 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1124 1125 Field only valid when QoS_control_info_valid is set. 1126 1127 1128 1129 Last successfully received QoS_control field of data 1130 frame (excluding Data NULL/ QoS Null) for this user 1131 1132 1133 1134 Note that in case of multi TID, this field can only 1135 reflect the last properly received MPDU, and thus can not 1136 indicate all potentially different TIDs that had been 1137 received earlier. 1138 1139 1140 1141 There are however per TID fields, that will contain 1142 among other things all buffer status info: See 1143 1144 QoSCtrl_15_8_tid??? 1145 1146 <legal all> 1147 */ 1148 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1149 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1150 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1151 1152 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1153 1154 Field only valid when HT_control_info_valid is set. 1155 1156 1157 1158 Last successfully received 1159 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1160 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 1161 Null are excluded here because these frames are always 1162 already routed to the FW by RXDMA. 1163 1164 1165 1166 See field HT_control_field_pkt_type in case pkt_type 1167 influences if this fields interpretation as HT/VHT/HE 1168 CONTROL 1169 1170 <legal all> 1171 */ 1172 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1173 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1174 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1175 1176 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1177 1178 Bitmap indicates in order of received MPDUs, which MPDUs 1179 had an passing FCS or had an error. 1180 1181 1: FCS OK 1182 1183 0: FCS error 1184 1185 <legal all> 1186 */ 1187 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1188 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1189 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1190 1191 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1192 1193 Bitmap indicates in order of received MPDUs, which MPDUs 1194 had an passing FCS or had an error. 1195 1196 1: FCS OK 1197 1198 0: FCS error 1199 1200 1201 1202 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1203 (up to 256 bitmap window) is provided in 1204 RX_PPDU_END_USER_STATS_EXT TLV 1205 1206 <legal all> 1207 */ 1208 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1209 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1210 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1211 1212 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1213 1214 Field filled in by RX OLE 1215 1216 Set to 0 by RXPCU 1217 1218 1219 1220 The number of MSDUs that are part of MPDUs without FCS 1221 error, that contain UDP frames. 1222 1223 <legal all> 1224 */ 1225 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1226 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1227 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1228 1229 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1230 1231 Field filled in by RX OLE 1232 1233 Set to 0 by RXPCU 1234 1235 1236 1237 The number of MSDUs that are part of MPDUs without FCS 1238 error, that contain TCP frames. 1239 1240 1241 1242 (Note: This does NOT include TCP-ACK) 1243 1244 <legal all> 1245 */ 1246 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1247 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1248 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1249 1250 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1251 1252 Field filled in by RX OLE 1253 1254 Set to 0 by RXPCU 1255 1256 1257 1258 The number of MSDUs that are part of MPDUs without FCS 1259 error, that contain neither UDP or TCP frames. 1260 1261 1262 1263 Includes Management and control frames. 1264 1265 1266 1267 <legal all> 1268 */ 1269 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1270 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1271 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1272 1273 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1274 1275 Field filled in by RX OLE 1276 1277 Set to 0 by RXPCU 1278 1279 1280 1281 The number of MSDUs that are part of MPDUs without FCS 1282 error, that contain TCP ack frames. 1283 1284 <legal all> 1285 */ 1286 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1287 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1288 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1289 1290 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1291 1292 Pointer that SW uses to refer back to an expected 1293 response reception. Used for Rate adaptation purposes. 1294 1295 When a reception occurrs that is not tied to an expected 1296 response, this field is set to 0x0 1297 1298 <legal all> 1299 */ 1300 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1301 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1302 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1303 1304 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1305 1306 Whenever a QoS Data frame is received, the bit in this 1307 field that corresponds to the received TID shall be set. 1308 1309 ...Bitmap[0] = TID0 1310 1311 ...Bitmap[1] = TID1 1312 1313 Etc. 1314 1315 <legal all> 1316 */ 1317 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1318 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1319 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1320 1321 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1322 1323 Field initialized to 0 1324 1325 For every QoS Data frame that is correctly received, the 1326 EOSP bit of that frame is copied over into the corresponding 1327 TID related field. 1328 1329 Note that this implies that the bits here represent the 1330 EOSP bit status for each TID of the last MPDU received for 1331 that TID. 1332 1333 1334 1335 received TID shall be set. 1336 1337 ...eosp_bitmap[0] = eosp of TID0 1338 1339 ...eosp_bitmap[1] = eosp of TID1 1340 1341 Etc. 1342 1343 <legal all> 1344 */ 1345 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1346 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1347 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1348 1349 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1350 1351 Field only valid when Received_qos_data_tid_bitmap[0] is 1352 set 1353 1354 1355 1356 QoS control field bits 15-8 of the last properly 1357 received MPDU with TID0 1358 */ 1359 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1360 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1361 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1362 1363 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1364 1365 Field only valid when Received_qos_data_tid_bitmap[1] is 1366 set 1367 1368 1369 1370 QoS control field bits 15-8 of the last properly 1371 received MPDU with TID1 1372 */ 1373 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1374 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1375 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1376 1377 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1378 1379 Field only valid when Received_qos_data_tid_bitmap[2] is 1380 set 1381 1382 1383 1384 QoS control field bits 15-8 of the last properly 1385 received MPDU with TID2 1386 */ 1387 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1388 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1389 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1390 1391 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1392 1393 Field only valid when Received_qos_data_tid_bitmap[3] is 1394 set 1395 1396 1397 1398 QoS control field bits 15-8 of the last properly 1399 received MPDU with TID3 1400 */ 1401 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1402 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1403 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1404 1405 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1406 1407 Field only valid when Received_qos_data_tid_bitmap[4] is 1408 set 1409 1410 1411 1412 QoS control field bits 15-8 of the last properly 1413 received MPDU with TID4 1414 */ 1415 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1416 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1417 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1418 1419 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1420 1421 Field only valid when Received_qos_data_tid_bitmap[5] is 1422 set 1423 1424 1425 1426 QoS control field bits 15-8 of the last properly 1427 received MPDU with TID5 1428 */ 1429 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1430 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1431 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1432 1433 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1434 1435 Field only valid when Received_qos_data_tid_bitmap[6] is 1436 set 1437 1438 1439 1440 QoS control field bits 15-8 of the last properly 1441 received MPDU with TID6 1442 */ 1443 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1444 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1445 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1446 1447 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1448 1449 Field only valid when Received_qos_data_tid_bitmap[7] is 1450 set 1451 1452 1453 1454 QoS control field bits 15-8 of the last properly 1455 received MPDU with TID7 1456 */ 1457 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1458 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1459 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1460 1461 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1462 1463 Field only valid when Received_qos_data_tid_bitmap[8] is 1464 set 1465 1466 1467 1468 QoS control field bits 15-8 of the last properly 1469 received MPDU with TID8 1470 */ 1471 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1472 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1473 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1474 1475 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1476 1477 Field only valid when Received_qos_data_tid_bitmap[9] is 1478 set 1479 1480 1481 1482 QoS control field bits 15-8 of the last properly 1483 received MPDU with TID9 1484 */ 1485 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1486 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1487 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1488 1489 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1490 1491 Field only valid when Received_qos_data_tid_bitmap[10] 1492 is set 1493 1494 1495 1496 QoS control field bits 15-8 of the last properly 1497 received MPDU with TID10 1498 */ 1499 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1500 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1501 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1502 1503 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1504 1505 Field only valid when Received_qos_data_tid_bitmap[11] 1506 is set 1507 1508 1509 1510 QoS control field bits 15-8 of the last properly 1511 received MPDU with TID11 1512 */ 1513 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1514 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1515 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1516 1517 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1518 1519 Field only valid when Received_qos_data_tid_bitmap[12] 1520 is set 1521 1522 1523 1524 QoS control field bits 15-8 of the last properly 1525 received MPDU with TID12 1526 */ 1527 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1528 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1529 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1530 1531 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1532 1533 Field only valid when Received_qos_data_tid_bitmap[13] 1534 is set 1535 1536 1537 1538 QoS control field bits 15-8 of the last properly 1539 received MPDU with TID13 1540 */ 1541 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1542 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1543 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1544 1545 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1546 1547 Field only valid when Received_qos_data_tid_bitmap[14] 1548 is set 1549 1550 1551 1552 QoS control field bits 15-8 of the last properly 1553 received MPDU with TID14 1554 */ 1555 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1556 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1557 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1558 1559 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1560 1561 Field only valid when Received_qos_data_tid_bitmap[15] 1562 is set 1563 1564 1565 1566 QoS control field bits 15-8 of the last properly 1567 received MPDU with TID15 1568 */ 1569 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1570 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1571 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1572 1573 1574 #endif // _RX_PPDU_END_USER_STATS_H_ 1575