1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.1 10/27/2016 22*5113495bSYour Name // User Name:kanalas 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 29*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 30*5113495bSYour Name 31*5113495bSYour Name #ifdef SCALE_INCLUDES 32*5113495bSYour Name #include "../../../include/HALhwio.h" 33*5113495bSYour Name #else 34*5113495bSYour Name #include "msmhwio.h" 35*5113495bSYour Name #endif 36*5113495bSYour Name 37*5113495bSYour Name 38*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 39*5113495bSYour Name // Instance Relative Offsets from Block wcss 40*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 41*5113495bSYour Name 42*5113495bSYour Name #define SEQ_WCSS_ECAHB_OFFSET 0x00008400 43*5113495bSYour Name #define SEQ_WCSS_ECAHB_TSLV_OFFSET 0x00009000 44*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 45*5113495bSYour Name #define SEQ_WCSS_MPSS_OFFSET 0x00200000 46*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0PDMEM_WFAX_PCSS_PDMEM_OFFSET 0x00200000 47*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_WFAX_PCSS_OFFSET 0x00280000 48*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_WFAX_PCSS_DUAL_TIMER_OFFSET 0x00281800 49*5113495bSYour Name #define SEQ_WCSS_MPSS_SEG0_WFAX_PCSS_WATCHDOG_OFFSET 0x00281c00 50*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00400000 51*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00400000 52*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00480000 53*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00480400 54*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00480800 55*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00480c00 56*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00481000 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00481400 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00484000 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x00488000 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00500000 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x00520000 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x00528000 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00530000 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x005a0000 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_DIG_OFFSET 0x005c0000 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_DIG_OTP_OFFSET 0x005c0000 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_DIG_TLMM_OFFSET 0x005c4000 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x005c8000 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4400 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4800 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x005d6080 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d60e0 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d6100 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6140 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d6180 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x005d6800 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x005d6840 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x005d6880 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x005d68e0 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x005d6900 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6940 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d6980 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x005e0000 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x005e0400 91*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x005e0800 92*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x005e1000 93*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x005e1200 94*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x005e2000 95*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x005e8000 96*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x005e8400 97*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x005e8800 98*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x005e9000 99*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x005e9200 100*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x005ea000 101*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH2_OFFSET 0x005f0000 102*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH2_OFFSET 0x005f0400 103*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH2_OFFSET 0x005f0800 104*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH2_OFFSET 0x005f1000 105*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH2_OFFSET 0x005f1200 106*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH2_OFFSET 0x005f2000 107*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH3_OFFSET 0x005f8000 108*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH3_OFFSET 0x005f8400 109*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH3_OFFSET 0x005f8800 110*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH3_OFFSET 0x005f9000 111*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH3_OFFSET 0x005f9200 112*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH3_OFFSET 0x005fa000 113*5113495bSYour Name #define SEQ_WCSS_PHYB_OFFSET 0x00600000 114*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00600000 115*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_B_REG_MAP_OFFSET 0x00680000 116*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00680400 117*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00680800 118*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00680c00 119*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00681000 120*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00681400 121*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_NOC_B_REG_MAP_OFFSET 0x00684000 122*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXTD_B_REG_MAP_OFFSET 0x00688000 123*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXFD_B_REG_MAP_OFFSET 0x00700000 124*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_ROBE_B_REG_MAP_OFFSET 0x00720000 125*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_RXTD_B_REG_MAP_OFFSET 0x00728000 126*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00730000 127*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PHYRF_B_REG_MAP_OFFSET 0x007a0000 128*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_OFFSET 0x007c0000 129*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OFFSET 0x007c0000 130*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OTP_OFFSET 0x007c0000 131*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_TLMM_OFFSET 0x007c4000 132*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x007c8000 133*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x007d4000 134*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x007d4000 135*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4400 136*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x007d4800 137*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000 138*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040 139*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x007d6080 140*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d60e0 141*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x007d6100 142*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x007d6140 143*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x007d6180 144*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x007d6800 145*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x007d6840 146*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x007d6880 147*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x007d68e0 148*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x007d6900 149*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6940 150*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d6980 151*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x007e0000 152*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x007e0000 153*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x007e0400 154*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x007e0800 155*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x007e1000 156*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x007e1200 157*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x007e2000 158*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x007e8000 159*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x007e8400 160*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x007e8800 161*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x007e9000 162*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x007e9200 163*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x007ea000 164*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH2_OFFSET 0x007f0000 165*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH2_OFFSET 0x007f0400 166*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH2_OFFSET 0x007f0800 167*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH2_OFFSET 0x007f1000 168*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH2_OFFSET 0x007f1200 169*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH2_OFFSET 0x007f2000 170*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH3_OFFSET 0x007f8000 171*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH3_OFFSET 0x007f8400 172*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH3_OFFSET 0x007f8800 173*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH3_OFFSET 0x007f9000 174*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH3_OFFSET 0x007f9200 175*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH3_OFFSET 0x007fa000 176*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 177*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_OFFSET 0x00a00000 178*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00a00000 179*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00a01000 180*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00a02000 181*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00a03000 182*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00a04000 183*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00a05000 184*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00a06000 185*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00a07000 186*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00a08000 187*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00a09000 188*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x00a0a000 189*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x00a0b000 190*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x00a0c000 191*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x00a0d000 192*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x00a0e000 193*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x00a0f000 194*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00a10000 195*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00a11000 196*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00a12000 197*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00a13000 198*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00a14000 199*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00a15000 200*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00a16000 201*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00a17000 202*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00a18000 203*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 204*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 205*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 206*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 207*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 208*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 209*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 210*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 211*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 212*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 213*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 214*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 215*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 216*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_REG_OFFSET 0x00a47000 217*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CCE_REG_OFFSET 0x00a4a000 218*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 219*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 220*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 221*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 222*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 223*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 224*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 225*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 226*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 227*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 228*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 229*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 230*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 231*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 232*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 233*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 234*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 235*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 236*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA1_REG_OFFSET 0x00ab6000 237*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_LPEC_REG_OFFSET 0x00ab9000 238*5113495bSYour Name #define SEQ_WCSS_WMAC1_OFFSET 0x00b00000 239*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_PDG_REG_OFFSET 0x00b00000 240*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXDMA_REG_OFFSET 0x00b03000 241*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA_REG_OFFSET 0x00b06000 242*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MCMN_REG_OFFSET 0x00b09000 243*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXPCU_REG_OFFSET 0x00b0c000 244*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXPCU_REG_OFFSET 0x00b0f000 245*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_AMPI_REG_OFFSET 0x00b12000 246*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_REG_OFFSET 0x00b15000 247*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_PARSER_REG_OFFSET 0x00b18000 248*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CCE_REG_OFFSET 0x00b1b000 249*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_REG_OFFSET 0x00b1e000 250*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_PARSER_REG_OFFSET 0x00b21000 251*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RRI_REG_OFFSET 0x00b24000 252*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CRYPTO_REG_OFFSET 0x00b27000 253*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_HWSCH_REG_OFFSET 0x00b2a000 254*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MXI_REG_OFFSET 0x00b30000 255*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_SFM_REG_OFFSET 0x00b33000 256*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA1_REG_OFFSET 0x00b36000 257*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_LPEC_REG_OFFSET 0x00b39000 258*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 259*5113495bSYour Name #define SEQ_WCSS_WCMN_OFFSET 0x00b50000 260*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 261*5113495bSYour Name #define SEQ_WCSS_PMM_OFFSET 0x00b70000 262*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 263*5113495bSYour Name #define SEQ_WCSS_DBG_ROM_WCSS_DBG_DAPROM_OFFSET 0x00b90000 264*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 265*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 266*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_24T_8CH_OFFSET 0x00b94000 267*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 268*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 269*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_OFFSET 0x00b98000 270*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00b98280 271*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00b98000 272*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_OFFSET 0x00b99000 273*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00b99280 274*5113495bSYour Name #define SEQ_WCSS_DBG_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00b99000 275*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_TPDA_S2_W64_D2_M64_CS4C2456A_OFFSET 0x00b9a000 276*5113495bSYour Name #define SEQ_WCSS_DBG_FUN_CXATBFUNNEL_128W8SP_OFFSET 0x00b9b000 277*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W8K_OFFSET 0x00b9c000 278*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_NOC_UMAC_NOC_OFFSET 0x00ba0000 279*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bb0000 280*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_CTI_QC_CTI_8T_8CH_OFFSET 0x00bb1000 281*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_NOC_PHYA_NOC_OFFSET 0x00bb6000 282*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_CPU0_M3_AHB_AP_OFFSET 0x00bbe000 283*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc0000 284*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_CTI_QC_CTI_8T_8CH_OFFSET 0x00bc1000 285*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_NOC_PHYB_NOC_OFFSET 0x00bc6000 286*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_CPU0_M3_AHB_AP_OFFSET 0x00bce000 287*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_CPU_M3_AHB_AP_OFFSET 0x00bf0000 288*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00bf1000 289*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c10000 290*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00c20000 291*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00c30000 292*5113495bSYour Name #define SEQ_WCSS_ACMT_OFFSET 0x00c40000 293*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_OFFSET 0x00d00000 294*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_QDSP6SS_PUB_OFFSET 0x00d00000 295*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_OFFSET 0x00d80000 296*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_CSR_OFFSET 0x00d80000 297*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_L2VIC_OFFSET 0x00d90000 298*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_QTMR_AC_OFFSET 0x00da0000 299*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F0_OFFSET 0x00da1000 300*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F1_OFFSET 0x00da2000 301*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F2_OFFSET 0x00da3000 302*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_SAW2_OFFSET 0x00db0000 303*5113495bSYour Name 304*5113495bSYour Name 305*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 306*5113495bSYour Name // Instance Relative Offsets from Block mpss_top 307*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 308*5113495bSYour Name 309*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0PDMEM_WFAX_PCSS_PDMEM_OFFSET 0x00000000 310*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_WFAX_PCSS_OFFSET 0x00080000 311*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_WFAX_PCSS_DUAL_TIMER_OFFSET 0x00081800 312*5113495bSYour Name #define SEQ_MPSS_TOP_SEG0_WFAX_PCSS_WATCHDOG_OFFSET 0x00081c00 313*5113495bSYour Name 314*5113495bSYour Name 315*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 316*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 317*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 318*5113495bSYour Name 319*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 320*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 321*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 322*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 323*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 324*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 325*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 326*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00084000 327*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x00088000 328*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00100000 329*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x00120000 330*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x00128000 331*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00130000 332*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x001a0000 333*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x001c0000 334*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_OFFSET 0x001c0000 335*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_OTP_OFFSET 0x001c0000 336*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_TLMM_OFFSET 0x001c4000 337*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x001c8000 338*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x001d4000 339*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 340*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4400 341*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4800 342*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 343*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 344*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x001d6080 345*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d60e0 346*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d6100 347*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6140 348*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d6180 349*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 350*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 351*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x001d6880 352*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d68e0 353*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d6900 354*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6940 355*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6980 356*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x001e0000 357*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x001e0000 358*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x001e0400 359*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x001e0800 360*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x001e1000 361*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x001e1200 362*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x001e2000 363*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x001e8000 364*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x001e8400 365*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x001e8800 366*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x001e9000 367*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x001e9200 368*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x001ea000 369*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH2_OFFSET 0x001f0000 370*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH2_OFFSET 0x001f0400 371*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH2_OFFSET 0x001f0800 372*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH2_OFFSET 0x001f1000 373*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH2_OFFSET 0x001f1200 374*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH2_OFFSET 0x001f2000 375*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH3_OFFSET 0x001f8000 376*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH3_OFFSET 0x001f8400 377*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH3_OFFSET 0x001f8800 378*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH3_OFFSET 0x001f9000 379*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH3_OFFSET 0x001f9200 380*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH3_OFFSET 0x001fa000 381*5113495bSYour Name 382*5113495bSYour Name 383*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 384*5113495bSYour Name // Instance Relative Offsets from Block iron2g 385*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 386*5113495bSYour Name 387*5113495bSYour Name #define SEQ_IRON2G_RFA_DIG_OFFSET 0x00000000 388*5113495bSYour Name #define SEQ_IRON2G_RFA_DIG_OTP_OFFSET 0x00000000 389*5113495bSYour Name #define SEQ_IRON2G_RFA_DIG_TLMM_OFFSET 0x00004000 390*5113495bSYour Name #define SEQ_IRON2G_RFA_DIG_SYSCTRL_OFFSET 0x00008000 391*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_OFFSET 0x00014000 392*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_AON_OFFSET 0x00014000 393*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_CLKGEN_OFFSET 0x00014400 394*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_RFFE_M_OFFSET 0x00014800 395*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 396*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 397*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x00016080 398*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x000160e0 399*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016100 400*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016140 401*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x00016180 402*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00016800 403*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00016840 404*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x00016880 405*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x000168e0 406*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00016900 407*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016940 408*5113495bSYour Name #define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00016980 409*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_OFFSET 0x00020000 410*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_MC_CH0_OFFSET 0x00020000 411*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXBB_CH0_OFFSET 0x00020400 412*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXBB_CH0_OFFSET 0x00020800 413*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXFE_CH0_OFFSET 0x00021000 414*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXFE_CH0_OFFSET 0x00021200 415*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TPC_CH0_OFFSET 0x00022000 416*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_MC_CH1_OFFSET 0x00028000 417*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXBB_CH1_OFFSET 0x00028400 418*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXBB_CH1_OFFSET 0x00028800 419*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXFE_CH1_OFFSET 0x00029000 420*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXFE_CH1_OFFSET 0x00029200 421*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TPC_CH1_OFFSET 0x0002a000 422*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_MC_CH2_OFFSET 0x00030000 423*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXBB_CH2_OFFSET 0x00030400 424*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXBB_CH2_OFFSET 0x00030800 425*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXFE_CH2_OFFSET 0x00031000 426*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXFE_CH2_OFFSET 0x00031200 427*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TPC_CH2_OFFSET 0x00032000 428*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_MC_CH3_OFFSET 0x00038000 429*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXBB_CH3_OFFSET 0x00038400 430*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXBB_CH3_OFFSET 0x00038800 431*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TXFE_CH3_OFFSET 0x00039000 432*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_RXFE_CH3_OFFSET 0x00039200 433*5113495bSYour Name #define SEQ_IRON2G_RFA_WL_WL_TPC_CH3_OFFSET 0x0003a000 434*5113495bSYour Name 435*5113495bSYour Name 436*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 437*5113495bSYour Name // Instance Relative Offsets from Block rfa_dig 438*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 439*5113495bSYour Name 440*5113495bSYour Name #define SEQ_RFA_DIG_OTP_OFFSET 0x00000000 441*5113495bSYour Name #define SEQ_RFA_DIG_TLMM_OFFSET 0x00004000 442*5113495bSYour Name #define SEQ_RFA_DIG_SYSCTRL_OFFSET 0x00008000 443*5113495bSYour Name 444*5113495bSYour Name 445*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 446*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 447*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 448*5113495bSYour Name 449*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 450*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000400 451*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000800 452*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 453*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 454*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x00002080 455*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x000020e0 456*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002100 457*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002140 458*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x00002180 459*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00002800 460*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00002840 461*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x00002880 462*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x000028e0 463*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00002900 464*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002940 465*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00002980 466*5113495bSYour Name 467*5113495bSYour Name 468*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 469*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 470*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 471*5113495bSYour Name 472*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH0_OFFSET 0x00000000 473*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH0_OFFSET 0x00000400 474*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH0_OFFSET 0x00000800 475*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH0_OFFSET 0x00001000 476*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH0_OFFSET 0x00001200 477*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH0_OFFSET 0x00002000 478*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH1_OFFSET 0x00008000 479*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH1_OFFSET 0x00008400 480*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH1_OFFSET 0x00008800 481*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH1_OFFSET 0x00009000 482*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH1_OFFSET 0x00009200 483*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH1_OFFSET 0x0000a000 484*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH2_OFFSET 0x00010000 485*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH2_OFFSET 0x00010400 486*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH2_OFFSET 0x00010800 487*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH2_OFFSET 0x00011000 488*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH2_OFFSET 0x00011200 489*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH2_OFFSET 0x00012000 490*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH3_OFFSET 0x00018000 491*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH3_OFFSET 0x00018400 492*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH3_OFFSET 0x00018800 493*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH3_OFFSET 0x00019000 494*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH3_OFFSET 0x00019200 495*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH3_OFFSET 0x0001a000 496*5113495bSYour Name 497*5113495bSYour Name 498*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 499*5113495bSYour Name // Instance Relative Offsets from Block wfax_top_b 500*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 501*5113495bSYour Name 502*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00000000 503*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_B_REG_MAP_OFFSET 0x00080000 504*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00080400 505*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00080800 506*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00080c00 507*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00081000 508*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00081400 509*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_NOC_B_REG_MAP_OFFSET 0x00084000 510*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXTD_B_REG_MAP_OFFSET 0x00088000 511*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXFD_B_REG_MAP_OFFSET 0x00100000 512*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_ROBE_B_REG_MAP_OFFSET 0x00120000 513*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_RXTD_B_REG_MAP_OFFSET 0x00128000 514*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00130000 515*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PHYRF_B_REG_MAP_OFFSET 0x001a0000 516*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_OFFSET 0x001c0000 517*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OFFSET 0x001c0000 518*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OTP_OFFSET 0x001c0000 519*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_TLMM_OFFSET 0x001c4000 520*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x001c8000 521*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x001d4000 522*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 523*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4400 524*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4800 525*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 526*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 527*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PAL_OFFSET 0x001d6080 528*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d60e0 529*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d6100 530*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6140 531*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d6180 532*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 533*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 534*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PAL_OFFSET 0x001d6880 535*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d68e0 536*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d6900 537*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6940 538*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6980 539*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x001e0000 540*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x001e0000 541*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x001e0400 542*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x001e0800 543*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x001e1000 544*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x001e1200 545*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x001e2000 546*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x001e8000 547*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x001e8400 548*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x001e8800 549*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x001e9000 550*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x001e9200 551*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x001ea000 552*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH2_OFFSET 0x001f0000 553*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH2_OFFSET 0x001f0400 554*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH2_OFFSET 0x001f0800 555*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH2_OFFSET 0x001f1000 556*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH2_OFFSET 0x001f1200 557*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH2_OFFSET 0x001f2000 558*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH3_OFFSET 0x001f8000 559*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH3_OFFSET 0x001f8400 560*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_CH3_OFFSET 0x001f8800 561*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_CH3_OFFSET 0x001f9000 562*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_CH3_OFFSET 0x001f9200 563*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_CH3_OFFSET 0x001fa000 564*5113495bSYour Name 565*5113495bSYour Name 566*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 567*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 568*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 569*5113495bSYour Name 570*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_OFFSET 0x00000000 571*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 572*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 573*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 574*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 575*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 576*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 577*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 578*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 579*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 580*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 581*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 582*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 583*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 584*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 585*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 586*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 587*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 588*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 589*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 590*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 591*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 592*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 593*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 594*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 595*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 596*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 597*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 598*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 599*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 600*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 601*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 602*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 603*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 604*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 605*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 606*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 607*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 608*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 609*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_REG_OFFSET 0x00047000 610*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0004a000 611*5113495bSYour Name 612*5113495bSYour Name 613*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 614*5113495bSYour Name // Instance Relative Offsets from Block wfss_ce_reg 615*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 616*5113495bSYour Name 617*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 618*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 619*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 620*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 621*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 622*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 623*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 624*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 625*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 626*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 627*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 628*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 629*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 630*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 631*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 632*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 633*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 634*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 635*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 636*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 637*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 638*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 639*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 640*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 641*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 642*5113495bSYour Name 643*5113495bSYour Name 644*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 645*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 646*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 647*5113495bSYour Name 648*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 649*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 650*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 651*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 652*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 653*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 654*5113495bSYour Name 655*5113495bSYour Name 656*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 657*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg_28lp 658*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 659*5113495bSYour Name 660*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_PDG_REG_OFFSET 0x00000000 661*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_TXDMA_REG_OFFSET 0x00003000 662*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RXDMA_REG_OFFSET 0x00006000 663*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_MCMN_REG_OFFSET 0x00009000 664*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RXPCU_REG_OFFSET 0x0000c000 665*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_TXPCU_REG_OFFSET 0x0000f000 666*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_AMPI_REG_OFFSET 0x00012000 667*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RXOLE_REG_OFFSET 0x00015000 668*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 669*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_CCE_REG_OFFSET 0x0001b000 670*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_TXOLE_REG_OFFSET 0x0001e000 671*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 672*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RRI_REG_OFFSET 0x00024000 673*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_CRYPTO_REG_OFFSET 0x00027000 674*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_HWSCH_REG_OFFSET 0x0002a000 675*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_MXI_REG_OFFSET 0x00030000 676*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_SFM_REG_OFFSET 0x00033000 677*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_RXDMA1_REG_OFFSET 0x00036000 678*5113495bSYour Name #define SEQ_WMAC_TOP_REG_28LP_MAC_LPEC_REG_OFFSET 0x00039000 679*5113495bSYour Name 680*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_PDG_REG_OFFSET 681*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_TXDMA_REG_OFFSET 682*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RXDMA_REG_OFFSET 683*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_MCMN_REG_OFFSET 684*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RXPCU_REG_OFFSET 685*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_TXPCU_REG_OFFSET 686*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_AMPI_REG_OFFSET 687*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RXOLE_REG_OFFSET 688*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RXOLE_PARSER_REG_OFFSET 689*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_CCE_REG_OFFSET 690*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_TXOLE_REG_OFFSET 691*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_TXOLE_PARSER_REG_OFFSET 692*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RRI_REG_OFFSET 693*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_CRYPTO_REG_OFFSET 694*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_HWSCH_REG_OFFSET 695*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_MXI_REG_OFFSET 696*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_SFM_REG_OFFSET 697*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA1_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_RXDMA1_REG_OFFSET 698*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_LPEC_REG_OFFSET SEQ_WMAC_TOP_REG_28LP_MAC_LPEC_REG_OFFSET 699*5113495bSYour Name 700*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 701*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg_napier 702*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 703*5113495bSYour Name 704*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_ROM_WCSS_DBG_DAPROM_OFFSET 0x00000000 705*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 706*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TSGEN_CXTSGEN_OFFSET 0x00002000 707*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTIDBG_QC_CTI_24T_8CH_OFFSET 0x00004000 708*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 709*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 710*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_OFFSET 0x00008000 711*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00008280 712*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00008000 713*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_OFFSET 0x00009000 714*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00009280 715*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHY_TPDM_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00009000 716*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TPDA_TPDA_S2_W64_D2_M64_CS4C2456A_OFFSET 0x0000a000 717*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_FUN_CXATBFUNNEL_128W8SP_OFFSET 0x0000b000 718*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_TMC_CXTMC_F128W8K_OFFSET 0x0000c000 719*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_UMAC_NOC_UMAC_NOC_OFFSET 0x00010000 720*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00020000 721*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_CTI_QC_CTI_8T_8CH_OFFSET 0x00021000 722*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_NOC_PHYA_NOC_OFFSET 0x00026000 723*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYA_CPU0_M3_AHB_AP_OFFSET 0x0002e000 724*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00030000 725*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_CTI_QC_CTI_8T_8CH_OFFSET 0x00031000 726*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_NOC_PHYB_NOC_OFFSET 0x00036000 727*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_PHYB_CPU0_M3_AHB_AP_OFFSET 0x0003e000 728*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_UMAC_CPU_M3_AHB_AP_OFFSET 0x00060000 729*5113495bSYour Name #define SEQ_WCSSDBG_NAPIER_BUS_TIMEOUT_OFFSET 0x00061000 730*5113495bSYour Name 731*5113495bSYour Name 732*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 733*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 734*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 735*5113495bSYour Name 736*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 737*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 738*5113495bSYour Name 739*5113495bSYour Name 740*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 741*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb32_dsb64_csf49237bd 742*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 743*5113495bSYour Name 744*5113495bSYour Name #define SEQ_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_SUB_OFFSET 0x00000280 745*5113495bSYour Name #define SEQ_TPDM_ATB32_DSB64_CSF49237BD_TPDM_ATB32_DSB64_CSF49237BD_GPR_OFFSET 0x00000000 746*5113495bSYour Name 747*5113495bSYour Name 748*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 749*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_public 750*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 751*5113495bSYour Name 752*5113495bSYour Name #define SEQ_QDSP6SS_PUBLIC_QDSP6SS_PUB_OFFSET 0x00000000 753*5113495bSYour Name 754*5113495bSYour Name 755*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 756*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_private 757*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 758*5113495bSYour Name 759*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_CSR_OFFSET 0x00000000 760*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_L2VIC_OFFSET 0x00010000 761*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00020000 762*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F0_OFFSET 0x00021000 763*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F1_OFFSET 0x00022000 764*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F2_OFFSET 0x00023000 765*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_SAW2_OFFSET 0x00030000 766*5113495bSYour Name 767*5113495bSYour Name 768*5113495bSYour Name #endif 769*5113495bSYour Name 770