xref: /wlan-driver/fw-api/hw/qca6290/v2/phyrx_rssi_legacy.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _PHYRX_RSSI_LEGACY_H_
20 #define _PHYRX_RSSI_LEGACY_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 #include "receive_rssi_info.h"
25 
26 // ################ START SUMMARY #################
27 //
28 //	Dword	Fields
29 //	0	reception_type[3:0], reserved_0[7:4], rx_chain_mask[15:8], phy_ppdu_id[31:16]
30 //	1	sw_phy_meta_data[31:0]
31 //	2	ppdu_start_timestamp[31:0]
32 //	3-18	struct receive_rssi_info pre_rssi_info_details;
33 //	19-34	struct receive_rssi_info preamble_rssi_info_details;
34 //	35	pre_rssi_comb[7:0], rssi_comb[15:8], receive_bandwidth[17:16], reserved[31:18]
35 //
36 // ################ END SUMMARY #################
37 
38 #define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 36
39 
40 struct phyrx_rssi_legacy {
41              uint32_t reception_type                  :  4, //[3:0]
42                       reserved_0                      :  4, //[7:4]
43                       rx_chain_mask                   :  8, //[15:8]
44                       phy_ppdu_id                     : 16; //[31:16]
45              uint32_t sw_phy_meta_data                : 32; //[31:0]
46              uint32_t ppdu_start_timestamp            : 32; //[31:0]
47     struct            receive_rssi_info                       pre_rssi_info_details;
48     struct            receive_rssi_info                       preamble_rssi_info_details;
49              uint32_t pre_rssi_comb                   :  8, //[7:0]
50                       rssi_comb                       :  8, //[15:8]
51                       receive_bandwidth               :  2, //[17:16]
52                       reserved                        : 14; //[31:18]
53 };
54 
55 /*
56 
57 reception_type
58 
59 			This field helps MAC SW determine which field in this
60 			(and following TLVs) will contain valid information. For
61 			example some RSSI info not valid in case of uplink_ofdma..
62 
63 			<enum 0 reception_is_uplink_ofdma>
64 
65 			<enum 1 reception_is_uplink_mimo>
66 
67 			<enum 2 reception_is_other>
68 
69 			<enum 3 reception_is_frameless> PHY RX has been
70 			instructed in advance that the upcoming reception is
71 			frameless. This implieas that in advance it is known that
72 			all frames will collide in the medium, and nothing can be
73 			properly decoded... This can happen during the CTS reception
74 			in response to the triggered MU-RTS transmission.
75 
76 			MAC takes no action when seeing this e_num. For the
77 			frameless reception the indication in pkt_end is the final
78 			one evaluated by the MAC
79 
80 			<legal 0-3>
81 
82 reserved_0
83 
84 			<legal 0>
85 
86 rx_chain_mask
87 
88 			The chain mask at the start of the reception of this
89 			frame.
90 
91 
92 
93 			each bit is one antenna
94 
95 			0: the chain is NOT used
96 
97 			1: the chain is used
98 
99 
100 
101 			Supports up to 8 chains
102 
103 
104 
105 			Used in 11ax TPC calculations for UL OFDMA/MIMO and has
106 			to be in sync with the rssi_comb value as this is also used
107 			by the MAC for the TPC calculations.
108 
109 			<legal all>
110 
111 phy_ppdu_id
112 
113 			A ppdu counter value that PHY increments for every PPDU
114 			received. The counter value wraps around
115 
116 			<legal all>
117 
118 sw_phy_meta_data
119 
120 			32 bit Meta data that SW can program in a 32 bit PHY
121 			register and PHY will insert the value in every
122 			RX_RSSI_LEGACY TLV that it generates.
123 
124 			SW uses this field to embed among other things some SW
125 			channel info.
126 
127 ppdu_start_timestamp
128 
129 			Timestamp that indicates when the PPDU that contained
130 			this MPDU started on the medium.
131 
132 
133 
134 			Note that PHY will detect the start later, and will have
135 			to derive out of the preamble info when the frame actually
136 			appeared on the medium
137 
138 			<legal 0- 10>
139 
140 struct receive_rssi_info pre_rssi_info_details
141 
142 			This field is not valid when reception_is_uplink_ofdma
143 
144 
145 
146 			Overview of the pre-RSSI values. That is RSSI values
147 			measured on the medium before this reception started.
148 
149 struct receive_rssi_info preamble_rssi_info_details
150 
151 			This field is not valid when reception_is_uplink_ofdma
152 
153 
154 
155 			Overview of the RSSI values measured during the
156 			pre-amble phase of this reception
157 
158 pre_rssi_comb
159 
160 			Combined pre_rssi of all chains. Based on primary
161 			channel RSSI.
162 
163 			<legal all>
164 
165 rssi_comb
166 
167 			Combined rssi of all chains. Based on primary channel
168 			RSSI.
169 
170 			<legal all>
171 
172 receive_bandwidth
173 
174 			Full receive Bandwidth
175 
176 
177 
178 			<enum 0     full_rx_bw_20_mhz>
179 
180 			<enum 1      full_rx_bw_40_mhz>
181 
182 			<enum 2      full_rx_bw_80_mhz>
183 
184 			<enum 3      full_rx_bw_160_mhz>
185 
186 
187 
188 			<legal 0-3>
189 
190 reserved
191 
192 			<legal 0>
193 */
194 
195 
196 /* Description		PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE
197 
198 			This field helps MAC SW determine which field in this
199 			(and following TLVs) will contain valid information. For
200 			example some RSSI info not valid in case of uplink_ofdma..
201 
202 			<enum 0 reception_is_uplink_ofdma>
203 
204 			<enum 1 reception_is_uplink_mimo>
205 
206 			<enum 2 reception_is_other>
207 
208 			<enum 3 reception_is_frameless> PHY RX has been
209 			instructed in advance that the upcoming reception is
210 			frameless. This implieas that in advance it is known that
211 			all frames will collide in the medium, and nothing can be
212 			properly decoded... This can happen during the CTS reception
213 			in response to the triggered MU-RTS transmission.
214 
215 			MAC takes no action when seeing this e_num. For the
216 			frameless reception the indication in pkt_end is the final
217 			one evaluated by the MAC
218 
219 			<legal 0-3>
220 */
221 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET                    0x00000000
222 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB                       0
223 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK                      0x0000000f
224 
225 /* Description		PHYRX_RSSI_LEGACY_0_RESERVED_0
226 
227 			<legal 0>
228 */
229 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET                        0x00000000
230 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB                           4
231 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK                          0x000000f0
232 
233 /* Description		PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK
234 
235 			The chain mask at the start of the reception of this
236 			frame.
237 
238 
239 
240 			each bit is one antenna
241 
242 			0: the chain is NOT used
243 
244 			1: the chain is used
245 
246 
247 
248 			Supports up to 8 chains
249 
250 
251 
252 			Used in 11ax TPC calculations for UL OFDMA/MIMO and has
253 			to be in sync with the rssi_comb value as this is also used
254 			by the MAC for the TPC calculations.
255 
256 			<legal all>
257 */
258 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET                     0x00000000
259 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB                        8
260 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK                       0x0000ff00
261 
262 /* Description		PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID
263 
264 			A ppdu counter value that PHY increments for every PPDU
265 			received. The counter value wraps around
266 
267 			<legal all>
268 */
269 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET                       0x00000000
270 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB                          16
271 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK                         0xffff0000
272 
273 /* Description		PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA
274 
275 			32 bit Meta data that SW can program in a 32 bit PHY
276 			register and PHY will insert the value in every
277 			RX_RSSI_LEGACY TLV that it generates.
278 
279 			SW uses this field to embed among other things some SW
280 			channel info.
281 */
282 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET                  0x00000004
283 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB                     0
284 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK                    0xffffffff
285 
286 /* Description		PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP
287 
288 			Timestamp that indicates when the PPDU that contained
289 			this MPDU started on the medium.
290 
291 
292 
293 			Note that PHY will detect the start later, and will have
294 			to derive out of the preamble info when the frame actually
295 			appeared on the medium
296 
297 			<legal 0- 10>
298 */
299 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET              0x00000008
300 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB                 0
301 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK                0xffffffff
302 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000000c
303 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
304 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
305 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000010
306 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
307 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
308 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000014
309 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
310 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
311 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000018
312 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
313 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
314 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000001c
315 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
316 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
317 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000020
318 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
319 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
320 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000024
321 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
322 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
323 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000028
324 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
325 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
326 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000002c
327 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
328 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
329 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000030
330 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
331 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
332 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000034
333 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
334 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
335 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000038
336 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
337 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
338 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000003c
339 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
340 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
341 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000040
342 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
343 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
344 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000044
345 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
346 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
347 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000048
348 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
349 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
350 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000004c
351 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
352 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
353 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000050
354 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
355 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
356 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000054
357 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
358 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
359 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000058
360 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
361 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
362 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000005c
363 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
364 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
365 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000060
366 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
367 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
368 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000064
369 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
370 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
371 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000068
372 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
373 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
374 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000006c
375 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
376 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
377 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000070
378 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
379 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
380 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000074
381 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
382 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
383 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000078
384 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
385 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
386 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000007c
387 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
388 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
389 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000080
390 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
391 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
392 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000084
393 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
394 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
395 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000088
396 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
397 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
398 
399 /* Description		PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB
400 
401 			Combined pre_rssi of all chains. Based on primary
402 			channel RSSI.
403 
404 			<legal all>
405 */
406 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET                    0x0000008c
407 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB                       0
408 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK                      0x000000ff
409 
410 /* Description		PHYRX_RSSI_LEGACY_35_RSSI_COMB
411 
412 			Combined rssi of all chains. Based on primary channel
413 			RSSI.
414 
415 			<legal all>
416 */
417 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET                        0x0000008c
418 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB                           8
419 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK                          0x0000ff00
420 
421 /* Description		PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH
422 
423 			Full receive Bandwidth
424 
425 
426 
427 			<enum 0     full_rx_bw_20_mhz>
428 
429 			<enum 1      full_rx_bw_40_mhz>
430 
431 			<enum 2      full_rx_bw_80_mhz>
432 
433 			<enum 3      full_rx_bw_160_mhz>
434 
435 
436 
437 			<legal 0-3>
438 */
439 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_OFFSET                0x0000008c
440 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_LSB                   16
441 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_MASK                  0x00030000
442 
443 /* Description		PHYRX_RSSI_LEGACY_35_RESERVED
444 
445 			<legal 0>
446 */
447 #define PHYRX_RSSI_LEGACY_35_RESERVED_OFFSET                         0x0000008c
448 #define PHYRX_RSSI_LEGACY_35_RESERVED_LSB                            18
449 #define PHYRX_RSSI_LEGACY_35_RESERVED_MASK                           0xfffc0000
450 
451 
452 #endif // _PHYRX_RSSI_LEGACY_H_
453