xref: /wlan-driver/fw-api/hw/qca6290/v2/reo_flush_cache_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _REO_FLUSH_CACHE_STATUS_H_
25 #define _REO_FLUSH_CACHE_STATUS_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "uniform_reo_status_header.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0-1	struct uniform_reo_status_header status_header;
35 //	2	error_detected[0], block_error_details[2:1], reserved_2a[7:3], cache_controller_flush_status_hit[8], cache_controller_flush_status_desc_type[11:9], cache_controller_flush_status_client_id[15:12], cache_controller_flush_status_error[17:16], cache_controller_flush_count[25:18], reserved_2b[31:26]
36 //	3	reserved_3a[31:0]
37 //	4	reserved_4a[31:0]
38 //	5	reserved_5a[31:0]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[31:0]
41 //	8	reserved_8a[31:0]
42 //	9	reserved_9a[31:0]
43 //	10	reserved_10a[31:0]
44 //	11	reserved_11a[31:0]
45 //	12	reserved_12a[31:0]
46 //	13	reserved_13a[31:0]
47 //	14	reserved_14a[31:0]
48 //	15	reserved_15a[31:0]
49 //	16	reserved_16a[31:0]
50 //	17	reserved_17a[31:0]
51 //	18	reserved_18a[31:0]
52 //	19	reserved_19a[31:0]
53 //	20	reserved_20a[31:0]
54 //	21	reserved_21a[31:0]
55 //	22	reserved_22a[31:0]
56 //	23	reserved_23a[31:0]
57 //	24	reserved_24a[27:0], looping_count[31:28]
58 //
59 // ################ END SUMMARY #################
60 
61 #define NUM_OF_DWORDS_REO_FLUSH_CACHE_STATUS 25
62 
63 struct reo_flush_cache_status {
64     struct            uniform_reo_status_header                       status_header;
65              uint32_t error_detected                  :  1, //[0]
66                       block_error_details             :  2, //[2:1]
67                       reserved_2a                     :  5, //[7:3]
68                       cache_controller_flush_status_hit:  1, //[8]
69                       cache_controller_flush_status_desc_type:  3, //[11:9]
70                       cache_controller_flush_status_client_id:  4, //[15:12]
71                       cache_controller_flush_status_error:  2, //[17:16]
72                       cache_controller_flush_count    :  8, //[25:18]
73                       reserved_2b                     :  6; //[31:26]
74              uint32_t reserved_3a                     : 32; //[31:0]
75              uint32_t reserved_4a                     : 32; //[31:0]
76              uint32_t reserved_5a                     : 32; //[31:0]
77              uint32_t reserved_6a                     : 32; //[31:0]
78              uint32_t reserved_7a                     : 32; //[31:0]
79              uint32_t reserved_8a                     : 32; //[31:0]
80              uint32_t reserved_9a                     : 32; //[31:0]
81              uint32_t reserved_10a                    : 32; //[31:0]
82              uint32_t reserved_11a                    : 32; //[31:0]
83              uint32_t reserved_12a                    : 32; //[31:0]
84              uint32_t reserved_13a                    : 32; //[31:0]
85              uint32_t reserved_14a                    : 32; //[31:0]
86              uint32_t reserved_15a                    : 32; //[31:0]
87              uint32_t reserved_16a                    : 32; //[31:0]
88              uint32_t reserved_17a                    : 32; //[31:0]
89              uint32_t reserved_18a                    : 32; //[31:0]
90              uint32_t reserved_19a                    : 32; //[31:0]
91              uint32_t reserved_20a                    : 32; //[31:0]
92              uint32_t reserved_21a                    : 32; //[31:0]
93              uint32_t reserved_22a                    : 32; //[31:0]
94              uint32_t reserved_23a                    : 32; //[31:0]
95              uint32_t reserved_24a                    : 28, //[27:0]
96                       looping_count                   :  4; //[31:28]
97 };
98 
99 /*
100 
101 struct uniform_reo_status_header status_header
102 
103 			Consumer: SW
104 
105 			Producer: REO
106 
107 
108 
109 			Details that can link this status with the original
110 			command. It also contains info on how long REO took to
111 			execute this command.
112 
113 error_detected
114 
115 			Status for blocking resource handling
116 
117 
118 
119 			0: No error has been detected while executing this
120 			command
121 
122 			1: an error in the blocking resource management was
123 			detected
124 
125 			See field 'Block_error_details'
126 
127 block_error_details
128 
129 			Field only valid when 'Error_detected' is set.
130 
131 			0: no blocking related error found
132 
133 			1: blocking resource was already in use
134 
135 			2: resource that was asked to be unblocked, was not
136 			blocked
137 
138 			<legal 0-2>
139 
140 reserved_2a
141 
142 			<legal 0>
143 
144 cache_controller_flush_status_hit
145 
146 			The status that the cache controller returned for
147 			executing the flush command
148 
149 
150 
151 			descriptor hit
152 
153 			1 = hit
154 
155 			0 = miss
156 
157 			<legal all>
158 
159 cache_controller_flush_status_desc_type
160 
161 			The status that the cache controller returned for
162 			executing the flush command
163 
164 			Descriptor type
165 
166 			FLOW_QUEUE_DESCRIPTOR                
167 			3'd0
168 
169 
170 			 <legal all>
171 
172 cache_controller_flush_status_client_id
173 
174 			The status that the cache controller returned for
175 			executing the flush command
176 
177 
178 
179 			client ID
180 
181 			Module who made flush the request
182 
183 
184 
185 			In REO, this is always set to 0
186 
187 			<legal 0>
188 
189 cache_controller_flush_status_error
190 
191 			The status that the cache controller returned for
192 			executing the flush command
193 
194 
195 
196 			Error condition
197 
198 			2'b00: No error found
199 
200 			2'b01: HW IF still busy
201 
202 			2'b10: Line is currently locked. Used for the one line
203 			flush command.
204 
205 			2'b11: At least one line is currently still locked. Used
206 			for the cache flush command.
207 
208 
209 
210 			<legal all>
211 
212 cache_controller_flush_count
213 
214 			The number of lines that were actually flushed out.
215 
216 			<legal all>
217 
218 reserved_2b
219 
220 			<legal 0>
221 
222 reserved_3a
223 
224 			<legal 0>
225 
226 reserved_4a
227 
228 			<legal 0>
229 
230 reserved_5a
231 
232 			<legal 0>
233 
234 reserved_6a
235 
236 			<legal 0>
237 
238 reserved_7a
239 
240 			<legal 0>
241 
242 reserved_8a
243 
244 			<legal 0>
245 
246 reserved_9a
247 
248 			<legal 0>
249 
250 reserved_10a
251 
252 			<legal 0>
253 
254 reserved_11a
255 
256 			<legal 0>
257 
258 reserved_12a
259 
260 			<legal 0>
261 
262 reserved_13a
263 
264 			<legal 0>
265 
266 reserved_14a
267 
268 			<legal 0>
269 
270 reserved_15a
271 
272 			<legal 0>
273 
274 reserved_16a
275 
276 			<legal 0>
277 
278 reserved_17a
279 
280 			<legal 0>
281 
282 reserved_18a
283 
284 			<legal 0>
285 
286 reserved_19a
287 
288 			<legal 0>
289 
290 reserved_20a
291 
292 			<legal 0>
293 
294 reserved_21a
295 
296 			<legal 0>
297 
298 reserved_22a
299 
300 			<legal 0>
301 
302 reserved_23a
303 
304 			<legal 0>
305 
306 reserved_24a
307 
308 			<legal 0>
309 
310 looping_count
311 
312 			A count value that indicates the number of times the
313 			producer of entries into this Ring has looped around the
314 			ring.
315 
316 			At initialization time, this value is set to 0. On the
317 			first loop, this value is set to 1. After the max value is
318 			reached allowed by the number of bits for this field, the
319 			count value continues with 0 again.
320 
321 
322 
323 			In case SW is the consumer of the ring entries, it can
324 			use this field to figure out up to where the producer of
325 			entries has created new entries. This eliminates the need to
326 			check where the head pointer' of the ring is located once
327 			the SW starts processing an interrupt indicating that new
328 			entries have been put into this ring...
329 
330 
331 
332 			Also note that SW if it wants only needs to look at the
333 			LSB bit of this count value.
334 
335 			<legal all>
336 */
337 
338 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000
339 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
340 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
341 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004
342 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
343 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
344 
345 /* Description		REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED
346 
347 			Status for blocking resource handling
348 
349 
350 
351 			0: No error has been detected while executing this
352 			command
353 
354 			1: an error in the blocking resource management was
355 			detected
356 
357 			See field 'Block_error_details'
358 */
359 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_OFFSET               0x00000008
360 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_LSB                  0
361 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_MASK                 0x00000001
362 
363 /* Description		REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS
364 
365 			Field only valid when 'Error_detected' is set.
366 
367 			0: no blocking related error found
368 
369 			1: blocking resource was already in use
370 
371 			2: resource that was asked to be unblocked, was not
372 			blocked
373 
374 			<legal 0-2>
375 */
376 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_OFFSET          0x00000008
377 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_LSB             1
378 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_MASK            0x00000006
379 
380 /* Description		REO_FLUSH_CACHE_STATUS_2_RESERVED_2A
381 
382 			<legal 0>
383 */
384 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_OFFSET                  0x00000008
385 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_LSB                     3
386 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_MASK                    0x000000f8
387 
388 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT
389 
390 			The status that the cache controller returned for
391 			executing the flush command
392 
393 
394 
395 			descriptor hit
396 
397 			1 = hit
398 
399 			0 = miss
400 
401 			<legal all>
402 */
403 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_OFFSET 0x00000008
404 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_LSB 8
405 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_MASK 0x00000100
406 
407 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE
408 
409 			The status that the cache controller returned for
410 			executing the flush command
411 
412 			Descriptor type
413 
414 			FLOW_QUEUE_DESCRIPTOR                
415 			3'd0
416 
417 
418 			 <legal all>
419 */
420 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_OFFSET 0x00000008
421 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_LSB 9
422 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_MASK 0x00000e00
423 
424 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID
425 
426 			The status that the cache controller returned for
427 			executing the flush command
428 
429 
430 
431 			client ID
432 
433 			Module who made flush the request
434 
435 
436 
437 			In REO, this is always set to 0
438 
439 			<legal 0>
440 */
441 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_OFFSET 0x00000008
442 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_LSB 12
443 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_MASK 0x0000f000
444 
445 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR
446 
447 			The status that the cache controller returned for
448 			executing the flush command
449 
450 
451 
452 			Error condition
453 
454 			2'b00: No error found
455 
456 			2'b01: HW IF still busy
457 
458 			2'b10: Line is currently locked. Used for the one line
459 			flush command.
460 
461 			2'b11: At least one line is currently still locked. Used
462 			for the cache flush command.
463 
464 
465 
466 			<legal all>
467 */
468 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_OFFSET 0x00000008
469 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_LSB 16
470 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_MASK 0x00030000
471 
472 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT
473 
474 			The number of lines that were actually flushed out.
475 
476 			<legal all>
477 */
478 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_OFFSET 0x00000008
479 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_LSB    18
480 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_MASK   0x03fc0000
481 
482 /* Description		REO_FLUSH_CACHE_STATUS_2_RESERVED_2B
483 
484 			<legal 0>
485 */
486 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_OFFSET                  0x00000008
487 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_LSB                     26
488 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_MASK                    0xfc000000
489 
490 /* Description		REO_FLUSH_CACHE_STATUS_3_RESERVED_3A
491 
492 			<legal 0>
493 */
494 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_OFFSET                  0x0000000c
495 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_LSB                     0
496 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_MASK                    0xffffffff
497 
498 /* Description		REO_FLUSH_CACHE_STATUS_4_RESERVED_4A
499 
500 			<legal 0>
501 */
502 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_OFFSET                  0x00000010
503 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_LSB                     0
504 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_MASK                    0xffffffff
505 
506 /* Description		REO_FLUSH_CACHE_STATUS_5_RESERVED_5A
507 
508 			<legal 0>
509 */
510 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_OFFSET                  0x00000014
511 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_LSB                     0
512 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_MASK                    0xffffffff
513 
514 /* Description		REO_FLUSH_CACHE_STATUS_6_RESERVED_6A
515 
516 			<legal 0>
517 */
518 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_OFFSET                  0x00000018
519 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_LSB                     0
520 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_MASK                    0xffffffff
521 
522 /* Description		REO_FLUSH_CACHE_STATUS_7_RESERVED_7A
523 
524 			<legal 0>
525 */
526 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_OFFSET                  0x0000001c
527 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_LSB                     0
528 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_MASK                    0xffffffff
529 
530 /* Description		REO_FLUSH_CACHE_STATUS_8_RESERVED_8A
531 
532 			<legal 0>
533 */
534 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_OFFSET                  0x00000020
535 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_LSB                     0
536 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_MASK                    0xffffffff
537 
538 /* Description		REO_FLUSH_CACHE_STATUS_9_RESERVED_9A
539 
540 			<legal 0>
541 */
542 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_OFFSET                  0x00000024
543 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_LSB                     0
544 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_MASK                    0xffffffff
545 
546 /* Description		REO_FLUSH_CACHE_STATUS_10_RESERVED_10A
547 
548 			<legal 0>
549 */
550 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_OFFSET                0x00000028
551 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_LSB                   0
552 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_MASK                  0xffffffff
553 
554 /* Description		REO_FLUSH_CACHE_STATUS_11_RESERVED_11A
555 
556 			<legal 0>
557 */
558 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_OFFSET                0x0000002c
559 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_LSB                   0
560 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_MASK                  0xffffffff
561 
562 /* Description		REO_FLUSH_CACHE_STATUS_12_RESERVED_12A
563 
564 			<legal 0>
565 */
566 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_OFFSET                0x00000030
567 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_LSB                   0
568 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_MASK                  0xffffffff
569 
570 /* Description		REO_FLUSH_CACHE_STATUS_13_RESERVED_13A
571 
572 			<legal 0>
573 */
574 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_OFFSET                0x00000034
575 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_LSB                   0
576 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_MASK                  0xffffffff
577 
578 /* Description		REO_FLUSH_CACHE_STATUS_14_RESERVED_14A
579 
580 			<legal 0>
581 */
582 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_OFFSET                0x00000038
583 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_LSB                   0
584 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_MASK                  0xffffffff
585 
586 /* Description		REO_FLUSH_CACHE_STATUS_15_RESERVED_15A
587 
588 			<legal 0>
589 */
590 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_OFFSET                0x0000003c
591 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_LSB                   0
592 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_MASK                  0xffffffff
593 
594 /* Description		REO_FLUSH_CACHE_STATUS_16_RESERVED_16A
595 
596 			<legal 0>
597 */
598 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_OFFSET                0x00000040
599 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_LSB                   0
600 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_MASK                  0xffffffff
601 
602 /* Description		REO_FLUSH_CACHE_STATUS_17_RESERVED_17A
603 
604 			<legal 0>
605 */
606 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_OFFSET                0x00000044
607 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_LSB                   0
608 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_MASK                  0xffffffff
609 
610 /* Description		REO_FLUSH_CACHE_STATUS_18_RESERVED_18A
611 
612 			<legal 0>
613 */
614 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_OFFSET                0x00000048
615 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_LSB                   0
616 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_MASK                  0xffffffff
617 
618 /* Description		REO_FLUSH_CACHE_STATUS_19_RESERVED_19A
619 
620 			<legal 0>
621 */
622 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_OFFSET                0x0000004c
623 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_LSB                   0
624 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_MASK                  0xffffffff
625 
626 /* Description		REO_FLUSH_CACHE_STATUS_20_RESERVED_20A
627 
628 			<legal 0>
629 */
630 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_OFFSET                0x00000050
631 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_LSB                   0
632 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_MASK                  0xffffffff
633 
634 /* Description		REO_FLUSH_CACHE_STATUS_21_RESERVED_21A
635 
636 			<legal 0>
637 */
638 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_OFFSET                0x00000054
639 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_LSB                   0
640 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_MASK                  0xffffffff
641 
642 /* Description		REO_FLUSH_CACHE_STATUS_22_RESERVED_22A
643 
644 			<legal 0>
645 */
646 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_OFFSET                0x00000058
647 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_LSB                   0
648 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_MASK                  0xffffffff
649 
650 /* Description		REO_FLUSH_CACHE_STATUS_23_RESERVED_23A
651 
652 			<legal 0>
653 */
654 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_OFFSET                0x0000005c
655 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_LSB                   0
656 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_MASK                  0xffffffff
657 
658 /* Description		REO_FLUSH_CACHE_STATUS_24_RESERVED_24A
659 
660 			<legal 0>
661 */
662 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_OFFSET                0x00000060
663 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_LSB                   0
664 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_MASK                  0x0fffffff
665 
666 /* Description		REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT
667 
668 			A count value that indicates the number of times the
669 			producer of entries into this Ring has looped around the
670 			ring.
671 
672 			At initialization time, this value is set to 0. On the
673 			first loop, this value is set to 1. After the max value is
674 			reached allowed by the number of bits for this field, the
675 			count value continues with 0 again.
676 
677 
678 
679 			In case SW is the consumer of the ring entries, it can
680 			use this field to figure out up to where the producer of
681 			entries has created new entries. This eliminates the need to
682 			check where the head pointer' of the ring is located once
683 			the SW starts processing an interrupt indicating that new
684 			entries have been put into this ring...
685 
686 
687 
688 			Also note that SW if it wants only needs to look at the
689 			LSB bit of this count value.
690 
691 			<legal all>
692 */
693 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_OFFSET               0x00000060
694 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_LSB                  28
695 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_MASK                 0xf0000000
696 
697 
698 #endif // _REO_FLUSH_CACHE_STATUS_H_
699