xref: /wlan-driver/fw-api/hw/qca6290/v2/reo_flush_queue_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _REO_FLUSH_QUEUE_STATUS_H_
25 #define _REO_FLUSH_QUEUE_STATUS_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "uniform_reo_status_header.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0-1	struct uniform_reo_status_header status_header;
35 //	2	error_detected[0], reserved_2a[31:1]
36 //	3	reserved_3a[31:0]
37 //	4	reserved_4a[31:0]
38 //	5	reserved_5a[31:0]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[31:0]
41 //	8	reserved_8a[31:0]
42 //	9	reserved_9a[31:0]
43 //	10	reserved_10a[31:0]
44 //	11	reserved_11a[31:0]
45 //	12	reserved_12a[31:0]
46 //	13	reserved_13a[31:0]
47 //	14	reserved_14a[31:0]
48 //	15	reserved_15a[31:0]
49 //	16	reserved_16a[31:0]
50 //	17	reserved_17a[31:0]
51 //	18	reserved_18a[31:0]
52 //	19	reserved_19a[31:0]
53 //	20	reserved_20a[31:0]
54 //	21	reserved_21a[31:0]
55 //	22	reserved_22a[31:0]
56 //	23	reserved_23a[31:0]
57 //	24	reserved_24a[27:0], looping_count[31:28]
58 //
59 // ################ END SUMMARY #################
60 
61 #define NUM_OF_DWORDS_REO_FLUSH_QUEUE_STATUS 25
62 
63 struct reo_flush_queue_status {
64     struct            uniform_reo_status_header                       status_header;
65              uint32_t error_detected                  :  1, //[0]
66                       reserved_2a                     : 31; //[31:1]
67              uint32_t reserved_3a                     : 32; //[31:0]
68              uint32_t reserved_4a                     : 32; //[31:0]
69              uint32_t reserved_5a                     : 32; //[31:0]
70              uint32_t reserved_6a                     : 32; //[31:0]
71              uint32_t reserved_7a                     : 32; //[31:0]
72              uint32_t reserved_8a                     : 32; //[31:0]
73              uint32_t reserved_9a                     : 32; //[31:0]
74              uint32_t reserved_10a                    : 32; //[31:0]
75              uint32_t reserved_11a                    : 32; //[31:0]
76              uint32_t reserved_12a                    : 32; //[31:0]
77              uint32_t reserved_13a                    : 32; //[31:0]
78              uint32_t reserved_14a                    : 32; //[31:0]
79              uint32_t reserved_15a                    : 32; //[31:0]
80              uint32_t reserved_16a                    : 32; //[31:0]
81              uint32_t reserved_17a                    : 32; //[31:0]
82              uint32_t reserved_18a                    : 32; //[31:0]
83              uint32_t reserved_19a                    : 32; //[31:0]
84              uint32_t reserved_20a                    : 32; //[31:0]
85              uint32_t reserved_21a                    : 32; //[31:0]
86              uint32_t reserved_22a                    : 32; //[31:0]
87              uint32_t reserved_23a                    : 32; //[31:0]
88              uint32_t reserved_24a                    : 28, //[27:0]
89                       looping_count                   :  4; //[31:28]
90 };
91 
92 /*
93 
94 struct uniform_reo_status_header status_header
95 
96 			Consumer: SW
97 
98 			Producer: REO
99 
100 
101 
102 			Details that can link this status with the original
103 			command. It also contains info on how long REO took to
104 			execute this command.
105 
106 error_detected
107 
108 			Status of the blocking resource
109 
110 			0: No error has been detected while executing this
111 			command
112 
113 			1: Error detected: The resource to be used for blocking
114 			was already in use.
115 
116 reserved_2a
117 
118 			<legal 0>
119 
120 reserved_3a
121 
122 			<legal 0>
123 
124 reserved_4a
125 
126 			<legal 0>
127 
128 reserved_5a
129 
130 			<legal 0>
131 
132 reserved_6a
133 
134 			<legal 0>
135 
136 reserved_7a
137 
138 			<legal 0>
139 
140 reserved_8a
141 
142 			<legal 0>
143 
144 reserved_9a
145 
146 			<legal 0>
147 
148 reserved_10a
149 
150 			<legal 0>
151 
152 reserved_11a
153 
154 			<legal 0>
155 
156 reserved_12a
157 
158 			<legal 0>
159 
160 reserved_13a
161 
162 			<legal 0>
163 
164 reserved_14a
165 
166 			<legal 0>
167 
168 reserved_15a
169 
170 			<legal 0>
171 
172 reserved_16a
173 
174 			<legal 0>
175 
176 reserved_17a
177 
178 			<legal 0>
179 
180 reserved_18a
181 
182 			<legal 0>
183 
184 reserved_19a
185 
186 			<legal 0>
187 
188 reserved_20a
189 
190 			<legal 0>
191 
192 reserved_21a
193 
194 			<legal 0>
195 
196 reserved_22a
197 
198 			<legal 0>
199 
200 reserved_23a
201 
202 			<legal 0>
203 
204 reserved_24a
205 
206 			<legal 0>
207 
208 looping_count
209 
210 			A count value that indicates the number of times the
211 			producer of entries into this Ring has looped around the
212 			ring.
213 
214 			At initialization time, this value is set to 0. On the
215 			first loop, this value is set to 1. After the max value is
216 			reached allowed by the number of bits for this field, the
217 			count value continues with 0 again.
218 
219 
220 
221 			In case SW is the consumer of the ring entries, it can
222 			use this field to figure out up to where the producer of
223 			entries has created new entries. This eliminates the need to
224 			check where the head pointer' of the ring is located once
225 			the SW starts processing an interrupt indicating that new
226 			entries have been put into this ring...
227 
228 
229 
230 			Also note that SW if it wants only needs to look at the
231 			LSB bit of this count value.
232 
233 			<legal all>
234 */
235 
236 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000
237 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
238 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
239 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004
240 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
241 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
242 
243 /* Description		REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED
244 
245 			Status of the blocking resource
246 
247 			0: No error has been detected while executing this
248 			command
249 
250 			1: Error detected: The resource to be used for blocking
251 			was already in use.
252 */
253 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_OFFSET               0x00000008
254 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_LSB                  0
255 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_MASK                 0x00000001
256 
257 /* Description		REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A
258 
259 			<legal 0>
260 */
261 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_OFFSET                  0x00000008
262 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_LSB                     1
263 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_MASK                    0xfffffffe
264 
265 /* Description		REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A
266 
267 			<legal 0>
268 */
269 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_OFFSET                  0x0000000c
270 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_LSB                     0
271 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_MASK                    0xffffffff
272 
273 /* Description		REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A
274 
275 			<legal 0>
276 */
277 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_OFFSET                  0x00000010
278 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_LSB                     0
279 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_MASK                    0xffffffff
280 
281 /* Description		REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A
282 
283 			<legal 0>
284 */
285 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_OFFSET                  0x00000014
286 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_LSB                     0
287 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_MASK                    0xffffffff
288 
289 /* Description		REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A
290 
291 			<legal 0>
292 */
293 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_OFFSET                  0x00000018
294 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_LSB                     0
295 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_MASK                    0xffffffff
296 
297 /* Description		REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A
298 
299 			<legal 0>
300 */
301 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_OFFSET                  0x0000001c
302 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_LSB                     0
303 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_MASK                    0xffffffff
304 
305 /* Description		REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A
306 
307 			<legal 0>
308 */
309 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_OFFSET                  0x00000020
310 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_LSB                     0
311 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_MASK                    0xffffffff
312 
313 /* Description		REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A
314 
315 			<legal 0>
316 */
317 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_OFFSET                  0x00000024
318 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_LSB                     0
319 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_MASK                    0xffffffff
320 
321 /* Description		REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A
322 
323 			<legal 0>
324 */
325 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_OFFSET                0x00000028
326 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_LSB                   0
327 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_MASK                  0xffffffff
328 
329 /* Description		REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A
330 
331 			<legal 0>
332 */
333 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_OFFSET                0x0000002c
334 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_LSB                   0
335 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_MASK                  0xffffffff
336 
337 /* Description		REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A
338 
339 			<legal 0>
340 */
341 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_OFFSET                0x00000030
342 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_LSB                   0
343 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_MASK                  0xffffffff
344 
345 /* Description		REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A
346 
347 			<legal 0>
348 */
349 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_OFFSET                0x00000034
350 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_LSB                   0
351 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_MASK                  0xffffffff
352 
353 /* Description		REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A
354 
355 			<legal 0>
356 */
357 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_OFFSET                0x00000038
358 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_LSB                   0
359 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_MASK                  0xffffffff
360 
361 /* Description		REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A
362 
363 			<legal 0>
364 */
365 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_OFFSET                0x0000003c
366 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_LSB                   0
367 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_MASK                  0xffffffff
368 
369 /* Description		REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A
370 
371 			<legal 0>
372 */
373 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_OFFSET                0x00000040
374 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_LSB                   0
375 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_MASK                  0xffffffff
376 
377 /* Description		REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A
378 
379 			<legal 0>
380 */
381 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_OFFSET                0x00000044
382 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_LSB                   0
383 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_MASK                  0xffffffff
384 
385 /* Description		REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A
386 
387 			<legal 0>
388 */
389 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_OFFSET                0x00000048
390 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_LSB                   0
391 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_MASK                  0xffffffff
392 
393 /* Description		REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A
394 
395 			<legal 0>
396 */
397 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_OFFSET                0x0000004c
398 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_LSB                   0
399 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_MASK                  0xffffffff
400 
401 /* Description		REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A
402 
403 			<legal 0>
404 */
405 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_OFFSET                0x00000050
406 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_LSB                   0
407 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_MASK                  0xffffffff
408 
409 /* Description		REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A
410 
411 			<legal 0>
412 */
413 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_OFFSET                0x00000054
414 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_LSB                   0
415 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_MASK                  0xffffffff
416 
417 /* Description		REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A
418 
419 			<legal 0>
420 */
421 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_OFFSET                0x00000058
422 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_LSB                   0
423 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_MASK                  0xffffffff
424 
425 /* Description		REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A
426 
427 			<legal 0>
428 */
429 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_OFFSET                0x0000005c
430 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_LSB                   0
431 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_MASK                  0xffffffff
432 
433 /* Description		REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A
434 
435 			<legal 0>
436 */
437 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_OFFSET                0x00000060
438 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_LSB                   0
439 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_MASK                  0x0fffffff
440 
441 /* Description		REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT
442 
443 			A count value that indicates the number of times the
444 			producer of entries into this Ring has looped around the
445 			ring.
446 
447 			At initialization time, this value is set to 0. On the
448 			first loop, this value is set to 1. After the max value is
449 			reached allowed by the number of bits for this field, the
450 			count value continues with 0 again.
451 
452 
453 
454 			In case SW is the consumer of the ring entries, it can
455 			use this field to figure out up to where the producer of
456 			entries has created new entries. This eliminates the need to
457 			check where the head pointer' of the ring is located once
458 			the SW starts processing an interrupt indicating that new
459 			entries have been put into this ring...
460 
461 
462 
463 			Also note that SW if it wants only needs to look at the
464 			LSB bit of this count value.
465 
466 			<legal all>
467 */
468 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET               0x00000060
469 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_LSB                  28
470 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_MASK                 0xf0000000
471 
472 
473 #endif // _REO_FLUSH_QUEUE_STATUS_H_
474