1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _REO_GET_QUEUE_STATS_H_ 25 #define _REO_GET_QUEUE_STATS_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "uniform_reo_cmd_header.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 struct uniform_reo_cmd_header cmd_header; 35 // 1 rx_reo_queue_desc_addr_31_0[31:0] 36 // 2 rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9] 37 // 3 reserved_3a[31:0] 38 // 4 reserved_4a[31:0] 39 // 5 reserved_5a[31:0] 40 // 6 reserved_6a[31:0] 41 // 7 reserved_7a[31:0] 42 // 8 reserved_8a[31:0] 43 // 44 // ################ END SUMMARY ################# 45 46 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9 47 48 struct reo_get_queue_stats { 49 struct uniform_reo_cmd_header cmd_header; 50 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 51 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 52 clear_stats : 1, //[8] 53 reserved_2a : 23; //[31:9] 54 uint32_t reserved_3a : 32; //[31:0] 55 uint32_t reserved_4a : 32; //[31:0] 56 uint32_t reserved_5a : 32; //[31:0] 57 uint32_t reserved_6a : 32; //[31:0] 58 uint32_t reserved_7a : 32; //[31:0] 59 uint32_t reserved_8a : 32; //[31:0] 60 }; 61 62 /* 63 64 struct uniform_reo_cmd_header cmd_header 65 66 Consumer: REO 67 68 Producer: SW 69 70 71 72 Details for command execution tracking purposes. 73 74 rx_reo_queue_desc_addr_31_0 75 76 Consumer: REO 77 78 Producer: SW 79 80 81 82 Address (lower 32 bits) of the REO queue descriptor 83 84 <legal all> 85 86 rx_reo_queue_desc_addr_39_32 87 88 Consumer: REO 89 90 Producer: SW 91 92 93 94 Address (upper 8 bits) of the REO queue descriptor 95 96 <legal all> 97 98 clear_stats 99 100 Clear stat settings.... 101 102 103 104 <enum 0 no_clear> Do NOT clear the stats after 105 generating the status 106 107 <enum 1 clear_the_stats> Clear the stats after 108 generating the status. 109 110 111 112 The stats actually cleared are: 113 114 Timeout_count 115 116 Forward_due_to_bar_count 117 118 Duplicate_count 119 120 Frames_in_order_count 121 122 BAR_received_count 123 124 MPDU_Frames_processed_count 125 126 MSDU_Frames_processed_count 127 128 Total_processed_byte_count 129 130 Late_receive_MPDU_count 131 132 window_jump_2k 133 134 Hole_count 135 136 <legal 0-1> 137 138 reserved_2a 139 140 <legal 0> 141 142 reserved_3a 143 144 <legal 0> 145 146 reserved_4a 147 148 <legal 0> 149 150 reserved_5a 151 152 <legal 0> 153 154 reserved_6a 155 156 <legal 0> 157 158 reserved_7a 159 160 <legal 0> 161 162 reserved_8a 163 164 <legal 0> 165 */ 166 167 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000 168 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0 169 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff 170 171 /* Description REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0 172 173 Consumer: REO 174 175 Producer: SW 176 177 178 179 Address (lower 32 bits) of the REO queue descriptor 180 181 <legal all> 182 */ 183 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 184 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 185 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 186 187 /* Description REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32 188 189 Consumer: REO 190 191 Producer: SW 192 193 194 195 Address (upper 8 bits) of the REO queue descriptor 196 197 <legal all> 198 */ 199 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 200 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 201 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 202 203 /* Description REO_GET_QUEUE_STATS_2_CLEAR_STATS 204 205 Clear stat settings.... 206 207 208 209 <enum 0 no_clear> Do NOT clear the stats after 210 generating the status 211 212 <enum 1 clear_the_stats> Clear the stats after 213 generating the status. 214 215 216 217 The stats actually cleared are: 218 219 Timeout_count 220 221 Forward_due_to_bar_count 222 223 Duplicate_count 224 225 Frames_in_order_count 226 227 BAR_received_count 228 229 MPDU_Frames_processed_count 230 231 MSDU_Frames_processed_count 232 233 Total_processed_byte_count 234 235 Late_receive_MPDU_count 236 237 window_jump_2k 238 239 Hole_count 240 241 <legal 0-1> 242 */ 243 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET 0x00000008 244 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB 8 245 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK 0x00000100 246 247 /* Description REO_GET_QUEUE_STATS_2_RESERVED_2A 248 249 <legal 0> 250 */ 251 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET 0x00000008 252 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB 9 253 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK 0xfffffe00 254 255 /* Description REO_GET_QUEUE_STATS_3_RESERVED_3A 256 257 <legal 0> 258 */ 259 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET 0x0000000c 260 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB 0 261 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK 0xffffffff 262 263 /* Description REO_GET_QUEUE_STATS_4_RESERVED_4A 264 265 <legal 0> 266 */ 267 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET 0x00000010 268 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB 0 269 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK 0xffffffff 270 271 /* Description REO_GET_QUEUE_STATS_5_RESERVED_5A 272 273 <legal 0> 274 */ 275 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET 0x00000014 276 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB 0 277 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK 0xffffffff 278 279 /* Description REO_GET_QUEUE_STATS_6_RESERVED_6A 280 281 <legal 0> 282 */ 283 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET 0x00000018 284 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB 0 285 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK 0xffffffff 286 287 /* Description REO_GET_QUEUE_STATS_7_RESERVED_7A 288 289 <legal 0> 290 */ 291 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET 0x0000001c 292 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB 0 293 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK 0xffffffff 294 295 /* Description REO_GET_QUEUE_STATS_8_RESERVED_8A 296 297 <legal 0> 298 */ 299 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET 0x00000020 300 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB 0 301 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK 0xffffffff 302 303 304 #endif // _REO_GET_QUEUE_STATS_H_ 305