1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_MSDU_DESC_INFO_H_ 25 #define _RX_MSDU_DESC_INFO_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 first_msdu_in_mpdu_flag[0], last_msdu_in_mpdu_flag[1], msdu_continuation[2], msdu_length[16:3], reo_destination_indication[21:17], msdu_drop[22], sa_is_valid[23], sa_idx_timeout[24], da_is_valid[25], da_is_mcbc[26], da_idx_timeout[27], reserved_0a[31:28] 34 // 1 reserved_1a[31:0] 35 // 36 // ################ END SUMMARY ################# 37 38 #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 2 39 40 struct rx_msdu_desc_info { 41 uint32_t first_msdu_in_mpdu_flag : 1, //[0] 42 last_msdu_in_mpdu_flag : 1, //[1] 43 msdu_continuation : 1, //[2] 44 msdu_length : 14, //[16:3] 45 reo_destination_indication : 5, //[21:17] 46 msdu_drop : 1, //[22] 47 sa_is_valid : 1, //[23] 48 sa_idx_timeout : 1, //[24] 49 da_is_valid : 1, //[25] 50 da_is_mcbc : 1, //[26] 51 da_idx_timeout : 1, //[27] 52 reserved_0a : 4; //[31:28] 53 uint32_t reserved_1a : 32; //[31:0] 54 }; 55 56 /* 57 58 first_msdu_in_mpdu_flag 59 60 <enum 0 Not_first_msdu> This is not the first MSDU in 61 the MPDU. 62 63 <enum 1 first_msdu> This MSDU is the first one in the 64 MPDU. <legal all> 65 66 last_msdu_in_mpdu_flag 67 68 Consumer: WBM/REO/SW/FW 69 70 Producer: RXDMA 71 72 73 74 75 76 <enum 0 Not_last_msdu> There are more MSDUs linked to 77 this MSDU that belongs to this MPDU 78 79 <enum 1 Last_msdu> this MSDU is the last one in the 80 MPDU. This setting is only allowed in combination with 81 'Msdu_continuation' set to 0. This implies that when an msdu 82 is spread out over multiple buffers and thus 83 msdu_continuation is set, only for the very last buffer of 84 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 85 86 87 88 When both first_msdu_in_mpdu_flag and 89 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 90 belongs to only contains a single MSDU. 91 92 <legal all> 93 94 msdu_continuation 95 96 When set, this MSDU buffer was not able to hold the 97 entire MSDU. The next buffer will therefor contain 98 additional information related to this MSDU. 99 100 101 102 <legal all> 103 104 msdu_length 105 106 Field is only valid in combination with the 107 'first_msdu_in_mpdu_flag ' being set. When the 108 'first_msdu_in_mpdu_flag ' is not set, this field shall be 109 0. 110 111 112 113 Full MSDU length in bytes after decapsulation. 114 115 116 117 This field is still valid for MPDU frames without 118 A-MSDU. It still represents MSDU length after decapsulation 119 120 121 122 Or in case of RAW MPDUs, it indicates the length of the 123 entire MPDU (without FCS field) 124 125 <legal all> 126 127 reo_destination_indication 128 129 The ID of the REO exit ring where the MSDU frame shall 130 push after (MPDU level) reordering has finished. 131 132 133 134 <enum 0 reo_destination_tcl> Reo will push the frame 135 into the REO2TCL ring 136 137 <enum 1 reo_destination_sw1> Reo will push the frame 138 into the REO2SW1 ring 139 140 <enum 2 reo_destination_sw2> Reo will push the frame 141 into the REO2SW1 ring 142 143 <enum 3 reo_destination_sw3> Reo will push the frame 144 into the REO2SW1 ring 145 146 <enum 4 reo_destination_sw4> Reo will push the frame 147 into the REO2SW1 ring 148 149 <enum 5 reo_destination_release> Reo will push the frame 150 into the REO_release ring 151 152 <enum 6 reo_destination_fw> Reo will push the frame into 153 the REO2FW ring 154 155 <enum 7 reo_destination_7> REO remaps this 156 157 <enum 8 reo_destination_8> REO remaps this <enum 9 158 reo_destination_9> REO remaps this <enum 10 159 reo_destination_10> REO remaps this 160 161 <enum 11 reo_destination_11> REO remaps this 162 163 <enum 12 reo_destination_12> REO remaps this <enum 13 164 reo_destination_13> REO remaps this 165 166 <enum 14 reo_destination_14> REO remaps this 167 168 <enum 15 reo_destination_15> REO remaps this 169 170 <enum 16 reo_destination_16> REO remaps this 171 172 <enum 17 reo_destination_17> REO remaps this 173 174 <enum 18 reo_destination_18> REO remaps this 175 176 <enum 19 reo_destination_19> REO remaps this 177 178 <enum 20 reo_destination_20> REO remaps this 179 180 <enum 21 reo_destination_21> REO remaps this 181 182 <enum 22 reo_destination_22> REO remaps this 183 184 <enum 23 reo_destination_23> REO remaps this 185 186 <enum 24 reo_destination_24> REO remaps this 187 188 <enum 25 reo_destination_25> REO remaps this 189 190 <enum 26 reo_destination_26> REO remaps this 191 192 <enum 27 reo_destination_27> REO remaps this 193 194 <enum 28 reo_destination_28> REO remaps this 195 196 <enum 29 reo_destination_29> REO remaps this 197 198 <enum 30 reo_destination_30> REO remaps this 199 200 <enum 31 reo_destination_31> REO remaps this 201 202 203 204 <legal all> 205 206 msdu_drop 207 208 When set, REO shall drop this MSDU and not forward it to 209 any other ring... 210 211 <legal all> 212 213 sa_is_valid 214 215 Indicates that OLE found a valid SA entry for this MSDU 216 217 <legal all> 218 219 sa_idx_timeout 220 221 Indicates an unsuccessful MAC source address search due 222 to the expiring of the search timer for this MSDU 223 224 <legal all> 225 226 da_is_valid 227 228 Indicates that OLE found a valid DA entry for this MSDU 229 230 <legal all> 231 232 da_is_mcbc 233 234 Field Only valid if da_is_valid is set 235 236 237 238 Indicates the DA address was a Multicast of Broadcast 239 address for this MSDU 240 241 <legal all> 242 243 da_idx_timeout 244 245 Indicates an unsuccessful MAC destination address search 246 due to the expiring of the search timer for this MSDU 247 248 <legal all> 249 250 reserved_0a 251 252 <legal 0> 253 254 reserved_1a 255 256 <legal 0> 257 */ 258 259 260 /* Description RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG 261 262 <enum 0 Not_first_msdu> This is not the first MSDU in 263 the MPDU. 264 265 <enum 1 first_msdu> This MSDU is the first one in the 266 MPDU. <legal all> 267 */ 268 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 269 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 270 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 271 272 /* Description RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG 273 274 Consumer: WBM/REO/SW/FW 275 276 Producer: RXDMA 277 278 279 280 281 282 <enum 0 Not_last_msdu> There are more MSDUs linked to 283 this MSDU that belongs to this MPDU 284 285 <enum 1 Last_msdu> this MSDU is the last one in the 286 MPDU. This setting is only allowed in combination with 287 'Msdu_continuation' set to 0. This implies that when an msdu 288 is spread out over multiple buffers and thus 289 msdu_continuation is set, only for the very last buffer of 290 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 291 292 293 294 When both first_msdu_in_mpdu_flag and 295 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 296 belongs to only contains a single MSDU. 297 298 <legal all> 299 */ 300 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 301 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB 1 302 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 303 304 /* Description RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION 305 306 When set, this MSDU buffer was not able to hold the 307 entire MSDU. The next buffer will therefor contain 308 additional information related to this MSDU. 309 310 311 312 <legal all> 313 */ 314 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET 0x00000000 315 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB 2 316 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK 0x00000004 317 318 /* Description RX_MSDU_DESC_INFO_0_MSDU_LENGTH 319 320 Field is only valid in combination with the 321 'first_msdu_in_mpdu_flag ' being set. When the 322 'first_msdu_in_mpdu_flag ' is not set, this field shall be 323 0. 324 325 326 327 Full MSDU length in bytes after decapsulation. 328 329 330 331 This field is still valid for MPDU frames without 332 A-MSDU. It still represents MSDU length after decapsulation 333 334 335 336 Or in case of RAW MPDUs, it indicates the length of the 337 entire MPDU (without FCS field) 338 339 <legal all> 340 */ 341 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET 0x00000000 342 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB 3 343 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK 0x0001fff8 344 345 /* Description RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION 346 347 The ID of the REO exit ring where the MSDU frame shall 348 push after (MPDU level) reordering has finished. 349 350 351 352 <enum 0 reo_destination_tcl> Reo will push the frame 353 into the REO2TCL ring 354 355 <enum 1 reo_destination_sw1> Reo will push the frame 356 into the REO2SW1 ring 357 358 <enum 2 reo_destination_sw2> Reo will push the frame 359 into the REO2SW1 ring 360 361 <enum 3 reo_destination_sw3> Reo will push the frame 362 into the REO2SW1 ring 363 364 <enum 4 reo_destination_sw4> Reo will push the frame 365 into the REO2SW1 ring 366 367 <enum 5 reo_destination_release> Reo will push the frame 368 into the REO_release ring 369 370 <enum 6 reo_destination_fw> Reo will push the frame into 371 the REO2FW ring 372 373 <enum 7 reo_destination_7> REO remaps this 374 375 <enum 8 reo_destination_8> REO remaps this <enum 9 376 reo_destination_9> REO remaps this <enum 10 377 reo_destination_10> REO remaps this 378 379 <enum 11 reo_destination_11> REO remaps this 380 381 <enum 12 reo_destination_12> REO remaps this <enum 13 382 reo_destination_13> REO remaps this 383 384 <enum 14 reo_destination_14> REO remaps this 385 386 <enum 15 reo_destination_15> REO remaps this 387 388 <enum 16 reo_destination_16> REO remaps this 389 390 <enum 17 reo_destination_17> REO remaps this 391 392 <enum 18 reo_destination_18> REO remaps this 393 394 <enum 19 reo_destination_19> REO remaps this 395 396 <enum 20 reo_destination_20> REO remaps this 397 398 <enum 21 reo_destination_21> REO remaps this 399 400 <enum 22 reo_destination_22> REO remaps this 401 402 <enum 23 reo_destination_23> REO remaps this 403 404 <enum 24 reo_destination_24> REO remaps this 405 406 <enum 25 reo_destination_25> REO remaps this 407 408 <enum 26 reo_destination_26> REO remaps this 409 410 <enum 27 reo_destination_27> REO remaps this 411 412 <enum 28 reo_destination_28> REO remaps this 413 414 <enum 29 reo_destination_29> REO remaps this 415 416 <enum 30 reo_destination_30> REO remaps this 417 418 <enum 31 reo_destination_31> REO remaps this 419 420 421 422 <legal all> 423 */ 424 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000 425 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB 17 426 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK 0x003e0000 427 428 /* Description RX_MSDU_DESC_INFO_0_MSDU_DROP 429 430 When set, REO shall drop this MSDU and not forward it to 431 any other ring... 432 433 <legal all> 434 */ 435 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_OFFSET 0x00000000 436 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_LSB 22 437 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_MASK 0x00400000 438 439 /* Description RX_MSDU_DESC_INFO_0_SA_IS_VALID 440 441 Indicates that OLE found a valid SA entry for this MSDU 442 443 <legal all> 444 */ 445 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET 0x00000000 446 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_LSB 23 447 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK 0x00800000 448 449 /* Description RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT 450 451 Indicates an unsuccessful MAC source address search due 452 to the expiring of the search timer for this MSDU 453 454 <legal all> 455 */ 456 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET 0x00000000 457 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_LSB 24 458 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK 0x01000000 459 460 /* Description RX_MSDU_DESC_INFO_0_DA_IS_VALID 461 462 Indicates that OLE found a valid DA entry for this MSDU 463 464 <legal all> 465 */ 466 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET 0x00000000 467 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_LSB 25 468 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK 0x02000000 469 470 /* Description RX_MSDU_DESC_INFO_0_DA_IS_MCBC 471 472 Field Only valid if da_is_valid is set 473 474 475 476 Indicates the DA address was a Multicast of Broadcast 477 address for this MSDU 478 479 <legal all> 480 */ 481 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET 0x00000000 482 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_LSB 26 483 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK 0x04000000 484 485 /* Description RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT 486 487 Indicates an unsuccessful MAC destination address search 488 due to the expiring of the search timer for this MSDU 489 490 <legal all> 491 */ 492 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET 0x00000000 493 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_LSB 27 494 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK 0x08000000 495 496 /* Description RX_MSDU_DESC_INFO_0_RESERVED_0A 497 498 <legal 0> 499 */ 500 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_OFFSET 0x00000000 501 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_LSB 28 502 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_MASK 0xf0000000 503 504 /* Description RX_MSDU_DESC_INFO_1_RESERVED_1A 505 506 <legal 0> 507 */ 508 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_OFFSET 0x00000004 509 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_LSB 0 510 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_MASK 0xffffffff 511 512 513 #endif // _RX_MSDU_DESC_INFO_H_ 514