1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_MSDU_LINK_H_ 25 #define _RX_MSDU_LINK_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "uniform_descriptor_header.h" 30 #include "buffer_addr_info.h" 31 #include "rx_msdu_details.h" 32 33 // ################ START SUMMARY ################# 34 // 35 // Dword Fields 36 // 0 struct uniform_descriptor_header descriptor_header; 37 // 1-2 struct buffer_addr_info next_msdu_link_desc_addr_info; 38 // 3 receive_queue_number[15:0], first_rx_msdu_link_struct[16], reserved_3a[31:17] 39 // 4 pn_31_0[31:0] 40 // 5 pn_63_32[31:0] 41 // 6 pn_95_64[31:0] 42 // 7 pn_127_96[31:0] 43 // 8-11 struct rx_msdu_details msdu_0; 44 // 12-15 struct rx_msdu_details msdu_1; 45 // 16-19 struct rx_msdu_details msdu_2; 46 // 20-23 struct rx_msdu_details msdu_3; 47 // 24-27 struct rx_msdu_details msdu_4; 48 // 28-31 struct rx_msdu_details msdu_5; 49 // 50 // ################ END SUMMARY ################# 51 52 #define NUM_OF_DWORDS_RX_MSDU_LINK 32 53 54 struct rx_msdu_link { 55 struct uniform_descriptor_header descriptor_header; 56 struct buffer_addr_info next_msdu_link_desc_addr_info; 57 uint32_t receive_queue_number : 16, //[15:0] 58 first_rx_msdu_link_struct : 1, //[16] 59 reserved_3a : 15; //[31:17] 60 uint32_t pn_31_0 : 32; //[31:0] 61 uint32_t pn_63_32 : 32; //[31:0] 62 uint32_t pn_95_64 : 32; //[31:0] 63 uint32_t pn_127_96 : 32; //[31:0] 64 struct rx_msdu_details msdu_0; 65 struct rx_msdu_details msdu_1; 66 struct rx_msdu_details msdu_2; 67 struct rx_msdu_details msdu_3; 68 struct rx_msdu_details msdu_4; 69 struct rx_msdu_details msdu_5; 70 }; 71 72 /* 73 74 struct uniform_descriptor_header descriptor_header 75 76 Details about which module owns this struct. 77 78 Note that sub field Buffer_type shall be set to 79 Receive_MSDU_Link_descriptor 80 81 struct buffer_addr_info next_msdu_link_desc_addr_info 82 83 Details of the physical address of the next MSDU link 84 descriptor that contains info about additional MSDUs that 85 are part of this MPDU. 86 87 receive_queue_number 88 89 Indicates the Receive queue to which this MPDU 90 descriptor belongs 91 92 Used for tracking, finding bugs and debugging. 93 94 <legal all> 95 96 first_rx_msdu_link_struct 97 98 When set, this RX_MSDU_link descriptor is the first one 99 in the MSDU link list. Field MSDU_0 points to the very first 100 MSDU buffer descriptor in the MPDU 101 102 <legal all> 103 104 reserved_3a 105 106 <legal 0> 107 108 pn_31_0 109 110 111 112 113 31-0 bits of the 256-bit packet number bitmap. 114 115 <legal all> 116 117 pn_63_32 118 119 120 121 122 63-32 bits of the 256-bit packet number bitmap. 123 124 <legal all> 125 126 pn_95_64 127 128 129 130 131 95-64 bits of the 256-bit packet number bitmap. 132 133 <legal all> 134 135 pn_127_96 136 137 138 139 140 127-96 bits of the 256-bit packet number bitmap. 141 142 <legal all> 143 144 struct rx_msdu_details msdu_0 145 146 When First_RX_MSDU_link_struct is set, this MSDU is the 147 first in the MPDU 148 149 150 151 When First_RX_MSDU_link_struct is NOT set, this MSDU 152 follows the last MSDU in the previous RX_MSDU_link data 153 structure 154 155 struct rx_msdu_details msdu_1 156 157 Details of next MSDU in this (MSDU flow) linked list 158 159 struct rx_msdu_details msdu_2 160 161 Details of next MSDU in this (MSDU flow) linked list 162 163 struct rx_msdu_details msdu_3 164 165 Details of next MSDU in this (MSDU flow) linked list 166 167 struct rx_msdu_details msdu_4 168 169 Details of next MSDU in this (MSDU flow) linked list 170 171 struct rx_msdu_details msdu_5 172 173 Details of next MSDU in this (MSDU flow) linked list 174 */ 175 176 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_OFFSET 0x00000000 177 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_LSB 0 178 #define RX_MSDU_LINK_0_UNIFORM_DESCRIPTOR_HEADER_DESCRIPTOR_HEADER_MASK 0xffffffff 179 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_OFFSET 0x00000004 180 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_LSB 0 181 #define RX_MSDU_LINK_1_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_MASK 0xffffffff 182 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_OFFSET 0x00000008 183 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_LSB 0 184 #define RX_MSDU_LINK_2_BUFFER_ADDR_INFO_NEXT_MSDU_LINK_DESC_ADDR_INFO_MASK 0xffffffff 185 186 /* Description RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER 187 188 Indicates the Receive queue to which this MPDU 189 descriptor belongs 190 191 Used for tracking, finding bugs and debugging. 192 193 <legal all> 194 */ 195 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 196 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_LSB 0 197 #define RX_MSDU_LINK_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 198 199 /* Description RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT 200 201 When set, this RX_MSDU_link descriptor is the first one 202 in the MSDU link list. Field MSDU_0 points to the very first 203 MSDU buffer descriptor in the MPDU 204 205 <legal all> 206 */ 207 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_OFFSET 0x0000000c 208 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_LSB 16 209 #define RX_MSDU_LINK_3_FIRST_RX_MSDU_LINK_STRUCT_MASK 0x00010000 210 211 /* Description RX_MSDU_LINK_3_RESERVED_3A 212 213 <legal 0> 214 */ 215 #define RX_MSDU_LINK_3_RESERVED_3A_OFFSET 0x0000000c 216 #define RX_MSDU_LINK_3_RESERVED_3A_LSB 17 217 #define RX_MSDU_LINK_3_RESERVED_3A_MASK 0xfffe0000 218 219 /* Description RX_MSDU_LINK_4_PN_31_0 220 221 222 223 224 31-0 bits of the 256-bit packet number bitmap. 225 226 <legal all> 227 */ 228 #define RX_MSDU_LINK_4_PN_31_0_OFFSET 0x00000010 229 #define RX_MSDU_LINK_4_PN_31_0_LSB 0 230 #define RX_MSDU_LINK_4_PN_31_0_MASK 0xffffffff 231 232 /* Description RX_MSDU_LINK_5_PN_63_32 233 234 235 236 237 63-32 bits of the 256-bit packet number bitmap. 238 239 <legal all> 240 */ 241 #define RX_MSDU_LINK_5_PN_63_32_OFFSET 0x00000014 242 #define RX_MSDU_LINK_5_PN_63_32_LSB 0 243 #define RX_MSDU_LINK_5_PN_63_32_MASK 0xffffffff 244 245 /* Description RX_MSDU_LINK_6_PN_95_64 246 247 248 249 250 95-64 bits of the 256-bit packet number bitmap. 251 252 <legal all> 253 */ 254 #define RX_MSDU_LINK_6_PN_95_64_OFFSET 0x00000018 255 #define RX_MSDU_LINK_6_PN_95_64_LSB 0 256 #define RX_MSDU_LINK_6_PN_95_64_MASK 0xffffffff 257 258 /* Description RX_MSDU_LINK_7_PN_127_96 259 260 261 262 263 127-96 bits of the 256-bit packet number bitmap. 264 265 <legal all> 266 */ 267 #define RX_MSDU_LINK_7_PN_127_96_OFFSET 0x0000001c 268 #define RX_MSDU_LINK_7_PN_127_96_LSB 0 269 #define RX_MSDU_LINK_7_PN_127_96_MASK 0xffffffff 270 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000020 271 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_LSB 0 272 #define RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 273 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000024 274 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_LSB 0 275 #define RX_MSDU_LINK_9_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 276 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x00000028 277 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_LSB 0 278 #define RX_MSDU_LINK_10_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 279 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_OFFSET 0x0000002c 280 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_LSB 0 281 #define RX_MSDU_LINK_11_RX_MSDU_DETAILS_MSDU_0_MASK 0xffffffff 282 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000030 283 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_LSB 0 284 #define RX_MSDU_LINK_12_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 285 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000034 286 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_LSB 0 287 #define RX_MSDU_LINK_13_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 288 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x00000038 289 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_LSB 0 290 #define RX_MSDU_LINK_14_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 291 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_OFFSET 0x0000003c 292 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_LSB 0 293 #define RX_MSDU_LINK_15_RX_MSDU_DETAILS_MSDU_1_MASK 0xffffffff 294 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000040 295 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_LSB 0 296 #define RX_MSDU_LINK_16_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 297 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000044 298 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_LSB 0 299 #define RX_MSDU_LINK_17_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 300 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x00000048 301 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_LSB 0 302 #define RX_MSDU_LINK_18_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 303 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_OFFSET 0x0000004c 304 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_LSB 0 305 #define RX_MSDU_LINK_19_RX_MSDU_DETAILS_MSDU_2_MASK 0xffffffff 306 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000050 307 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_LSB 0 308 #define RX_MSDU_LINK_20_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 309 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000054 310 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_LSB 0 311 #define RX_MSDU_LINK_21_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 312 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x00000058 313 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_LSB 0 314 #define RX_MSDU_LINK_22_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 315 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_OFFSET 0x0000005c 316 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_LSB 0 317 #define RX_MSDU_LINK_23_RX_MSDU_DETAILS_MSDU_3_MASK 0xffffffff 318 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000060 319 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_LSB 0 320 #define RX_MSDU_LINK_24_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 321 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000064 322 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_LSB 0 323 #define RX_MSDU_LINK_25_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 324 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x00000068 325 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_LSB 0 326 #define RX_MSDU_LINK_26_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 327 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_OFFSET 0x0000006c 328 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_LSB 0 329 #define RX_MSDU_LINK_27_RX_MSDU_DETAILS_MSDU_4_MASK 0xffffffff 330 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000070 331 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_LSB 0 332 #define RX_MSDU_LINK_28_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 333 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000074 334 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_LSB 0 335 #define RX_MSDU_LINK_29_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 336 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x00000078 337 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_LSB 0 338 #define RX_MSDU_LINK_30_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 339 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_OFFSET 0x0000007c 340 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_LSB 0 341 #define RX_MSDU_LINK_31_RX_MSDU_DETAILS_MSDU_5_MASK 0xffffffff 342 343 344 #endif // _RX_MSDU_LINK_H_ 345