1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_PPDU_END_USER_STATS_H_ 25 #define _RX_PPDU_END_USER_STATS_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "rx_rxpcu_classification_overview.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 35 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], odma_info_valid[20], ofdma_low_ru_index[27:21], reserved_1a[31:28] 36 // 2 ofdma_high_ru_index[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 37 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], reserved_3a[15:13], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 38 // 4 ast_index[15:0], frame_control_field[31:16] 39 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 40 // 6 ht_control_field[31:0] 41 // 7 fcs_ok_bitmap_31_0[31:0] 42 // 8 fcs_ok_bitmap_63_32[31:0] 43 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 44 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 45 // 11 sw_response_reference_ptr[31:0] 46 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 47 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 48 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 49 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 50 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 51 // 17 mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25] 52 // 18 ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25] 53 // 19 mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25] 54 // 55 // ################ END SUMMARY ################# 56 57 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 20 58 59 struct rx_ppdu_end_user_stats { 60 struct rx_rxpcu_classification_overview rxpcu_classification_details; 61 uint32_t sta_full_aid : 13, //[12:0] 62 mcs : 4, //[16:13] 63 nss : 3, //[19:17] 64 odma_info_valid : 1, //[20] 65 ofdma_low_ru_index : 7, //[27:21] 66 reserved_1a : 4; //[31:28] 67 uint32_t ofdma_high_ru_index : 7, //[6:0] 68 reserved_2a : 1, //[7] 69 user_receive_quality : 8, //[15:8] 70 mpdu_cnt_fcs_err : 10, //[25:16] 71 wbm2rxdma_buf_source_used : 1, //[26] 72 fw2rxdma_buf_source_used : 1, //[27] 73 sw2rxdma_buf_source_used : 1, //[28] 74 reserved_2b : 3; //[31:29] 75 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 76 frame_control_info_valid : 1, //[9] 77 qos_control_info_valid : 1, //[10] 78 ht_control_info_valid : 1, //[11] 79 data_sequence_control_info_valid: 1, //[12] 80 reserved_3a : 3, //[15:13] 81 rxdma2reo_ring_used : 1, //[16] 82 rxdma2fw_ring_used : 1, //[17] 83 rxdma2sw_ring_used : 1, //[18] 84 rxdma_release_ring_used : 1, //[19] 85 ht_control_field_pkt_type : 4, //[23:20] 86 reserved_3b : 8; //[31:24] 87 uint32_t ast_index : 16, //[15:0] 88 frame_control_field : 16; //[31:16] 89 uint32_t first_data_seq_ctrl : 16, //[15:0] 90 qos_control_field : 16; //[31:16] 91 uint32_t ht_control_field : 32; //[31:0] 92 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 93 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 94 uint32_t udp_msdu_count : 16, //[15:0] 95 tcp_msdu_count : 16; //[31:16] 96 uint32_t other_msdu_count : 16, //[15:0] 97 tcp_ack_msdu_count : 16; //[31:16] 98 uint32_t sw_response_reference_ptr : 32; //[31:0] 99 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 100 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 101 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 102 qosctrl_15_8_tid1 : 8, //[15:8] 103 qosctrl_15_8_tid2 : 8, //[23:16] 104 qosctrl_15_8_tid3 : 8; //[31:24] 105 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 106 qosctrl_15_8_tid5 : 8, //[15:8] 107 qosctrl_15_8_tid6 : 8, //[23:16] 108 qosctrl_15_8_tid7 : 8; //[31:24] 109 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 110 qosctrl_15_8_tid9 : 8, //[15:8] 111 qosctrl_15_8_tid10 : 8, //[23:16] 112 qosctrl_15_8_tid11 : 8; //[31:24] 113 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 114 qosctrl_15_8_tid13 : 8, //[15:8] 115 qosctrl_15_8_tid14 : 8, //[23:16] 116 qosctrl_15_8_tid15 : 8; //[31:24] 117 uint32_t mpdu_ok_byte_count : 25, //[24:0] 118 ampdu_delim_ok_count_6_0 : 7; //[31:25] 119 uint32_t ampdu_delim_err_count : 25, //[24:0] 120 ampdu_delim_ok_count_13_7 : 7; //[31:25] 121 uint32_t mpdu_err_byte_count : 25, //[24:0] 122 ampdu_delim_ok_count_20_14 : 7; //[31:25] 123 }; 124 125 /* 126 127 struct rx_rxpcu_classification_overview rxpcu_classification_details 128 129 Details related to what RXPCU classification types of 130 MPDUs have been received 131 132 sta_full_aid 133 134 Consumer: FW 135 136 Producer: RXPCU 137 138 139 140 The full AID of this station. 141 142 143 144 <legal all> 145 146 mcs 147 148 MCS of the received frame 149 150 151 152 For details, refer to MCS_TYPE description 153 154 <legal all> 155 156 nss 157 158 Number of spatial streams. 159 160 161 162 <enum 0 1_spatial_stream>Single spatial stream 163 164 <enum 1 2_spatial_streams>2 spatial streams 165 166 <enum 2 3_spatial_streams>3 spatial streams 167 168 <enum 3 4_spatial_streams>4 spatial streams 169 170 <enum 4 5_spatial_streams>5 spatial streams 171 172 <enum 5 6_spatial_streams>6 spatial streams 173 174 <enum 6 7_spatial_streams>7 spatial streams 175 176 <enum 7 8_spatial_streams>8 spatial streams 177 178 odma_info_valid 179 180 When set, ofdma RU related info in the following fields 181 is valid 182 183 <legal all> 184 185 ofdma_low_ru_index 186 187 The index of the lowerest RU used by this STA. 188 189 <legal all> 190 191 reserved_1a 192 193 <legal 0> 194 195 ofdma_high_ru_index 196 197 The index of the highest RU used by this STA. 198 199 <legal all> 200 201 reserved_2a 202 203 <legal 0> 204 205 user_receive_quality 206 207 RSSI / EVM for this user ??? 208 209 210 211 Details TBD 212 213 <legal all> 214 215 mpdu_cnt_fcs_err 216 217 The number of MPDUs received from this STA in this PPDU 218 with FCS errors 219 220 <legal all> 221 222 wbm2rxdma_buf_source_used 223 224 Field filled in by RXDMA 225 226 227 228 When set, RXDMA has used the wbm2rxdma_buf ring as 229 source for at least one of the frames in this PPDU. 230 231 fw2rxdma_buf_source_used 232 233 Field filled in by RXDMA 234 235 236 237 When set, RXDMA has used the fw2rxdma_buf ring as source 238 for at least one of the frames in this PPDU. 239 240 sw2rxdma_buf_source_used 241 242 Field filled in by RXDMA 243 244 245 246 When set, RXDMA has used the sw2rxdma_buf ring as source 247 for at least one of the frames in this PPDU. 248 249 reserved_2b 250 251 <legal 0> 252 253 mpdu_cnt_fcs_ok 254 255 The number of MPDUs received from this STA in this PPDU 256 with correct FCS 257 258 <legal all> 259 260 frame_control_info_valid 261 262 When set, the frame_control_info field contains valid 263 information 264 265 <legal all> 266 267 qos_control_info_valid 268 269 When set, the QoS_control_info field contains valid 270 information 271 272 <legal all> 273 274 ht_control_info_valid 275 276 When set, the HT_control_info field contains valid 277 information 278 279 <legal all> 280 281 data_sequence_control_info_valid 282 283 When set, the First_data_seq_ctrl field contains valid 284 information 285 286 <legal all> 287 288 reserved_3a 289 290 <legal 0> 291 292 rxdma2reo_ring_used 293 294 Field filled in by RXDMA 295 296 297 298 Set when at least one frame during this PPDU got pushed 299 to this ring by RXDMA 300 301 rxdma2fw_ring_used 302 303 Field filled in by RXDMA 304 305 306 307 Set when at least one frame during this PPDU got pushed 308 to this ring by RXDMA 309 310 rxdma2sw_ring_used 311 312 Field filled in by RXDMA 313 314 315 316 Set when at least one frame during this PPDU got pushed 317 to this ring by RXDMA 318 319 rxdma_release_ring_used 320 321 Field filled in by RXDMA 322 323 324 325 Set when at least one frame during this PPDU got pushed 326 to this ring by RXDMA 327 328 ht_control_field_pkt_type 329 330 Field only valid when HT_control_info_valid is set. 331 332 333 334 Indicates what the PHY receive type was for receiving 335 this frame. Can help determine if the HT_CONTROL field shall 336 be interpreted as HT/VHT or HE. 337 338 339 340 <enum 0 dot11a>802.11a PPDU type 341 342 <enum 1 dot11b>802.11b PPDU type 343 344 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 345 346 <enum 3 dot11ac>802.11ac PPDU type 347 348 <enum 4 dot11ax>802.11ax PPDU type 349 350 reserved_3b 351 352 <legal 0> 353 354 ast_index 355 356 This field indicates the index of the AST entry 357 corresponding to this MPDU. It is provided by the GSE module 358 instantiated in RXPCU. 359 360 A value of 0xFFFF indicates an invalid AST index, 361 meaning that No AST entry was found or NO AST search was 362 performed 363 364 <legal all> 365 366 frame_control_field 367 368 Field only valid when Frame_control_info_valid is set. 369 370 371 372 Last successfully received Frame_control field of data 373 frame (excluding Data NULL/ QoS Null) for this user 374 375 Mainly used to track the PM state of the transmitted 376 device 377 378 379 380 NOTE: only data frame info is needed, as control and 381 management frames are already routed to the FW. 382 383 <legal all> 384 385 first_data_seq_ctrl 386 387 Field only valid when Data_sequence_control_info_valid 388 is set. 389 390 391 392 Sequence control field of the first data frame 393 (excluding Data NULL or QoS Data null) received for this 394 user with correct FCS 395 396 397 398 NOTE: only data frame info is needed, as control and 399 management frames are already routed to the FW. 400 401 <legal all> 402 403 qos_control_field 404 405 Field only valid when QoS_control_info_valid is set. 406 407 408 409 Last successfully received QoS_control field of data 410 frame (excluding Data NULL/ QoS Null) for this user 411 412 413 414 Note that in case of multi TID, this field can only 415 reflect the last properly received MPDU, and thus can not 416 indicate all potentially different TIDs that had been 417 received earlier. 418 419 420 421 There are however per TID fields, that will contain 422 among other things all buffer status info: See 423 424 QoSCtrl_15_8_tid??? 425 426 <legal all> 427 428 ht_control_field 429 430 Field only valid when HT_control_info_valid is set. 431 432 433 434 Last successfully received 435 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 436 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 437 Null are excluded here because these frames are always 438 already routed to the FW by RXDMA. 439 440 441 442 See field HT_control_field_pkt_type in case pkt_type 443 influences if this fields interpretation as HT/VHT/HE 444 CONTROL 445 446 <legal all> 447 448 fcs_ok_bitmap_31_0 449 450 Bitmap indicates in order of received MPDUs, which MPDUs 451 had an passing FCS or had an error. 452 453 1: FCS OK 454 455 0: FCS error 456 457 <legal all> 458 459 fcs_ok_bitmap_63_32 460 461 Bitmap indicates in order of received MPDUs, which MPDUs 462 had an passing FCS or had an error. 463 464 1: FCS OK 465 466 0: FCS error 467 468 469 470 NOTE: for users 0, 1, 2 and 3, additional bitmap info 471 (up to 256 bitmap window) is provided in 472 RX_PPDU_END_USER_STATS_EXT TLV 473 474 <legal all> 475 476 udp_msdu_count 477 478 Field filled in by RX OLE 479 480 Set to 0 by RXPCU 481 482 483 484 The number of MSDUs that are part of MPDUs without FCS 485 error, that contain UDP frames. 486 487 <legal all> 488 489 tcp_msdu_count 490 491 Field filled in by RX OLE 492 493 Set to 0 by RXPCU 494 495 496 497 The number of MSDUs that are part of MPDUs without FCS 498 error, that contain TCP frames. 499 500 501 502 (Note: This does NOT include TCP-ACK) 503 504 <legal all> 505 506 other_msdu_count 507 508 Field filled in by RX OLE 509 510 Set to 0 by RXPCU 511 512 513 514 The number of MSDUs that are part of MPDUs without FCS 515 error, that contain neither UDP or TCP frames. 516 517 518 519 Includes Management and control frames. 520 521 522 523 <legal all> 524 525 tcp_ack_msdu_count 526 527 Field filled in by RX OLE 528 529 Set to 0 by RXPCU 530 531 532 533 The number of MSDUs that are part of MPDUs without FCS 534 error, that contain TCP ack frames. 535 536 <legal all> 537 538 sw_response_reference_ptr 539 540 Pointer that SW uses to refer back to an expected 541 response reception. Used for Rate adaptation purposes. 542 543 When a reception occurrs that is not tied to an expected 544 response, this field is set to 0x0 545 546 <legal all> 547 548 received_qos_data_tid_bitmap 549 550 Whenever a QoS Data frame is received, the bit in this 551 field that corresponds to the received TID shall be set. 552 553 ...Bitmap[0] = TID0 554 555 ...Bitmap[1] = TID1 556 557 Etc. 558 559 <legal all> 560 561 received_qos_data_tid_eosp_bitmap 562 563 Field initialized to 0 564 565 For every QoS Data frame that is correctly received, the 566 EOSP bit of that frame is copied over into the corresponding 567 TID related field. 568 569 Note that this implies that the bits here represent the 570 EOSP bit status for each TID of the last MPDU received for 571 that TID. 572 573 574 575 received TID shall be set. 576 577 ...eosp_bitmap[0] = eosp of TID0 578 579 ...eosp_bitmap[1] = eosp of TID1 580 581 Etc. 582 583 <legal all> 584 585 qosctrl_15_8_tid0 586 587 Field only valid when Received_qos_data_tid_bitmap[0] is 588 set 589 590 591 592 QoS control field bits 15-8 of the last properly 593 received MPDU with TID0 594 595 qosctrl_15_8_tid1 596 597 Field only valid when Received_qos_data_tid_bitmap[1] is 598 set 599 600 601 602 QoS control field bits 15-8 of the last properly 603 received MPDU with TID1 604 605 qosctrl_15_8_tid2 606 607 Field only valid when Received_qos_data_tid_bitmap[2] is 608 set 609 610 611 612 QoS control field bits 15-8 of the last properly 613 received MPDU with TID2 614 615 qosctrl_15_8_tid3 616 617 Field only valid when Received_qos_data_tid_bitmap[3] is 618 set 619 620 621 622 QoS control field bits 15-8 of the last properly 623 received MPDU with TID3 624 625 qosctrl_15_8_tid4 626 627 Field only valid when Received_qos_data_tid_bitmap[4] is 628 set 629 630 631 632 QoS control field bits 15-8 of the last properly 633 received MPDU with TID4 634 635 qosctrl_15_8_tid5 636 637 Field only valid when Received_qos_data_tid_bitmap[5] is 638 set 639 640 641 642 QoS control field bits 15-8 of the last properly 643 received MPDU with TID5 644 645 qosctrl_15_8_tid6 646 647 Field only valid when Received_qos_data_tid_bitmap[6] is 648 set 649 650 651 652 QoS control field bits 15-8 of the last properly 653 received MPDU with TID6 654 655 qosctrl_15_8_tid7 656 657 Field only valid when Received_qos_data_tid_bitmap[7] is 658 set 659 660 661 662 QoS control field bits 15-8 of the last properly 663 received MPDU with TID7 664 665 qosctrl_15_8_tid8 666 667 Field only valid when Received_qos_data_tid_bitmap[8] is 668 set 669 670 671 672 QoS control field bits 15-8 of the last properly 673 received MPDU with TID8 674 675 qosctrl_15_8_tid9 676 677 Field only valid when Received_qos_data_tid_bitmap[9] is 678 set 679 680 681 682 QoS control field bits 15-8 of the last properly 683 received MPDU with TID9 684 685 qosctrl_15_8_tid10 686 687 Field only valid when Received_qos_data_tid_bitmap[10] 688 is set 689 690 691 692 QoS control field bits 15-8 of the last properly 693 received MPDU with TID10 694 695 qosctrl_15_8_tid11 696 697 Field only valid when Received_qos_data_tid_bitmap[11] 698 is set 699 700 701 702 QoS control field bits 15-8 of the last properly 703 received MPDU with TID11 704 705 qosctrl_15_8_tid12 706 707 Field only valid when Received_qos_data_tid_bitmap[12] 708 is set 709 710 711 712 QoS control field bits 15-8 of the last properly 713 received MPDU with TID12 714 715 qosctrl_15_8_tid13 716 717 Field only valid when Received_qos_data_tid_bitmap[13] 718 is set 719 720 721 722 QoS control field bits 15-8 of the last properly 723 received MPDU with TID13 724 725 qosctrl_15_8_tid14 726 727 Field only valid when Received_qos_data_tid_bitmap[14] 728 is set 729 730 731 732 QoS control field bits 15-8 of the last properly 733 received MPDU with TID14 734 735 qosctrl_15_8_tid15 736 737 Field only valid when Received_qos_data_tid_bitmap[15] 738 is set 739 740 741 742 QoS control field bits 15-8 of the last properly 743 received MPDU with TID15 744 745 mpdu_ok_byte_count 746 747 The number of bytes received within an MPDU for this 748 user with correct FCS. This includes the FCS field 749 750 751 752 NOTE: 753 754 The sum of the four fields..... 755 756 Mpdu_ok_byte_count + 757 758 mpdu_err_byte_count + 759 760 Ampdu_delim_ok_count + Ampdu_delim_err_count 761 762 .....is the total number of bytes that were received for 763 this user from the PHY. 764 765 766 767 <legal all> 768 769 ampdu_delim_ok_count_6_0 770 771 Number of AMPDU delimiter received with correct 772 structure 773 774 LSB 7 bits from this counter 775 776 <legal all> 777 778 ampdu_delim_err_count 779 780 The number of MPDU delimiter errors counted for this 781 user 782 783 <legal all> 784 785 ampdu_delim_ok_count_13_7 786 787 Number of AMPDU delimiters received with correct 788 structure 789 790 Bits 13-7 from this counter 791 792 <legal all> 793 794 mpdu_err_byte_count 795 796 The number of bytes belonging to MPDUs with an FCS 797 error. This includes the FCS field. 798 799 800 801 <legal all> 802 803 ampdu_delim_ok_count_20_14 804 805 Number of AMPDU delimiters received with correct 806 structure 807 808 Bits 20-14 from this counter 809 810 <legal all> 811 */ 812 813 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000 814 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 25 815 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff 816 817 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 818 819 Consumer: FW 820 821 Producer: RXPCU 822 823 824 825 The full AID of this station. 826 827 828 829 <legal all> 830 */ 831 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 832 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 833 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 834 835 /* Description RX_PPDU_END_USER_STATS_1_MCS 836 837 MCS of the received frame 838 839 840 841 For details, refer to MCS_TYPE description 842 843 <legal all> 844 */ 845 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 846 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 847 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 848 849 /* Description RX_PPDU_END_USER_STATS_1_NSS 850 851 Number of spatial streams. 852 853 854 855 <enum 0 1_spatial_stream>Single spatial stream 856 857 <enum 1 2_spatial_streams>2 spatial streams 858 859 <enum 2 3_spatial_streams>3 spatial streams 860 861 <enum 3 4_spatial_streams>4 spatial streams 862 863 <enum 4 5_spatial_streams>5 spatial streams 864 865 <enum 5 6_spatial_streams>6 spatial streams 866 867 <enum 6 7_spatial_streams>7 spatial streams 868 869 <enum 7 8_spatial_streams>8 spatial streams 870 */ 871 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 872 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 873 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 874 875 /* Description RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID 876 877 When set, ofdma RU related info in the following fields 878 is valid 879 880 <legal all> 881 */ 882 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_OFFSET 0x00000004 883 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_LSB 20 884 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_MASK 0x00100000 885 886 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX 887 888 The index of the lowerest RU used by this STA. 889 890 <legal all> 891 */ 892 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_OFFSET 0x00000004 893 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_LSB 21 894 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_MASK 0x0fe00000 895 896 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 897 898 <legal 0> 899 */ 900 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 901 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 902 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 903 904 /* Description RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX 905 906 The index of the highest RU used by this STA. 907 908 <legal all> 909 */ 910 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_OFFSET 0x00000008 911 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_LSB 0 912 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_MASK 0x0000007f 913 914 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 915 916 <legal 0> 917 */ 918 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 919 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 920 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 921 922 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 923 924 RSSI / EVM for this user ??? 925 926 927 928 Details TBD 929 930 <legal all> 931 */ 932 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 933 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 934 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 935 936 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 937 938 The number of MPDUs received from this STA in this PPDU 939 with FCS errors 940 941 <legal all> 942 */ 943 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 944 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 945 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 946 947 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 948 949 Field filled in by RXDMA 950 951 952 953 When set, RXDMA has used the wbm2rxdma_buf ring as 954 source for at least one of the frames in this PPDU. 955 */ 956 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 957 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 958 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 959 960 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 961 962 Field filled in by RXDMA 963 964 965 966 When set, RXDMA has used the fw2rxdma_buf ring as source 967 for at least one of the frames in this PPDU. 968 */ 969 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 970 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 971 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 972 973 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 974 975 Field filled in by RXDMA 976 977 978 979 When set, RXDMA has used the sw2rxdma_buf ring as source 980 for at least one of the frames in this PPDU. 981 */ 982 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 983 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 984 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 985 986 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 987 988 <legal 0> 989 */ 990 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 991 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 992 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 993 994 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 995 996 The number of MPDUs received from this STA in this PPDU 997 with correct FCS 998 999 <legal all> 1000 */ 1001 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 1002 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 1003 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 1004 1005 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 1006 1007 When set, the frame_control_info field contains valid 1008 information 1009 1010 <legal all> 1011 */ 1012 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 1013 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 1014 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 1015 1016 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 1017 1018 When set, the QoS_control_info field contains valid 1019 information 1020 1021 <legal all> 1022 */ 1023 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 1024 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 1025 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 1026 1027 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 1028 1029 When set, the HT_control_info field contains valid 1030 information 1031 1032 <legal all> 1033 */ 1034 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 1035 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 1036 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 1037 1038 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 1039 1040 When set, the First_data_seq_ctrl field contains valid 1041 information 1042 1043 <legal all> 1044 */ 1045 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 1046 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 1047 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 1048 1049 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 1050 1051 <legal 0> 1052 */ 1053 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 1054 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 13 1055 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000e000 1056 1057 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 1058 1059 Field filled in by RXDMA 1060 1061 1062 1063 Set when at least one frame during this PPDU got pushed 1064 to this ring by RXDMA 1065 */ 1066 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 1067 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 1068 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 1069 1070 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 1071 1072 Field filled in by RXDMA 1073 1074 1075 1076 Set when at least one frame during this PPDU got pushed 1077 to this ring by RXDMA 1078 */ 1079 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1080 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1081 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1082 1083 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1084 1085 Field filled in by RXDMA 1086 1087 1088 1089 Set when at least one frame during this PPDU got pushed 1090 to this ring by RXDMA 1091 */ 1092 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1093 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1094 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1095 1096 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1097 1098 Field filled in by RXDMA 1099 1100 1101 1102 Set when at least one frame during this PPDU got pushed 1103 to this ring by RXDMA 1104 */ 1105 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1106 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1107 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1108 1109 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1110 1111 Field only valid when HT_control_info_valid is set. 1112 1113 1114 1115 Indicates what the PHY receive type was for receiving 1116 this frame. Can help determine if the HT_CONTROL field shall 1117 be interpreted as HT/VHT or HE. 1118 1119 1120 1121 <enum 0 dot11a>802.11a PPDU type 1122 1123 <enum 1 dot11b>802.11b PPDU type 1124 1125 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1126 1127 <enum 3 dot11ac>802.11ac PPDU type 1128 1129 <enum 4 dot11ax>802.11ax PPDU type 1130 */ 1131 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1132 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1133 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1134 1135 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1136 1137 <legal 0> 1138 */ 1139 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1140 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1141 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1142 1143 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1144 1145 This field indicates the index of the AST entry 1146 corresponding to this MPDU. It is provided by the GSE module 1147 instantiated in RXPCU. 1148 1149 A value of 0xFFFF indicates an invalid AST index, 1150 meaning that No AST entry was found or NO AST search was 1151 performed 1152 1153 <legal all> 1154 */ 1155 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1156 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1157 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1158 1159 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1160 1161 Field only valid when Frame_control_info_valid is set. 1162 1163 1164 1165 Last successfully received Frame_control field of data 1166 frame (excluding Data NULL/ QoS Null) for this user 1167 1168 Mainly used to track the PM state of the transmitted 1169 device 1170 1171 1172 1173 NOTE: only data frame info is needed, as control and 1174 management frames are already routed to the FW. 1175 1176 <legal all> 1177 */ 1178 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1179 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1180 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1181 1182 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1183 1184 Field only valid when Data_sequence_control_info_valid 1185 is set. 1186 1187 1188 1189 Sequence control field of the first data frame 1190 (excluding Data NULL or QoS Data null) received for this 1191 user with correct FCS 1192 1193 1194 1195 NOTE: only data frame info is needed, as control and 1196 management frames are already routed to the FW. 1197 1198 <legal all> 1199 */ 1200 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1201 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1202 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1203 1204 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1205 1206 Field only valid when QoS_control_info_valid is set. 1207 1208 1209 1210 Last successfully received QoS_control field of data 1211 frame (excluding Data NULL/ QoS Null) for this user 1212 1213 1214 1215 Note that in case of multi TID, this field can only 1216 reflect the last properly received MPDU, and thus can not 1217 indicate all potentially different TIDs that had been 1218 received earlier. 1219 1220 1221 1222 There are however per TID fields, that will contain 1223 among other things all buffer status info: See 1224 1225 QoSCtrl_15_8_tid??? 1226 1227 <legal all> 1228 */ 1229 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1230 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1231 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1232 1233 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1234 1235 Field only valid when HT_control_info_valid is set. 1236 1237 1238 1239 Last successfully received 1240 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1241 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 1242 Null are excluded here because these frames are always 1243 already routed to the FW by RXDMA. 1244 1245 1246 1247 See field HT_control_field_pkt_type in case pkt_type 1248 influences if this fields interpretation as HT/VHT/HE 1249 CONTROL 1250 1251 <legal all> 1252 */ 1253 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1254 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1255 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1256 1257 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1258 1259 Bitmap indicates in order of received MPDUs, which MPDUs 1260 had an passing FCS or had an error. 1261 1262 1: FCS OK 1263 1264 0: FCS error 1265 1266 <legal all> 1267 */ 1268 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1269 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1270 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1271 1272 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1273 1274 Bitmap indicates in order of received MPDUs, which MPDUs 1275 had an passing FCS or had an error. 1276 1277 1: FCS OK 1278 1279 0: FCS error 1280 1281 1282 1283 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1284 (up to 256 bitmap window) is provided in 1285 RX_PPDU_END_USER_STATS_EXT TLV 1286 1287 <legal all> 1288 */ 1289 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1290 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1291 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1292 1293 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1294 1295 Field filled in by RX OLE 1296 1297 Set to 0 by RXPCU 1298 1299 1300 1301 The number of MSDUs that are part of MPDUs without FCS 1302 error, that contain UDP frames. 1303 1304 <legal all> 1305 */ 1306 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1307 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1308 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1309 1310 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1311 1312 Field filled in by RX OLE 1313 1314 Set to 0 by RXPCU 1315 1316 1317 1318 The number of MSDUs that are part of MPDUs without FCS 1319 error, that contain TCP frames. 1320 1321 1322 1323 (Note: This does NOT include TCP-ACK) 1324 1325 <legal all> 1326 */ 1327 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1328 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1329 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1330 1331 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1332 1333 Field filled in by RX OLE 1334 1335 Set to 0 by RXPCU 1336 1337 1338 1339 The number of MSDUs that are part of MPDUs without FCS 1340 error, that contain neither UDP or TCP frames. 1341 1342 1343 1344 Includes Management and control frames. 1345 1346 1347 1348 <legal all> 1349 */ 1350 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1351 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1352 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1353 1354 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1355 1356 Field filled in by RX OLE 1357 1358 Set to 0 by RXPCU 1359 1360 1361 1362 The number of MSDUs that are part of MPDUs without FCS 1363 error, that contain TCP ack frames. 1364 1365 <legal all> 1366 */ 1367 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1368 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1369 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1370 1371 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1372 1373 Pointer that SW uses to refer back to an expected 1374 response reception. Used for Rate adaptation purposes. 1375 1376 When a reception occurrs that is not tied to an expected 1377 response, this field is set to 0x0 1378 1379 <legal all> 1380 */ 1381 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1382 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1383 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1384 1385 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1386 1387 Whenever a QoS Data frame is received, the bit in this 1388 field that corresponds to the received TID shall be set. 1389 1390 ...Bitmap[0] = TID0 1391 1392 ...Bitmap[1] = TID1 1393 1394 Etc. 1395 1396 <legal all> 1397 */ 1398 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1399 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1400 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1401 1402 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1403 1404 Field initialized to 0 1405 1406 For every QoS Data frame that is correctly received, the 1407 EOSP bit of that frame is copied over into the corresponding 1408 TID related field. 1409 1410 Note that this implies that the bits here represent the 1411 EOSP bit status for each TID of the last MPDU received for 1412 that TID. 1413 1414 1415 1416 received TID shall be set. 1417 1418 ...eosp_bitmap[0] = eosp of TID0 1419 1420 ...eosp_bitmap[1] = eosp of TID1 1421 1422 Etc. 1423 1424 <legal all> 1425 */ 1426 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1427 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1428 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1429 1430 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1431 1432 Field only valid when Received_qos_data_tid_bitmap[0] is 1433 set 1434 1435 1436 1437 QoS control field bits 15-8 of the last properly 1438 received MPDU with TID0 1439 */ 1440 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1441 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1442 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1443 1444 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1445 1446 Field only valid when Received_qos_data_tid_bitmap[1] is 1447 set 1448 1449 1450 1451 QoS control field bits 15-8 of the last properly 1452 received MPDU with TID1 1453 */ 1454 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1455 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1456 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1457 1458 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1459 1460 Field only valid when Received_qos_data_tid_bitmap[2] is 1461 set 1462 1463 1464 1465 QoS control field bits 15-8 of the last properly 1466 received MPDU with TID2 1467 */ 1468 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1469 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1470 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1471 1472 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1473 1474 Field only valid when Received_qos_data_tid_bitmap[3] is 1475 set 1476 1477 1478 1479 QoS control field bits 15-8 of the last properly 1480 received MPDU with TID3 1481 */ 1482 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1483 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1484 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1485 1486 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1487 1488 Field only valid when Received_qos_data_tid_bitmap[4] is 1489 set 1490 1491 1492 1493 QoS control field bits 15-8 of the last properly 1494 received MPDU with TID4 1495 */ 1496 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1497 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1498 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1499 1500 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1501 1502 Field only valid when Received_qos_data_tid_bitmap[5] is 1503 set 1504 1505 1506 1507 QoS control field bits 15-8 of the last properly 1508 received MPDU with TID5 1509 */ 1510 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1511 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1512 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1513 1514 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1515 1516 Field only valid when Received_qos_data_tid_bitmap[6] is 1517 set 1518 1519 1520 1521 QoS control field bits 15-8 of the last properly 1522 received MPDU with TID6 1523 */ 1524 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1525 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1526 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1527 1528 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1529 1530 Field only valid when Received_qos_data_tid_bitmap[7] is 1531 set 1532 1533 1534 1535 QoS control field bits 15-8 of the last properly 1536 received MPDU with TID7 1537 */ 1538 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1539 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1540 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1541 1542 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1543 1544 Field only valid when Received_qos_data_tid_bitmap[8] is 1545 set 1546 1547 1548 1549 QoS control field bits 15-8 of the last properly 1550 received MPDU with TID8 1551 */ 1552 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1553 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1554 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1555 1556 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1557 1558 Field only valid when Received_qos_data_tid_bitmap[9] is 1559 set 1560 1561 1562 1563 QoS control field bits 15-8 of the last properly 1564 received MPDU with TID9 1565 */ 1566 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1567 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1568 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1569 1570 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1571 1572 Field only valid when Received_qos_data_tid_bitmap[10] 1573 is set 1574 1575 1576 1577 QoS control field bits 15-8 of the last properly 1578 received MPDU with TID10 1579 */ 1580 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1581 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1582 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1583 1584 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1585 1586 Field only valid when Received_qos_data_tid_bitmap[11] 1587 is set 1588 1589 1590 1591 QoS control field bits 15-8 of the last properly 1592 received MPDU with TID11 1593 */ 1594 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1595 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1596 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1597 1598 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1599 1600 Field only valid when Received_qos_data_tid_bitmap[12] 1601 is set 1602 1603 1604 1605 QoS control field bits 15-8 of the last properly 1606 received MPDU with TID12 1607 */ 1608 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1609 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1610 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1611 1612 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1613 1614 Field only valid when Received_qos_data_tid_bitmap[13] 1615 is set 1616 1617 1618 1619 QoS control field bits 15-8 of the last properly 1620 received MPDU with TID13 1621 */ 1622 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1623 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1624 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1625 1626 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1627 1628 Field only valid when Received_qos_data_tid_bitmap[14] 1629 is set 1630 1631 1632 1633 QoS control field bits 15-8 of the last properly 1634 received MPDU with TID14 1635 */ 1636 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1637 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1638 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1639 1640 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1641 1642 Field only valid when Received_qos_data_tid_bitmap[15] 1643 is set 1644 1645 1646 1647 QoS control field bits 15-8 of the last properly 1648 received MPDU with TID15 1649 */ 1650 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1651 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1652 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1653 1654 /* Description RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT 1655 1656 The number of bytes received within an MPDU for this 1657 user with correct FCS. This includes the FCS field 1658 1659 1660 1661 NOTE: 1662 1663 The sum of the four fields..... 1664 1665 Mpdu_ok_byte_count + 1666 1667 mpdu_err_byte_count + 1668 1669 Ampdu_delim_ok_count + Ampdu_delim_err_count 1670 1671 .....is the total number of bytes that were received for 1672 this user from the PHY. 1673 1674 1675 1676 <legal all> 1677 */ 1678 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET 0x00000044 1679 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB 0 1680 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK 0x01ffffff 1681 1682 /* Description RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0 1683 1684 Number of AMPDU delimiter received with correct 1685 structure 1686 1687 LSB 7 bits from this counter 1688 1689 <legal all> 1690 */ 1691 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET 0x00000044 1692 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB 25 1693 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK 0xfe000000 1694 1695 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT 1696 1697 The number of MPDU delimiter errors counted for this 1698 user 1699 1700 <legal all> 1701 */ 1702 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET 0x00000048 1703 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB 0 1704 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK 0x01ffffff 1705 1706 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7 1707 1708 Number of AMPDU delimiters received with correct 1709 structure 1710 1711 Bits 13-7 from this counter 1712 1713 <legal all> 1714 */ 1715 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET 0x00000048 1716 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB 25 1717 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK 0xfe000000 1718 1719 /* Description RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT 1720 1721 The number of bytes belonging to MPDUs with an FCS 1722 error. This includes the FCS field. 1723 1724 1725 1726 <legal all> 1727 */ 1728 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET 0x0000004c 1729 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB 0 1730 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK 0x01ffffff 1731 1732 /* Description RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14 1733 1734 Number of AMPDU delimiters received with correct 1735 structure 1736 1737 Bits 20-14 from this counter 1738 1739 <legal all> 1740 */ 1741 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET 0x0000004c 1742 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB 25 1743 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK 0xfe000000 1744 1745 1746 #endif // _RX_PPDU_END_USER_STATS_H_ 1747