1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name // 20*5113495bSYour Name // DO NOT EDIT! This file is automatically generated 21*5113495bSYour Name // These definitions are tied to a particular hardware layout 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 25*5113495bSYour Name #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 26*5113495bSYour Name #if !defined(__ASSEMBLER__) 27*5113495bSYour Name #endif 28*5113495bSYour Name 29*5113495bSYour Name 30*5113495bSYour Name // ################ START SUMMARY ################# 31*5113495bSYour Name // 32*5113495bSYour Name // Dword Fields 33*5113495bSYour Name // 0 filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], reserved_0[15:6], phy_ppdu_id[31:16] 34*5113495bSYour Name // 35*5113495bSYour Name // ################ END SUMMARY ################# 36*5113495bSYour Name 37*5113495bSYour Name #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1 38*5113495bSYour Name 39*5113495bSYour Name struct rx_rxpcu_classification_overview { 40*5113495bSYour Name uint32_t filter_pass_mpdus : 1, //[0] 41*5113495bSYour Name filter_pass_mpdus_fcs_ok : 1, //[1] 42*5113495bSYour Name monitor_direct_mpdus : 1, //[2] 43*5113495bSYour Name monitor_direct_mpdus_fcs_ok : 1, //[3] 44*5113495bSYour Name monitor_other_mpdus : 1, //[4] 45*5113495bSYour Name monitor_other_mpdus_fcs_ok : 1, //[5] 46*5113495bSYour Name reserved_0 : 10, //[15:6] 47*5113495bSYour Name phy_ppdu_id : 16; //[31:16] 48*5113495bSYour Name }; 49*5113495bSYour Name 50*5113495bSYour Name /* 51*5113495bSYour Name 52*5113495bSYour Name filter_pass_mpdus 53*5113495bSYour Name 54*5113495bSYour Name When set, at least one Filter Pass MPDU has been 55*5113495bSYour Name received. FCS might or might not have been passing 56*5113495bSYour Name 57*5113495bSYour Name <legal all> 58*5113495bSYour Name 59*5113495bSYour Name filter_pass_mpdus_fcs_ok 60*5113495bSYour Name 61*5113495bSYour Name When set, at least one Filter Pass MPDU has been 62*5113495bSYour Name received that has a correct FCS. 63*5113495bSYour Name 64*5113495bSYour Name <legal all> 65*5113495bSYour Name 66*5113495bSYour Name monitor_direct_mpdus 67*5113495bSYour Name 68*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 69*5113495bSYour Name received. FCS might or might not have been passing 70*5113495bSYour Name 71*5113495bSYour Name <legal all> 72*5113495bSYour Name 73*5113495bSYour Name monitor_direct_mpdus_fcs_ok 74*5113495bSYour Name 75*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 76*5113495bSYour Name received that has a correct FCS. 77*5113495bSYour Name 78*5113495bSYour Name <legal all> 79*5113495bSYour Name 80*5113495bSYour Name monitor_other_mpdus 81*5113495bSYour Name 82*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 83*5113495bSYour Name received. FCS might or might not have been passing 84*5113495bSYour Name 85*5113495bSYour Name <legal all> 86*5113495bSYour Name 87*5113495bSYour Name monitor_other_mpdus_fcs_ok 88*5113495bSYour Name 89*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 90*5113495bSYour Name received that has a correct FCS. 91*5113495bSYour Name 92*5113495bSYour Name <legal all> 93*5113495bSYour Name 94*5113495bSYour Name reserved_0 95*5113495bSYour Name 96*5113495bSYour Name <legal 0> 97*5113495bSYour Name 98*5113495bSYour Name phy_ppdu_id 99*5113495bSYour Name 100*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 101*5113495bSYour Name received. The counter value wraps around 102*5113495bSYour Name 103*5113495bSYour Name <legal all> 104*5113495bSYour Name */ 105*5113495bSYour Name 106*5113495bSYour Name 107*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS 108*5113495bSYour Name 109*5113495bSYour Name When set, at least one Filter Pass MPDU has been 110*5113495bSYour Name received. FCS might or might not have been passing 111*5113495bSYour Name 112*5113495bSYour Name <legal all> 113*5113495bSYour Name */ 114*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET 0x00000000 115*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB 0 116*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK 0x00000001 117*5113495bSYour Name 118*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK 119*5113495bSYour Name 120*5113495bSYour Name When set, at least one Filter Pass MPDU has been 121*5113495bSYour Name received that has a correct FCS. 122*5113495bSYour Name 123*5113495bSYour Name <legal all> 124*5113495bSYour Name */ 125*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 126*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1 127*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 128*5113495bSYour Name 129*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS 130*5113495bSYour Name 131*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 132*5113495bSYour Name received. FCS might or might not have been passing 133*5113495bSYour Name 134*5113495bSYour Name <legal all> 135*5113495bSYour Name */ 136*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 137*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB 2 138*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004 139*5113495bSYour Name 140*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK 141*5113495bSYour Name 142*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 143*5113495bSYour Name received that has a correct FCS. 144*5113495bSYour Name 145*5113495bSYour Name <legal all> 146*5113495bSYour Name */ 147*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 148*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 149*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 150*5113495bSYour Name 151*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS 152*5113495bSYour Name 153*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 154*5113495bSYour Name received. FCS might or might not have been passing 155*5113495bSYour Name 156*5113495bSYour Name <legal all> 157*5113495bSYour Name */ 158*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 159*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB 4 160*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK 0x00000010 161*5113495bSYour Name 162*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK 163*5113495bSYour Name 164*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 165*5113495bSYour Name received that has a correct FCS. 166*5113495bSYour Name 167*5113495bSYour Name <legal all> 168*5113495bSYour Name */ 169*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 170*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 171*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 172*5113495bSYour Name 173*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0 174*5113495bSYour Name 175*5113495bSYour Name <legal 0> 176*5113495bSYour Name */ 177*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET 0x00000000 178*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB 6 179*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK 0x0000ffc0 180*5113495bSYour Name 181*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID 182*5113495bSYour Name 183*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 184*5113495bSYour Name received. The counter value wraps around 185*5113495bSYour Name 186*5113495bSYour Name <legal all> 187*5113495bSYour Name */ 188*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET 0x00000000 189*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB 16 190*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK 0xffff0000 191*5113495bSYour Name 192*5113495bSYour Name 193*5113495bSYour Name #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 194