1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 25 #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], reserved_0[15:6], phy_ppdu_id[31:16] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1 38 39 struct rx_rxpcu_classification_overview { 40 uint32_t filter_pass_mpdus : 1, //[0] 41 filter_pass_mpdus_fcs_ok : 1, //[1] 42 monitor_direct_mpdus : 1, //[2] 43 monitor_direct_mpdus_fcs_ok : 1, //[3] 44 monitor_other_mpdus : 1, //[4] 45 monitor_other_mpdus_fcs_ok : 1, //[5] 46 reserved_0 : 10, //[15:6] 47 phy_ppdu_id : 16; //[31:16] 48 }; 49 50 /* 51 52 filter_pass_mpdus 53 54 When set, at least one Filter Pass MPDU has been 55 received. FCS might or might not have been passing 56 57 <legal all> 58 59 filter_pass_mpdus_fcs_ok 60 61 When set, at least one Filter Pass MPDU has been 62 received that has a correct FCS. 63 64 <legal all> 65 66 monitor_direct_mpdus 67 68 When set, at least one Monitor Direct MPDU has been 69 received. FCS might or might not have been passing 70 71 <legal all> 72 73 monitor_direct_mpdus_fcs_ok 74 75 When set, at least one Monitor Direct MPDU has been 76 received that has a correct FCS. 77 78 <legal all> 79 80 monitor_other_mpdus 81 82 When set, at least one Monitor Direct MPDU has been 83 received. FCS might or might not have been passing 84 85 <legal all> 86 87 monitor_other_mpdus_fcs_ok 88 89 When set, at least one Monitor Direct MPDU has been 90 received that has a correct FCS. 91 92 <legal all> 93 94 reserved_0 95 96 <legal 0> 97 98 phy_ppdu_id 99 100 A ppdu counter value that PHY increments for every PPDU 101 received. The counter value wraps around 102 103 <legal all> 104 */ 105 106 107 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS 108 109 When set, at least one Filter Pass MPDU has been 110 received. FCS might or might not have been passing 111 112 <legal all> 113 */ 114 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET 0x00000000 115 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB 0 116 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK 0x00000001 117 118 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK 119 120 When set, at least one Filter Pass MPDU has been 121 received that has a correct FCS. 122 123 <legal all> 124 */ 125 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 126 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1 127 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 128 129 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS 130 131 When set, at least one Monitor Direct MPDU has been 132 received. FCS might or might not have been passing 133 134 <legal all> 135 */ 136 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 137 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB 2 138 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004 139 140 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK 141 142 When set, at least one Monitor Direct MPDU has been 143 received that has a correct FCS. 144 145 <legal all> 146 */ 147 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 148 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 149 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 150 151 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS 152 153 When set, at least one Monitor Direct MPDU has been 154 received. FCS might or might not have been passing 155 156 <legal all> 157 */ 158 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 159 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB 4 160 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK 0x00000010 161 162 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK 163 164 When set, at least one Monitor Direct MPDU has been 165 received that has a correct FCS. 166 167 <legal all> 168 */ 169 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 170 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 171 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 172 173 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0 174 175 <legal 0> 176 */ 177 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET 0x00000000 178 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB 6 179 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK 0x0000ffc0 180 181 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID 182 183 A ppdu counter value that PHY increments for every PPDU 184 received. The counter value wraps around 185 186 <legal all> 187 */ 188 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET 0x00000000 189 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB 16 190 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK 0xffff0000 191 192 193 #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 194