xref: /wlan-driver/fw-api/hw/qca6290/v2/tcl_status_ring.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _TCL_STATUS_RING_H_
25 #define _TCL_STATUS_RING_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	gse_ctrl[3:0], ase_fse_sel[4], cache_op_res[6:5], reserved_0a[7], msdu_cnt_n[31:8]
34 //	1	msdu_byte_cnt_n[31:0]
35 //	2	msdu_timestmp_n[31:0]
36 //	3	cmd_meta_data_31_0[31:0]
37 //	4	cmd_meta_data_63_32[31:0]
38 //	5	hash_indx_val[19:0], reserved_5a[31:20]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[19:0], ring_id[27:20], looping_count[31:28]
41 //
42 // ################ END SUMMARY #################
43 
44 #define NUM_OF_DWORDS_TCL_STATUS_RING 8
45 
46 struct tcl_status_ring {
47              uint32_t gse_ctrl                        :  4, //[3:0]
48                       ase_fse_sel                     :  1, //[4]
49                       cache_op_res                    :  2, //[6:5]
50                       reserved_0a                     :  1, //[7]
51                       msdu_cnt_n                      : 24; //[31:8]
52              uint32_t msdu_byte_cnt_n                 : 32; //[31:0]
53              uint32_t msdu_timestmp_n                 : 32; //[31:0]
54              uint32_t cmd_meta_data_31_0              : 32; //[31:0]
55              uint32_t cmd_meta_data_63_32             : 32; //[31:0]
56              uint32_t hash_indx_val                   : 20, //[19:0]
57                       reserved_5a                     : 12; //[31:20]
58              uint32_t reserved_6a                     : 32; //[31:0]
59              uint32_t reserved_7a                     : 20, //[19:0]
60                       ring_id                         :  8, //[27:20]
61                       looping_count                   :  4; //[31:28]
62 };
63 
64 /*
65 
66 gse_ctrl
67 
68 			GSE control operations. This includes cache operations
69 			and table entry statistics read/clear operation.
70 
71 			<enum 0 rd_stat> Report or Read statistics
72 
73 			<enum 1 srch_dis> Search disable. Report only Hash
74 
75 			<enum 2 Wr_bk_single> Write Back single entry
76 
77 			<enum 3 wr_bk_all> Write Back entire cache entry
78 
79 			<enum 4 inval_single> Invalidate single cache entry
80 
81 			<enum 5 inval_all> Invalidate entire cache
82 
83 			<enum 6 wr_bk_inval_single> Write back and Invalidate
84 			single entry in cache
85 
86 			<enum 7 wr_bk_inval_all> write back and invalidate
87 			entire cache
88 
89 			<enum 8 clr_stat_single> Clear statistics for single
90 			entry
91 
92 			<legal 0-8>
93 
94 			Rest of the values reserved.
95 
96 			For all single entry control operations (write back,
97 			Invalidate or both)Statistics will be reported
98 
99 ase_fse_sel
100 
101 			Search Engine for which operation is done.
102 
103 			1'b0: Address Search Engine Result
104 
105 			1'b1: Flow Search Engine result
106 
107 cache_op_res
108 
109 			Cache operation result. Following are results of cache
110 			operation.
111 
112 			<enum 0 op_done>  Operation successful
113 
114 			<enum 1 not_fnd> Entry not found in Table
115 
116 			<enum 2 timeout_er>  Timeout Error
117 
118 			<legal 0-2>
119 
120 reserved_0a
121 
122 			<legal 0>
123 
124 msdu_cnt_n
125 
126 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
127 			4'b1000
128 
129 msdu_byte_cnt_n
130 
131 			MSDU byte count for entry 1. Valid when GSE_CTRL is
132 			4'b0111 and 4'b1000
133 
134 msdu_timestmp_n
135 
136 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
137 			4'b0111 and 4'b1000
138 
139 cmd_meta_data_31_0
140 
141 			Meta data from input ring
142 
143 			<legal all>
144 
145 cmd_meta_data_63_32
146 
147 			Meta data from input ring
148 
149 			<legal all>
150 
151 hash_indx_val
152 
153 
154 			Hash value of the entry in table in case of search
155 			failed or search disable.
156 
157 			<legal all>
158 
159 reserved_5a
160 
161 			<legal 0>
162 
163 reserved_6a
164 
165 			<legal 0>
166 
167 reserved_7a
168 
169 			<legal 0>
170 
171 ring_id
172 
173 			The buffer pointer ring ID.
174 
175 
176 
177 			Helps with debugging when dumping ring contents.
178 
179 			<legal all>
180 
181 looping_count
182 
183 			A count value that indicates the number of times the
184 			producer of entries into the Ring has looped around the
185 			ring.
186 
187 			At initialization time, this value is set to 0. On the
188 			first loop, this value is set to 1. After the max value is
189 			reached allowed by the number of bits for this field, the
190 			count value continues with 0 again.
191 
192 
193 
194 			In case SW is the consumer of the ring entries, it can
195 			use this field to figure out up to where the producer of
196 			entries has created new entries. This eliminates the need to
197 			check where the head pointer' of the ring is located once
198 			the SW starts processing an interrupt indicating that new
199 			entries have been put into this ring...
200 
201 
202 
203 			Also note that SW if it wants only needs to look at the
204 			LSB bit of this count value.
205 
206 			<legal all>
207 */
208 
209 
210 /* Description		TCL_STATUS_RING_0_GSE_CTRL
211 
212 			GSE control operations. This includes cache operations
213 			and table entry statistics read/clear operation.
214 
215 			<enum 0 rd_stat> Report or Read statistics
216 
217 			<enum 1 srch_dis> Search disable. Report only Hash
218 
219 			<enum 2 Wr_bk_single> Write Back single entry
220 
221 			<enum 3 wr_bk_all> Write Back entire cache entry
222 
223 			<enum 4 inval_single> Invalidate single cache entry
224 
225 			<enum 5 inval_all> Invalidate entire cache
226 
227 			<enum 6 wr_bk_inval_single> Write back and Invalidate
228 			single entry in cache
229 
230 			<enum 7 wr_bk_inval_all> write back and invalidate
231 			entire cache
232 
233 			<enum 8 clr_stat_single> Clear statistics for single
234 			entry
235 
236 			<legal 0-8>
237 
238 			Rest of the values reserved.
239 
240 			For all single entry control operations (write back,
241 			Invalidate or both)Statistics will be reported
242 */
243 #define TCL_STATUS_RING_0_GSE_CTRL_OFFSET                            0x00000000
244 #define TCL_STATUS_RING_0_GSE_CTRL_LSB                               0
245 #define TCL_STATUS_RING_0_GSE_CTRL_MASK                              0x0000000f
246 
247 /* Description		TCL_STATUS_RING_0_ASE_FSE_SEL
248 
249 			Search Engine for which operation is done.
250 
251 			1'b0: Address Search Engine Result
252 
253 			1'b1: Flow Search Engine result
254 */
255 #define TCL_STATUS_RING_0_ASE_FSE_SEL_OFFSET                         0x00000000
256 #define TCL_STATUS_RING_0_ASE_FSE_SEL_LSB                            4
257 #define TCL_STATUS_RING_0_ASE_FSE_SEL_MASK                           0x00000010
258 
259 /* Description		TCL_STATUS_RING_0_CACHE_OP_RES
260 
261 			Cache operation result. Following are results of cache
262 			operation.
263 
264 			<enum 0 op_done>  Operation successful
265 
266 			<enum 1 not_fnd> Entry not found in Table
267 
268 			<enum 2 timeout_er>  Timeout Error
269 
270 			<legal 0-2>
271 */
272 #define TCL_STATUS_RING_0_CACHE_OP_RES_OFFSET                        0x00000000
273 #define TCL_STATUS_RING_0_CACHE_OP_RES_LSB                           5
274 #define TCL_STATUS_RING_0_CACHE_OP_RES_MASK                          0x00000060
275 
276 /* Description		TCL_STATUS_RING_0_RESERVED_0A
277 
278 			<legal 0>
279 */
280 #define TCL_STATUS_RING_0_RESERVED_0A_OFFSET                         0x00000000
281 #define TCL_STATUS_RING_0_RESERVED_0A_LSB                            7
282 #define TCL_STATUS_RING_0_RESERVED_0A_MASK                           0x00000080
283 
284 /* Description		TCL_STATUS_RING_0_MSDU_CNT_N
285 
286 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
287 			4'b1000
288 */
289 #define TCL_STATUS_RING_0_MSDU_CNT_N_OFFSET                          0x00000000
290 #define TCL_STATUS_RING_0_MSDU_CNT_N_LSB                             8
291 #define TCL_STATUS_RING_0_MSDU_CNT_N_MASK                            0xffffff00
292 
293 /* Description		TCL_STATUS_RING_1_MSDU_BYTE_CNT_N
294 
295 			MSDU byte count for entry 1. Valid when GSE_CTRL is
296 			4'b0111 and 4'b1000
297 */
298 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_OFFSET                     0x00000004
299 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_LSB                        0
300 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_MASK                       0xffffffff
301 
302 /* Description		TCL_STATUS_RING_2_MSDU_TIMESTMP_N
303 
304 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
305 			4'b0111 and 4'b1000
306 */
307 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_OFFSET                     0x00000008
308 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_LSB                        0
309 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_MASK                       0xffffffff
310 
311 /* Description		TCL_STATUS_RING_3_CMD_META_DATA_31_0
312 
313 			Meta data from input ring
314 
315 			<legal all>
316 */
317 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_OFFSET                  0x0000000c
318 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_LSB                     0
319 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_MASK                    0xffffffff
320 
321 /* Description		TCL_STATUS_RING_4_CMD_META_DATA_63_32
322 
323 			Meta data from input ring
324 
325 			<legal all>
326 */
327 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_OFFSET                 0x00000010
328 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_LSB                    0
329 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_MASK                   0xffffffff
330 
331 /* Description		TCL_STATUS_RING_5_HASH_INDX_VAL
332 
333 
334 			Hash value of the entry in table in case of search
335 			failed or search disable.
336 
337 			<legal all>
338 */
339 #define TCL_STATUS_RING_5_HASH_INDX_VAL_OFFSET                       0x00000014
340 #define TCL_STATUS_RING_5_HASH_INDX_VAL_LSB                          0
341 #define TCL_STATUS_RING_5_HASH_INDX_VAL_MASK                         0x000fffff
342 
343 /* Description		TCL_STATUS_RING_5_RESERVED_5A
344 
345 			<legal 0>
346 */
347 #define TCL_STATUS_RING_5_RESERVED_5A_OFFSET                         0x00000014
348 #define TCL_STATUS_RING_5_RESERVED_5A_LSB                            20
349 #define TCL_STATUS_RING_5_RESERVED_5A_MASK                           0xfff00000
350 
351 /* Description		TCL_STATUS_RING_6_RESERVED_6A
352 
353 			<legal 0>
354 */
355 #define TCL_STATUS_RING_6_RESERVED_6A_OFFSET                         0x00000018
356 #define TCL_STATUS_RING_6_RESERVED_6A_LSB                            0
357 #define TCL_STATUS_RING_6_RESERVED_6A_MASK                           0xffffffff
358 
359 /* Description		TCL_STATUS_RING_7_RESERVED_7A
360 
361 			<legal 0>
362 */
363 #define TCL_STATUS_RING_7_RESERVED_7A_OFFSET                         0x0000001c
364 #define TCL_STATUS_RING_7_RESERVED_7A_LSB                            0
365 #define TCL_STATUS_RING_7_RESERVED_7A_MASK                           0x000fffff
366 
367 /* Description		TCL_STATUS_RING_7_RING_ID
368 
369 			The buffer pointer ring ID.
370 
371 
372 
373 			Helps with debugging when dumping ring contents.
374 
375 			<legal all>
376 */
377 #define TCL_STATUS_RING_7_RING_ID_OFFSET                             0x0000001c
378 #define TCL_STATUS_RING_7_RING_ID_LSB                                20
379 #define TCL_STATUS_RING_7_RING_ID_MASK                               0x0ff00000
380 
381 /* Description		TCL_STATUS_RING_7_LOOPING_COUNT
382 
383 			A count value that indicates the number of times the
384 			producer of entries into the Ring has looped around the
385 			ring.
386 
387 			At initialization time, this value is set to 0. On the
388 			first loop, this value is set to 1. After the max value is
389 			reached allowed by the number of bits for this field, the
390 			count value continues with 0 again.
391 
392 
393 
394 			In case SW is the consumer of the ring entries, it can
395 			use this field to figure out up to where the producer of
396 			entries has created new entries. This eliminates the need to
397 			check where the head pointer' of the ring is located once
398 			the SW starts processing an interrupt indicating that new
399 			entries have been put into this ring...
400 
401 
402 
403 			Also note that SW if it wants only needs to look at the
404 			LSB bit of this count value.
405 
406 			<legal all>
407 */
408 #define TCL_STATUS_RING_7_LOOPING_COUNT_OFFSET                       0x0000001c
409 #define TCL_STATUS_RING_7_LOOPING_COUNT_LSB                          28
410 #define TCL_STATUS_RING_7_LOOPING_COUNT_MASK                         0xf0000000
411 
412 
413 #endif // _TCL_STATUS_RING_H_
414