1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name #ifndef __MAC_TCL_REG_SEQ_REG_H__ 20*5113495bSYour Name #define __MAC_TCL_REG_SEQ_REG_H__ 21*5113495bSYour Name 22*5113495bSYour Name #include "seq_hwio.h" 23*5113495bSYour Name #include "mac_tcl_reg_seq_hwiobase.h" 24*5113495bSYour Name #ifdef SCALE_INCLUDES 25*5113495bSYour Name #include "HALhwio.h" 26*5113495bSYour Name #else 27*5113495bSYour Name #include "msmhwio.h" 28*5113495bSYour Name #endif 29*5113495bSYour Name 30*5113495bSYour Name 31*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 32*5113495bSYour Name // Register Data for Block MAC_TCL_REG 33*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 34*5113495bSYour Name 35*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CTRL //// 36*5113495bSYour Name 37*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x) (x+0x00000000) 38*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_PHYS(x) (x+0x00000000) 39*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK 0x0003ffe0 40*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_SHFT 5 41*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x) \ 42*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK) 43*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ 44*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask) 45*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUT(x, val) \ 46*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), val) 47*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 48*5113495bSYour Name do {\ 49*5113495bSYour Name HWIO_INTLOCK(); \ 50*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x)); \ 51*5113495bSYour Name HWIO_INTFREE();\ 52*5113495bSYour Name } while (0) 53*5113495bSYour Name 54*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 55*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 56*5113495bSYour Name 57*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 58*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 59*5113495bSYour Name 60*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CTRL //// 61*5113495bSYour Name 62*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x) (x+0x00000004) 63*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_PHYS(x) (x+0x00000004) 64*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK 0x0003ffe0 65*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_SHFT 5 66*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x) \ 67*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK) 68*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ 69*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask) 70*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUT(x, val) \ 71*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), val) 72*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ 73*5113495bSYour Name do {\ 74*5113495bSYour Name HWIO_INTLOCK(); \ 75*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x)); \ 76*5113495bSYour Name HWIO_INTFREE();\ 77*5113495bSYour Name } while (0) 78*5113495bSYour Name 79*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 80*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 81*5113495bSYour Name 82*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_BMSK 0x00000020 83*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_SHFT 0x5 84*5113495bSYour Name 85*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CTRL //// 86*5113495bSYour Name 87*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x) (x+0x00000008) 88*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_PHYS(x) (x+0x00000008) 89*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK 0x0003ffe0 90*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_SHFT 5 91*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x) \ 92*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK) 93*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ 94*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask) 95*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUT(x, val) \ 96*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), val) 97*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUTM(x, mask, val) \ 98*5113495bSYour Name do {\ 99*5113495bSYour Name HWIO_INTLOCK(); \ 100*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x)); \ 101*5113495bSYour Name HWIO_INTFREE();\ 102*5113495bSYour Name } while (0) 103*5113495bSYour Name 104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 105*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 106*5113495bSYour Name 107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_BMSK 0x00000020 108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_SHFT 0x5 109*5113495bSYour Name 110*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CTRL //// 111*5113495bSYour Name 112*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x) (x+0x0000000c) 113*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_PHYS(x) (x+0x0000000c) 114*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK 0x0003ffe0 115*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_SHFT 5 116*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x) \ 117*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK) 118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_INM(x, mask) \ 119*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask) 120*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUT(x, val) \ 121*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), val) 122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 123*5113495bSYour Name do {\ 124*5113495bSYour Name HWIO_INTLOCK(); \ 125*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x)); \ 126*5113495bSYour Name HWIO_INTFREE();\ 127*5113495bSYour Name } while (0) 128*5113495bSYour Name 129*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 130*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 131*5113495bSYour Name 132*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 133*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 134*5113495bSYour Name 135*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CTRL //// 136*5113495bSYour Name 137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_ADDR(x) (x+0x00000010) 138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_PHYS(x) (x+0x00000010) 139*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_RMSK 0x0003ffe0 140*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_SHFT 5 141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_IN(x) \ 142*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_RMSK) 143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_INM(x, mask) \ 144*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_ADDR(x), mask) 145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_OUT(x, val) \ 146*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_ADDR(x), val) 147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_OUTM(x, mask, val) \ 148*5113495bSYour Name do {\ 149*5113495bSYour Name HWIO_INTLOCK(); \ 150*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_IN(x)); \ 151*5113495bSYour Name HWIO_INTFREE();\ 152*5113495bSYour Name } while (0) 153*5113495bSYour Name 154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 156*5113495bSYour Name 157*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_RNG_PRTY_BMSK 0x00000020 158*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CTRL_RNG_PRTY_SHFT 0x5 159*5113495bSYour Name 160*5113495bSYour Name //// Register TCL_R0_CONS_RING_CMN_CTRL_REG //// 161*5113495bSYour Name 162*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x) (x+0x00000014) 163*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_PHYS(x) (x+0x00000014) 164*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK 0x000fffff 165*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SHFT 0 166*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x) \ 167*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK) 168*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INM(x, mask) \ 169*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask) 170*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUT(x, val) \ 171*5113495bSYour Name out_dword( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), val) 172*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUTM(x, mask, val) \ 173*5113495bSYour Name do {\ 174*5113495bSYour Name HWIO_INTLOCK(); \ 175*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask, val, HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x)); \ 176*5113495bSYour Name HWIO_INTFREE();\ 177*5113495bSYour Name } while (0) 178*5113495bSYour Name 179*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_BMSK 0x00080000 180*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_SHFT 0x13 181*5113495bSYour Name 182*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_BMSK 0x00040000 183*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_SHFT 0x12 184*5113495bSYour Name 185*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK 0x00020000 186*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT 0x11 187*5113495bSYour Name 188*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_BMSK 0x0001c000 189*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_SHFT 0xe 190*5113495bSYour Name 191*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_BMSK 0x00002000 192*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_SHFT 0xd 193*5113495bSYour Name 194*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CMD_RNG_HALT_STAT_BMSK 0x00001000 195*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CMD_RNG_HALT_STAT_SHFT 0xc 196*5113495bSYour Name 197*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_BMSK 0x00000800 198*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_SHFT 0xb 199*5113495bSYour Name 200*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_BMSK 0x00000400 201*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_SHFT 0xa 202*5113495bSYour Name 203*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_BMSK 0x00000200 204*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_SHFT 0x9 205*5113495bSYour Name 206*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_BMSK 0x00000100 207*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_SHFT 0x8 208*5113495bSYour Name 209*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CMD_RNG_HALT_BMSK 0x00000080 210*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CMD_RNG_HALT_SHFT 0x7 211*5113495bSYour Name 212*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_BMSK 0x00000040 213*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_SHFT 0x6 214*5113495bSYour Name 215*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_BMSK 0x00000020 216*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_SHFT 0x5 217*5113495bSYour Name 218*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_BMSK 0x00000010 219*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_SHFT 0x4 220*5113495bSYour Name 221*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_BMSK 0x00000008 222*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_SHFT 0x3 223*5113495bSYour Name 224*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_BMSK 0x00000004 225*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_SHFT 0x2 226*5113495bSYour Name 227*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_BMSK 0x00000002 228*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_SHFT 0x1 229*5113495bSYour Name 230*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_BMSK 0x00000001 231*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_SHFT 0x0 232*5113495bSYour Name 233*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_CTRL //// 234*5113495bSYour Name 235*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x) (x+0x00000018) 236*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_PHYS(x) (x+0x00000018) 237*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK 0x00003fff 238*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_SHFT 0 239*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x) \ 240*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK) 241*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_INM(x, mask) \ 242*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask) 243*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUT(x, val) \ 244*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), val) 245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUTM(x, mask, val) \ 246*5113495bSYour Name do {\ 247*5113495bSYour Name HWIO_INTLOCK(); \ 248*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x)); \ 249*5113495bSYour Name HWIO_INTFREE();\ 250*5113495bSYour Name } while (0) 251*5113495bSYour Name 252*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_BMSK 0x00002000 253*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_SHFT 0xd 254*5113495bSYour Name 255*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_BMSK 0x00001000 256*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_SHFT 0xc 257*5113495bSYour Name 258*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 259*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 260*5113495bSYour Name 261*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_CTRL //// 262*5113495bSYour Name 263*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x) (x+0x0000001c) 264*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_PHYS(x) (x+0x0000001c) 265*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK 0x00000fff 266*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_SHFT 0 267*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x) \ 268*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK) 269*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_INM(x, mask) \ 270*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask) 271*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUT(x, val) \ 272*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), val) 273*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUTM(x, mask, val) \ 274*5113495bSYour Name do {\ 275*5113495bSYour Name HWIO_INTLOCK(); \ 276*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x)); \ 277*5113495bSYour Name HWIO_INTFREE();\ 278*5113495bSYour Name } while (0) 279*5113495bSYour Name 280*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 281*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 282*5113495bSYour Name 283*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_CTRL //// 284*5113495bSYour Name 285*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x) (x+0x00000020) 286*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_PHYS(x) (x+0x00000020) 287*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK 0x00000fff 288*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_SHFT 0 289*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x) \ 290*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK) 291*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_INM(x, mask) \ 292*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask) 293*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUT(x, val) \ 294*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), val) 295*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUTM(x, mask, val) \ 296*5113495bSYour Name do {\ 297*5113495bSYour Name HWIO_INTLOCK(); \ 298*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x)); \ 299*5113495bSYour Name HWIO_INTFREE();\ 300*5113495bSYour Name } while (0) 301*5113495bSYour Name 302*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 303*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 304*5113495bSYour Name 305*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_CTRL //// 306*5113495bSYour Name 307*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x) (x+0x00000024) 308*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_PHYS(x) (x+0x00000024) 309*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK 0x00000fff 310*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_SHFT 0 311*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x) \ 312*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK) 313*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_INM(x, mask) \ 314*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask) 315*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUT(x, val) \ 316*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), val) 317*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUTM(x, mask, val) \ 318*5113495bSYour Name do {\ 319*5113495bSYour Name HWIO_INTLOCK(); \ 320*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x)); \ 321*5113495bSYour Name HWIO_INTFREE();\ 322*5113495bSYour Name } while (0) 323*5113495bSYour Name 324*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 325*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 326*5113495bSYour Name 327*5113495bSYour Name //// Register TCL_R0_GEN_CTRL //// 328*5113495bSYour Name 329*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDR(x) (x+0x00000028) 330*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PHYS(x) (x+0x00000028) 331*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_RMSK 0xfffff1fb 332*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_SHFT 0 333*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_IN(x) \ 334*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), HWIO_TCL_R0_GEN_CTRL_RMSK) 335*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_INM(x, mask) \ 336*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask) 337*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUT(x, val) \ 338*5113495bSYour Name out_dword( HWIO_TCL_R0_GEN_CTRL_ADDR(x), val) 339*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUTM(x, mask, val) \ 340*5113495bSYour Name do {\ 341*5113495bSYour Name HWIO_INTLOCK(); \ 342*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GEN_CTRL_IN(x)); \ 343*5113495bSYour Name HWIO_INTFREE();\ 344*5113495bSYour Name } while (0) 345*5113495bSYour Name 346*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_BMSK 0xffff0000 347*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_SHFT 0x10 348*5113495bSYour Name 349*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_BMSK 0x00008000 350*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_SHFT 0xf 351*5113495bSYour Name 352*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_BMSK 0x00004000 353*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_SHFT 0xe 354*5113495bSYour Name 355*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_BMSK 0x00002000 356*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_SHFT 0xd 357*5113495bSYour Name 358*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_BMSK 0x00001000 359*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_SHFT 0xc 360*5113495bSYour Name 361*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_BMSK 0x00000100 362*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_SHFT 0x8 363*5113495bSYour Name 364*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_BMSK 0x00000080 365*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_SHFT 0x7 366*5113495bSYour Name 367*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_BMSK 0x00000040 368*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_SHFT 0x6 369*5113495bSYour Name 370*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_BMSK 0x00000020 371*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_SHFT 0x5 372*5113495bSYour Name 373*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_BMSK 0x00000010 374*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_SHFT 0x4 375*5113495bSYour Name 376*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_BMSK 0x00000008 377*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_SHFT 0x3 378*5113495bSYour Name 379*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_BMSK 0x00000002 380*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_SHFT 0x1 381*5113495bSYour Name 382*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_BMSK 0x00000001 383*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_SHFT 0x0 384*5113495bSYour Name 385*5113495bSYour Name //// Register TCL_R0_DSCP_TID_MAP_n //// 386*5113495bSYour Name 387*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n) (base+0x2C+0x4*n) 388*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_PHYS(base, n) (base+0x2C+0x4*n) 389*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK 0xffffffff 390*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_SHFT 0 391*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_MAXn 287 392*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n) \ 393*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK) 394*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INMI(base, n, mask) \ 395*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask) 396*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTI(base, n, val) \ 397*5113495bSYour Name out_dword( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), val) 398*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTMI(base, n, mask, val) \ 399*5113495bSYour Name do {\ 400*5113495bSYour Name HWIO_INTLOCK(); \ 401*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask, val, HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n)); \ 402*5113495bSYour Name HWIO_INTFREE();\ 403*5113495bSYour Name } while (0) 404*5113495bSYour Name 405*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_BMSK 0xffffffff 406*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_SHFT 0x0 407*5113495bSYour Name 408*5113495bSYour Name //// Register TCL_R0_PCP_TID_MAP //// 409*5113495bSYour Name 410*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_ADDR(x) (x+0x000004ac) 411*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PHYS(x) (x+0x000004ac) 412*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_RMSK 0x00ffffff 413*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_SHFT 0 414*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_IN(x) \ 415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), HWIO_TCL_R0_PCP_TID_MAP_RMSK) 416*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_INM(x, mask) \ 417*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask) 418*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUT(x, val) \ 419*5113495bSYour Name out_dword( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), val) 420*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUTM(x, mask, val) \ 421*5113495bSYour Name do {\ 422*5113495bSYour Name HWIO_INTLOCK(); \ 423*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask, val, HWIO_TCL_R0_PCP_TID_MAP_IN(x)); \ 424*5113495bSYour Name HWIO_INTFREE();\ 425*5113495bSYour Name } while (0) 426*5113495bSYour Name 427*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_BMSK 0x00e00000 428*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT 0x15 429*5113495bSYour Name 430*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_BMSK 0x001c0000 431*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT 0x12 432*5113495bSYour Name 433*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_BMSK 0x00038000 434*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT 0xf 435*5113495bSYour Name 436*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_BMSK 0x00007000 437*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT 0xc 438*5113495bSYour Name 439*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_BMSK 0x00000e00 440*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT 0x9 441*5113495bSYour Name 442*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_BMSK 0x000001c0 443*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT 0x6 444*5113495bSYour Name 445*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_BMSK 0x00000038 446*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT 0x3 447*5113495bSYour Name 448*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_BMSK 0x00000007 449*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_SHFT 0x0 450*5113495bSYour Name 451*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_31_0 //// 452*5113495bSYour Name 453*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x) (x+0x000004b0) 454*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_PHYS(x) (x+0x000004b0) 455*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK 0xffffffff 456*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_SHFT 0 457*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x) \ 458*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK) 459*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_INM(x, mask) \ 460*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask) 461*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUT(x, val) \ 462*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), val) 463*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUTM(x, mask, val) \ 464*5113495bSYour Name do {\ 465*5113495bSYour Name HWIO_INTLOCK(); \ 466*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x)); \ 467*5113495bSYour Name HWIO_INTFREE();\ 468*5113495bSYour Name } while (0) 469*5113495bSYour Name 470*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_BMSK 0xffffffff 471*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_SHFT 0x0 472*5113495bSYour Name 473*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_63_32 //// 474*5113495bSYour Name 475*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x) (x+0x000004b4) 476*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_PHYS(x) (x+0x000004b4) 477*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK 0xffffffff 478*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_SHFT 0 479*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x) \ 480*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK) 481*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_INM(x, mask) \ 482*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask) 483*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUT(x, val) \ 484*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), val) 485*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUTM(x, mask, val) \ 486*5113495bSYour Name do {\ 487*5113495bSYour Name HWIO_INTLOCK(); \ 488*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x)); \ 489*5113495bSYour Name HWIO_INTFREE();\ 490*5113495bSYour Name } while (0) 491*5113495bSYour Name 492*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_BMSK 0xffffffff 493*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_SHFT 0x0 494*5113495bSYour Name 495*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_64 //// 496*5113495bSYour Name 497*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x) (x+0x000004b8) 498*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_PHYS(x) (x+0x000004b8) 499*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK 0x00000001 500*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_SHFT 0 501*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x) \ 502*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK) 503*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_INM(x, mask) \ 504*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask) 505*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUT(x, val) \ 506*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), val) 507*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUTM(x, mask, val) \ 508*5113495bSYour Name do {\ 509*5113495bSYour Name HWIO_INTLOCK(); \ 510*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x)); \ 511*5113495bSYour Name HWIO_INTFREE();\ 512*5113495bSYour Name } while (0) 513*5113495bSYour Name 514*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_BMSK 0x00000001 515*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_SHFT 0x0 516*5113495bSYour Name 517*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_QUEUE //// 518*5113495bSYour Name 519*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x) (x+0x000004bc) 520*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PHYS(x) (x+0x000004bc) 521*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK 0x00fffdfc 522*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_SHFT 2 523*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x) \ 524*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK) 525*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_INM(x, mask) \ 526*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask) 527*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUT(x, val) \ 528*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), val) 529*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUTM(x, mask, val) \ 530*5113495bSYour Name do {\ 531*5113495bSYour Name HWIO_INTLOCK(); \ 532*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x)); \ 533*5113495bSYour Name HWIO_INTFREE();\ 534*5113495bSYour Name } while (0) 535*5113495bSYour Name 536*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_BMSK 0x00800000 537*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_SHFT 0x17 538*5113495bSYour Name 539*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_BMSK 0x00700000 540*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_SHFT 0x14 541*5113495bSYour Name 542*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_BMSK 0x000e0000 543*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_SHFT 0x11 544*5113495bSYour Name 545*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_BMSK 0x0001c000 546*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_SHFT 0xe 547*5113495bSYour Name 548*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_BMSK 0x00002000 549*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_SHFT 0xd 550*5113495bSYour Name 551*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_BMSK 0x00001000 552*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_SHFT 0xc 553*5113495bSYour Name 554*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_BMSK 0x00000800 555*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_SHFT 0xb 556*5113495bSYour Name 557*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_BMSK 0x00000400 558*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_SHFT 0xa 559*5113495bSYour Name 560*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_BMSK 0x000001c0 561*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_SHFT 0x6 562*5113495bSYour Name 563*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_BMSK 0x00000030 564*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_SHFT 0x4 565*5113495bSYour Name 566*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_BMSK 0x0000000c 567*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_SHFT 0x2 568*5113495bSYour Name 569*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_LOW //// 570*5113495bSYour Name 571*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c0) 572*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c0) 573*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 574*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_SHFT 0 575*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x) \ 576*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK) 577*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 578*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 579*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 580*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 581*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 582*5113495bSYour Name do {\ 583*5113495bSYour Name HWIO_INTLOCK(); \ 584*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 585*5113495bSYour Name HWIO_INTFREE();\ 586*5113495bSYour Name } while (0) 587*5113495bSYour Name 588*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 589*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 590*5113495bSYour Name 591*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH //// 592*5113495bSYour Name 593*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004c4) 594*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004c4) 595*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 596*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_SHFT 0 597*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 598*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK) 599*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 600*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 601*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 602*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 603*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 604*5113495bSYour Name do {\ 605*5113495bSYour Name HWIO_INTLOCK(); \ 606*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 607*5113495bSYour Name HWIO_INTFREE();\ 608*5113495bSYour Name } while (0) 609*5113495bSYour Name 610*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 611*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 612*5113495bSYour Name 613*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_LOW //// 614*5113495bSYour Name 615*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c8) 616*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c8) 617*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 618*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_SHFT 0 619*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x) \ 620*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK) 621*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 622*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 623*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 624*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 625*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 626*5113495bSYour Name do {\ 627*5113495bSYour Name HWIO_INTLOCK(); \ 628*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 629*5113495bSYour Name HWIO_INTFREE();\ 630*5113495bSYour Name } while (0) 631*5113495bSYour Name 632*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 633*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 634*5113495bSYour Name 635*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH //// 636*5113495bSYour Name 637*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004cc) 638*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004cc) 639*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 640*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_SHFT 0 641*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 642*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK) 643*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 644*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 645*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 646*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 647*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 648*5113495bSYour Name do {\ 649*5113495bSYour Name HWIO_INTLOCK(); \ 650*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 651*5113495bSYour Name HWIO_INTFREE();\ 652*5113495bSYour Name } while (0) 653*5113495bSYour Name 654*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 655*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 656*5113495bSYour Name 657*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_METADATA //// 658*5113495bSYour Name 659*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x) (x+0x000004d0) 660*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_PHYS(x) (x+0x000004d0) 661*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK 0xffffffff 662*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_SHFT 0 663*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x) \ 664*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK) 665*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_INM(x, mask) \ 666*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask) 667*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUT(x, val) \ 668*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), val) 669*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUTM(x, mask, val) \ 670*5113495bSYour Name do {\ 671*5113495bSYour Name HWIO_INTLOCK(); \ 672*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x)); \ 673*5113495bSYour Name HWIO_INTFREE();\ 674*5113495bSYour Name } while (0) 675*5113495bSYour Name 676*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_BMSK 0xffff0000 677*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_SHFT 0x10 678*5113495bSYour Name 679*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_BMSK 0x0000ffff 680*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_SHFT 0x0 681*5113495bSYour Name 682*5113495bSYour Name //// Register TCL_R0_TID_MAP_PRTY //// 683*5113495bSYour Name 684*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x) (x+0x000004d4) 685*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_PHYS(x) (x+0x000004d4) 686*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_RMSK 0x000000ef 687*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_SHFT 0 688*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_IN(x) \ 689*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), HWIO_TCL_R0_TID_MAP_PRTY_RMSK) 690*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_INM(x, mask) \ 691*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask) 692*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUT(x, val) \ 693*5113495bSYour Name out_dword( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), val) 694*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUTM(x, mask, val) \ 695*5113495bSYour Name do {\ 696*5113495bSYour Name HWIO_INTLOCK(); \ 697*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask, val, HWIO_TCL_R0_TID_MAP_PRTY_IN(x)); \ 698*5113495bSYour Name HWIO_INTFREE();\ 699*5113495bSYour Name } while (0) 700*5113495bSYour Name 701*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_BMSK 0x000000e0 702*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_SHFT 0x5 703*5113495bSYour Name 704*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_BMSK 0x0000000f 705*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_SHFT 0x0 706*5113495bSYour Name 707*5113495bSYour Name //// Register TCL_R0_INVALID_APB_ACC_ADDR //// 708*5113495bSYour Name 709*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x) (x+0x000004d8) 710*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_PHYS(x) (x+0x000004d8) 711*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK 0xffffffff 712*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_SHFT 0 713*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x) \ 714*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK) 715*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_INM(x, mask) \ 716*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask) 717*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUT(x, val) \ 718*5113495bSYour Name out_dword( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), val) 719*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUTM(x, mask, val) \ 720*5113495bSYour Name do {\ 721*5113495bSYour Name HWIO_INTLOCK(); \ 722*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask, val, HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x)); \ 723*5113495bSYour Name HWIO_INTFREE();\ 724*5113495bSYour Name } while (0) 725*5113495bSYour Name 726*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_BMSK 0xffffffff 727*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_SHFT 0x0 728*5113495bSYour Name 729*5113495bSYour Name //// Register TCL_R0_WATCHDOG //// 730*5113495bSYour Name 731*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_ADDR(x) (x+0x000004dc) 732*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_PHYS(x) (x+0x000004dc) 733*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_RMSK 0xffffffff 734*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_SHFT 0 735*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_IN(x) \ 736*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), HWIO_TCL_R0_WATCHDOG_RMSK) 737*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_INM(x, mask) \ 738*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), mask) 739*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUT(x, val) \ 740*5113495bSYour Name out_dword( HWIO_TCL_R0_WATCHDOG_ADDR(x), val) 741*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUTM(x, mask, val) \ 742*5113495bSYour Name do {\ 743*5113495bSYour Name HWIO_INTLOCK(); \ 744*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_WATCHDOG_IN(x)); \ 745*5113495bSYour Name HWIO_INTFREE();\ 746*5113495bSYour Name } while (0) 747*5113495bSYour Name 748*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_BMSK 0xffff0000 749*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_SHFT 0x10 750*5113495bSYour Name 751*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_BMSK 0x0000ffff 752*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_SHFT 0x0 753*5113495bSYour Name 754*5113495bSYour Name //// Register TCL_R0_LCE_RULE_n //// 755*5113495bSYour Name 756*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n) (base+0x4E0+0x4*n) 757*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_PHYS(base, n) (base+0x4E0+0x4*n) 758*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_RMSK 0x007fffff 759*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_SHFT 0 760*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MAXn 25 761*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INI(base, n) \ 762*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), HWIO_TCL_R0_LCE_RULE_n_RMSK) 763*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INMI(base, n, mask) \ 764*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask) 765*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTI(base, n, val) \ 766*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), val) 767*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTMI(base, n, mask, val) \ 768*5113495bSYour Name do {\ 769*5113495bSYour Name HWIO_INTLOCK(); \ 770*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_RULE_n_INI(base, n)); \ 771*5113495bSYour Name HWIO_INTFREE();\ 772*5113495bSYour Name } while (0) 773*5113495bSYour Name 774*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_BMSK 0x00400000 775*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_SHFT 0x16 776*5113495bSYour Name 777*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_BMSK 0x00200000 778*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_SHFT 0x15 779*5113495bSYour Name 780*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_BMSK 0x00180000 781*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_SHFT 0x13 782*5113495bSYour Name 783*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_BMSK 0x00040000 784*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_SHFT 0x12 785*5113495bSYour Name 786*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_BMSK 0x00020000 787*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_SHFT 0x11 788*5113495bSYour Name 789*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_BMSK 0x00010000 790*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_SHFT 0x10 791*5113495bSYour Name 792*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_BMSK 0x0000ffff 793*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_SHFT 0x0 794*5113495bSYour Name 795*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n //// 796*5113495bSYour Name 797*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n) (base+0x548+0x4*n) 798*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_PHYS(base, n) (base+0x548+0x4*n) 799*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK 0xffffffff 800*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_SHFT 0 801*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_MAXn 25 802*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n) \ 803*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK) 804*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INMI(base, n, mask) \ 805*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask) 806*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTI(base, n, val) \ 807*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), val) 808*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTMI(base, n, mask, val) \ 809*5113495bSYour Name do {\ 810*5113495bSYour Name HWIO_INTLOCK(); \ 811*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n)); \ 812*5113495bSYour Name HWIO_INTFREE();\ 813*5113495bSYour Name } while (0) 814*5113495bSYour Name 815*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_BMSK 0xffffffff 816*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_SHFT 0x0 817*5113495bSYour Name 818*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n //// 819*5113495bSYour Name 820*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n) (base+0x5B0+0x4*n) 821*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_PHYS(base, n) (base+0x5B0+0x4*n) 822*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK 0x000000ff 823*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_SHFT 0 824*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_MAXn 25 825*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n) \ 826*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK) 827*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INMI(base, n, mask) \ 828*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask) 829*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTI(base, n, val) \ 830*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), val) 831*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTMI(base, n, mask, val) \ 832*5113495bSYour Name do {\ 833*5113495bSYour Name HWIO_INTLOCK(); \ 834*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n)); \ 835*5113495bSYour Name HWIO_INTFREE();\ 836*5113495bSYour Name } while (0) 837*5113495bSYour Name 838*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_BMSK 0x000000ff 839*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_SHFT 0x0 840*5113495bSYour Name 841*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_HANDLER_n //// 842*5113495bSYour Name 843*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n) (base+0x618+0x4*n) 844*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_PHYS(base, n) (base+0x618+0x4*n) 845*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK 0x003fffff 846*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_SHFT 0 847*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MAXn 25 848*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n) \ 849*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK) 850*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INMI(base, n, mask) \ 851*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask) 852*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTI(base, n, val) \ 853*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), val) 854*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTMI(base, n, mask, val) \ 855*5113495bSYour Name do {\ 856*5113495bSYour Name HWIO_INTLOCK(); \ 857*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n)); \ 858*5113495bSYour Name HWIO_INTFREE();\ 859*5113495bSYour Name } while (0) 860*5113495bSYour Name 861*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_BMSK 0x00200000 862*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_SHFT 0x15 863*5113495bSYour Name 864*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_BMSK 0x001fffe0 865*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_SHFT 0x5 866*5113495bSYour Name 867*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_BMSK 0x00000010 868*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_SHFT 0x4 869*5113495bSYour Name 870*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_BMSK 0x00000008 871*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_SHFT 0x3 872*5113495bSYour Name 873*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_BMSK 0x00000004 874*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_SHFT 0x2 875*5113495bSYour Name 876*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_BMSK 0x00000003 877*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_SHFT 0x0 878*5113495bSYour Name 879*5113495bSYour Name //// Register TCL_R0_CLKGATE_DISABLE //// 880*5113495bSYour Name 881*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x) (x+0x00000680) 882*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PHYS(x) (x+0x00000680) 883*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_RMSK 0xffffffff 884*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SHFT 0 885*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_IN(x) \ 886*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_CLKGATE_DISABLE_RMSK) 887*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_INM(x, mask) \ 888*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask) 889*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUT(x, val) \ 890*5113495bSYour Name out_dword( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), val) 891*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUTM(x, mask, val) \ 892*5113495bSYour Name do {\ 893*5113495bSYour Name HWIO_INTLOCK(); \ 894*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_CLKGATE_DISABLE_IN(x)); \ 895*5113495bSYour Name HWIO_INTFREE();\ 896*5113495bSYour Name } while (0) 897*5113495bSYour Name 898*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_BMSK 0x80000000 899*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_SHFT 0x1f 900*5113495bSYour Name 901*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 902*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 903*5113495bSYour Name 904*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_BMSK 0x20000000 905*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_SHFT 0x1d 906*5113495bSYour Name 907*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_BMSK 0x10000000 908*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_SHFT 0x1c 909*5113495bSYour Name 910*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_BMSK 0x08000000 911*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_SHFT 0x1b 912*5113495bSYour Name 913*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_BMSK 0x04000000 914*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_SHFT 0x1a 915*5113495bSYour Name 916*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_BMSK 0x02000000 917*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_SHFT 0x19 918*5113495bSYour Name 919*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_BMSK 0x01000000 920*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_SHFT 0x18 921*5113495bSYour Name 922*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_BMSK 0x00800000 923*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_SHFT 0x17 924*5113495bSYour Name 925*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_BMSK 0x00400000 926*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_SHFT 0x16 927*5113495bSYour Name 928*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_BMSK 0x00200000 929*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_SHFT 0x15 930*5113495bSYour Name 931*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_BMSK 0x00100000 932*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_SHFT 0x14 933*5113495bSYour Name 934*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_BMSK 0x00080000 935*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_SHFT 0x13 936*5113495bSYour Name 937*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_BMSK 0x00040000 938*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_SHFT 0x12 939*5113495bSYour Name 940*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_BMSK 0x00020000 941*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_SHFT 0x11 942*5113495bSYour Name 943*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_BMSK 0x00010000 944*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_SHFT 0x10 945*5113495bSYour Name 946*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_BMSK 0x00008000 947*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_SHFT 0xf 948*5113495bSYour Name 949*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_BMSK 0x00004000 950*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_SHFT 0xe 951*5113495bSYour Name 952*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_BMSK 0x00002000 953*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_SHFT 0xd 954*5113495bSYour Name 955*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_BMSK 0x00001000 956*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_SHFT 0xc 957*5113495bSYour Name 958*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_BMSK 0x00000800 959*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_SHFT 0xb 960*5113495bSYour Name 961*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_BMSK 0x00000400 962*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_SHFT 0xa 963*5113495bSYour Name 964*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_BMSK 0x00000200 965*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_SHFT 0x9 966*5113495bSYour Name 967*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_BMSK 0x00000100 968*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_SHFT 0x8 969*5113495bSYour Name 970*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_BMSK 0x00000080 971*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_SHFT 0x7 972*5113495bSYour Name 973*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_BMSK 0x00000040 974*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_SHFT 0x6 975*5113495bSYour Name 976*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_BMSK 0x00000020 977*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_SHFT 0x5 978*5113495bSYour Name 979*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_BMSK 0x00000010 980*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_SHFT 0x4 981*5113495bSYour Name 982*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_BMSK 0x00000008 983*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_SHFT 0x3 984*5113495bSYour Name 985*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_BMSK 0x00000004 986*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_SHFT 0x2 987*5113495bSYour Name 988*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_BMSK 0x00000002 989*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_SHFT 0x1 990*5113495bSYour Name 991*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_BMSK 0x00000001 992*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_SHFT 0x0 993*5113495bSYour Name 994*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_LSB //// 995*5113495bSYour Name 996*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x00000684) 997*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x00000684) 998*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 999*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_SHFT 0 1000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x) \ 1001*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK) 1002*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_INM(x, mask) \ 1003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask) 1004*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUT(x, val) \ 1005*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), val) 1006*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 1007*5113495bSYour Name do {\ 1008*5113495bSYour Name HWIO_INTLOCK(); \ 1009*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x)); \ 1010*5113495bSYour Name HWIO_INTFREE();\ 1011*5113495bSYour Name } while (0) 1012*5113495bSYour Name 1013*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1014*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1015*5113495bSYour Name 1016*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_MSB //// 1017*5113495bSYour Name 1018*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x00000688) 1019*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x00000688) 1020*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK 0x0fffffff 1021*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_SHFT 0 1022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x) \ 1023*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK) 1024*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_INM(x, mask) \ 1025*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask) 1026*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUT(x, val) \ 1027*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), val) 1028*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 1029*5113495bSYour Name do {\ 1030*5113495bSYour Name HWIO_INTLOCK(); \ 1031*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x)); \ 1032*5113495bSYour Name HWIO_INTFREE();\ 1033*5113495bSYour Name } while (0) 1034*5113495bSYour Name 1035*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1036*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1037*5113495bSYour Name 1038*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1039*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1040*5113495bSYour Name 1041*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_ID //// 1042*5113495bSYour Name 1043*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x) (x+0x0000068c) 1044*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_PHYS(x) (x+0x0000068c) 1045*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK 0x000000ff 1046*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_SHFT 0 1047*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x) \ 1048*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK) 1049*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_INM(x, mask) \ 1050*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask) 1051*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUT(x, val) \ 1052*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), val) 1053*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUTM(x, mask, val) \ 1054*5113495bSYour Name do {\ 1055*5113495bSYour Name HWIO_INTLOCK(); \ 1056*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x)); \ 1057*5113495bSYour Name HWIO_INTFREE();\ 1058*5113495bSYour Name } while (0) 1059*5113495bSYour Name 1060*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1061*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 1062*5113495bSYour Name 1063*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_STATUS //// 1064*5113495bSYour Name 1065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x) (x+0x00000690) 1066*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_PHYS(x) (x+0x00000690) 1067*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK 0xffffffff 1068*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_SHFT 0 1069*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x) \ 1070*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK) 1071*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_INM(x, mask) \ 1072*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask) 1073*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUT(x, val) \ 1074*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), val) 1075*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 1076*5113495bSYour Name do {\ 1077*5113495bSYour Name HWIO_INTLOCK(); \ 1078*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x)); \ 1079*5113495bSYour Name HWIO_INTFREE();\ 1080*5113495bSYour Name } while (0) 1081*5113495bSYour Name 1082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1083*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1084*5113495bSYour Name 1085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1086*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1087*5113495bSYour Name 1088*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MISC //// 1089*5113495bSYour Name 1090*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x) (x+0x00000694) 1091*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_PHYS(x) (x+0x00000694) 1092*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK 0x003fffff 1093*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SHFT 0 1094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x) \ 1095*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK) 1096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_INM(x, mask) \ 1097*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask) 1098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUT(x, val) \ 1099*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), val) 1100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUTM(x, mask, val) \ 1101*5113495bSYour Name do {\ 1102*5113495bSYour Name HWIO_INTLOCK(); \ 1103*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x)); \ 1104*5113495bSYour Name HWIO_INTFREE();\ 1105*5113495bSYour Name } while (0) 1106*5113495bSYour Name 1107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 1109*5113495bSYour Name 1110*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1112*5113495bSYour Name 1113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1114*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1115*5113495bSYour Name 1116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1118*5113495bSYour Name 1119*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 1121*5113495bSYour Name 1122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1124*5113495bSYour Name 1125*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1127*5113495bSYour Name 1128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1129*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1130*5113495bSYour Name 1131*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1132*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 1133*5113495bSYour Name 1134*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1135*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1136*5113495bSYour Name 1137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1139*5113495bSYour Name 1140*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_LSB //// 1141*5113495bSYour Name 1142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000006a0) 1143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000006a0) 1144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 1145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_SHFT 0 1146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 1147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK) 1148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 1149*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 1150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 1151*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 1152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1153*5113495bSYour Name do {\ 1154*5113495bSYour Name HWIO_INTLOCK(); \ 1155*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 1156*5113495bSYour Name HWIO_INTFREE();\ 1157*5113495bSYour Name } while (0) 1158*5113495bSYour Name 1159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1161*5113495bSYour Name 1162*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_MSB //// 1163*5113495bSYour Name 1164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000006a4) 1165*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000006a4) 1166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 1167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_SHFT 0 1168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 1169*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK) 1170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 1171*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 1172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 1173*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 1174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1175*5113495bSYour Name do {\ 1176*5113495bSYour Name HWIO_INTLOCK(); \ 1177*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 1178*5113495bSYour Name HWIO_INTFREE();\ 1179*5113495bSYour Name } while (0) 1180*5113495bSYour Name 1181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1182*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1183*5113495bSYour Name 1184*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 1185*5113495bSYour Name 1186*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000006b4) 1187*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000006b4) 1188*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1189*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1190*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1191*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1193*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1195*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1197*5113495bSYour Name do {\ 1198*5113495bSYour Name HWIO_INTLOCK(); \ 1199*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1200*5113495bSYour Name HWIO_INTFREE();\ 1201*5113495bSYour Name } while (0) 1202*5113495bSYour Name 1203*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1204*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1205*5113495bSYour Name 1206*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1208*5113495bSYour Name 1209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1210*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1211*5113495bSYour Name 1212*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 1213*5113495bSYour Name 1214*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000006b8) 1215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000006b8) 1216*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1217*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1219*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1221*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1223*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1225*5113495bSYour Name do {\ 1226*5113495bSYour Name HWIO_INTLOCK(); \ 1227*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1228*5113495bSYour Name HWIO_INTFREE();\ 1229*5113495bSYour Name } while (0) 1230*5113495bSYour Name 1231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1233*5113495bSYour Name 1234*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS //// 1235*5113495bSYour Name 1236*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000006bc) 1237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000006bc) 1238*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1239*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 1240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 1241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 1242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1245*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1247*5113495bSYour Name do {\ 1248*5113495bSYour Name HWIO_INTLOCK(); \ 1249*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 1250*5113495bSYour Name HWIO_INTFREE();\ 1251*5113495bSYour Name } while (0) 1252*5113495bSYour Name 1253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1254*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1255*5113495bSYour Name 1256*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1257*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1258*5113495bSYour Name 1259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1260*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1261*5113495bSYour Name 1262*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 1263*5113495bSYour Name 1264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000006c0) 1265*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000006c0) 1266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1267*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1269*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1271*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1272*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1273*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1274*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1275*5113495bSYour Name do {\ 1276*5113495bSYour Name HWIO_INTLOCK(); \ 1277*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1278*5113495bSYour Name HWIO_INTFREE();\ 1279*5113495bSYour Name } while (0) 1280*5113495bSYour Name 1281*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1282*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1283*5113495bSYour Name 1284*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 1285*5113495bSYour Name 1286*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000006c4) 1287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000006c4) 1288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1289*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1291*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1292*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1293*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1294*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1295*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1296*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1297*5113495bSYour Name do {\ 1298*5113495bSYour Name HWIO_INTLOCK(); \ 1299*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1300*5113495bSYour Name HWIO_INTFREE();\ 1301*5113495bSYour Name } while (0) 1302*5113495bSYour Name 1303*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1304*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1305*5113495bSYour Name 1306*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 1307*5113495bSYour Name 1308*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000006c8) 1309*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000006c8) 1310*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1311*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1313*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1314*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1315*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1316*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1317*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1318*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1319*5113495bSYour Name do {\ 1320*5113495bSYour Name HWIO_INTLOCK(); \ 1321*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1322*5113495bSYour Name HWIO_INTFREE();\ 1323*5113495bSYour Name } while (0) 1324*5113495bSYour Name 1325*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1326*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1327*5113495bSYour Name 1328*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1330*5113495bSYour Name 1331*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB //// 1332*5113495bSYour Name 1333*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000006cc) 1334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000006cc) 1335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1336*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 1337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 1338*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK) 1339*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 1340*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 1341*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 1342*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 1343*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1344*5113495bSYour Name do {\ 1345*5113495bSYour Name HWIO_INTLOCK(); \ 1346*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 1347*5113495bSYour Name HWIO_INTFREE();\ 1348*5113495bSYour Name } while (0) 1349*5113495bSYour Name 1350*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1352*5113495bSYour Name 1353*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB //// 1354*5113495bSYour Name 1355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000006d0) 1356*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000006d0) 1357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1358*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 1359*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 1360*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK) 1361*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 1362*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 1363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 1364*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 1365*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1366*5113495bSYour Name do {\ 1367*5113495bSYour Name HWIO_INTLOCK(); \ 1368*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 1369*5113495bSYour Name HWIO_INTFREE();\ 1370*5113495bSYour Name } while (0) 1371*5113495bSYour Name 1372*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1373*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1374*5113495bSYour Name 1375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1376*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1377*5113495bSYour Name 1378*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_DATA //// 1379*5113495bSYour Name 1380*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x000006d4) 1381*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x000006d4) 1382*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 1383*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_SHFT 0 1384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x) \ 1385*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK) 1386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 1387*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 1388*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 1389*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), val) 1390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 1391*5113495bSYour Name do {\ 1392*5113495bSYour Name HWIO_INTLOCK(); \ 1393*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x)); \ 1394*5113495bSYour Name HWIO_INTFREE();\ 1395*5113495bSYour Name } while (0) 1396*5113495bSYour Name 1397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1398*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 1399*5113495bSYour Name 1400*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET //// 1401*5113495bSYour Name 1402*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006d8) 1403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006d8) 1404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1405*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 1406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 1407*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 1408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1409*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1411*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1413*5113495bSYour Name do {\ 1414*5113495bSYour Name HWIO_INTLOCK(); \ 1415*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 1416*5113495bSYour Name HWIO_INTFREE();\ 1417*5113495bSYour Name } while (0) 1418*5113495bSYour Name 1419*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1420*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1421*5113495bSYour Name 1422*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_LSB //// 1423*5113495bSYour Name 1424*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x) (x+0x000006dc) 1425*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_PHYS(x) (x+0x000006dc) 1426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK 0xffffffff 1427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_SHFT 0 1428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x) \ 1429*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK) 1430*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_INM(x, mask) \ 1431*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask) 1432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUT(x, val) \ 1433*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), val) 1434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUTM(x, mask, val) \ 1435*5113495bSYour Name do {\ 1436*5113495bSYour Name HWIO_INTLOCK(); \ 1437*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x)); \ 1438*5113495bSYour Name HWIO_INTFREE();\ 1439*5113495bSYour Name } while (0) 1440*5113495bSYour Name 1441*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1442*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1443*5113495bSYour Name 1444*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_MSB //// 1445*5113495bSYour Name 1446*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x) (x+0x000006e0) 1447*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_PHYS(x) (x+0x000006e0) 1448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK 0x0fffffff 1449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_SHFT 0 1450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x) \ 1451*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK) 1452*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_INM(x, mask) \ 1453*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask) 1454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUT(x, val) \ 1455*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), val) 1456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUTM(x, mask, val) \ 1457*5113495bSYour Name do {\ 1458*5113495bSYour Name HWIO_INTLOCK(); \ 1459*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x)); \ 1460*5113495bSYour Name HWIO_INTFREE();\ 1461*5113495bSYour Name } while (0) 1462*5113495bSYour Name 1463*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1465*5113495bSYour Name 1466*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1467*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1468*5113495bSYour Name 1469*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_ID //// 1470*5113495bSYour Name 1471*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x) (x+0x000006e4) 1472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_PHYS(x) (x+0x000006e4) 1473*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK 0x000000ff 1474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_SHFT 0 1475*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x) \ 1476*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK) 1477*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_INM(x, mask) \ 1478*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask) 1479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUT(x, val) \ 1480*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), val) 1481*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUTM(x, mask, val) \ 1482*5113495bSYour Name do {\ 1483*5113495bSYour Name HWIO_INTLOCK(); \ 1484*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x)); \ 1485*5113495bSYour Name HWIO_INTFREE();\ 1486*5113495bSYour Name } while (0) 1487*5113495bSYour Name 1488*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1489*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_SHFT 0x0 1490*5113495bSYour Name 1491*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_STATUS //// 1492*5113495bSYour Name 1493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x) (x+0x000006e8) 1494*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_PHYS(x) (x+0x000006e8) 1495*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK 0xffffffff 1496*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_SHFT 0 1497*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x) \ 1498*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK) 1499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_INM(x, mask) \ 1500*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask) 1501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUT(x, val) \ 1502*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), val) 1503*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUTM(x, mask, val) \ 1504*5113495bSYour Name do {\ 1505*5113495bSYour Name HWIO_INTLOCK(); \ 1506*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x)); \ 1507*5113495bSYour Name HWIO_INTFREE();\ 1508*5113495bSYour Name } while (0) 1509*5113495bSYour Name 1510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1511*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1512*5113495bSYour Name 1513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1514*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1515*5113495bSYour Name 1516*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MISC //// 1517*5113495bSYour Name 1518*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x) (x+0x000006ec) 1519*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_PHYS(x) (x+0x000006ec) 1520*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK 0x003fffff 1521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SHFT 0 1522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x) \ 1523*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK) 1524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_INM(x, mask) \ 1525*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask) 1526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUT(x, val) \ 1527*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), val) 1528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUTM(x, mask, val) \ 1529*5113495bSYour Name do {\ 1530*5113495bSYour Name HWIO_INTLOCK(); \ 1531*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x)); \ 1532*5113495bSYour Name HWIO_INTFREE();\ 1533*5113495bSYour Name } while (0) 1534*5113495bSYour Name 1535*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1536*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_SHFT 0xe 1537*5113495bSYour Name 1538*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1539*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1540*5113495bSYour Name 1541*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1542*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1543*5113495bSYour Name 1544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1545*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1546*5113495bSYour Name 1547*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_SHFT 0x6 1549*5113495bSYour Name 1550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1552*5113495bSYour Name 1553*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1555*5113495bSYour Name 1556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1557*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1558*5113495bSYour Name 1559*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1560*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_SHFT 0x2 1561*5113495bSYour Name 1562*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1563*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1564*5113495bSYour Name 1565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1566*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1567*5113495bSYour Name 1568*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_LSB //// 1569*5113495bSYour Name 1570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x) (x+0x000006f8) 1571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_PHYS(x) (x+0x000006f8) 1572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK 0xffffffff 1573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_SHFT 0 1574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x) \ 1575*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK) 1576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_INM(x, mask) \ 1577*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask) 1578*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUT(x, val) \ 1579*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), val) 1580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1581*5113495bSYour Name do {\ 1582*5113495bSYour Name HWIO_INTLOCK(); \ 1583*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x)); \ 1584*5113495bSYour Name HWIO_INTFREE();\ 1585*5113495bSYour Name } while (0) 1586*5113495bSYour Name 1587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1588*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1589*5113495bSYour Name 1590*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_MSB //// 1591*5113495bSYour Name 1592*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x) (x+0x000006fc) 1593*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_PHYS(x) (x+0x000006fc) 1594*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK 0x000000ff 1595*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_SHFT 0 1596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x) \ 1597*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK) 1598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_INM(x, mask) \ 1599*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask) 1600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUT(x, val) \ 1601*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), val) 1602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1603*5113495bSYour Name do {\ 1604*5113495bSYour Name HWIO_INTLOCK(); \ 1605*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x)); \ 1606*5113495bSYour Name HWIO_INTFREE();\ 1607*5113495bSYour Name } while (0) 1608*5113495bSYour Name 1609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1610*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1611*5113495bSYour Name 1612*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0 //// 1613*5113495bSYour Name 1614*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000070c) 1615*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000070c) 1616*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1617*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1618*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1619*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1621*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1623*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1625*5113495bSYour Name do {\ 1626*5113495bSYour Name HWIO_INTLOCK(); \ 1627*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1628*5113495bSYour Name HWIO_INTFREE();\ 1629*5113495bSYour Name } while (0) 1630*5113495bSYour Name 1631*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1632*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1633*5113495bSYour Name 1634*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1636*5113495bSYour Name 1637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1638*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1639*5113495bSYour Name 1640*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1 //// 1641*5113495bSYour Name 1642*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000710) 1643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000710) 1644*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1645*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1647*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1649*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1651*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1653*5113495bSYour Name do {\ 1654*5113495bSYour Name HWIO_INTLOCK(); \ 1655*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1656*5113495bSYour Name HWIO_INTFREE();\ 1657*5113495bSYour Name } while (0) 1658*5113495bSYour Name 1659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1661*5113495bSYour Name 1662*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS //// 1663*5113495bSYour Name 1664*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000714) 1665*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000714) 1666*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1667*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_SHFT 0 1668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x) \ 1669*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK) 1670*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1671*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1673*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1675*5113495bSYour Name do {\ 1676*5113495bSYour Name HWIO_INTLOCK(); \ 1677*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x)); \ 1678*5113495bSYour Name HWIO_INTFREE();\ 1679*5113495bSYour Name } while (0) 1680*5113495bSYour Name 1681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1682*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1683*5113495bSYour Name 1684*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1685*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1686*5113495bSYour Name 1687*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1688*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1689*5113495bSYour Name 1690*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER //// 1691*5113495bSYour Name 1692*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000718) 1693*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000718) 1694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1695*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1697*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1699*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1700*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1701*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1702*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1703*5113495bSYour Name do {\ 1704*5113495bSYour Name HWIO_INTLOCK(); \ 1705*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1706*5113495bSYour Name HWIO_INTFREE();\ 1707*5113495bSYour Name } while (0) 1708*5113495bSYour Name 1709*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1710*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1711*5113495bSYour Name 1712*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER //// 1713*5113495bSYour Name 1714*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000071c) 1715*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000071c) 1716*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1717*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1719*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1720*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1721*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1722*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1723*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1724*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1725*5113495bSYour Name do {\ 1726*5113495bSYour Name HWIO_INTLOCK(); \ 1727*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1728*5113495bSYour Name HWIO_INTFREE();\ 1729*5113495bSYour Name } while (0) 1730*5113495bSYour Name 1731*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1732*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1733*5113495bSYour Name 1734*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS //// 1735*5113495bSYour Name 1736*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000720) 1737*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000720) 1738*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1739*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1741*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1742*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1743*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1744*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1745*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1746*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1747*5113495bSYour Name do {\ 1748*5113495bSYour Name HWIO_INTLOCK(); \ 1749*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1750*5113495bSYour Name HWIO_INTFREE();\ 1751*5113495bSYour Name } while (0) 1752*5113495bSYour Name 1753*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1754*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1755*5113495bSYour Name 1756*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1757*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1758*5113495bSYour Name 1759*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB //// 1760*5113495bSYour Name 1761*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000724) 1762*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000724) 1763*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1764*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_SHFT 0 1765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x) \ 1766*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK) 1767*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_INM(x, mask) \ 1768*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask) 1769*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUT(x, val) \ 1770*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), val) 1771*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1772*5113495bSYour Name do {\ 1773*5113495bSYour Name HWIO_INTLOCK(); \ 1774*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x)); \ 1775*5113495bSYour Name HWIO_INTFREE();\ 1776*5113495bSYour Name } while (0) 1777*5113495bSYour Name 1778*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1780*5113495bSYour Name 1781*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB //// 1782*5113495bSYour Name 1783*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000728) 1784*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000728) 1785*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1786*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_SHFT 0 1787*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x) \ 1788*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK) 1789*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_INM(x, mask) \ 1790*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask) 1791*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUT(x, val) \ 1792*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), val) 1793*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1794*5113495bSYour Name do {\ 1795*5113495bSYour Name HWIO_INTLOCK(); \ 1796*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x)); \ 1797*5113495bSYour Name HWIO_INTFREE();\ 1798*5113495bSYour Name } while (0) 1799*5113495bSYour Name 1800*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1801*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1802*5113495bSYour Name 1803*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1804*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1805*5113495bSYour Name 1806*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_DATA //// 1807*5113495bSYour Name 1808*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x) (x+0x0000072c) 1809*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_PHYS(x) (x+0x0000072c) 1810*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK 0xffffffff 1811*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_SHFT 0 1812*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x) \ 1813*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK) 1814*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_INM(x, mask) \ 1815*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask) 1816*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUT(x, val) \ 1817*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), val) 1818*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUTM(x, mask, val) \ 1819*5113495bSYour Name do {\ 1820*5113495bSYour Name HWIO_INTLOCK(); \ 1821*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x)); \ 1822*5113495bSYour Name HWIO_INTFREE();\ 1823*5113495bSYour Name } while (0) 1824*5113495bSYour Name 1825*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1826*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_SHFT 0x0 1827*5113495bSYour Name 1828*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET //// 1829*5113495bSYour Name 1830*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000730) 1831*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000730) 1832*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1833*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_SHFT 0 1834*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x) \ 1835*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK) 1836*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1837*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1838*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1839*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1840*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1841*5113495bSYour Name do {\ 1842*5113495bSYour Name HWIO_INTLOCK(); \ 1843*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x)); \ 1844*5113495bSYour Name HWIO_INTFREE();\ 1845*5113495bSYour Name } while (0) 1846*5113495bSYour Name 1847*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1848*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1849*5113495bSYour Name 1850*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_LSB //// 1851*5113495bSYour Name 1852*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x) (x+0x00000734) 1853*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_PHYS(x) (x+0x00000734) 1854*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK 0xffffffff 1855*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_SHFT 0 1856*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x) \ 1857*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK) 1858*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_INM(x, mask) \ 1859*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask) 1860*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUT(x, val) \ 1861*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), val) 1862*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUTM(x, mask, val) \ 1863*5113495bSYour Name do {\ 1864*5113495bSYour Name HWIO_INTLOCK(); \ 1865*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x)); \ 1866*5113495bSYour Name HWIO_INTFREE();\ 1867*5113495bSYour Name } while (0) 1868*5113495bSYour Name 1869*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1870*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1871*5113495bSYour Name 1872*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_MSB //// 1873*5113495bSYour Name 1874*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x) (x+0x00000738) 1875*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_PHYS(x) (x+0x00000738) 1876*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK 0x0fffffff 1877*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_SHFT 0 1878*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x) \ 1879*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK) 1880*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_INM(x, mask) \ 1881*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask) 1882*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUT(x, val) \ 1883*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), val) 1884*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUTM(x, mask, val) \ 1885*5113495bSYour Name do {\ 1886*5113495bSYour Name HWIO_INTLOCK(); \ 1887*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x)); \ 1888*5113495bSYour Name HWIO_INTFREE();\ 1889*5113495bSYour Name } while (0) 1890*5113495bSYour Name 1891*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1892*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1893*5113495bSYour Name 1894*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1895*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1896*5113495bSYour Name 1897*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_ID //// 1898*5113495bSYour Name 1899*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x) (x+0x0000073c) 1900*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_PHYS(x) (x+0x0000073c) 1901*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK 0x000000ff 1902*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_SHFT 0 1903*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x) \ 1904*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK) 1905*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_INM(x, mask) \ 1906*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask) 1907*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUT(x, val) \ 1908*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), val) 1909*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUTM(x, mask, val) \ 1910*5113495bSYour Name do {\ 1911*5113495bSYour Name HWIO_INTLOCK(); \ 1912*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x)); \ 1913*5113495bSYour Name HWIO_INTFREE();\ 1914*5113495bSYour Name } while (0) 1915*5113495bSYour Name 1916*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1917*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_SHFT 0x0 1918*5113495bSYour Name 1919*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_STATUS //// 1920*5113495bSYour Name 1921*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x) (x+0x00000740) 1922*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_PHYS(x) (x+0x00000740) 1923*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK 0xffffffff 1924*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_SHFT 0 1925*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x) \ 1926*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK) 1927*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_INM(x, mask) \ 1928*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask) 1929*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUT(x, val) \ 1930*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), val) 1931*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUTM(x, mask, val) \ 1932*5113495bSYour Name do {\ 1933*5113495bSYour Name HWIO_INTLOCK(); \ 1934*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x)); \ 1935*5113495bSYour Name HWIO_INTFREE();\ 1936*5113495bSYour Name } while (0) 1937*5113495bSYour Name 1938*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1939*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1940*5113495bSYour Name 1941*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1942*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1943*5113495bSYour Name 1944*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MISC //// 1945*5113495bSYour Name 1946*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x) (x+0x00000744) 1947*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_PHYS(x) (x+0x00000744) 1948*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK 0x003fffff 1949*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SHFT 0 1950*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x) \ 1951*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK) 1952*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_INM(x, mask) \ 1953*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask) 1954*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUT(x, val) \ 1955*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), val) 1956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUTM(x, mask, val) \ 1957*5113495bSYour Name do {\ 1958*5113495bSYour Name HWIO_INTLOCK(); \ 1959*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x)); \ 1960*5113495bSYour Name HWIO_INTFREE();\ 1961*5113495bSYour Name } while (0) 1962*5113495bSYour Name 1963*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1964*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_SHFT 0xe 1965*5113495bSYour Name 1966*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1967*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1968*5113495bSYour Name 1969*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1970*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1971*5113495bSYour Name 1972*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1973*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1974*5113495bSYour Name 1975*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1976*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_SHFT 0x6 1977*5113495bSYour Name 1978*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1979*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1980*5113495bSYour Name 1981*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1982*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1983*5113495bSYour Name 1984*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1985*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1986*5113495bSYour Name 1987*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1988*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_SHFT 0x2 1989*5113495bSYour Name 1990*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1991*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1992*5113495bSYour Name 1993*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1994*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1995*5113495bSYour Name 1996*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_LSB //// 1997*5113495bSYour Name 1998*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000750) 1999*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000750) 2000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK 0xffffffff 2001*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_SHFT 0 2002*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x) \ 2003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK) 2004*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_INM(x, mask) \ 2005*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask) 2006*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUT(x, val) \ 2007*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), val) 2008*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2009*5113495bSYour Name do {\ 2010*5113495bSYour Name HWIO_INTLOCK(); \ 2011*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x)); \ 2012*5113495bSYour Name HWIO_INTFREE();\ 2013*5113495bSYour Name } while (0) 2014*5113495bSYour Name 2015*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2016*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2017*5113495bSYour Name 2018*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_MSB //// 2019*5113495bSYour Name 2020*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000754) 2021*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000754) 2022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK 0x000000ff 2023*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_SHFT 0 2024*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x) \ 2025*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK) 2026*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_INM(x, mask) \ 2027*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask) 2028*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUT(x, val) \ 2029*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), val) 2030*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2031*5113495bSYour Name do {\ 2032*5113495bSYour Name HWIO_INTLOCK(); \ 2033*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x)); \ 2034*5113495bSYour Name HWIO_INTFREE();\ 2035*5113495bSYour Name } while (0) 2036*5113495bSYour Name 2037*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2038*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2039*5113495bSYour Name 2040*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0 //// 2041*5113495bSYour Name 2042*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000764) 2043*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000764) 2044*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2045*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2046*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2047*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2049*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2051*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2052*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2053*5113495bSYour Name do {\ 2054*5113495bSYour Name HWIO_INTLOCK(); \ 2055*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2056*5113495bSYour Name HWIO_INTFREE();\ 2057*5113495bSYour Name } while (0) 2058*5113495bSYour Name 2059*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2060*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2061*5113495bSYour Name 2062*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2063*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2064*5113495bSYour Name 2065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2066*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2067*5113495bSYour Name 2068*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1 //// 2069*5113495bSYour Name 2070*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000768) 2071*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000768) 2072*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2073*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2074*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2075*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2076*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2077*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2078*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2079*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2080*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2081*5113495bSYour Name do {\ 2082*5113495bSYour Name HWIO_INTLOCK(); \ 2083*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2084*5113495bSYour Name HWIO_INTFREE();\ 2085*5113495bSYour Name } while (0) 2086*5113495bSYour Name 2087*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2088*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2089*5113495bSYour Name 2090*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS //// 2091*5113495bSYour Name 2092*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000076c) 2093*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000076c) 2094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2095*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_SHFT 0 2096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x) \ 2097*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK) 2098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2099*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2101*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2103*5113495bSYour Name do {\ 2104*5113495bSYour Name HWIO_INTLOCK(); \ 2105*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x)); \ 2106*5113495bSYour Name HWIO_INTFREE();\ 2107*5113495bSYour Name } while (0) 2108*5113495bSYour Name 2109*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2110*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2111*5113495bSYour Name 2112*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2114*5113495bSYour Name 2115*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2117*5113495bSYour Name 2118*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER //// 2119*5113495bSYour Name 2120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000770) 2121*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000770) 2122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2127*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2129*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2131*5113495bSYour Name do {\ 2132*5113495bSYour Name HWIO_INTLOCK(); \ 2133*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2134*5113495bSYour Name HWIO_INTFREE();\ 2135*5113495bSYour Name } while (0) 2136*5113495bSYour Name 2137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2139*5113495bSYour Name 2140*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER //// 2141*5113495bSYour Name 2142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000774) 2143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000774) 2144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2149*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2151*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2153*5113495bSYour Name do {\ 2154*5113495bSYour Name HWIO_INTLOCK(); \ 2155*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2156*5113495bSYour Name HWIO_INTFREE();\ 2157*5113495bSYour Name } while (0) 2158*5113495bSYour Name 2159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2161*5113495bSYour Name 2162*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS //// 2163*5113495bSYour Name 2164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000778) 2165*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000778) 2166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2169*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2171*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2173*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2175*5113495bSYour Name do {\ 2176*5113495bSYour Name HWIO_INTLOCK(); \ 2177*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2178*5113495bSYour Name HWIO_INTFREE();\ 2179*5113495bSYour Name } while (0) 2180*5113495bSYour Name 2181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2182*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2183*5113495bSYour Name 2184*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2185*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2186*5113495bSYour Name 2187*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB //// 2188*5113495bSYour Name 2189*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000077c) 2190*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000077c) 2191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_SHFT 0 2193*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x) \ 2194*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK) 2195*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_INM(x, mask) \ 2196*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask) 2197*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUT(x, val) \ 2198*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), val) 2199*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2200*5113495bSYour Name do {\ 2201*5113495bSYour Name HWIO_INTLOCK(); \ 2202*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x)); \ 2203*5113495bSYour Name HWIO_INTFREE();\ 2204*5113495bSYour Name } while (0) 2205*5113495bSYour Name 2206*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2208*5113495bSYour Name 2209*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB //// 2210*5113495bSYour Name 2211*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000780) 2212*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000780) 2213*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2214*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_SHFT 0 2215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x) \ 2216*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK) 2217*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_INM(x, mask) \ 2218*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask) 2219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUT(x, val) \ 2220*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), val) 2221*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2222*5113495bSYour Name do {\ 2223*5113495bSYour Name HWIO_INTLOCK(); \ 2224*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x)); \ 2225*5113495bSYour Name HWIO_INTFREE();\ 2226*5113495bSYour Name } while (0) 2227*5113495bSYour Name 2228*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2230*5113495bSYour Name 2231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2233*5113495bSYour Name 2234*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_DATA //// 2235*5113495bSYour Name 2236*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x) (x+0x00000784) 2237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_PHYS(x) (x+0x00000784) 2238*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK 0xffffffff 2239*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_SHFT 0 2240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x) \ 2241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK) 2242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_INM(x, mask) \ 2243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask) 2244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUT(x, val) \ 2245*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), val) 2246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUTM(x, mask, val) \ 2247*5113495bSYour Name do {\ 2248*5113495bSYour Name HWIO_INTLOCK(); \ 2249*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x)); \ 2250*5113495bSYour Name HWIO_INTFREE();\ 2251*5113495bSYour Name } while (0) 2252*5113495bSYour Name 2253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2254*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_SHFT 0x0 2255*5113495bSYour Name 2256*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET //// 2257*5113495bSYour Name 2258*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000788) 2259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000788) 2260*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2261*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_SHFT 0 2262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x) \ 2263*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK) 2264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2265*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2267*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2269*5113495bSYour Name do {\ 2270*5113495bSYour Name HWIO_INTLOCK(); \ 2271*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x)); \ 2272*5113495bSYour Name HWIO_INTFREE();\ 2273*5113495bSYour Name } while (0) 2274*5113495bSYour Name 2275*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2276*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2277*5113495bSYour Name 2278*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_BASE_LSB //// 2279*5113495bSYour Name 2280*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_ADDR(x) (x+0x0000078c) 2281*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_PHYS(x) (x+0x0000078c) 2282*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_RMSK 0xffffffff 2283*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_SHFT 0 2284*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_IN(x) \ 2285*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_RMSK) 2286*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_INM(x, mask) \ 2287*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_ADDR(x), mask) 2288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_OUT(x, val) \ 2289*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_ADDR(x), val) 2290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ 2291*5113495bSYour Name do {\ 2292*5113495bSYour Name HWIO_INTLOCK(); \ 2293*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_IN(x)); \ 2294*5113495bSYour Name HWIO_INTFREE();\ 2295*5113495bSYour Name } while (0) 2296*5113495bSYour Name 2297*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2298*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2299*5113495bSYour Name 2300*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_BASE_MSB //// 2301*5113495bSYour Name 2302*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_ADDR(x) (x+0x00000790) 2303*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_PHYS(x) (x+0x00000790) 2304*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RMSK 0x0fffffff 2305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_SHFT 0 2306*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_IN(x) \ 2307*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RMSK) 2308*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_INM(x, mask) \ 2309*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_ADDR(x), mask) 2310*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_OUT(x, val) \ 2311*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_ADDR(x), val) 2312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ 2313*5113495bSYour Name do {\ 2314*5113495bSYour Name HWIO_INTLOCK(); \ 2315*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_IN(x)); \ 2316*5113495bSYour Name HWIO_INTFREE();\ 2317*5113495bSYour Name } while (0) 2318*5113495bSYour Name 2319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2320*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2321*5113495bSYour Name 2322*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2324*5113495bSYour Name 2325*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_ID //// 2326*5113495bSYour Name 2327*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ADDR(x) (x+0x00000794) 2328*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_PHYS(x) (x+0x00000794) 2329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_RMSK 0x000000ff 2330*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_SHFT 0 2331*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_IN(x) \ 2332*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_ID_RMSK) 2333*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_INM(x, mask) \ 2334*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ADDR(x), mask) 2335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_OUT(x, val) \ 2336*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ADDR(x), val) 2337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_OUTM(x, mask, val) \ 2338*5113495bSYour Name do {\ 2339*5113495bSYour Name HWIO_INTLOCK(); \ 2340*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_ID_IN(x)); \ 2341*5113495bSYour Name HWIO_INTFREE();\ 2342*5113495bSYour Name } while (0) 2343*5113495bSYour Name 2344*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2345*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_ID_ENTRY_SIZE_SHFT 0x0 2346*5113495bSYour Name 2347*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_STATUS //// 2348*5113495bSYour Name 2349*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_ADDR(x) (x+0x00000798) 2350*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_PHYS(x) (x+0x00000798) 2351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_RMSK 0xffffffff 2352*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_SHFT 0 2353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_IN(x) \ 2354*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_RMSK) 2355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_INM(x, mask) \ 2356*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_ADDR(x), mask) 2357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_OUT(x, val) \ 2358*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_ADDR(x), val) 2359*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_OUTM(x, mask, val) \ 2360*5113495bSYour Name do {\ 2361*5113495bSYour Name HWIO_INTLOCK(); \ 2362*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_IN(x)); \ 2363*5113495bSYour Name HWIO_INTFREE();\ 2364*5113495bSYour Name } while (0) 2365*5113495bSYour Name 2366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2367*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2368*5113495bSYour Name 2369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2370*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2371*5113495bSYour Name 2372*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_MISC //// 2373*5113495bSYour Name 2374*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_ADDR(x) (x+0x0000079c) 2375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_PHYS(x) (x+0x0000079c) 2376*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_RMSK 0x003fffff 2377*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SHFT 0 2378*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_IN(x) \ 2379*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_RMSK) 2380*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_INM(x, mask) \ 2381*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_ADDR(x), mask) 2382*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_OUT(x, val) \ 2383*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_ADDR(x), val) 2384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_OUTM(x, mask, val) \ 2385*5113495bSYour Name do {\ 2386*5113495bSYour Name HWIO_INTLOCK(); \ 2387*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_IN(x)); \ 2388*5113495bSYour Name HWIO_INTFREE();\ 2389*5113495bSYour Name } while (0) 2390*5113495bSYour Name 2391*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2392*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SPARE_CONTROL_SHFT 0xe 2393*5113495bSYour Name 2394*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2395*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2396*5113495bSYour Name 2397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2398*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2399*5113495bSYour Name 2400*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2401*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2402*5113495bSYour Name 2403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SRNG_ENABLE_SHFT 0x6 2405*5113495bSYour Name 2406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2407*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2408*5113495bSYour Name 2409*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2411*5113495bSYour Name 2412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2413*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2414*5113495bSYour Name 2415*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2416*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_SECURITY_BIT_SHFT 0x2 2417*5113495bSYour Name 2418*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2419*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2420*5113495bSYour Name 2421*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2422*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2423*5113495bSYour Name 2424*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB //// 2425*5113495bSYour Name 2426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_ADDR(x) (x+0x000007a8) 2427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_PHYS(x) (x+0x000007a8) 2428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_RMSK 0xffffffff 2429*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_SHFT 0 2430*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_IN(x) \ 2431*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_RMSK) 2432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ 2433*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 2434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ 2435*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_ADDR(x), val) 2436*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2437*5113495bSYour Name do {\ 2438*5113495bSYour Name HWIO_INTLOCK(); \ 2439*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_IN(x)); \ 2440*5113495bSYour Name HWIO_INTFREE();\ 2441*5113495bSYour Name } while (0) 2442*5113495bSYour Name 2443*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2445*5113495bSYour Name 2446*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB //// 2447*5113495bSYour Name 2448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_ADDR(x) (x+0x000007ac) 2449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_PHYS(x) (x+0x000007ac) 2450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_RMSK 0x000000ff 2451*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_SHFT 0 2452*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_IN(x) \ 2453*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_RMSK) 2454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ 2455*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 2456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ 2457*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_ADDR(x), val) 2458*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2459*5113495bSYour Name do {\ 2460*5113495bSYour Name HWIO_INTLOCK(); \ 2461*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_IN(x)); \ 2462*5113495bSYour Name HWIO_INTFREE();\ 2463*5113495bSYour Name } while (0) 2464*5113495bSYour Name 2465*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2466*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2467*5113495bSYour Name 2468*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0 //// 2469*5113495bSYour Name 2470*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000007bc) 2471*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000007bc) 2472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2473*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2475*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2477*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2479*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2480*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2481*5113495bSYour Name do {\ 2482*5113495bSYour Name HWIO_INTLOCK(); \ 2483*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2484*5113495bSYour Name HWIO_INTFREE();\ 2485*5113495bSYour Name } while (0) 2486*5113495bSYour Name 2487*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2488*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2489*5113495bSYour Name 2490*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2492*5113495bSYour Name 2493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2494*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2495*5113495bSYour Name 2496*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1 //// 2497*5113495bSYour Name 2498*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000007c0) 2499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000007c0) 2500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2502*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2503*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2505*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2507*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2509*5113495bSYour Name do {\ 2510*5113495bSYour Name HWIO_INTLOCK(); \ 2511*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2512*5113495bSYour Name HWIO_INTFREE();\ 2513*5113495bSYour Name } while (0) 2514*5113495bSYour Name 2515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2516*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2517*5113495bSYour Name 2518*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS //// 2519*5113495bSYour Name 2520*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000007c4) 2521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000007c4) 2522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2523*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_SHFT 0 2524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_IN(x) \ 2525*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_RMSK) 2526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2527*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2529*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2531*5113495bSYour Name do {\ 2532*5113495bSYour Name HWIO_INTLOCK(); \ 2533*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_IN(x)); \ 2534*5113495bSYour Name HWIO_INTFREE();\ 2535*5113495bSYour Name } while (0) 2536*5113495bSYour Name 2537*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2538*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2539*5113495bSYour Name 2540*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2541*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2542*5113495bSYour Name 2543*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2545*5113495bSYour Name 2546*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER //// 2547*5113495bSYour Name 2548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000007c8) 2549*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000007c8) 2550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2553*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2555*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2557*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2559*5113495bSYour Name do {\ 2560*5113495bSYour Name HWIO_INTLOCK(); \ 2561*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2562*5113495bSYour Name HWIO_INTFREE();\ 2563*5113495bSYour Name } while (0) 2564*5113495bSYour Name 2565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2566*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2567*5113495bSYour Name 2568*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER //// 2569*5113495bSYour Name 2570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000007cc) 2571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000007cc) 2572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2575*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2577*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2578*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2579*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2581*5113495bSYour Name do {\ 2582*5113495bSYour Name HWIO_INTLOCK(); \ 2583*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2584*5113495bSYour Name HWIO_INTFREE();\ 2585*5113495bSYour Name } while (0) 2586*5113495bSYour Name 2587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2588*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2589*5113495bSYour Name 2590*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS //// 2591*5113495bSYour Name 2592*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000007d0) 2593*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000007d0) 2594*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2595*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2597*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2599*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2601*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2603*5113495bSYour Name do {\ 2604*5113495bSYour Name HWIO_INTLOCK(); \ 2605*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2606*5113495bSYour Name HWIO_INTFREE();\ 2607*5113495bSYour Name } while (0) 2608*5113495bSYour Name 2609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2610*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2611*5113495bSYour Name 2612*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2613*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2614*5113495bSYour Name 2615*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB //// 2616*5113495bSYour Name 2617*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000007d4) 2618*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000007d4) 2619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_SHFT 0 2621*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_IN(x) \ 2622*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_RMSK) 2623*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ 2624*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 2625*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ 2626*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR(x), val) 2627*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2628*5113495bSYour Name do {\ 2629*5113495bSYour Name HWIO_INTLOCK(); \ 2630*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_IN(x)); \ 2631*5113495bSYour Name HWIO_INTFREE();\ 2632*5113495bSYour Name } while (0) 2633*5113495bSYour Name 2634*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2636*5113495bSYour Name 2637*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB //// 2638*5113495bSYour Name 2639*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000007d8) 2640*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000007d8) 2641*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2642*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_SHFT 0 2643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_IN(x) \ 2644*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_RMSK) 2645*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ 2646*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 2647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ 2648*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR(x), val) 2649*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2650*5113495bSYour Name do {\ 2651*5113495bSYour Name HWIO_INTLOCK(); \ 2652*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_IN(x)); \ 2653*5113495bSYour Name HWIO_INTFREE();\ 2654*5113495bSYour Name } while (0) 2655*5113495bSYour Name 2656*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2658*5113495bSYour Name 2659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2661*5113495bSYour Name 2662*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_MSI1_DATA //// 2663*5113495bSYour Name 2664*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_ADDR(x) (x+0x000007dc) 2665*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_PHYS(x) (x+0x000007dc) 2666*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_RMSK 0xffffffff 2667*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_SHFT 0 2668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_IN(x) \ 2669*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_RMSK) 2670*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_INM(x, mask) \ 2671*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_ADDR(x), mask) 2672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_OUT(x, val) \ 2673*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_ADDR(x), val) 2674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ 2675*5113495bSYour Name do {\ 2676*5113495bSYour Name HWIO_INTLOCK(); \ 2677*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_IN(x)); \ 2678*5113495bSYour Name HWIO_INTFREE();\ 2679*5113495bSYour Name } while (0) 2680*5113495bSYour Name 2681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2682*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_MSI1_DATA_VALUE_SHFT 0x0 2683*5113495bSYour Name 2684*5113495bSYour Name //// Register TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET //// 2685*5113495bSYour Name 2686*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000007e0) 2687*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000007e0) 2688*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2689*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_SHFT 0 2690*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_IN(x) \ 2691*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_RMSK) 2692*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2693*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2695*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2697*5113495bSYour Name do {\ 2698*5113495bSYour Name HWIO_INTLOCK(); \ 2699*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_IN(x)); \ 2700*5113495bSYour Name HWIO_INTFREE();\ 2701*5113495bSYour Name } while (0) 2702*5113495bSYour Name 2703*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2704*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CMD_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2705*5113495bSYour Name 2706*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_LSB //// 2707*5113495bSYour Name 2708*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x000007e4) 2709*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x000007e4) 2710*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 2711*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_SHFT 0 2712*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x) \ 2713*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK) 2714*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_INM(x, mask) \ 2715*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask) 2716*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUT(x, val) \ 2717*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), val) 2718*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 2719*5113495bSYour Name do {\ 2720*5113495bSYour Name HWIO_INTLOCK(); \ 2721*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x)); \ 2722*5113495bSYour Name HWIO_INTFREE();\ 2723*5113495bSYour Name } while (0) 2724*5113495bSYour Name 2725*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2726*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2727*5113495bSYour Name 2728*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_MSB //// 2729*5113495bSYour Name 2730*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x000007e8) 2731*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x000007e8) 2732*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK 0x00ffffff 2733*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_SHFT 0 2734*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x) \ 2735*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK) 2736*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_INM(x, mask) \ 2737*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask) 2738*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUT(x, val) \ 2739*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), val) 2740*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 2741*5113495bSYour Name do {\ 2742*5113495bSYour Name HWIO_INTLOCK(); \ 2743*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x)); \ 2744*5113495bSYour Name HWIO_INTFREE();\ 2745*5113495bSYour Name } while (0) 2746*5113495bSYour Name 2747*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 2748*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2749*5113495bSYour Name 2750*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2751*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2752*5113495bSYour Name 2753*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_ID //// 2754*5113495bSYour Name 2755*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x) (x+0x000007ec) 2756*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_PHYS(x) (x+0x000007ec) 2757*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK 0x000000ff 2758*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_SHFT 0 2759*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x) \ 2760*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK) 2761*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_INM(x, mask) \ 2762*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask) 2763*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUT(x, val) \ 2764*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), val) 2765*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUTM(x, mask, val) \ 2766*5113495bSYour Name do {\ 2767*5113495bSYour Name HWIO_INTLOCK(); \ 2768*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x)); \ 2769*5113495bSYour Name HWIO_INTFREE();\ 2770*5113495bSYour Name } while (0) 2771*5113495bSYour Name 2772*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2773*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 2774*5113495bSYour Name 2775*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_STATUS //// 2776*5113495bSYour Name 2777*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x) (x+0x000007f0) 2778*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_PHYS(x) (x+0x000007f0) 2779*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK 0xffffffff 2780*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_SHFT 0 2781*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x) \ 2782*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK) 2783*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_INM(x, mask) \ 2784*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask) 2785*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUT(x, val) \ 2786*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), val) 2787*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 2788*5113495bSYour Name do {\ 2789*5113495bSYour Name HWIO_INTLOCK(); \ 2790*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x)); \ 2791*5113495bSYour Name HWIO_INTFREE();\ 2792*5113495bSYour Name } while (0) 2793*5113495bSYour Name 2794*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2795*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2796*5113495bSYour Name 2797*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2798*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2799*5113495bSYour Name 2800*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MISC //// 2801*5113495bSYour Name 2802*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x) (x+0x000007f4) 2803*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_PHYS(x) (x+0x000007f4) 2804*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK 0x003fffff 2805*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SHFT 0 2806*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x) \ 2807*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK) 2808*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_INM(x, mask) \ 2809*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask) 2810*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUT(x, val) \ 2811*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), val) 2812*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUTM(x, mask, val) \ 2813*5113495bSYour Name do {\ 2814*5113495bSYour Name HWIO_INTLOCK(); \ 2815*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x)); \ 2816*5113495bSYour Name HWIO_INTFREE();\ 2817*5113495bSYour Name } while (0) 2818*5113495bSYour Name 2819*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2820*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 2821*5113495bSYour Name 2822*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2823*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2824*5113495bSYour Name 2825*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2826*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2827*5113495bSYour Name 2828*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2829*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2830*5113495bSYour Name 2831*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2832*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 2833*5113495bSYour Name 2834*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2835*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2836*5113495bSYour Name 2837*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2838*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2839*5113495bSYour Name 2840*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2841*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2842*5113495bSYour Name 2843*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2844*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 2845*5113495bSYour Name 2846*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2847*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2848*5113495bSYour Name 2849*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2850*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2851*5113495bSYour Name 2852*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_LSB //// 2853*5113495bSYour Name 2854*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000800) 2855*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000800) 2856*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 2857*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_SHFT 0 2858*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 2859*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK) 2860*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 2861*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 2862*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 2863*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 2864*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2865*5113495bSYour Name do {\ 2866*5113495bSYour Name HWIO_INTLOCK(); \ 2867*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 2868*5113495bSYour Name HWIO_INTFREE();\ 2869*5113495bSYour Name } while (0) 2870*5113495bSYour Name 2871*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2872*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2873*5113495bSYour Name 2874*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_MSB //// 2875*5113495bSYour Name 2876*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000804) 2877*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000804) 2878*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 2879*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_SHFT 0 2880*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 2881*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK) 2882*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 2883*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 2884*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 2885*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 2886*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2887*5113495bSYour Name do {\ 2888*5113495bSYour Name HWIO_INTLOCK(); \ 2889*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 2890*5113495bSYour Name HWIO_INTFREE();\ 2891*5113495bSYour Name } while (0) 2892*5113495bSYour Name 2893*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2894*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2895*5113495bSYour Name 2896*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 2897*5113495bSYour Name 2898*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000814) 2899*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000814) 2900*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2901*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2902*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2903*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2904*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2905*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2906*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2907*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2908*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2909*5113495bSYour Name do {\ 2910*5113495bSYour Name HWIO_INTLOCK(); \ 2911*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2912*5113495bSYour Name HWIO_INTFREE();\ 2913*5113495bSYour Name } while (0) 2914*5113495bSYour Name 2915*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2916*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2917*5113495bSYour Name 2918*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2919*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2920*5113495bSYour Name 2921*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2922*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2923*5113495bSYour Name 2924*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 2925*5113495bSYour Name 2926*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000818) 2927*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000818) 2928*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2929*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2930*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2931*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2932*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2933*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2934*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2935*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2936*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2937*5113495bSYour Name do {\ 2938*5113495bSYour Name HWIO_INTLOCK(); \ 2939*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2940*5113495bSYour Name HWIO_INTFREE();\ 2941*5113495bSYour Name } while (0) 2942*5113495bSYour Name 2943*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2944*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2945*5113495bSYour Name 2946*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS //// 2947*5113495bSYour Name 2948*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000081c) 2949*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000081c) 2950*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2951*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 2952*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 2953*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 2954*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2955*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2956*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2957*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2958*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2959*5113495bSYour Name do {\ 2960*5113495bSYour Name HWIO_INTLOCK(); \ 2961*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 2962*5113495bSYour Name HWIO_INTFREE();\ 2963*5113495bSYour Name } while (0) 2964*5113495bSYour Name 2965*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2966*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2967*5113495bSYour Name 2968*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2969*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2970*5113495bSYour Name 2971*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2972*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2973*5113495bSYour Name 2974*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 2975*5113495bSYour Name 2976*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000820) 2977*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000820) 2978*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2979*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2980*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2982*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2983*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2984*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2985*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2986*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2987*5113495bSYour Name do {\ 2988*5113495bSYour Name HWIO_INTLOCK(); \ 2989*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2990*5113495bSYour Name HWIO_INTFREE();\ 2991*5113495bSYour Name } while (0) 2992*5113495bSYour Name 2993*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2994*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2995*5113495bSYour Name 2996*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 2997*5113495bSYour Name 2998*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000824) 2999*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000824) 3000*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 3001*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 3002*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 3003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 3004*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 3005*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 3006*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 3007*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 3008*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 3009*5113495bSYour Name do {\ 3010*5113495bSYour Name HWIO_INTLOCK(); \ 3011*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 3012*5113495bSYour Name HWIO_INTFREE();\ 3013*5113495bSYour Name } while (0) 3014*5113495bSYour Name 3015*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 3016*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 3017*5113495bSYour Name 3018*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 3019*5113495bSYour Name 3020*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000828) 3021*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000828) 3022*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x00ffffff 3023*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 3024*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 3025*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 3026*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 3027*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 3028*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 3029*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 3030*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 3031*5113495bSYour Name do {\ 3032*5113495bSYour Name HWIO_INTLOCK(); \ 3033*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 3034*5113495bSYour Name HWIO_INTFREE();\ 3035*5113495bSYour Name } while (0) 3036*5113495bSYour Name 3037*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x00ff0000 3038*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10 3039*5113495bSYour Name 3040*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x0000ffff 3041*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 3042*5113495bSYour Name 3043*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB //// 3044*5113495bSYour Name 3045*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000082c) 3046*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000082c) 3047*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3048*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 3049*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 3050*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK) 3051*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3052*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3053*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3054*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 3055*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3056*5113495bSYour Name do {\ 3057*5113495bSYour Name HWIO_INTLOCK(); \ 3058*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 3059*5113495bSYour Name HWIO_INTFREE();\ 3060*5113495bSYour Name } while (0) 3061*5113495bSYour Name 3062*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3063*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3064*5113495bSYour Name 3065*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB //// 3066*5113495bSYour Name 3067*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000830) 3068*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000830) 3069*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3070*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 3071*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 3072*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK) 3073*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3074*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3075*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3076*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 3077*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3078*5113495bSYour Name do {\ 3079*5113495bSYour Name HWIO_INTLOCK(); \ 3080*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 3081*5113495bSYour Name HWIO_INTFREE();\ 3082*5113495bSYour Name } while (0) 3083*5113495bSYour Name 3084*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3085*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3086*5113495bSYour Name 3087*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3088*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3089*5113495bSYour Name 3090*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_DATA //// 3091*5113495bSYour Name 3092*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x00000834) 3093*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x00000834) 3094*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 3095*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_SHFT 0 3096*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x) \ 3097*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK) 3098*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 3099*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 3100*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 3101*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), val) 3102*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3103*5113495bSYour Name do {\ 3104*5113495bSYour Name HWIO_INTLOCK(); \ 3105*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x)); \ 3106*5113495bSYour Name HWIO_INTFREE();\ 3107*5113495bSYour Name } while (0) 3108*5113495bSYour Name 3109*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3110*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 3111*5113495bSYour Name 3112*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET //// 3113*5113495bSYour Name 3114*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000838) 3115*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000838) 3116*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3117*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 3118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 3119*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 3120*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3123*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3125*5113495bSYour Name do {\ 3126*5113495bSYour Name HWIO_INTLOCK(); \ 3127*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3128*5113495bSYour Name HWIO_INTFREE();\ 3129*5113495bSYour Name } while (0) 3130*5113495bSYour Name 3131*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3132*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3133*5113495bSYour Name 3134*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_LSB //// 3135*5113495bSYour Name 3136*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x) (x+0x0000083c) 3137*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_PHYS(x) (x+0x0000083c) 3138*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK 0xffffffff 3139*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_SHFT 0 3140*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x) \ 3141*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK) 3142*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_INM(x, mask) \ 3143*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask) 3144*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUT(x, val) \ 3145*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), val) 3146*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUTM(x, mask, val) \ 3147*5113495bSYour Name do {\ 3148*5113495bSYour Name HWIO_INTLOCK(); \ 3149*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x)); \ 3150*5113495bSYour Name HWIO_INTFREE();\ 3151*5113495bSYour Name } while (0) 3152*5113495bSYour Name 3153*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3154*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3155*5113495bSYour Name 3156*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_MSB //// 3157*5113495bSYour Name 3158*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x) (x+0x00000840) 3159*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_PHYS(x) (x+0x00000840) 3160*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK 0x00ffffff 3161*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_SHFT 0 3162*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x) \ 3163*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK) 3164*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_INM(x, mask) \ 3165*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask) 3166*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUT(x, val) \ 3167*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), val) 3168*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUTM(x, mask, val) \ 3169*5113495bSYour Name do {\ 3170*5113495bSYour Name HWIO_INTLOCK(); \ 3171*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x)); \ 3172*5113495bSYour Name HWIO_INTFREE();\ 3173*5113495bSYour Name } while (0) 3174*5113495bSYour Name 3175*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3176*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3177*5113495bSYour Name 3178*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3179*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3180*5113495bSYour Name 3181*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_ID //// 3182*5113495bSYour Name 3183*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x) (x+0x00000844) 3184*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_PHYS(x) (x+0x00000844) 3185*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK 0x0000ffff 3186*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_SHFT 0 3187*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x) \ 3188*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK) 3189*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_INM(x, mask) \ 3190*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask) 3191*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUT(x, val) \ 3192*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), val) 3193*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUTM(x, mask, val) \ 3194*5113495bSYour Name do {\ 3195*5113495bSYour Name HWIO_INTLOCK(); \ 3196*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x)); \ 3197*5113495bSYour Name HWIO_INTFREE();\ 3198*5113495bSYour Name } while (0) 3199*5113495bSYour Name 3200*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_BMSK 0x0000ff00 3201*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_SHFT 0x8 3202*5113495bSYour Name 3203*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3204*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_SHFT 0x0 3205*5113495bSYour Name 3206*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_STATUS //// 3207*5113495bSYour Name 3208*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x) (x+0x00000848) 3209*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_PHYS(x) (x+0x00000848) 3210*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK 0xffffffff 3211*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_SHFT 0 3212*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x) \ 3213*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK) 3214*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_INM(x, mask) \ 3215*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask) 3216*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUT(x, val) \ 3217*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), val) 3218*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUTM(x, mask, val) \ 3219*5113495bSYour Name do {\ 3220*5113495bSYour Name HWIO_INTLOCK(); \ 3221*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x)); \ 3222*5113495bSYour Name HWIO_INTFREE();\ 3223*5113495bSYour Name } while (0) 3224*5113495bSYour Name 3225*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3226*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3227*5113495bSYour Name 3228*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3229*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3230*5113495bSYour Name 3231*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MISC //// 3232*5113495bSYour Name 3233*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x) (x+0x0000084c) 3234*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_PHYS(x) (x+0x0000084c) 3235*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK 0x03ffffff 3236*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SHFT 0 3237*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x) \ 3238*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK) 3239*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_INM(x, mask) \ 3240*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask) 3241*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUT(x, val) \ 3242*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), val) 3243*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUTM(x, mask, val) \ 3244*5113495bSYour Name do {\ 3245*5113495bSYour Name HWIO_INTLOCK(); \ 3246*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x)); \ 3247*5113495bSYour Name HWIO_INTFREE();\ 3248*5113495bSYour Name } while (0) 3249*5113495bSYour Name 3250*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3251*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_SHFT 0x16 3252*5113495bSYour Name 3253*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3254*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_SHFT 0xe 3255*5113495bSYour Name 3256*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3257*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3258*5113495bSYour Name 3259*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3260*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3261*5113495bSYour Name 3262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3263*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3264*5113495bSYour Name 3265*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3266*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_SHFT 0x6 3267*5113495bSYour Name 3268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3269*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3270*5113495bSYour Name 3271*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3272*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3273*5113495bSYour Name 3274*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3275*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3276*5113495bSYour Name 3277*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3278*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_SHFT 0x2 3279*5113495bSYour Name 3280*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3281*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3282*5113495bSYour Name 3283*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3284*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3285*5113495bSYour Name 3286*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_LSB //// 3287*5113495bSYour Name 3288*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000850) 3289*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000850) 3290*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK 0xffffffff 3291*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_SHFT 0 3292*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x) \ 3293*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK) 3294*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_INM(x, mask) \ 3295*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask) 3296*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUT(x, val) \ 3297*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), val) 3298*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3299*5113495bSYour Name do {\ 3300*5113495bSYour Name HWIO_INTLOCK(); \ 3301*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x)); \ 3302*5113495bSYour Name HWIO_INTFREE();\ 3303*5113495bSYour Name } while (0) 3304*5113495bSYour Name 3305*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3306*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3307*5113495bSYour Name 3308*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_MSB //// 3309*5113495bSYour Name 3310*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000854) 3311*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000854) 3312*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK 0x000000ff 3313*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_SHFT 0 3314*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x) \ 3315*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK) 3316*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_INM(x, mask) \ 3317*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask) 3318*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUT(x, val) \ 3319*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), val) 3320*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3321*5113495bSYour Name do {\ 3322*5113495bSYour Name HWIO_INTLOCK(); \ 3323*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x)); \ 3324*5113495bSYour Name HWIO_INTFREE();\ 3325*5113495bSYour Name } while (0) 3326*5113495bSYour Name 3327*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3328*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3329*5113495bSYour Name 3330*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP //// 3331*5113495bSYour Name 3332*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000860) 3333*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000860) 3334*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3335*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SHFT 0 3336*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x) \ 3337*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK) 3338*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3339*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3340*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3341*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3342*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3343*5113495bSYour Name do {\ 3344*5113495bSYour Name HWIO_INTLOCK(); \ 3345*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x)); \ 3346*5113495bSYour Name HWIO_INTFREE();\ 3347*5113495bSYour Name } while (0) 3348*5113495bSYour Name 3349*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3350*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3351*5113495bSYour Name 3352*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3353*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3354*5113495bSYour Name 3355*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3356*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3357*5113495bSYour Name 3358*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS //// 3359*5113495bSYour Name 3360*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000864) 3361*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000864) 3362*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3363*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_SHFT 0 3364*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x) \ 3365*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK) 3366*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3367*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3368*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3369*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3370*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3371*5113495bSYour Name do {\ 3372*5113495bSYour Name HWIO_INTLOCK(); \ 3373*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x)); \ 3374*5113495bSYour Name HWIO_INTFREE();\ 3375*5113495bSYour Name } while (0) 3376*5113495bSYour Name 3377*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3378*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3379*5113495bSYour Name 3380*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3381*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3382*5113495bSYour Name 3383*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3384*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3385*5113495bSYour Name 3386*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER //// 3387*5113495bSYour Name 3388*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000868) 3389*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000868) 3390*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3391*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_SHFT 0 3392*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3393*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK) 3394*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3395*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3396*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3397*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3398*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3399*5113495bSYour Name do {\ 3400*5113495bSYour Name HWIO_INTLOCK(); \ 3401*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3402*5113495bSYour Name HWIO_INTFREE();\ 3403*5113495bSYour Name } while (0) 3404*5113495bSYour Name 3405*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3406*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3407*5113495bSYour Name 3408*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET //// 3409*5113495bSYour Name 3410*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000890) 3411*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000890) 3412*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3413*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_SHFT 0 3414*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x) \ 3415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK) 3416*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3417*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3418*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3419*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3420*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3421*5113495bSYour Name do {\ 3422*5113495bSYour Name HWIO_INTLOCK(); \ 3423*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x)); \ 3424*5113495bSYour Name HWIO_INTFREE();\ 3425*5113495bSYour Name } while (0) 3426*5113495bSYour Name 3427*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3428*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3429*5113495bSYour Name 3430*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_LSB //// 3431*5113495bSYour Name 3432*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x) (x+0x00000894) 3433*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_PHYS(x) (x+0x00000894) 3434*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK 0xffffffff 3435*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_SHFT 0 3436*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x) \ 3437*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK) 3438*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_INM(x, mask) \ 3439*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask) 3440*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUT(x, val) \ 3441*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), val) 3442*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUTM(x, mask, val) \ 3443*5113495bSYour Name do {\ 3444*5113495bSYour Name HWIO_INTLOCK(); \ 3445*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x)); \ 3446*5113495bSYour Name HWIO_INTFREE();\ 3447*5113495bSYour Name } while (0) 3448*5113495bSYour Name 3449*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3450*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3451*5113495bSYour Name 3452*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_MSB //// 3453*5113495bSYour Name 3454*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x) (x+0x00000898) 3455*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_PHYS(x) (x+0x00000898) 3456*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK 0x00ffffff 3457*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_SHFT 0 3458*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x) \ 3459*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK) 3460*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_INM(x, mask) \ 3461*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask) 3462*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUT(x, val) \ 3463*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), val) 3464*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUTM(x, mask, val) \ 3465*5113495bSYour Name do {\ 3466*5113495bSYour Name HWIO_INTLOCK(); \ 3467*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x)); \ 3468*5113495bSYour Name HWIO_INTFREE();\ 3469*5113495bSYour Name } while (0) 3470*5113495bSYour Name 3471*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3472*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3473*5113495bSYour Name 3474*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3475*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3476*5113495bSYour Name 3477*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_ID //// 3478*5113495bSYour Name 3479*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x) (x+0x0000089c) 3480*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_PHYS(x) (x+0x0000089c) 3481*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK 0x0000ffff 3482*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_SHFT 0 3483*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x) \ 3484*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK) 3485*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_INM(x, mask) \ 3486*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask) 3487*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUT(x, val) \ 3488*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), val) 3489*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUTM(x, mask, val) \ 3490*5113495bSYour Name do {\ 3491*5113495bSYour Name HWIO_INTLOCK(); \ 3492*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x)); \ 3493*5113495bSYour Name HWIO_INTFREE();\ 3494*5113495bSYour Name } while (0) 3495*5113495bSYour Name 3496*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_BMSK 0x0000ff00 3497*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_SHFT 0x8 3498*5113495bSYour Name 3499*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3500*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_SHFT 0x0 3501*5113495bSYour Name 3502*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_STATUS //// 3503*5113495bSYour Name 3504*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x) (x+0x000008a0) 3505*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_PHYS(x) (x+0x000008a0) 3506*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK 0xffffffff 3507*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_SHFT 0 3508*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x) \ 3509*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK) 3510*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_INM(x, mask) \ 3511*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask) 3512*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUT(x, val) \ 3513*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), val) 3514*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUTM(x, mask, val) \ 3515*5113495bSYour Name do {\ 3516*5113495bSYour Name HWIO_INTLOCK(); \ 3517*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x)); \ 3518*5113495bSYour Name HWIO_INTFREE();\ 3519*5113495bSYour Name } while (0) 3520*5113495bSYour Name 3521*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3522*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3523*5113495bSYour Name 3524*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3525*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3526*5113495bSYour Name 3527*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MISC //// 3528*5113495bSYour Name 3529*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x) (x+0x000008a4) 3530*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_PHYS(x) (x+0x000008a4) 3531*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK 0x03ffffff 3532*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SHFT 0 3533*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x) \ 3534*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK) 3535*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_INM(x, mask) \ 3536*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask) 3537*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUT(x, val) \ 3538*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), val) 3539*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUTM(x, mask, val) \ 3540*5113495bSYour Name do {\ 3541*5113495bSYour Name HWIO_INTLOCK(); \ 3542*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x)); \ 3543*5113495bSYour Name HWIO_INTFREE();\ 3544*5113495bSYour Name } while (0) 3545*5113495bSYour Name 3546*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3547*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_SHFT 0x16 3548*5113495bSYour Name 3549*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3550*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_SHFT 0xe 3551*5113495bSYour Name 3552*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3553*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3554*5113495bSYour Name 3555*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3556*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3557*5113495bSYour Name 3558*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3559*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3560*5113495bSYour Name 3561*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3562*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_SHFT 0x6 3563*5113495bSYour Name 3564*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3565*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3566*5113495bSYour Name 3567*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3568*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3569*5113495bSYour Name 3570*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3571*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3572*5113495bSYour Name 3573*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3574*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_SHFT 0x2 3575*5113495bSYour Name 3576*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3577*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3578*5113495bSYour Name 3579*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3580*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3581*5113495bSYour Name 3582*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB //// 3583*5113495bSYour Name 3584*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x) (x+0x000008a8) 3585*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_PHYS(x) (x+0x000008a8) 3586*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK 0xffffffff 3587*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_SHFT 0 3588*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x) \ 3589*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK) 3590*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_INM(x, mask) \ 3591*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask) 3592*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUT(x, val) \ 3593*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), val) 3594*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3595*5113495bSYour Name do {\ 3596*5113495bSYour Name HWIO_INTLOCK(); \ 3597*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x)); \ 3598*5113495bSYour Name HWIO_INTFREE();\ 3599*5113495bSYour Name } while (0) 3600*5113495bSYour Name 3601*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3602*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3603*5113495bSYour Name 3604*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB //// 3605*5113495bSYour Name 3606*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x) (x+0x000008ac) 3607*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_PHYS(x) (x+0x000008ac) 3608*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK 0x000000ff 3609*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_SHFT 0 3610*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x) \ 3611*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK) 3612*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_INM(x, mask) \ 3613*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask) 3614*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUT(x, val) \ 3615*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), val) 3616*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3617*5113495bSYour Name do {\ 3618*5113495bSYour Name HWIO_INTLOCK(); \ 3619*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x)); \ 3620*5113495bSYour Name HWIO_INTFREE();\ 3621*5113495bSYour Name } while (0) 3622*5113495bSYour Name 3623*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3624*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3625*5113495bSYour Name 3626*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP //// 3627*5113495bSYour Name 3628*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000008b8) 3629*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000008b8) 3630*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3631*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SHFT 0 3632*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x) \ 3633*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK) 3634*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3635*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3636*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3637*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3638*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3639*5113495bSYour Name do {\ 3640*5113495bSYour Name HWIO_INTLOCK(); \ 3641*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x)); \ 3642*5113495bSYour Name HWIO_INTFREE();\ 3643*5113495bSYour Name } while (0) 3644*5113495bSYour Name 3645*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3646*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3647*5113495bSYour Name 3648*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3649*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3650*5113495bSYour Name 3651*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3652*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3653*5113495bSYour Name 3654*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS //// 3655*5113495bSYour Name 3656*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000008bc) 3657*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000008bc) 3658*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3659*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_SHFT 0 3660*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x) \ 3661*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK) 3662*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3663*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3664*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3665*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3666*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3667*5113495bSYour Name do {\ 3668*5113495bSYour Name HWIO_INTLOCK(); \ 3669*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x)); \ 3670*5113495bSYour Name HWIO_INTFREE();\ 3671*5113495bSYour Name } while (0) 3672*5113495bSYour Name 3673*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3674*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3675*5113495bSYour Name 3676*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3677*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3678*5113495bSYour Name 3679*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3680*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3681*5113495bSYour Name 3682*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER //// 3683*5113495bSYour Name 3684*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000008c0) 3685*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000008c0) 3686*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3687*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_SHFT 0 3688*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3689*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK) 3690*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3691*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3692*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3693*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3694*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3695*5113495bSYour Name do {\ 3696*5113495bSYour Name HWIO_INTLOCK(); \ 3697*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3698*5113495bSYour Name HWIO_INTFREE();\ 3699*5113495bSYour Name } while (0) 3700*5113495bSYour Name 3701*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3702*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3703*5113495bSYour Name 3704*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB //// 3705*5113495bSYour Name 3706*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000008dc) 3707*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000008dc) 3708*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3709*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_SHFT 0 3710*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x) \ 3711*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK) 3712*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3713*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3714*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3715*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), val) 3716*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3717*5113495bSYour Name do {\ 3718*5113495bSYour Name HWIO_INTLOCK(); \ 3719*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x)); \ 3720*5113495bSYour Name HWIO_INTFREE();\ 3721*5113495bSYour Name } while (0) 3722*5113495bSYour Name 3723*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3724*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3725*5113495bSYour Name 3726*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB //// 3727*5113495bSYour Name 3728*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000008e0) 3729*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000008e0) 3730*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3731*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_SHFT 0 3732*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x) \ 3733*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK) 3734*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3735*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3736*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3737*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), val) 3738*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3739*5113495bSYour Name do {\ 3740*5113495bSYour Name HWIO_INTLOCK(); \ 3741*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x)); \ 3742*5113495bSYour Name HWIO_INTFREE();\ 3743*5113495bSYour Name } while (0) 3744*5113495bSYour Name 3745*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3746*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3747*5113495bSYour Name 3748*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3749*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3750*5113495bSYour Name 3751*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_DATA //// 3752*5113495bSYour Name 3753*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x) (x+0x000008e4) 3754*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_PHYS(x) (x+0x000008e4) 3755*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK 0xffffffff 3756*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_SHFT 0 3757*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x) \ 3758*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK) 3759*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_INM(x, mask) \ 3760*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask) 3761*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUT(x, val) \ 3762*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), val) 3763*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3764*5113495bSYour Name do {\ 3765*5113495bSYour Name HWIO_INTLOCK(); \ 3766*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x)); \ 3767*5113495bSYour Name HWIO_INTFREE();\ 3768*5113495bSYour Name } while (0) 3769*5113495bSYour Name 3770*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3771*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_SHFT 0x0 3772*5113495bSYour Name 3773*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET //// 3774*5113495bSYour Name 3775*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008e8) 3776*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008e8) 3777*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3778*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_SHFT 0 3779*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x) \ 3780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK) 3781*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3782*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3783*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3784*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3785*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3786*5113495bSYour Name do {\ 3787*5113495bSYour Name HWIO_INTLOCK(); \ 3788*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3789*5113495bSYour Name HWIO_INTFREE();\ 3790*5113495bSYour Name } while (0) 3791*5113495bSYour Name 3792*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3793*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3794*5113495bSYour Name 3795*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_LSB //// 3796*5113495bSYour Name 3797*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x) (x+0x000008ec) 3798*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_PHYS(x) (x+0x000008ec) 3799*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK 0xffffffff 3800*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_SHFT 0 3801*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x) \ 3802*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK) 3803*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_INM(x, mask) \ 3804*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask) 3805*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUT(x, val) \ 3806*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), val) 3807*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUTM(x, mask, val) \ 3808*5113495bSYour Name do {\ 3809*5113495bSYour Name HWIO_INTLOCK(); \ 3810*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x)); \ 3811*5113495bSYour Name HWIO_INTFREE();\ 3812*5113495bSYour Name } while (0) 3813*5113495bSYour Name 3814*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3815*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3816*5113495bSYour Name 3817*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_MSB //// 3818*5113495bSYour Name 3819*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x) (x+0x000008f0) 3820*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_PHYS(x) (x+0x000008f0) 3821*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK 0x00ffffff 3822*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_SHFT 0 3823*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x) \ 3824*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK) 3825*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_INM(x, mask) \ 3826*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask) 3827*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUT(x, val) \ 3828*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), val) 3829*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUTM(x, mask, val) \ 3830*5113495bSYour Name do {\ 3831*5113495bSYour Name HWIO_INTLOCK(); \ 3832*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x)); \ 3833*5113495bSYour Name HWIO_INTFREE();\ 3834*5113495bSYour Name } while (0) 3835*5113495bSYour Name 3836*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3837*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3838*5113495bSYour Name 3839*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3840*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3841*5113495bSYour Name 3842*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_ID //// 3843*5113495bSYour Name 3844*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x) (x+0x000008f4) 3845*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_PHYS(x) (x+0x000008f4) 3846*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK 0x0000ffff 3847*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_SHFT 0 3848*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x) \ 3849*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK) 3850*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_INM(x, mask) \ 3851*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask) 3852*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUT(x, val) \ 3853*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), val) 3854*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUTM(x, mask, val) \ 3855*5113495bSYour Name do {\ 3856*5113495bSYour Name HWIO_INTLOCK(); \ 3857*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x)); \ 3858*5113495bSYour Name HWIO_INTFREE();\ 3859*5113495bSYour Name } while (0) 3860*5113495bSYour Name 3861*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_BMSK 0x0000ff00 3862*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_SHFT 0x8 3863*5113495bSYour Name 3864*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3865*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_SHFT 0x0 3866*5113495bSYour Name 3867*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_STATUS //// 3868*5113495bSYour Name 3869*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x) (x+0x000008f8) 3870*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_PHYS(x) (x+0x000008f8) 3871*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK 0xffffffff 3872*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_SHFT 0 3873*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x) \ 3874*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK) 3875*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_INM(x, mask) \ 3876*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask) 3877*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUT(x, val) \ 3878*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), val) 3879*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUTM(x, mask, val) \ 3880*5113495bSYour Name do {\ 3881*5113495bSYour Name HWIO_INTLOCK(); \ 3882*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x)); \ 3883*5113495bSYour Name HWIO_INTFREE();\ 3884*5113495bSYour Name } while (0) 3885*5113495bSYour Name 3886*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3887*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3888*5113495bSYour Name 3889*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3890*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3891*5113495bSYour Name 3892*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MISC //// 3893*5113495bSYour Name 3894*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x) (x+0x000008fc) 3895*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_PHYS(x) (x+0x000008fc) 3896*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK 0x03ffffff 3897*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SHFT 0 3898*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x) \ 3899*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK) 3900*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_INM(x, mask) \ 3901*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask) 3902*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUT(x, val) \ 3903*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), val) 3904*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUTM(x, mask, val) \ 3905*5113495bSYour Name do {\ 3906*5113495bSYour Name HWIO_INTLOCK(); \ 3907*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x)); \ 3908*5113495bSYour Name HWIO_INTFREE();\ 3909*5113495bSYour Name } while (0) 3910*5113495bSYour Name 3911*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3912*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_SHFT 0x16 3913*5113495bSYour Name 3914*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3915*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_SHFT 0xe 3916*5113495bSYour Name 3917*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3918*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3919*5113495bSYour Name 3920*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3921*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3922*5113495bSYour Name 3923*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3924*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3925*5113495bSYour Name 3926*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3927*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_SHFT 0x6 3928*5113495bSYour Name 3929*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3930*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3931*5113495bSYour Name 3932*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3933*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3934*5113495bSYour Name 3935*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3936*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3937*5113495bSYour Name 3938*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3939*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_SHFT 0x2 3940*5113495bSYour Name 3941*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3942*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3943*5113495bSYour Name 3944*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3945*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3946*5113495bSYour Name 3947*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB //// 3948*5113495bSYour Name 3949*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000900) 3950*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000900) 3951*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK 0xffffffff 3952*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_SHFT 0 3953*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x) \ 3954*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK) 3955*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_INM(x, mask) \ 3956*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask) 3957*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUT(x, val) \ 3958*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), val) 3959*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3960*5113495bSYour Name do {\ 3961*5113495bSYour Name HWIO_INTLOCK(); \ 3962*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x)); \ 3963*5113495bSYour Name HWIO_INTFREE();\ 3964*5113495bSYour Name } while (0) 3965*5113495bSYour Name 3966*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3967*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3968*5113495bSYour Name 3969*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB //// 3970*5113495bSYour Name 3971*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000904) 3972*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000904) 3973*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK 0x000000ff 3974*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_SHFT 0 3975*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x) \ 3976*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK) 3977*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_INM(x, mask) \ 3978*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask) 3979*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUT(x, val) \ 3980*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), val) 3981*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3982*5113495bSYour Name do {\ 3983*5113495bSYour Name HWIO_INTLOCK(); \ 3984*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x)); \ 3985*5113495bSYour Name HWIO_INTFREE();\ 3986*5113495bSYour Name } while (0) 3987*5113495bSYour Name 3988*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3989*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3990*5113495bSYour Name 3991*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP //// 3992*5113495bSYour Name 3993*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000910) 3994*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000910) 3995*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3996*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SHFT 0 3997*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x) \ 3998*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK) 3999*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4000*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4001*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4002*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4003*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4004*5113495bSYour Name do {\ 4005*5113495bSYour Name HWIO_INTLOCK(); \ 4006*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x)); \ 4007*5113495bSYour Name HWIO_INTFREE();\ 4008*5113495bSYour Name } while (0) 4009*5113495bSYour Name 4010*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4011*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4012*5113495bSYour Name 4013*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4014*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4015*5113495bSYour Name 4016*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4017*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4018*5113495bSYour Name 4019*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS //// 4020*5113495bSYour Name 4021*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000914) 4022*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000914) 4023*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4024*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_SHFT 0 4025*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x) \ 4026*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK) 4027*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4028*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4029*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4030*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4031*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4032*5113495bSYour Name do {\ 4033*5113495bSYour Name HWIO_INTLOCK(); \ 4034*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x)); \ 4035*5113495bSYour Name HWIO_INTFREE();\ 4036*5113495bSYour Name } while (0) 4037*5113495bSYour Name 4038*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4039*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4040*5113495bSYour Name 4041*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4042*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4043*5113495bSYour Name 4044*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4045*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4046*5113495bSYour Name 4047*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER //// 4048*5113495bSYour Name 4049*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000918) 4050*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000918) 4051*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4052*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_SHFT 0 4053*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4054*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK) 4055*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4056*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4057*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4058*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4059*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4060*5113495bSYour Name do {\ 4061*5113495bSYour Name HWIO_INTLOCK(); \ 4062*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4063*5113495bSYour Name HWIO_INTFREE();\ 4064*5113495bSYour Name } while (0) 4065*5113495bSYour Name 4066*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4067*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4068*5113495bSYour Name 4069*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB //// 4070*5113495bSYour Name 4071*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000934) 4072*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000934) 4073*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4074*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_SHFT 0 4075*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x) \ 4076*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK) 4077*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_INM(x, mask) \ 4078*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask) 4079*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUT(x, val) \ 4080*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), val) 4081*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4082*5113495bSYour Name do {\ 4083*5113495bSYour Name HWIO_INTLOCK(); \ 4084*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x)); \ 4085*5113495bSYour Name HWIO_INTFREE();\ 4086*5113495bSYour Name } while (0) 4087*5113495bSYour Name 4088*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4089*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4090*5113495bSYour Name 4091*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB //// 4092*5113495bSYour Name 4093*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000938) 4094*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000938) 4095*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4096*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_SHFT 0 4097*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x) \ 4098*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK) 4099*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_INM(x, mask) \ 4100*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask) 4101*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUT(x, val) \ 4102*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), val) 4103*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4104*5113495bSYour Name do {\ 4105*5113495bSYour Name HWIO_INTLOCK(); \ 4106*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x)); \ 4107*5113495bSYour Name HWIO_INTFREE();\ 4108*5113495bSYour Name } while (0) 4109*5113495bSYour Name 4110*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4111*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4112*5113495bSYour Name 4113*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4114*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4115*5113495bSYour Name 4116*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_DATA //// 4117*5113495bSYour Name 4118*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x) (x+0x0000093c) 4119*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_PHYS(x) (x+0x0000093c) 4120*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK 0xffffffff 4121*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_SHFT 0 4122*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x) \ 4123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK) 4124*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_INM(x, mask) \ 4125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask) 4126*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUT(x, val) \ 4127*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), val) 4128*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUTM(x, mask, val) \ 4129*5113495bSYour Name do {\ 4130*5113495bSYour Name HWIO_INTLOCK(); \ 4131*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x)); \ 4132*5113495bSYour Name HWIO_INTFREE();\ 4133*5113495bSYour Name } while (0) 4134*5113495bSYour Name 4135*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4136*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_SHFT 0x0 4137*5113495bSYour Name 4138*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET //// 4139*5113495bSYour Name 4140*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000940) 4141*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000940) 4142*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4143*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_SHFT 0 4144*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x) \ 4145*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK) 4146*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4148*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4149*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4150*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4151*5113495bSYour Name do {\ 4152*5113495bSYour Name HWIO_INTLOCK(); \ 4153*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x)); \ 4154*5113495bSYour Name HWIO_INTFREE();\ 4155*5113495bSYour Name } while (0) 4156*5113495bSYour Name 4157*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4158*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4159*5113495bSYour Name 4160*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_LSB //// 4161*5113495bSYour Name 4162*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x) (x+0x00000944) 4163*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_PHYS(x) (x+0x00000944) 4164*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK 0xffffffff 4165*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_SHFT 0 4166*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x) \ 4167*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK) 4168*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_INM(x, mask) \ 4169*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask) 4170*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUT(x, val) \ 4171*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), val) 4172*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUTM(x, mask, val) \ 4173*5113495bSYour Name do {\ 4174*5113495bSYour Name HWIO_INTLOCK(); \ 4175*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x)); \ 4176*5113495bSYour Name HWIO_INTFREE();\ 4177*5113495bSYour Name } while (0) 4178*5113495bSYour Name 4179*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 4180*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 4181*5113495bSYour Name 4182*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_MSB //// 4183*5113495bSYour Name 4184*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x) (x+0x00000948) 4185*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_PHYS(x) (x+0x00000948) 4186*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK 0x00ffffff 4187*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_SHFT 0 4188*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x) \ 4189*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK) 4190*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_INM(x, mask) \ 4191*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask) 4192*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUT(x, val) \ 4193*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), val) 4194*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUTM(x, mask, val) \ 4195*5113495bSYour Name do {\ 4196*5113495bSYour Name HWIO_INTLOCK(); \ 4197*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x)); \ 4198*5113495bSYour Name HWIO_INTFREE();\ 4199*5113495bSYour Name } while (0) 4200*5113495bSYour Name 4201*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4202*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4203*5113495bSYour Name 4204*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4205*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4206*5113495bSYour Name 4207*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_ID //// 4208*5113495bSYour Name 4209*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x) (x+0x0000094c) 4210*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_PHYS(x) (x+0x0000094c) 4211*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RMSK 0x0000ffff 4212*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_SHFT 0 4213*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_IN(x) \ 4214*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_ID_RMSK) 4215*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_INM(x, mask) \ 4216*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask) 4217*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUT(x, val) \ 4218*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), val) 4219*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUTM(x, mask, val) \ 4220*5113495bSYour Name do {\ 4221*5113495bSYour Name HWIO_INTLOCK(); \ 4222*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_ID_IN(x)); \ 4223*5113495bSYour Name HWIO_INTFREE();\ 4224*5113495bSYour Name } while (0) 4225*5113495bSYour Name 4226*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_BMSK 0x0000ff00 4227*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_SHFT 0x8 4228*5113495bSYour Name 4229*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4230*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_SHFT 0x0 4231*5113495bSYour Name 4232*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_STATUS //// 4233*5113495bSYour Name 4234*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x) (x+0x00000950) 4235*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_PHYS(x) (x+0x00000950) 4236*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK 0xffffffff 4237*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_SHFT 0 4238*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x) \ 4239*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK) 4240*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_INM(x, mask) \ 4241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask) 4242*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUT(x, val) \ 4243*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), val) 4244*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUTM(x, mask, val) \ 4245*5113495bSYour Name do {\ 4246*5113495bSYour Name HWIO_INTLOCK(); \ 4247*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x)); \ 4248*5113495bSYour Name HWIO_INTFREE();\ 4249*5113495bSYour Name } while (0) 4250*5113495bSYour Name 4251*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4252*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4253*5113495bSYour Name 4254*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4255*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4256*5113495bSYour Name 4257*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MISC //// 4258*5113495bSYour Name 4259*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x) (x+0x00000954) 4260*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_PHYS(x) (x+0x00000954) 4261*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK 0x03ffffff 4262*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SHFT 0 4263*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x) \ 4264*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK) 4265*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_INM(x, mask) \ 4266*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask) 4267*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUT(x, val) \ 4268*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), val) 4269*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUTM(x, mask, val) \ 4270*5113495bSYour Name do {\ 4271*5113495bSYour Name HWIO_INTLOCK(); \ 4272*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x)); \ 4273*5113495bSYour Name HWIO_INTFREE();\ 4274*5113495bSYour Name } while (0) 4275*5113495bSYour Name 4276*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4277*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_SHFT 0x16 4278*5113495bSYour Name 4279*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4280*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_SHFT 0xe 4281*5113495bSYour Name 4282*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4283*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4284*5113495bSYour Name 4285*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4286*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4287*5113495bSYour Name 4288*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4289*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4290*5113495bSYour Name 4291*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4292*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_SHFT 0x6 4293*5113495bSYour Name 4294*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4295*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4296*5113495bSYour Name 4297*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4298*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4299*5113495bSYour Name 4300*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4301*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4302*5113495bSYour Name 4303*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4304*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_SHFT 0x2 4305*5113495bSYour Name 4306*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4307*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4308*5113495bSYour Name 4309*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4310*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4311*5113495bSYour Name 4312*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_LSB //// 4313*5113495bSYour Name 4314*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000958) 4315*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000958) 4316*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK 0xffffffff 4317*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_SHFT 0 4318*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x) \ 4319*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK) 4320*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_INM(x, mask) \ 4321*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 4322*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUT(x, val) \ 4323*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), val) 4324*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4325*5113495bSYour Name do {\ 4326*5113495bSYour Name HWIO_INTLOCK(); \ 4327*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x)); \ 4328*5113495bSYour Name HWIO_INTFREE();\ 4329*5113495bSYour Name } while (0) 4330*5113495bSYour Name 4331*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4332*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4333*5113495bSYour Name 4334*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_MSB //// 4335*5113495bSYour Name 4336*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000095c) 4337*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000095c) 4338*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK 0x000000ff 4339*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_SHFT 0 4340*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x) \ 4341*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK) 4342*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_INM(x, mask) \ 4343*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 4344*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUT(x, val) \ 4345*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), val) 4346*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4347*5113495bSYour Name do {\ 4348*5113495bSYour Name HWIO_INTLOCK(); \ 4349*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x)); \ 4350*5113495bSYour Name HWIO_INTFREE();\ 4351*5113495bSYour Name } while (0) 4352*5113495bSYour Name 4353*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4354*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4355*5113495bSYour Name 4356*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP //// 4357*5113495bSYour Name 4358*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000968) 4359*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000968) 4360*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4361*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SHFT 0 4362*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x) \ 4363*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK) 4364*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4365*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4366*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4367*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4368*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4369*5113495bSYour Name do {\ 4370*5113495bSYour Name HWIO_INTLOCK(); \ 4371*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x)); \ 4372*5113495bSYour Name HWIO_INTFREE();\ 4373*5113495bSYour Name } while (0) 4374*5113495bSYour Name 4375*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4376*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4377*5113495bSYour Name 4378*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4379*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4380*5113495bSYour Name 4381*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4382*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4383*5113495bSYour Name 4384*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS //// 4385*5113495bSYour Name 4386*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000096c) 4387*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000096c) 4388*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4389*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_SHFT 0 4390*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x) \ 4391*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK) 4392*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4393*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4394*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4395*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4396*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4397*5113495bSYour Name do {\ 4398*5113495bSYour Name HWIO_INTLOCK(); \ 4399*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x)); \ 4400*5113495bSYour Name HWIO_INTFREE();\ 4401*5113495bSYour Name } while (0) 4402*5113495bSYour Name 4403*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4404*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4405*5113495bSYour Name 4406*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4407*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4408*5113495bSYour Name 4409*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4410*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4411*5113495bSYour Name 4412*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER //// 4413*5113495bSYour Name 4414*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000970) 4415*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000970) 4416*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4417*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_SHFT 0 4418*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK) 4420*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4421*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4422*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4423*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4424*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4425*5113495bSYour Name do {\ 4426*5113495bSYour Name HWIO_INTLOCK(); \ 4427*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4428*5113495bSYour Name HWIO_INTFREE();\ 4429*5113495bSYour Name } while (0) 4430*5113495bSYour Name 4431*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4432*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4433*5113495bSYour Name 4434*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET //// 4435*5113495bSYour Name 4436*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000998) 4437*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000998) 4438*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4439*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_SHFT 0 4440*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x) \ 4441*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK) 4442*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4443*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4444*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4445*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4446*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4447*5113495bSYour Name do {\ 4448*5113495bSYour Name HWIO_INTLOCK(); \ 4449*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x)); \ 4450*5113495bSYour Name HWIO_INTFREE();\ 4451*5113495bSYour Name } while (0) 4452*5113495bSYour Name 4453*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4454*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4455*5113495bSYour Name 4456*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_LOWER //// 4457*5113495bSYour Name 4458*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x0000099c) 4459*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x0000099c) 4460*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK 0xffffffff 4461*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_SHFT 0 4462*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x) \ 4463*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK) 4464*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ 4465*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 4466*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ 4467*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), val) 4468*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ 4469*5113495bSYour Name do {\ 4470*5113495bSYour Name HWIO_INTLOCK(); \ 4471*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x)); \ 4472*5113495bSYour Name HWIO_INTFREE();\ 4473*5113495bSYour Name } while (0) 4474*5113495bSYour Name 4475*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_BMSK 0xffffffff 4476*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_SHFT 0x0 4477*5113495bSYour Name 4478*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_UPPER //// 4479*5113495bSYour Name 4480*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000009a0) 4481*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000009a0) 4482*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK 0x000000ff 4483*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_SHFT 0 4484*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x) \ 4485*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK) 4486*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ 4487*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 4488*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ 4489*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), val) 4490*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ 4491*5113495bSYour Name do {\ 4492*5113495bSYour Name HWIO_INTLOCK(); \ 4493*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x)); \ 4494*5113495bSYour Name HWIO_INTFREE();\ 4495*5113495bSYour Name } while (0) 4496*5113495bSYour Name 4497*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_BMSK 0x000000ff 4498*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_SHFT 0x0 4499*5113495bSYour Name 4500*5113495bSYour Name //// Register TCL_R0_GXI_SM_STATES_IX_0 //// 4501*5113495bSYour Name 4502*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000009a4) 4503*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000009a4) 4504*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK 0x00000fff 4505*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SHFT 0 4506*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x) \ 4507*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK) 4508*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ 4509*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 4510*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ 4511*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), val) 4512*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ 4513*5113495bSYour Name do {\ 4514*5113495bSYour Name HWIO_INTLOCK(); \ 4515*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x)); \ 4516*5113495bSYour Name HWIO_INTFREE();\ 4517*5113495bSYour Name } while (0) 4518*5113495bSYour Name 4519*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0x00000e00 4520*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9 4521*5113495bSYour Name 4522*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x000001f0 4523*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4 4524*5113495bSYour Name 4525*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0x0000000f 4526*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0 4527*5113495bSYour Name 4528*5113495bSYour Name //// Register TCL_R0_GXI_END_OF_TEST_CHECK //// 4529*5113495bSYour Name 4530*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000009a8) 4531*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000009a8) 4532*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK 0x00000001 4533*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_SHFT 0 4534*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x) \ 4535*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK) 4536*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ 4537*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 4538*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ 4539*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val) 4540*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 4541*5113495bSYour Name do {\ 4542*5113495bSYour Name HWIO_INTLOCK(); \ 4543*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x)); \ 4544*5113495bSYour Name HWIO_INTFREE();\ 4545*5113495bSYour Name } while (0) 4546*5113495bSYour Name 4547*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 4548*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 4549*5113495bSYour Name 4550*5113495bSYour Name //// Register TCL_R0_GXI_CLOCK_GATE_DISABLE //// 4551*5113495bSYour Name 4552*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000009ac) 4553*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000009ac) 4554*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK 0x80000fff 4555*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SHFT 0 4556*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ 4557*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK) 4558*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ 4559*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 4560*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ 4561*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val) 4562*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ 4563*5113495bSYour Name do {\ 4564*5113495bSYour Name HWIO_INTLOCK(); \ 4565*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x)); \ 4566*5113495bSYour Name HWIO_INTFREE();\ 4567*5113495bSYour Name } while (0) 4568*5113495bSYour Name 4569*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000 4570*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f 4571*5113495bSYour Name 4572*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_BMSK 0x00000800 4573*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb 4574*5113495bSYour Name 4575*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x00000400 4576*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa 4577*5113495bSYour Name 4578*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x00000200 4579*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9 4580*5113495bSYour Name 4581*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x00000100 4582*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8 4583*5113495bSYour Name 4584*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x00000080 4585*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7 4586*5113495bSYour Name 4587*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x00000040 4588*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6 4589*5113495bSYour Name 4590*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x00000020 4591*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5 4592*5113495bSYour Name 4593*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x00000010 4594*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4 4595*5113495bSYour Name 4596*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x00000008 4597*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3 4598*5113495bSYour Name 4599*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x00000004 4600*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2 4601*5113495bSYour Name 4602*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x00000002 4603*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1 4604*5113495bSYour Name 4605*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_BMSK 0x00000001 4606*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_SHFT 0x0 4607*5113495bSYour Name 4608*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_INTS //// 4609*5113495bSYour Name 4610*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000009b0) 4611*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000009b0) 4612*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK 0x01010101 4613*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_SHFT 0 4614*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x) \ 4615*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK) 4616*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ 4617*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 4618*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ 4619*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), val) 4620*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ 4621*5113495bSYour Name do {\ 4622*5113495bSYour Name HWIO_INTLOCK(); \ 4623*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x)); \ 4624*5113495bSYour Name HWIO_INTFREE();\ 4625*5113495bSYour Name } while (0) 4626*5113495bSYour Name 4627*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x01000000 4628*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18 4629*5113495bSYour Name 4630*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x00010000 4631*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10 4632*5113495bSYour Name 4633*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x00000100 4634*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8 4635*5113495bSYour Name 4636*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x00000001 4637*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0 4638*5113495bSYour Name 4639*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_STATS //// 4640*5113495bSYour Name 4641*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000009b4) 4642*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000009b4) 4643*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK 0x003f3f3f 4644*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_SHFT 0 4645*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x) \ 4646*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK) 4647*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ 4648*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 4649*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ 4650*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), val) 4651*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ 4652*5113495bSYour Name do {\ 4653*5113495bSYour Name HWIO_INTLOCK(); \ 4654*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x)); \ 4655*5113495bSYour Name HWIO_INTFREE();\ 4656*5113495bSYour Name } while (0) 4657*5113495bSYour Name 4658*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x003f0000 4659*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10 4660*5113495bSYour Name 4661*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x00003f00 4662*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8 4663*5113495bSYour Name 4664*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x0000003f 4665*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0 4666*5113495bSYour Name 4667*5113495bSYour Name //// Register TCL_R0_GXI_GXI_DEFAULT_CONTROL //// 4668*5113495bSYour Name 4669*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000009b8) 4670*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000009b8) 4671*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f 4672*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_SHFT 0 4673*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ 4674*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK) 4675*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ 4676*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 4677*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ 4678*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val) 4679*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ 4680*5113495bSYour Name do {\ 4681*5113495bSYour Name HWIO_INTLOCK(); \ 4682*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)); \ 4683*5113495bSYour Name HWIO_INTFREE();\ 4684*5113495bSYour Name } while (0) 4685*5113495bSYour Name 4686*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000 4687*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18 4688*5113495bSYour Name 4689*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4690*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10 4691*5113495bSYour Name 4692*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x00003f00 4693*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8 4694*5113495bSYour Name 4695*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x0000003f 4696*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0 4697*5113495bSYour Name 4698*5113495bSYour Name //// Register TCL_R0_GXI_GXI_REDUCED_CONTROL //// 4699*5113495bSYour Name 4700*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000009bc) 4701*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000009bc) 4702*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f 4703*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_SHFT 0 4704*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ 4705*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK) 4706*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ 4707*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 4708*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ 4709*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val) 4710*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ 4711*5113495bSYour Name do {\ 4712*5113495bSYour Name HWIO_INTLOCK(); \ 4713*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x)); \ 4714*5113495bSYour Name HWIO_INTFREE();\ 4715*5113495bSYour Name } while (0) 4716*5113495bSYour Name 4717*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000 4718*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18 4719*5113495bSYour Name 4720*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4721*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10 4722*5113495bSYour Name 4723*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x00003f00 4724*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8 4725*5113495bSYour Name 4726*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x0000003f 4727*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0 4728*5113495bSYour Name 4729*5113495bSYour Name //// Register TCL_R0_GXI_GXI_MISC_CONTROL //// 4730*5113495bSYour Name 4731*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000009c0) 4732*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000009c0) 4733*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK 0x0fffffff 4734*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_SHFT 0 4735*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x) \ 4736*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK) 4737*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ 4738*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 4739*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ 4740*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val) 4741*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ 4742*5113495bSYour Name do {\ 4743*5113495bSYour Name HWIO_INTLOCK(); \ 4744*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x)); \ 4745*5113495bSYour Name HWIO_INTFREE();\ 4746*5113495bSYour Name } while (0) 4747*5113495bSYour Name 4748*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x08000000 4749*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b 4750*5113495bSYour Name 4751*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x04000000 4752*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a 4753*5113495bSYour Name 4754*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x02000000 4755*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19 4756*5113495bSYour Name 4757*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x01000000 4758*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18 4759*5113495bSYour Name 4760*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x00800000 4761*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17 4762*5113495bSYour Name 4763*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x00700000 4764*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14 4765*5113495bSYour Name 4766*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0x000e0000 4767*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11 4768*5113495bSYour Name 4769*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x0001fe00 4770*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9 4771*5113495bSYour Name 4772*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x000001fe 4773*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1 4774*5113495bSYour Name 4775*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x00000001 4776*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0 4777*5113495bSYour Name 4778*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_CONTROL //// 4779*5113495bSYour Name 4780*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x000009c4) 4781*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x000009c4) 4782*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK 0xffff0001 4783*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_SHFT 0 4784*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ 4785*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK) 4786*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ 4787*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 4788*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ 4789*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val) 4790*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ 4791*5113495bSYour Name do {\ 4792*5113495bSYour Name HWIO_INTLOCK(); \ 4793*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x)); \ 4794*5113495bSYour Name HWIO_INTFREE();\ 4795*5113495bSYour Name } while (0) 4796*5113495bSYour Name 4797*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000 4798*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10 4799*5113495bSYour Name 4800*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x00000001 4801*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0 4802*5113495bSYour Name 4803*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_STATUS //// 4804*5113495bSYour Name 4805*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x000009c8) 4806*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x000009c8) 4807*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK 0x0000ffff 4808*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_SHFT 0 4809*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x) \ 4810*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK) 4811*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ 4812*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 4813*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ 4814*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val) 4815*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ 4816*5113495bSYour Name do {\ 4817*5113495bSYour Name HWIO_INTLOCK(); \ 4818*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x)); \ 4819*5113495bSYour Name HWIO_INTFREE();\ 4820*5113495bSYour Name } while (0) 4821*5113495bSYour Name 4822*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0x0000ffff 4823*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0 4824*5113495bSYour Name 4825*5113495bSYour Name //// Register TCL_R0_GXI_GXI_IDLE_COUNTERS //// 4826*5113495bSYour Name 4827*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x000009cc) 4828*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x000009cc) 4829*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK 0xffffffff 4830*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_SHFT 0 4831*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ 4832*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK) 4833*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ 4834*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 4835*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ 4836*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val) 4837*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ 4838*5113495bSYour Name do {\ 4839*5113495bSYour Name HWIO_INTLOCK(); \ 4840*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x)); \ 4841*5113495bSYour Name HWIO_INTFREE();\ 4842*5113495bSYour Name } while (0) 4843*5113495bSYour Name 4844*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000 4845*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10 4846*5113495bSYour Name 4847*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0x0000ffff 4848*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0 4849*5113495bSYour Name 4850*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_LATENCY_CTRL //// 4851*5113495bSYour Name 4852*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x000009d0) 4853*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x000009d0) 4854*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK 0x000fffff 4855*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_SHFT 0 4856*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ 4857*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK) 4858*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ 4859*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 4860*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ 4861*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val) 4862*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ 4863*5113495bSYour Name do {\ 4864*5113495bSYour Name HWIO_INTLOCK(); \ 4865*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)); \ 4866*5113495bSYour Name HWIO_INTFREE();\ 4867*5113495bSYour Name } while (0) 4868*5113495bSYour Name 4869*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4870*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4871*5113495bSYour Name 4872*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4873*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4874*5113495bSYour Name 4875*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4876*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4877*5113495bSYour Name 4878*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_LATENCY_CTRL //// 4879*5113495bSYour Name 4880*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x000009d4) 4881*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x000009d4) 4882*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK 0x000fffff 4883*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_SHFT 0 4884*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ 4885*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK) 4886*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ 4887*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 4888*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ 4889*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val) 4890*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ 4891*5113495bSYour Name do {\ 4892*5113495bSYour Name HWIO_INTLOCK(); \ 4893*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)); \ 4894*5113495bSYour Name HWIO_INTFREE();\ 4895*5113495bSYour Name } while (0) 4896*5113495bSYour Name 4897*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4898*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4899*5113495bSYour Name 4900*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4901*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4902*5113495bSYour Name 4903*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4904*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4905*5113495bSYour Name 4906*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_LOW //// 4907*5113495bSYour Name 4908*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x) (x+0x000009d8) 4909*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_PHYS(x) (x+0x000009d8) 4910*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK 0xffffffff 4911*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_SHFT 0 4912*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x) \ 4913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK) 4914*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_INM(x, mask) \ 4915*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask) 4916*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUT(x, val) \ 4917*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), val) 4918*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUTM(x, mask, val) \ 4919*5113495bSYour Name do {\ 4920*5113495bSYour Name HWIO_INTLOCK(); \ 4921*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x)); \ 4922*5113495bSYour Name HWIO_INTFREE();\ 4923*5113495bSYour Name } while (0) 4924*5113495bSYour Name 4925*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_BMSK 0xffffffff 4926*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_SHFT 0x0 4927*5113495bSYour Name 4928*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_HIGH //// 4929*5113495bSYour Name 4930*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x) (x+0x000009dc) 4931*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_PHYS(x) (x+0x000009dc) 4932*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK 0x000000ff 4933*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_SHFT 0 4934*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x) \ 4935*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK) 4936*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_INM(x, mask) \ 4937*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask) 4938*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUT(x, val) \ 4939*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), val) 4940*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUTM(x, mask, val) \ 4941*5113495bSYour Name do {\ 4942*5113495bSYour Name HWIO_INTLOCK(); \ 4943*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x)); \ 4944*5113495bSYour Name HWIO_INTFREE();\ 4945*5113495bSYour Name } while (0) 4946*5113495bSYour Name 4947*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_BMSK 0x000000ff 4948*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_SHFT 0x0 4949*5113495bSYour Name 4950*5113495bSYour Name //// Register TCL_R0_ASE_GST_SIZE //// 4951*5113495bSYour Name 4952*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x) (x+0x000009e0) 4953*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_PHYS(x) (x+0x000009e0) 4954*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_RMSK 0x000fffff 4955*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_SHFT 0 4956*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_IN(x) \ 4957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), HWIO_TCL_R0_ASE_GST_SIZE_RMSK) 4958*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_INM(x, mask) \ 4959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask) 4960*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUT(x, val) \ 4961*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), val) 4962*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUTM(x, mask, val) \ 4963*5113495bSYour Name do {\ 4964*5113495bSYour Name HWIO_INTLOCK(); \ 4965*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_SIZE_IN(x)); \ 4966*5113495bSYour Name HWIO_INTFREE();\ 4967*5113495bSYour Name } while (0) 4968*5113495bSYour Name 4969*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_BMSK 0x000fffff 4970*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_SHFT 0x0 4971*5113495bSYour Name 4972*5113495bSYour Name //// Register TCL_R0_ASE_SEARCH_CTRL //// 4973*5113495bSYour Name 4974*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x) (x+0x000009e4) 4975*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_PHYS(x) (x+0x000009e4) 4976*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK 0xffff07ff 4977*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SHFT 0 4978*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x) \ 4979*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK) 4980*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_INM(x, mask) \ 4981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask) 4982*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUT(x, val) \ 4983*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), val) 4984*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUTM(x, mask, val) \ 4985*5113495bSYour Name do {\ 4986*5113495bSYour Name HWIO_INTLOCK(); \ 4987*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x)); \ 4988*5113495bSYour Name HWIO_INTFREE();\ 4989*5113495bSYour Name } while (0) 4990*5113495bSYour Name 4991*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_BMSK 0xffff0000 4992*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SHFT 0x10 4993*5113495bSYour Name 4994*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_BMSK 0x00000400 4995*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_SHFT 0xa 4996*5113495bSYour Name 4997*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_BMSK 0x00000200 4998*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_SHFT 0x9 4999*5113495bSYour Name 5000*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_BMSK 0x00000100 5001*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_SHFT 0x8 5002*5113495bSYour Name 5003*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_BMSK 0x000000ff 5004*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_SHFT 0x0 5005*5113495bSYour Name 5006*5113495bSYour Name //// Register TCL_R0_ASE_WATCHDOG //// 5007*5113495bSYour Name 5008*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x) (x+0x000009e8) 5009*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_PHYS(x) (x+0x000009e8) 5010*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_RMSK 0xffffffff 5011*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_SHFT 0 5012*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_IN(x) \ 5013*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), HWIO_TCL_R0_ASE_WATCHDOG_RMSK) 5014*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_INM(x, mask) \ 5015*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask) 5016*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUT(x, val) \ 5017*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), val) 5018*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUTM(x, mask, val) \ 5019*5113495bSYour Name do {\ 5020*5113495bSYour Name HWIO_INTLOCK(); \ 5021*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WATCHDOG_IN(x)); \ 5022*5113495bSYour Name HWIO_INTFREE();\ 5023*5113495bSYour Name } while (0) 5024*5113495bSYour Name 5025*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_BMSK 0xffff0000 5026*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_SHFT 0x10 5027*5113495bSYour Name 5028*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_BMSK 0x0000ffff 5029*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_SHFT 0x0 5030*5113495bSYour Name 5031*5113495bSYour Name //// Register TCL_R0_ASE_CLKGATE_DISABLE //// 5032*5113495bSYour Name 5033*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x) (x+0x000009ec) 5034*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PHYS(x) (x+0x000009ec) 5035*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK 0xfffff87f 5036*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SHFT 0 5037*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x) \ 5038*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK) 5039*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_INM(x, mask) \ 5040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask) 5041*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUT(x, val) \ 5042*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), val) 5043*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUTM(x, mask, val) \ 5044*5113495bSYour Name do {\ 5045*5113495bSYour Name HWIO_INTLOCK(); \ 5046*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x)); \ 5047*5113495bSYour Name HWIO_INTFREE();\ 5048*5113495bSYour Name } while (0) 5049*5113495bSYour Name 5050*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_BMSK 0x80000000 5051*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_SHFT 0x1f 5052*5113495bSYour Name 5053*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 5054*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 5055*5113495bSYour Name 5056*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_BMSK 0x3ffff800 5057*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_SHFT 0xb 5058*5113495bSYour Name 5059*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_BMSK 0x00000040 5060*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_SHFT 0x6 5061*5113495bSYour Name 5062*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_BMSK 0x00000020 5063*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_SHFT 0x5 5064*5113495bSYour Name 5065*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_BMSK 0x00000010 5066*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_SHFT 0x4 5067*5113495bSYour Name 5068*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_BMSK 0x00000008 5069*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_SHFT 0x3 5070*5113495bSYour Name 5071*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_BMSK 0x00000004 5072*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_SHFT 0x2 5073*5113495bSYour Name 5074*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_BMSK 0x00000002 5075*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_SHFT 0x1 5076*5113495bSYour Name 5077*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_BMSK 0x00000001 5078*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_SHFT 0x0 5079*5113495bSYour Name 5080*5113495bSYour Name //// Register TCL_R0_ASE_WRITE_BACK_PENDING //// 5081*5113495bSYour Name 5082*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x) (x+0x000009f0) 5083*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_PHYS(x) (x+0x000009f0) 5084*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK 0x00000001 5085*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_SHFT 0 5086*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x) \ 5087*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK) 5088*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_INM(x, mask) \ 5089*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask) 5090*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUT(x, val) \ 5091*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), val) 5092*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUTM(x, mask, val) \ 5093*5113495bSYour Name do {\ 5094*5113495bSYour Name HWIO_INTLOCK(); \ 5095*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x)); \ 5096*5113495bSYour Name HWIO_INTFREE();\ 5097*5113495bSYour Name } while (0) 5098*5113495bSYour Name 5099*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_BMSK 0x00000001 5100*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_SHFT 0x0 5101*5113495bSYour Name 5102*5113495bSYour Name //// Register TCL_R1_CACHE_FLUSH //// 5103*5113495bSYour Name 5104*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ADDR(x) (x+0x00001000) 5105*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_PHYS(x) (x+0x00001000) 5106*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_RMSK 0x00000003 5107*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_SHFT 0 5108*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_IN(x) \ 5109*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), HWIO_TCL_R1_CACHE_FLUSH_RMSK) 5110*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_INM(x, mask) \ 5111*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask) 5112*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUT(x, val) \ 5113*5113495bSYour Name out_dword( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), val) 5114*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUTM(x, mask, val) \ 5115*5113495bSYour Name do {\ 5116*5113495bSYour Name HWIO_INTLOCK(); \ 5117*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask, val, HWIO_TCL_R1_CACHE_FLUSH_IN(x)); \ 5118*5113495bSYour Name HWIO_INTFREE();\ 5119*5113495bSYour Name } while (0) 5120*5113495bSYour Name 5121*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_BMSK 0x00000002 5122*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_SHFT 0x1 5123*5113495bSYour Name 5124*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_BMSK 0x00000001 5125*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_SHFT 0x0 5126*5113495bSYour Name 5127*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_0 //// 5128*5113495bSYour Name 5129*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x) (x+0x00001004) 5130*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_PHYS(x) (x+0x00001004) 5131*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_RMSK 0x07ffffff 5132*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SHFT 0 5133*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_IN(x) \ 5134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_0_RMSK) 5135*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_INM(x, mask) \ 5136*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask) 5137*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUT(x, val) \ 5138*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), val) 5139*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ 5140*5113495bSYour Name do {\ 5141*5113495bSYour Name HWIO_INTLOCK(); \ 5142*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_0_IN(x)); \ 5143*5113495bSYour Name HWIO_INTFREE();\ 5144*5113495bSYour Name } while (0) 5145*5113495bSYour Name 5146*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_BMSK 0x07000000 5147*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_SHFT 0x18 5148*5113495bSYour Name 5149*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_BMSK 0x00e00000 5150*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_SHFT 0x15 5151*5113495bSYour Name 5152*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_BMSK 0x001c0000 5153*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_SHFT 0x12 5154*5113495bSYour Name 5155*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_BMSK 0x00038000 5156*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_SHFT 0xf 5157*5113495bSYour Name 5158*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CMD_RING_BMSK 0x00007000 5159*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CMD_RING_SHFT 0xc 5160*5113495bSYour Name 5161*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_BMSK 0x00000e00 5162*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_SHFT 0x9 5163*5113495bSYour Name 5164*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_BMSK 0x000001c0 5165*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_SHFT 0x6 5166*5113495bSYour Name 5167*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_BMSK 0x00000038 5168*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_SHFT 0x3 5169*5113495bSYour Name 5170*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_BMSK 0x00000007 5171*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_SHFT 0x0 5172*5113495bSYour Name 5173*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_1 //// 5174*5113495bSYour Name 5175*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x) (x+0x00001008) 5176*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PHYS(x) (x+0x00001008) 5177*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_RMSK 0x0003ffff 5178*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_SHFT 0 5179*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_IN(x) \ 5180*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_1_RMSK) 5181*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_INM(x, mask) \ 5182*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask) 5183*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUT(x, val) \ 5184*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), val) 5185*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ 5186*5113495bSYour Name do {\ 5187*5113495bSYour Name HWIO_INTLOCK(); \ 5188*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_1_IN(x)); \ 5189*5113495bSYour Name HWIO_INTFREE();\ 5190*5113495bSYour Name } while (0) 5191*5113495bSYour Name 5192*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_BMSK 0x00038000 5193*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_SHFT 0xf 5194*5113495bSYour Name 5195*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_BMSK 0x00007000 5196*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_SHFT 0xc 5197*5113495bSYour Name 5198*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_BMSK 0x00000e00 5199*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_SHFT 0x9 5200*5113495bSYour Name 5201*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_BMSK 0x000001c0 5202*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_SHFT 0x6 5203*5113495bSYour Name 5204*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_BMSK 0x00000038 5205*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_SHFT 0x3 5206*5113495bSYour Name 5207*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_BMSK 0x00000007 5208*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_SHFT 0x0 5209*5113495bSYour Name 5210*5113495bSYour Name //// Register TCL_R1_TESTBUS_CTRL_0 //// 5211*5113495bSYour Name 5212*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x) (x+0x0000100c) 5213*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PHYS(x) (x+0x0000100c) 5214*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK 0x3fffffff 5215*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_SHFT 0 5216*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x) \ 5217*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK) 5218*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_INM(x, mask) \ 5219*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask) 5220*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUT(x, val) \ 5221*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), val) 5222*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUTM(x, mask, val) \ 5223*5113495bSYour Name do {\ 5224*5113495bSYour Name HWIO_INTLOCK(); \ 5225*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x)); \ 5226*5113495bSYour Name HWIO_INTFREE();\ 5227*5113495bSYour Name } while (0) 5228*5113495bSYour Name 5229*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x20000000 5230*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x1d 5231*5113495bSYour Name 5232*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_BMSK 0x1f800000 5233*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_SHFT 0x17 5234*5113495bSYour Name 5235*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_BMSK 0x007c0000 5236*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_SHFT 0x12 5237*5113495bSYour Name 5238*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_BMSK 0x0003c000 5239*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_SHFT 0xe 5240*5113495bSYour Name 5241*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_BMSK 0x00003c00 5242*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_SHFT 0xa 5243*5113495bSYour Name 5244*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_BMSK 0x000003e0 5245*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_SHFT 0x5 5246*5113495bSYour Name 5247*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_BMSK 0x0000001f 5248*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_SHFT 0x0 5249*5113495bSYour Name 5250*5113495bSYour Name //// Register TCL_R1_TESTBUS_LOW //// 5251*5113495bSYour Name 5252*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_ADDR(x) (x+0x00001010) 5253*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_PHYS(x) (x+0x00001010) 5254*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_RMSK 0xffffffff 5255*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_SHFT 0 5256*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_IN(x) \ 5257*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), HWIO_TCL_R1_TESTBUS_LOW_RMSK) 5258*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_INM(x, mask) \ 5259*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask) 5260*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUT(x, val) \ 5261*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), val) 5262*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUTM(x, mask, val) \ 5263*5113495bSYour Name do {\ 5264*5113495bSYour Name HWIO_INTLOCK(); \ 5265*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_LOW_IN(x)); \ 5266*5113495bSYour Name HWIO_INTFREE();\ 5267*5113495bSYour Name } while (0) 5268*5113495bSYour Name 5269*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff 5270*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_SHFT 0x0 5271*5113495bSYour Name 5272*5113495bSYour Name //// Register TCL_R1_TESTBUS_HIGH //// 5273*5113495bSYour Name 5274*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x) (x+0x00001014) 5275*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_PHYS(x) (x+0x00001014) 5276*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_RMSK 0x000000ff 5277*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_SHFT 0 5278*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_IN(x) \ 5279*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), HWIO_TCL_R1_TESTBUS_HIGH_RMSK) 5280*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_INM(x, mask) \ 5281*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask) 5282*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUT(x, val) \ 5283*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), val) 5284*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUTM(x, mask, val) \ 5285*5113495bSYour Name do {\ 5286*5113495bSYour Name HWIO_INTLOCK(); \ 5287*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_HIGH_IN(x)); \ 5288*5113495bSYour Name HWIO_INTFREE();\ 5289*5113495bSYour Name } while (0) 5290*5113495bSYour Name 5291*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_BMSK 0x000000ff 5292*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_SHFT 0x0 5293*5113495bSYour Name 5294*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_0 //// 5295*5113495bSYour Name 5296*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x) (x+0x00001018) 5297*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_PHYS(x) (x+0x00001018) 5298*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_RMSK 0xffffffff 5299*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_SHFT 0 5300*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_IN(x) \ 5301*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_0_RMSK) 5302*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_INM(x, mask) \ 5303*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask) 5304*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUT(x, val) \ 5305*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), val) 5306*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUTM(x, mask, val) \ 5307*5113495bSYour Name do {\ 5308*5113495bSYour Name HWIO_INTLOCK(); \ 5309*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_0_IN(x)); \ 5310*5113495bSYour Name HWIO_INTFREE();\ 5311*5113495bSYour Name } while (0) 5312*5113495bSYour Name 5313*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_BMSK 0xffffffff 5314*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_SHFT 0x0 5315*5113495bSYour Name 5316*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_1 //// 5317*5113495bSYour Name 5318*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x) (x+0x0000101c) 5319*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_PHYS(x) (x+0x0000101c) 5320*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_RMSK 0xffffffff 5321*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_SHFT 0 5322*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_IN(x) \ 5323*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_1_RMSK) 5324*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_INM(x, mask) \ 5325*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask) 5326*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUT(x, val) \ 5327*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), val) 5328*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUTM(x, mask, val) \ 5329*5113495bSYour Name do {\ 5330*5113495bSYour Name HWIO_INTLOCK(); \ 5331*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_1_IN(x)); \ 5332*5113495bSYour Name HWIO_INTFREE();\ 5333*5113495bSYour Name } while (0) 5334*5113495bSYour Name 5335*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_BMSK 0xffffffff 5336*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_SHFT 0x0 5337*5113495bSYour Name 5338*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_2 //// 5339*5113495bSYour Name 5340*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x) (x+0x00001020) 5341*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_PHYS(x) (x+0x00001020) 5342*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_RMSK 0xffffffff 5343*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_SHFT 0 5344*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_IN(x) \ 5345*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_2_RMSK) 5346*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_INM(x, mask) \ 5347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask) 5348*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUT(x, val) \ 5349*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), val) 5350*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUTM(x, mask, val) \ 5351*5113495bSYour Name do {\ 5352*5113495bSYour Name HWIO_INTLOCK(); \ 5353*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_2_IN(x)); \ 5354*5113495bSYour Name HWIO_INTFREE();\ 5355*5113495bSYour Name } while (0) 5356*5113495bSYour Name 5357*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_BMSK 0xffffffff 5358*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_SHFT 0x0 5359*5113495bSYour Name 5360*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_3 //// 5361*5113495bSYour Name 5362*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x) (x+0x00001024) 5363*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_PHYS(x) (x+0x00001024) 5364*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_RMSK 0xffffffff 5365*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_SHFT 0 5366*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_IN(x) \ 5367*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_3_RMSK) 5368*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_INM(x, mask) \ 5369*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask) 5370*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUT(x, val) \ 5371*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), val) 5372*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUTM(x, mask, val) \ 5373*5113495bSYour Name do {\ 5374*5113495bSYour Name HWIO_INTLOCK(); \ 5375*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_3_IN(x)); \ 5376*5113495bSYour Name HWIO_INTFREE();\ 5377*5113495bSYour Name } while (0) 5378*5113495bSYour Name 5379*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_BMSK 0xffffffff 5380*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_SHFT 0x0 5381*5113495bSYour Name 5382*5113495bSYour Name //// Register TCL_R1_REG_ACCESS_EVENT_GEN_CTRL //// 5383*5113495bSYour Name 5384*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x) (x+0x00001028) 5385*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_PHYS(x) (x+0x00001028) 5386*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff 5387*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_SHFT 0 5388*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x) \ 5389*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK) 5390*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(x, mask) \ 5391*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask) 5392*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(x, val) \ 5393*5113495bSYour Name out_dword( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), val) 5394*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(x, mask, val) \ 5395*5113495bSYour Name do {\ 5396*5113495bSYour Name HWIO_INTLOCK(); \ 5397*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x)); \ 5398*5113495bSYour Name HWIO_INTFREE();\ 5399*5113495bSYour Name } while (0) 5400*5113495bSYour Name 5401*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000 5402*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11 5403*5113495bSYour Name 5404*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x0001fffc 5405*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2 5406*5113495bSYour Name 5407*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x00000002 5408*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1 5409*5113495bSYour Name 5410*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x00000001 5411*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0 5412*5113495bSYour Name 5413*5113495bSYour Name //// Register TCL_R1_END_OF_TEST_CHECK //// 5414*5113495bSYour Name 5415*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x0000102c) 5416*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x0000102c) 5417*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK 0x00000001 5418*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_SHFT 0 5419*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x) \ 5420*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK) 5421*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_INM(x, mask) \ 5422*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask) 5423*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUT(x, val) \ 5424*5113495bSYour Name out_dword( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), val) 5425*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5426*5113495bSYour Name do {\ 5427*5113495bSYour Name HWIO_INTLOCK(); \ 5428*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x)); \ 5429*5113495bSYour Name HWIO_INTFREE();\ 5430*5113495bSYour Name } while (0) 5431*5113495bSYour Name 5432*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5433*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5434*5113495bSYour Name 5435*5113495bSYour Name //// Register TCL_R1_ASE_END_OF_TEST_CHECK //// 5436*5113495bSYour Name 5437*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x) (x+0x00001030) 5438*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_PHYS(x) (x+0x00001030) 5439*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK 0x00000001 5440*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_SHFT 0 5441*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x) \ 5442*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK) 5443*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_INM(x, mask) \ 5444*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask) 5445*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUT(x, val) \ 5446*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), val) 5447*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5448*5113495bSYour Name do {\ 5449*5113495bSYour Name HWIO_INTLOCK(); \ 5450*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x)); \ 5451*5113495bSYour Name HWIO_INTFREE();\ 5452*5113495bSYour Name } while (0) 5453*5113495bSYour Name 5454*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5455*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5456*5113495bSYour Name 5457*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CLEAR_COUNTERS //// 5458*5113495bSYour Name 5459*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x) (x+0x00001034) 5460*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_PHYS(x) (x+0x00001034) 5461*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK 0x00000001 5462*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_SHFT 0 5463*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x) \ 5464*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK) 5465*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_INM(x, mask) \ 5466*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask) 5467*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUT(x, val) \ 5468*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), val) 5469*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUTM(x, mask, val) \ 5470*5113495bSYour Name do {\ 5471*5113495bSYour Name HWIO_INTLOCK(); \ 5472*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x)); \ 5473*5113495bSYour Name HWIO_INTFREE();\ 5474*5113495bSYour Name } while (0) 5475*5113495bSYour Name 5476*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_BMSK 0x00000001 5477*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_SHFT 0x0 5478*5113495bSYour Name 5479*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER //// 5480*5113495bSYour Name 5481*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x) (x+0x00001038) 5482*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_PHYS(x) (x+0x00001038) 5483*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK 0xffffffff 5484*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_SHFT 0 5485*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x) \ 5486*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK) 5487*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_INM(x, mask) \ 5488*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask) 5489*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUT(x, val) \ 5490*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), val) 5491*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUTM(x, mask, val) \ 5492*5113495bSYour Name do {\ 5493*5113495bSYour Name HWIO_INTLOCK(); \ 5494*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x)); \ 5495*5113495bSYour Name HWIO_INTFREE();\ 5496*5113495bSYour Name } while (0) 5497*5113495bSYour Name 5498*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_BMSK 0xffffffff 5499*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_SHFT 0x0 5500*5113495bSYour Name 5501*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER //// 5502*5113495bSYour Name 5503*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x) (x+0x0000103c) 5504*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_PHYS(x) (x+0x0000103c) 5505*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK 0xffffffff 5506*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_SHFT 0 5507*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x) \ 5508*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK) 5509*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_INM(x, mask) \ 5510*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask) 5511*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUT(x, val) \ 5512*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), val) 5513*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUTM(x, mask, val) \ 5514*5113495bSYour Name do {\ 5515*5113495bSYour Name HWIO_INTLOCK(); \ 5516*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x)); \ 5517*5113495bSYour Name HWIO_INTFREE();\ 5518*5113495bSYour Name } while (0) 5519*5113495bSYour Name 5520*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_BMSK 0xffffffff 5521*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_SHFT 0x0 5522*5113495bSYour Name 5523*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER //// 5524*5113495bSYour Name 5525*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x) (x+0x00001040) 5526*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PHYS(x) (x+0x00001040) 5527*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK 0x000fffff 5528*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_SHFT 0 5529*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x) \ 5530*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK) 5531*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_INM(x, mask) \ 5532*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask) 5533*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUT(x, val) \ 5534*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), val) 5535*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUTM(x, mask, val) \ 5536*5113495bSYour Name do {\ 5537*5113495bSYour Name HWIO_INTLOCK(); \ 5538*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x)); \ 5539*5113495bSYour Name HWIO_INTFREE();\ 5540*5113495bSYour Name } while (0) 5541*5113495bSYour Name 5542*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_BMSK 0x000ffc00 5543*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_SHFT 0xa 5544*5113495bSYour Name 5545*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_BMSK 0x000003ff 5546*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_SHFT 0x0 5547*5113495bSYour Name 5548*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER //// 5549*5113495bSYour Name 5550*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x) (x+0x00001044) 5551*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PHYS(x) (x+0x00001044) 5552*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK 0x03ffffff 5553*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SHFT 0 5554*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x) \ 5555*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK) 5556*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_INM(x, mask) \ 5557*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask) 5558*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUT(x, val) \ 5559*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), val) 5560*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUTM(x, mask, val) \ 5561*5113495bSYour Name do {\ 5562*5113495bSYour Name HWIO_INTLOCK(); \ 5563*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x)); \ 5564*5113495bSYour Name HWIO_INTFREE();\ 5565*5113495bSYour Name } while (0) 5566*5113495bSYour Name 5567*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_BMSK 0x03fffc00 5568*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_SHFT 0xa 5569*5113495bSYour Name 5570*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_BMSK 0x000003e0 5571*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_SHFT 0x5 5572*5113495bSYour Name 5573*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_BMSK 0x0000001f 5574*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_SHFT 0x0 5575*5113495bSYour Name 5576*5113495bSYour Name //// Register TCL_R1_ASE_SM_STATES //// 5577*5113495bSYour Name 5578*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_ADDR(x) (x+0x00001048) 5579*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PHYS(x) (x+0x00001048) 5580*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_RMSK 0x00001fff 5581*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_SHFT 0 5582*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_IN(x) \ 5583*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), HWIO_TCL_R1_ASE_SM_STATES_RMSK) 5584*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_INM(x, mask) \ 5585*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask) 5586*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUT(x, val) \ 5587*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), val) 5588*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUTM(x, mask, val) \ 5589*5113495bSYour Name do {\ 5590*5113495bSYour Name HWIO_INTLOCK(); \ 5591*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask, val, HWIO_TCL_R1_ASE_SM_STATES_IN(x)); \ 5592*5113495bSYour Name HWIO_INTFREE();\ 5593*5113495bSYour Name } while (0) 5594*5113495bSYour Name 5595*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_BMSK 0x00001800 5596*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_SHFT 0xb 5597*5113495bSYour Name 5598*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_BMSK 0x00000600 5599*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_SHFT 0x9 5600*5113495bSYour Name 5601*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_BMSK 0x00000180 5602*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_SHFT 0x7 5603*5113495bSYour Name 5604*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_BMSK 0x00000070 5605*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_SHFT 0x4 5606*5113495bSYour Name 5607*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_BMSK 0x0000000f 5608*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_SHFT 0x0 5609*5113495bSYour Name 5610*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG //// 5611*5113495bSYour Name 5612*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x) (x+0x0000104c) 5613*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_PHYS(x) (x+0x0000104c) 5614*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK 0x000003ff 5615*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_SHFT 0 5616*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x) \ 5617*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK) 5618*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_INM(x, mask) \ 5619*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask) 5620*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUT(x, val) \ 5621*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), val) 5622*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUTM(x, mask, val) \ 5623*5113495bSYour Name do {\ 5624*5113495bSYour Name HWIO_INTLOCK(); \ 5625*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x)); \ 5626*5113495bSYour Name HWIO_INTFREE();\ 5627*5113495bSYour Name } while (0) 5628*5113495bSYour Name 5629*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_BMSK 0x000003ff 5630*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_SHFT 0x0 5631*5113495bSYour Name 5632*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS //// 5633*5113495bSYour Name 5634*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x) (x+0x00001050) 5635*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_PHYS(x) (x+0x00001050) 5636*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK 0x007fffff 5637*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_SHFT 0 5638*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x) \ 5639*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK) 5640*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_INM(x, mask) \ 5641*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask) 5642*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUT(x, val) \ 5643*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), val) 5644*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUTM(x, mask, val) \ 5645*5113495bSYour Name do {\ 5646*5113495bSYour Name HWIO_INTLOCK(); \ 5647*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x)); \ 5648*5113495bSYour Name HWIO_INTFREE();\ 5649*5113495bSYour Name } while (0) 5650*5113495bSYour Name 5651*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_BMSK 0x007ffff8 5652*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_SHFT 0x3 5653*5113495bSYour Name 5654*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_BMSK 0x00000004 5655*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_SHFT 0x2 5656*5113495bSYour Name 5657*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_BMSK 0x00000002 5658*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_SHFT 0x1 5659*5113495bSYour Name 5660*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_BMSK 0x00000001 5661*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_SHFT 0x0 5662*5113495bSYour Name 5663*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_n //// 5664*5113495bSYour Name 5665*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n) (base+0x1054+0x4*n) 5666*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_PHYS(base, n) (base+0x1054+0x4*n) 5667*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK 0xffffffff 5668*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_SHFT 0 5669*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_MAXn 31 5670*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n) \ 5671*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK) 5672*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INMI(base, n, mask) \ 5673*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask) 5674*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTI(base, n, val) \ 5675*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), val) 5676*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTMI(base, n, mask, val) \ 5677*5113495bSYour Name do {\ 5678*5113495bSYour Name HWIO_INTLOCK(); \ 5679*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n)); \ 5680*5113495bSYour Name HWIO_INTFREE();\ 5681*5113495bSYour Name } while (0) 5682*5113495bSYour Name 5683*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_BMSK 0xffffffff 5684*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_SHFT 0x0 5685*5113495bSYour Name 5686*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_HP //// 5687*5113495bSYour Name 5688*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x) (x+0x00002000) 5689*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_PHYS(x) (x+0x00002000) 5690*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK 0x000fffff 5691*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_SHFT 0 5692*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x) \ 5693*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK) 5694*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_INM(x, mask) \ 5695*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask) 5696*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUT(x, val) \ 5697*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), val) 5698*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUTM(x, mask, val) \ 5699*5113495bSYour Name do {\ 5700*5113495bSYour Name HWIO_INTLOCK(); \ 5701*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x)); \ 5702*5113495bSYour Name HWIO_INTFREE();\ 5703*5113495bSYour Name } while (0) 5704*5113495bSYour Name 5705*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_BMSK 0x000fffff 5706*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 5707*5113495bSYour Name 5708*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_TP //// 5709*5113495bSYour Name 5710*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x) (x+0x00002004) 5711*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_PHYS(x) (x+0x00002004) 5712*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK 0x000fffff 5713*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_SHFT 0 5714*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x) \ 5715*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK) 5716*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_INM(x, mask) \ 5717*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask) 5718*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUT(x, val) \ 5719*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), val) 5720*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUTM(x, mask, val) \ 5721*5113495bSYour Name do {\ 5722*5113495bSYour Name HWIO_INTLOCK(); \ 5723*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x)); \ 5724*5113495bSYour Name HWIO_INTFREE();\ 5725*5113495bSYour Name } while (0) 5726*5113495bSYour Name 5727*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_BMSK 0x000fffff 5728*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 5729*5113495bSYour Name 5730*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_HP //// 5731*5113495bSYour Name 5732*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x) (x+0x00002008) 5733*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_PHYS(x) (x+0x00002008) 5734*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK 0x000fffff 5735*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_SHFT 0 5736*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x) \ 5737*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK) 5738*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_INM(x, mask) \ 5739*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask) 5740*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUT(x, val) \ 5741*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), val) 5742*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUTM(x, mask, val) \ 5743*5113495bSYour Name do {\ 5744*5113495bSYour Name HWIO_INTLOCK(); \ 5745*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x)); \ 5746*5113495bSYour Name HWIO_INTFREE();\ 5747*5113495bSYour Name } while (0) 5748*5113495bSYour Name 5749*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_BMSK 0x000fffff 5750*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_SHFT 0x0 5751*5113495bSYour Name 5752*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_TP //// 5753*5113495bSYour Name 5754*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x) (x+0x0000200c) 5755*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_PHYS(x) (x+0x0000200c) 5756*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK 0x000fffff 5757*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_SHFT 0 5758*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x) \ 5759*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK) 5760*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_INM(x, mask) \ 5761*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask) 5762*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUT(x, val) \ 5763*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), val) 5764*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUTM(x, mask, val) \ 5765*5113495bSYour Name do {\ 5766*5113495bSYour Name HWIO_INTLOCK(); \ 5767*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x)); \ 5768*5113495bSYour Name HWIO_INTFREE();\ 5769*5113495bSYour Name } while (0) 5770*5113495bSYour Name 5771*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_BMSK 0x000fffff 5772*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_SHFT 0x0 5773*5113495bSYour Name 5774*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_HP //// 5775*5113495bSYour Name 5776*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x) (x+0x00002010) 5777*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_PHYS(x) (x+0x00002010) 5778*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK 0x000fffff 5779*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_SHFT 0 5780*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x) \ 5781*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK) 5782*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_INM(x, mask) \ 5783*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask) 5784*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUT(x, val) \ 5785*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), val) 5786*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUTM(x, mask, val) \ 5787*5113495bSYour Name do {\ 5788*5113495bSYour Name HWIO_INTLOCK(); \ 5789*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x)); \ 5790*5113495bSYour Name HWIO_INTFREE();\ 5791*5113495bSYour Name } while (0) 5792*5113495bSYour Name 5793*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_BMSK 0x000fffff 5794*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_SHFT 0x0 5795*5113495bSYour Name 5796*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_TP //// 5797*5113495bSYour Name 5798*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x) (x+0x00002014) 5799*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_PHYS(x) (x+0x00002014) 5800*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK 0x000fffff 5801*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_SHFT 0 5802*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x) \ 5803*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK) 5804*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_INM(x, mask) \ 5805*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask) 5806*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUT(x, val) \ 5807*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), val) 5808*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUTM(x, mask, val) \ 5809*5113495bSYour Name do {\ 5810*5113495bSYour Name HWIO_INTLOCK(); \ 5811*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x)); \ 5812*5113495bSYour Name HWIO_INTFREE();\ 5813*5113495bSYour Name } while (0) 5814*5113495bSYour Name 5815*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_BMSK 0x000fffff 5816*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_SHFT 0x0 5817*5113495bSYour Name 5818*5113495bSYour Name //// Register TCL_R2_SW2TCL_CMD_RING_HP //// 5819*5113495bSYour Name 5820*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_ADDR(x) (x+0x00002018) 5821*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_PHYS(x) (x+0x00002018) 5822*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_RMSK 0x000fffff 5823*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_SHFT 0 5824*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_IN(x) \ 5825*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CMD_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL_CMD_RING_HP_RMSK) 5826*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_INM(x, mask) \ 5827*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CMD_RING_HP_ADDR(x), mask) 5828*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_OUT(x, val) \ 5829*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CMD_RING_HP_ADDR(x), val) 5830*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_OUTM(x, mask, val) \ 5831*5113495bSYour Name do {\ 5832*5113495bSYour Name HWIO_INTLOCK(); \ 5833*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CMD_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CMD_RING_HP_IN(x)); \ 5834*5113495bSYour Name HWIO_INTFREE();\ 5835*5113495bSYour Name } while (0) 5836*5113495bSYour Name 5837*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_HEAD_PTR_BMSK 0x000fffff 5838*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_HP_HEAD_PTR_SHFT 0x0 5839*5113495bSYour Name 5840*5113495bSYour Name //// Register TCL_R2_SW2TCL_CMD_RING_TP //// 5841*5113495bSYour Name 5842*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_ADDR(x) (x+0x0000201c) 5843*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_PHYS(x) (x+0x0000201c) 5844*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_RMSK 0x000fffff 5845*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_SHFT 0 5846*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_IN(x) \ 5847*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CMD_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL_CMD_RING_TP_RMSK) 5848*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_INM(x, mask) \ 5849*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CMD_RING_TP_ADDR(x), mask) 5850*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_OUT(x, val) \ 5851*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CMD_RING_TP_ADDR(x), val) 5852*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_OUTM(x, mask, val) \ 5853*5113495bSYour Name do {\ 5854*5113495bSYour Name HWIO_INTLOCK(); \ 5855*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CMD_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CMD_RING_TP_IN(x)); \ 5856*5113495bSYour Name HWIO_INTFREE();\ 5857*5113495bSYour Name } while (0) 5858*5113495bSYour Name 5859*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_TAIL_PTR_BMSK 0x000fffff 5860*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CMD_RING_TP_TAIL_PTR_SHFT 0x0 5861*5113495bSYour Name 5862*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_HP //// 5863*5113495bSYour Name 5864*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x) (x+0x00002020) 5865*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_PHYS(x) (x+0x00002020) 5866*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK 0x0000ffff 5867*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_SHFT 0 5868*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x) \ 5869*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK) 5870*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_INM(x, mask) \ 5871*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask) 5872*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUT(x, val) \ 5873*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), val) 5874*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUTM(x, mask, val) \ 5875*5113495bSYour Name do {\ 5876*5113495bSYour Name HWIO_INTLOCK(); \ 5877*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x)); \ 5878*5113495bSYour Name HWIO_INTFREE();\ 5879*5113495bSYour Name } while (0) 5880*5113495bSYour Name 5881*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 5882*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 5883*5113495bSYour Name 5884*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_TP //// 5885*5113495bSYour Name 5886*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x) (x+0x00002024) 5887*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_PHYS(x) (x+0x00002024) 5888*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK 0x0000ffff 5889*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_SHFT 0 5890*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x) \ 5891*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK) 5892*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_INM(x, mask) \ 5893*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask) 5894*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUT(x, val) \ 5895*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), val) 5896*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUTM(x, mask, val) \ 5897*5113495bSYour Name do {\ 5898*5113495bSYour Name HWIO_INTLOCK(); \ 5899*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x)); \ 5900*5113495bSYour Name HWIO_INTFREE();\ 5901*5113495bSYour Name } while (0) 5902*5113495bSYour Name 5903*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 5904*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 5905*5113495bSYour Name 5906*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_HP //// 5907*5113495bSYour Name 5908*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x) (x+0x00002028) 5909*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_PHYS(x) (x+0x00002028) 5910*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK 0x0000ffff 5911*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_SHFT 0 5912*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x) \ 5913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK) 5914*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_INM(x, mask) \ 5915*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask) 5916*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUT(x, val) \ 5917*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), val) 5918*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUTM(x, mask, val) \ 5919*5113495bSYour Name do {\ 5920*5113495bSYour Name HWIO_INTLOCK(); \ 5921*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x)); \ 5922*5113495bSYour Name HWIO_INTFREE();\ 5923*5113495bSYour Name } while (0) 5924*5113495bSYour Name 5925*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_BMSK 0x0000ffff 5926*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_SHFT 0x0 5927*5113495bSYour Name 5928*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_TP //// 5929*5113495bSYour Name 5930*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x) (x+0x0000202c) 5931*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_PHYS(x) (x+0x0000202c) 5932*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK 0x0000ffff 5933*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_SHFT 0 5934*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x) \ 5935*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK) 5936*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_INM(x, mask) \ 5937*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask) 5938*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUT(x, val) \ 5939*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), val) 5940*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUTM(x, mask, val) \ 5941*5113495bSYour Name do {\ 5942*5113495bSYour Name HWIO_INTLOCK(); \ 5943*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x)); \ 5944*5113495bSYour Name HWIO_INTFREE();\ 5945*5113495bSYour Name } while (0) 5946*5113495bSYour Name 5947*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_BMSK 0x0000ffff 5948*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_SHFT 0x0 5949*5113495bSYour Name 5950*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_HP //// 5951*5113495bSYour Name 5952*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x) (x+0x00002030) 5953*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_PHYS(x) (x+0x00002030) 5954*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK 0x0000ffff 5955*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_SHFT 0 5956*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x) \ 5957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK) 5958*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_INM(x, mask) \ 5959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask) 5960*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUT(x, val) \ 5961*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), val) 5962*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUTM(x, mask, val) \ 5963*5113495bSYour Name do {\ 5964*5113495bSYour Name HWIO_INTLOCK(); \ 5965*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x)); \ 5966*5113495bSYour Name HWIO_INTFREE();\ 5967*5113495bSYour Name } while (0) 5968*5113495bSYour Name 5969*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 5970*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_SHFT 0x0 5971*5113495bSYour Name 5972*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_TP //// 5973*5113495bSYour Name 5974*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x) (x+0x00002034) 5975*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_PHYS(x) (x+0x00002034) 5976*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK 0x0000ffff 5977*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_SHFT 0 5978*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x) \ 5979*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK) 5980*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_INM(x, mask) \ 5981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask) 5982*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUT(x, val) \ 5983*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), val) 5984*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUTM(x, mask, val) \ 5985*5113495bSYour Name do {\ 5986*5113495bSYour Name HWIO_INTLOCK(); \ 5987*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x)); \ 5988*5113495bSYour Name HWIO_INTFREE();\ 5989*5113495bSYour Name } while (0) 5990*5113495bSYour Name 5991*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 5992*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_SHFT 0x0 5993*5113495bSYour Name 5994*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_HP //// 5995*5113495bSYour Name 5996*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x) (x+0x00002038) 5997*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_PHYS(x) (x+0x00002038) 5998*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK 0x0000ffff 5999*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_SHFT 0 6000*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x) \ 6001*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK) 6002*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_INM(x, mask) \ 6003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask) 6004*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUT(x, val) \ 6005*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), val) 6006*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUTM(x, mask, val) \ 6007*5113495bSYour Name do {\ 6008*5113495bSYour Name HWIO_INTLOCK(); \ 6009*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x)); \ 6010*5113495bSYour Name HWIO_INTFREE();\ 6011*5113495bSYour Name } while (0) 6012*5113495bSYour Name 6013*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6014*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_SHFT 0x0 6015*5113495bSYour Name 6016*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_TP //// 6017*5113495bSYour Name 6018*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x) (x+0x0000203c) 6019*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_PHYS(x) (x+0x0000203c) 6020*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK 0x0000ffff 6021*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_SHFT 0 6022*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x) \ 6023*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK) 6024*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_INM(x, mask) \ 6025*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask) 6026*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUT(x, val) \ 6027*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), val) 6028*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUTM(x, mask, val) \ 6029*5113495bSYour Name do {\ 6030*5113495bSYour Name HWIO_INTLOCK(); \ 6031*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x)); \ 6032*5113495bSYour Name HWIO_INTFREE();\ 6033*5113495bSYour Name } while (0) 6034*5113495bSYour Name 6035*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6036*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_SHFT 0x0 6037*5113495bSYour Name 6038*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_HP //// 6039*5113495bSYour Name 6040*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x) (x+0x00002040) 6041*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_PHYS(x) (x+0x00002040) 6042*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_RMSK 0x0000ffff 6043*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_SHFT 0 6044*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_IN(x) \ 6045*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_HP_RMSK) 6046*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_INM(x, mask) \ 6047*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask) 6048*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUT(x, val) \ 6049*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), val) 6050*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUTM(x, mask, val) \ 6051*5113495bSYour Name do {\ 6052*5113495bSYour Name HWIO_INTLOCK(); \ 6053*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_HP_IN(x)); \ 6054*5113495bSYour Name HWIO_INTFREE();\ 6055*5113495bSYour Name } while (0) 6056*5113495bSYour Name 6057*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6058*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_SHFT 0x0 6059*5113495bSYour Name 6060*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_TP //// 6061*5113495bSYour Name 6062*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x) (x+0x00002044) 6063*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_PHYS(x) (x+0x00002044) 6064*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_RMSK 0x0000ffff 6065*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_SHFT 0 6066*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_IN(x) \ 6067*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_TP_RMSK) 6068*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_INM(x, mask) \ 6069*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask) 6070*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUT(x, val) \ 6071*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), val) 6072*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUTM(x, mask, val) \ 6073*5113495bSYour Name do {\ 6074*5113495bSYour Name HWIO_INTLOCK(); \ 6075*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_TP_IN(x)); \ 6076*5113495bSYour Name HWIO_INTFREE();\ 6077*5113495bSYour Name } while (0) 6078*5113495bSYour Name 6079*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6080*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_SHFT 0x0 6081*5113495bSYour Name 6082*5113495bSYour Name 6083*5113495bSYour Name #endif 6084*5113495bSYour Name 6085