1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _REO_DESTINATION_RING_H_ 20 #define _REO_DESTINATION_RING_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "buffer_addr_info.h" 25 #include "rx_mpdu_desc_info.h" 26 #include "rx_msdu_desc_info.h" 27 28 // ################ START SUMMARY ################# 29 // 30 // Dword Fields 31 // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info; 32 // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 33 // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details; 34 // 6 rx_reo_queue_desc_addr_31_0[31:0] 35 // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16] 36 // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], mpdu_fragment_number[16:13], reserved_8a[31:17] 37 // 9 reserved_9a[31:0] 38 // 10 reserved_10a[31:0] 39 // 11 reserved_11a[31:0] 40 // 12 reserved_12a[31:0] 41 // 13 reserved_13a[31:0] 42 // 14 reserved_14a[31:0] 43 // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28] 44 // 45 // ################ END SUMMARY ################# 46 47 #define NUM_OF_DWORDS_REO_DESTINATION_RING 16 48 49 struct reo_destination_ring { 50 struct buffer_addr_info buf_or_link_desc_addr_info; 51 struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 52 struct rx_msdu_desc_info rx_msdu_desc_info_details; 53 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 54 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 55 reo_dest_buffer_type : 1, //[8] 56 reo_push_reason : 2, //[10:9] 57 reo_error_code : 5, //[15:11] 58 receive_queue_number : 16; //[31:16] 59 uint32_t soft_reorder_info_valid : 1, //[0] 60 reorder_opcode : 4, //[4:1] 61 reorder_slot_index : 8, //[12:5] 62 mpdu_fragment_number : 4, //[16:13] 63 reserved_8a : 15; //[31:17] 64 uint32_t reserved_9a : 32; //[31:0] 65 uint32_t reserved_10a : 32; //[31:0] 66 uint32_t reserved_11a : 32; //[31:0] 67 uint32_t reserved_12a : 32; //[31:0] 68 uint32_t reserved_13a : 32; //[31:0] 69 uint32_t reserved_14a : 32; //[31:0] 70 uint32_t reserved_15 : 20, //[19:0] 71 ring_id : 8, //[27:20] 72 looping_count : 4; //[31:28] 73 }; 74 75 /* 76 77 struct buffer_addr_info buf_or_link_desc_addr_info 78 79 Consumer: REO/SW/FW 80 81 Producer: RXDMA 82 83 84 85 Details of the physical address of the a buffer or MSDU 86 link descriptor 87 88 struct rx_mpdu_desc_info rx_mpdu_desc_info_details 89 90 Consumer: REO/SW/FW 91 92 Producer: RXDMA 93 94 95 96 General information related to the MPDU that is passed 97 on from REO entrance ring to the REO destination ring 98 99 struct rx_msdu_desc_info rx_msdu_desc_info_details 100 101 General information related to the MSDU that is passed 102 on from RXDMA all the way to to the REO destination ring. 103 104 rx_reo_queue_desc_addr_31_0 105 106 Consumer: REO 107 108 Producer: RXDMA 109 110 111 112 Address (lower 32 bits) of the REO queue descriptor. 113 114 <legal all> 115 116 rx_reo_queue_desc_addr_39_32 117 118 Consumer: REO 119 120 Producer: RXDMA 121 122 123 124 Address (upper 8 bits) of the REO queue descriptor. 125 126 <legal all> 127 128 reo_dest_buffer_type 129 130 Indicates the type of address provided in the 131 'Buf_or_link_desc_addr_info' 132 133 134 135 <enum 0 MSDU_buf_address> The address of an MSDU buffer 136 137 <enum 1 MSDU_link_desc_address> The address of the MSDU 138 link descriptor. 139 140 141 142 <legal all> 143 144 reo_push_reason 145 146 Indicates why REO pushed the frame to this exit ring 147 148 149 150 <enum 0 reo_error_detected> Reo detected an error an 151 pushed this frame to this queue 152 153 <enum 1 reo_routing_instruction> Reo pushed the frame to 154 this queue per received routing instructions. No error 155 within REO was detected 156 157 158 159 160 161 <legal 0 - 1> 162 163 reo_error_code 164 165 Field only valid when 'Reo_push_reason' set to 166 'reo_error_detected'. 167 168 169 170 <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor 171 provided in the REO_ENTRANCE ring is set to 0 172 173 <enum 1 reo_queue_desc_not_valid> Reo queue descriptor 174 valid bit is NOT set 175 176 <enum 2 ampdu_in_non_ba> AMPDU frame received without BA 177 session having been setup. 178 179 <enum 3 non_ba_duplicate> Non-BA session, SN equal to 180 SSN, Retry bit set: duplicate frame 181 182 <enum 4 ba_duplicate> BA session, duplicate frame 183 184 <enum 5 regular_frame_2k_jump> A normal (management/data 185 frame) received with 2K jump in SN 186 187 <enum 6 bar_frame_2k_jump> A bar received with 2K jump 188 in SSN 189 190 <enum 7 regular_frame_OOR> A normal (management/data 191 frame) received with SN falling within the OOR window 192 193 <enum 8 bar_frame_OOR> A bar received with SSN falling 194 within the OOR window 195 196 <enum 9 bar_frame_no_ba_session> A bar received without 197 a BA session 198 199 <enum 10 bar_frame_sn_equals_ssn> A bar received with 200 SSN equal to SN 201 202 <enum 11 pn_check_failed> PN Check Failed packet. 203 204 <enum 12 2k_error_handling_flag_set> Frame is forwarded 205 as a result of the 'Seq_2k_error_detected_flag' been set in 206 the REO Queue descriptor 207 208 <enum 13 pn_error_handling_flag_set> Frame is forwarded 209 as a result of the 'pn_error_detected_flag' been set in the 210 REO Queue descriptor 211 212 <enum 14 queue_descriptor_blocked_set> Frame is 213 forwarded as a result of the queue descriptor(address) being 214 blocked as SW/FW seems to be currently in the process of 215 making updates to this descriptor... 216 217 218 219 <legal 0-14> 220 221 receive_queue_number 222 223 This field indicates the REO MPDU reorder queue ID from 224 which this frame originated. This field is populated from a 225 field with the same name in the RX_REO_QUEUE descriptor. 226 227 <legal all> 228 229 soft_reorder_info_valid 230 231 When set, REO has been instructed to not perform the 232 actual re-ordering of frames for this queue, but just to 233 insert the reorder opcodes 234 235 <legal all> 236 237 reorder_opcode 238 239 Field is valid when 'Soft_reorder_info_valid' is set. 240 This field is always valid for debug purpose as well. 241 242 Details are in the MLD. 243 244 245 246 <enum 0 invalid> 247 248 <enum 1 fwdcur_fwdbuf> 249 250 <enum 2 fwdbuf_fwdcur> 251 252 <enum 3 qcur> 253 254 <enum 4 fwdbuf_qcur> 255 256 <enum 5 fwdbuf_drop> 257 258 <enum 6 fwdall_drop> 259 260 <enum 7 fwdall_qcur> 261 262 <enum 8 reserved_reo_opcode_1> 263 264 <enum 9 dropcur> the error reason code is in 265 reo_error_code field. 266 267 <enum 10 reserved_reo_opcode_2> 268 269 <enum 11 reserved_reo_opcode_3> 270 271 <enum 12 reserved_reo_opcode_4> 272 273 <enum 13 reserved_reo_opcode_5> 274 275 <enum 14 reserved_reo_opcode_6> 276 277 <enum 15 reserved_reo_opcode_7> 278 279 280 281 <legal all> 282 283 reorder_slot_index 284 285 Field only valid when 'Soft_reorder_info_valid' is set. 286 287 288 289 TODO: add description 290 291 292 293 <legal all> 294 295 mpdu_fragment_number 296 297 Field only valid when Rx_mpdu_desc_info_details. 298 Fragment_flag is set. 299 300 301 302 The fragment number from the 802.11 header. 303 304 305 306 Note that the sequence number is embedded in the field: 307 Rx_mpdu_desc_info_details. Mpdu_sequence_number 308 309 310 311 <legal all> 312 313 reserved_8a 314 315 <legal 0> 316 317 reserved_9a 318 319 <legal 0> 320 321 reserved_10a 322 323 <legal 0> 324 325 reserved_11a 326 327 <legal 0> 328 329 reserved_12a 330 331 <legal 0> 332 333 reserved_13a 334 335 <legal 0> 336 337 reserved_14a 338 339 <legal 0> 340 341 reserved_15 342 343 <legal 0> 344 345 ring_id 346 347 The buffer pointer ring ID. 348 349 0 refers to the IDLE ring 350 351 1 - N refers to other rings 352 353 354 355 Helps with debugging when dumping ring contents. 356 357 <legal all> 358 359 looping_count 360 361 A count value that indicates the number of times the 362 producer of entries into this Ring has looped around the 363 ring. 364 365 At initialization time, this value is set to 0. On the 366 first loop, this value is set to 1. After the max value is 367 reached allowed by the number of bits for this field, the 368 count value continues with 0 again. 369 370 In case SW is the consumer of the ring entries, it can 371 use this field to figure out up to where the producer of 372 entries has created new entries. This eliminates the need to 373 check where the head pointer' of the ring is located once 374 the SW starts processing an interrupt indicating that new 375 entries have been put into this ring... 376 377 378 379 Also note that SW if it wants only needs to look at the 380 LSB bit of this count value. 381 382 <legal all> 383 */ 384 385 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000000 386 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28 387 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff 388 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000004 389 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28 390 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff 391 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x00000008 392 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28 393 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff 394 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x0000000c 395 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28 396 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff 397 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000010 398 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28 399 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff 400 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000014 401 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28 402 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff 403 404 /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0 405 406 Consumer: REO 407 408 Producer: RXDMA 409 410 411 412 Address (lower 32 bits) of the REO queue descriptor. 413 414 <legal all> 415 */ 416 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018 417 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 418 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 419 420 /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32 421 422 Consumer: REO 423 424 Producer: RXDMA 425 426 427 428 Address (upper 8 bits) of the REO queue descriptor. 429 430 <legal all> 431 */ 432 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c 433 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 434 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 435 436 /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE 437 438 Indicates the type of address provided in the 439 'Buf_or_link_desc_addr_info' 440 441 442 443 <enum 0 MSDU_buf_address> The address of an MSDU buffer 444 445 <enum 1 MSDU_link_desc_address> The address of the MSDU 446 link descriptor. 447 448 449 450 <legal all> 451 */ 452 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c 453 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8 454 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100 455 456 /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON 457 458 Indicates why REO pushed the frame to this exit ring 459 460 461 462 <enum 0 reo_error_detected> Reo detected an error an 463 pushed this frame to this queue 464 465 <enum 1 reo_routing_instruction> Reo pushed the frame to 466 this queue per received routing instructions. No error 467 within REO was detected 468 469 470 471 472 473 <legal 0 - 1> 474 */ 475 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c 476 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9 477 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600 478 479 /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE 480 481 Field only valid when 'Reo_push_reason' set to 482 'reo_error_detected'. 483 484 485 486 <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor 487 provided in the REO_ENTRANCE ring is set to 0 488 489 <enum 1 reo_queue_desc_not_valid> Reo queue descriptor 490 valid bit is NOT set 491 492 <enum 2 ampdu_in_non_ba> AMPDU frame received without BA 493 session having been setup. 494 495 <enum 3 non_ba_duplicate> Non-BA session, SN equal to 496 SSN, Retry bit set: duplicate frame 497 498 <enum 4 ba_duplicate> BA session, duplicate frame 499 500 <enum 5 regular_frame_2k_jump> A normal (management/data 501 frame) received with 2K jump in SN 502 503 <enum 6 bar_frame_2k_jump> A bar received with 2K jump 504 in SSN 505 506 <enum 7 regular_frame_OOR> A normal (management/data 507 frame) received with SN falling within the OOR window 508 509 <enum 8 bar_frame_OOR> A bar received with SSN falling 510 within the OOR window 511 512 <enum 9 bar_frame_no_ba_session> A bar received without 513 a BA session 514 515 <enum 10 bar_frame_sn_equals_ssn> A bar received with 516 SSN equal to SN 517 518 <enum 11 pn_check_failed> PN Check Failed packet. 519 520 <enum 12 2k_error_handling_flag_set> Frame is forwarded 521 as a result of the 'Seq_2k_error_detected_flag' been set in 522 the REO Queue descriptor 523 524 <enum 13 pn_error_handling_flag_set> Frame is forwarded 525 as a result of the 'pn_error_detected_flag' been set in the 526 REO Queue descriptor 527 528 <enum 14 queue_descriptor_blocked_set> Frame is 529 forwarded as a result of the queue descriptor(address) being 530 blocked as SW/FW seems to be currently in the process of 531 making updates to this descriptor... 532 533 534 535 <legal 0-14> 536 */ 537 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c 538 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11 539 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800 540 541 /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER 542 543 This field indicates the REO MPDU reorder queue ID from 544 which this frame originated. This field is populated from a 545 field with the same name in the RX_REO_QUEUE descriptor. 546 547 <legal all> 548 */ 549 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c 550 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16 551 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000 552 553 /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID 554 555 When set, REO has been instructed to not perform the 556 actual re-ordering of frames for this queue, but just to 557 insert the reorder opcodes 558 559 <legal all> 560 */ 561 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020 562 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0 563 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001 564 565 /* Description REO_DESTINATION_RING_8_REORDER_OPCODE 566 567 Field is valid when 'Soft_reorder_info_valid' is set. 568 This field is always valid for debug purpose as well. 569 570 Details are in the MLD. 571 572 573 574 <enum 0 invalid> 575 576 <enum 1 fwdcur_fwdbuf> 577 578 <enum 2 fwdbuf_fwdcur> 579 580 <enum 3 qcur> 581 582 <enum 4 fwdbuf_qcur> 583 584 <enum 5 fwdbuf_drop> 585 586 <enum 6 fwdall_drop> 587 588 <enum 7 fwdall_qcur> 589 590 <enum 8 reserved_reo_opcode_1> 591 592 <enum 9 dropcur> the error reason code is in 593 reo_error_code field. 594 595 <enum 10 reserved_reo_opcode_2> 596 597 <enum 11 reserved_reo_opcode_3> 598 599 <enum 12 reserved_reo_opcode_4> 600 601 <enum 13 reserved_reo_opcode_5> 602 603 <enum 14 reserved_reo_opcode_6> 604 605 <enum 15 reserved_reo_opcode_7> 606 607 608 609 <legal all> 610 */ 611 #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020 612 #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1 613 #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e 614 615 /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX 616 617 Field only valid when 'Soft_reorder_info_valid' is set. 618 619 620 621 TODO: add description 622 623 624 625 <legal all> 626 */ 627 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020 628 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5 629 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0 630 631 /* Description REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER 632 633 Field only valid when Rx_mpdu_desc_info_details. 634 Fragment_flag is set. 635 636 637 638 The fragment number from the 802.11 header. 639 640 641 642 Note that the sequence number is embedded in the field: 643 Rx_mpdu_desc_info_details. Mpdu_sequence_number 644 645 646 647 <legal all> 648 */ 649 #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000020 650 #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_LSB 13 651 #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_MASK 0x0001e000 652 653 /* Description REO_DESTINATION_RING_8_RESERVED_8A 654 655 <legal 0> 656 */ 657 #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020 658 #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 17 659 #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xfffe0000 660 661 /* Description REO_DESTINATION_RING_9_RESERVED_9A 662 663 <legal 0> 664 */ 665 #define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET 0x00000024 666 #define REO_DESTINATION_RING_9_RESERVED_9A_LSB 0 667 #define REO_DESTINATION_RING_9_RESERVED_9A_MASK 0xffffffff 668 669 /* Description REO_DESTINATION_RING_10_RESERVED_10A 670 671 <legal 0> 672 */ 673 #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028 674 #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0 675 #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff 676 677 /* Description REO_DESTINATION_RING_11_RESERVED_11A 678 679 <legal 0> 680 */ 681 #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c 682 #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0 683 #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff 684 685 /* Description REO_DESTINATION_RING_12_RESERVED_12A 686 687 <legal 0> 688 */ 689 #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030 690 #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0 691 #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff 692 693 /* Description REO_DESTINATION_RING_13_RESERVED_13A 694 695 <legal 0> 696 */ 697 #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034 698 #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0 699 #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff 700 701 /* Description REO_DESTINATION_RING_14_RESERVED_14A 702 703 <legal 0> 704 */ 705 #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038 706 #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0 707 #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff 708 709 /* Description REO_DESTINATION_RING_15_RESERVED_15 710 711 <legal 0> 712 */ 713 #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c 714 #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0 715 #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff 716 717 /* Description REO_DESTINATION_RING_15_RING_ID 718 719 The buffer pointer ring ID. 720 721 0 refers to the IDLE ring 722 723 1 - N refers to other rings 724 725 726 727 Helps with debugging when dumping ring contents. 728 729 <legal all> 730 */ 731 #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c 732 #define REO_DESTINATION_RING_15_RING_ID_LSB 20 733 #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000 734 735 /* Description REO_DESTINATION_RING_15_LOOPING_COUNT 736 737 A count value that indicates the number of times the 738 producer of entries into this Ring has looped around the 739 ring. 740 741 At initialization time, this value is set to 0. On the 742 first loop, this value is set to 1. After the max value is 743 reached allowed by the number of bits for this field, the 744 count value continues with 0 again. 745 746 In case SW is the consumer of the ring entries, it can 747 use this field to figure out up to where the producer of 748 entries has created new entries. This eliminates the need to 749 check where the head pointer' of the ring is located once 750 the SW starts processing an interrupt indicating that new 751 entries have been put into this ring... 752 753 754 755 Also note that SW if it wants only needs to look at the 756 LSB bit of this count value. 757 758 <legal all> 759 */ 760 #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c 761 #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28 762 #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000 763 764 765 #endif // _REO_DESTINATION_RING_H_ 766