1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _REO_ENTRANCE_RING_H_ 20 #define _REO_ENTRANCE_RING_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "rx_mpdu_details.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0-3 struct rx_mpdu_details reo_level_mpdu_frame_info; 30 // 4 rx_reo_queue_desc_addr_31_0[31:0] 31 // 5 rx_reo_queue_desc_addr_39_32[7:0], rounded_mpdu_byte_count[21:8], reo_destination_indication[26:22], frameless_bar[27], reserved_5a[31:28] 32 // 6 rxdma_push_reason[1:0], rxdma_error_code[6:2], mpdu_fragment_number[10:7], reserved_6a[31:11] 33 // 7 reserved_7a[19:0], ring_id[27:20], looping_count[31:28] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8 38 39 struct reo_entrance_ring { 40 struct rx_mpdu_details reo_level_mpdu_frame_info; 41 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 42 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 43 rounded_mpdu_byte_count : 14, //[21:8] 44 reo_destination_indication : 5, //[26:22] 45 frameless_bar : 1, //[27] 46 reserved_5a : 4; //[31:28] 47 uint32_t rxdma_push_reason : 2, //[1:0] 48 rxdma_error_code : 5, //[6:2] 49 mpdu_fragment_number : 4, //[10:7] 50 reserved_6a : 21; //[31:11] 51 uint32_t reserved_7a : 20, //[19:0] 52 ring_id : 8, //[27:20] 53 looping_count : 4; //[31:28] 54 }; 55 56 /* 57 58 struct rx_mpdu_details reo_level_mpdu_frame_info 59 60 Consumer: REO 61 62 Producer: RXDMA 63 64 65 66 Details related to the MPDU being pushed into the REO 67 68 rx_reo_queue_desc_addr_31_0 69 70 Consumer: REO 71 72 Producer: RXDMA 73 74 75 76 Address (lower 32 bits) of the REO queue descriptor. 77 78 <legal all> 79 80 rx_reo_queue_desc_addr_39_32 81 82 Consumer: REO 83 84 Producer: RXDMA 85 86 87 88 Address (upper 8 bits) of the REO queue descriptor. 89 90 <legal all> 91 92 rounded_mpdu_byte_count 93 94 An approximation of the number of bytes received in this 95 MPDU. 96 97 Used to keeps stats on the amount of data flowing 98 through a queue. 99 100 <legal all> 101 102 reo_destination_indication 103 104 RXDMA copy the MPDU's first MSDU's destination 105 indication field here. This is used for REO to be able to 106 re-route the packet to a different SW destination ring if 107 the packet is detected as error in REO. 108 109 110 111 The ID of the REO exit ring where the MSDU frame shall 112 push after (MPDU level) reordering has finished. 113 114 115 116 <enum 0 reo_destination_tcl> Reo will push the frame 117 into the REO2TCL ring 118 119 <enum 1 reo_destination_sw1> Reo will push the frame 120 into the REO2SW1 ring 121 122 <enum 2 reo_destination_sw2> Reo will push the frame 123 into the REO2SW1 ring 124 125 <enum 3 reo_destination_sw3> Reo will push the frame 126 into the REO2SW1 ring 127 128 <enum 4 reo_destination_sw4> Reo will push the frame 129 into the REO2SW1 ring 130 131 <enum 5 reo_destination_release> Reo will push the frame 132 into the REO_release ring 133 134 <enum 6 reo_destination_fw> Reo will push the frame into 135 the REO2FW ring 136 137 <enum 7 reo_destination_7> REO remaps this 138 139 <enum 8 reo_destination_8> REO remaps this <enum 9 140 reo_destination_9> REO remaps this <enum 10 141 reo_destination_10> REO remaps this 142 143 <enum 11 reo_destination_11> REO remaps this 144 145 <enum 12 reo_destination_12> REO remaps this <enum 13 146 reo_destination_13> REO remaps this 147 148 <enum 14 reo_destination_14> REO remaps this 149 150 <enum 15 reo_destination_15> REO remaps this 151 152 <enum 16 reo_destination_16> REO remaps this 153 154 <enum 17 reo_destination_17> REO remaps this 155 156 <enum 18 reo_destination_18> REO remaps this 157 158 <enum 19 reo_destination_19> REO remaps this 159 160 <enum 20 reo_destination_20> REO remaps this 161 162 <enum 21 reo_destination_21> REO remaps this 163 164 <enum 22 reo_destination_22> REO remaps this 165 166 <enum 23 reo_destination_23> REO remaps this 167 168 <enum 24 reo_destination_24> REO remaps this 169 170 <enum 25 reo_destination_25> REO remaps this 171 172 <enum 26 reo_destination_26> REO remaps this 173 174 <enum 27 reo_destination_27> REO remaps this 175 176 <enum 28 reo_destination_28> REO remaps this 177 178 <enum 29 reo_destination_29> REO remaps this 179 180 <enum 30 reo_destination_30> REO remaps this 181 182 <enum 31 reo_destination_31> REO remaps this 183 184 185 186 <legal all> 187 188 frameless_bar 189 190 When set, this REO entrance ring struct contains BAR 191 info from a multi TID BAR frame. The original multi TID BAR 192 frame itself contained all the REO info for the first TID, 193 but all the subsequent TID info and their linkage to the REO 194 descriptors is passed down as 'frameless' BAR info. 195 196 197 198 The only fields valid in this descriptor when this bit 199 is set are: 200 201 Rx_reo_queue_desc_addr_31_0 202 203 RX_reo_queue_desc_addr_39_32 204 205 206 207 And within the 208 209 Reo_level_mpdu_frame_info: 210 211 Within Rx_mpdu_desc_info_details: 212 213 Mpdu_Sequence_number 214 215 BAR_frame 216 217 Peer_meta_data 218 219 All other fields shall be set to 0 220 221 222 223 <legal all> 224 225 reserved_5a 226 227 <legal 0> 228 229 rxdma_push_reason 230 231 Indicates why rxdma pushed the frame to this ring 232 233 234 235 This field is ignored by REO. 236 237 238 239 <enum 0 rxdma_error_detected> RXDMA detected an error an 240 pushed this frame to this queue 241 242 <enum 1 rxdma_routing_instruction> RXDMA pushed the 243 frame to this queue per received routing instructions. No 244 error within RXDMA was detected 245 246 <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a 247 result the MSDU link descriptor might not have the 248 last_msdu_in_mpdu_flag set, but instead WBM might just see a 249 NULL pointer in the MSDU link descriptor. This is to be 250 considered a normal condition for this scenario. 251 252 253 254 <legal 0 - 2> 255 256 rxdma_error_code 257 258 Field only valid when 'rxdma_push_reason' set to 259 'rxdma_error_detected'. 260 261 262 263 This field is ignored by REO. 264 265 266 267 <enum 0 rxdma_overflow_err>MPDU frame is not complete 268 due to a FIFO overflow error in RXPCU. 269 270 <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 271 due to receiving incomplete MPDU from the PHY 272 273 274 <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 275 error or CRYPTO received an encrypted frame, but did not get 276 a valid corresponding key id in the peer entry. 277 278 <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 279 error 280 281 <enum 5 rxdma_unecrypted_err>CRYPTO reported an 282 unencrypted frame error when encrypted was expected 283 284 <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 285 length error 286 287 <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 288 number of MSDUs allowed in an MPDU got exceeded 289 290 <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 291 error 292 293 <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 294 parsing error 295 296 <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 297 during SA search 298 299 <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 300 during DA search 301 302 <enum 12 rxdma_flow_timeout_err>RX OLE reported a 303 timeout during flow search 304 305 <enum 13 rxdma_flush_request>RXDMA received a flush 306 request 307 308 <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU 309 present as well as a fragmented MPDU. A-MSDU defragmentation 310 is not supported in Lithium SW so this is treated as an 311 error. 312 313 mpdu_fragment_number 314 315 Field only valid when Reo_level_mpdu_frame_info. 316 Rx_mpdu_desc_info_details.Fragment_flag is set. 317 318 319 320 The fragment number from the 802.11 header. 321 322 323 324 Note that the sequence number is embedded in the field: 325 Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details. 326 Mpdu_sequence_number 327 328 329 330 <legal all> 331 332 reserved_6a 333 334 <legal 0> 335 336 reserved_7a 337 338 <legal 0> 339 340 ring_id 341 342 Consumer: SW/REO/DEBUG 343 344 Producer: SRNG (of RXDMA) 345 346 347 348 For debugging. 349 350 This field is filled in by the SRNG module. 351 352 It help to identify the ring that is being looked <legal 353 all> 354 355 looping_count 356 357 Consumer: SW/REO/DEBUG 358 359 Producer: SRNG (of RXDMA) 360 361 362 363 For debugging. 364 365 This field is filled in by the SRNG module. 366 367 368 369 A count value that indicates the number of times the 370 producer of entries into this Ring has looped around the 371 ring. 372 373 At initialization time, this value is set to 0. On the 374 first loop, this value is set to 1. After the max value is 375 reached allowed by the number of bits for this field, the 376 count value continues with 0 again. 377 378 379 380 In case SW is the consumer of the ring entries, it can 381 use this field to figure out up to where the producer of 382 entries has created new entries. This eliminates the need to 383 check where the head pointer' of the ring is located once 384 the SW starts processing an interrupt indicating that new 385 entries have been put into this ring... 386 387 388 389 Also note that SW if it wants only needs to look at the 390 LSB bit of this count value. 391 392 <legal all> 393 */ 394 395 #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000000 396 #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 397 #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 398 #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000004 399 #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 400 #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 401 #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000008 402 #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 403 #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 404 #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x0000000c 405 #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 406 #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 407 408 /* Description REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0 409 410 Consumer: REO 411 412 Producer: RXDMA 413 414 415 416 Address (lower 32 bits) of the REO queue descriptor. 417 418 <legal all> 419 */ 420 #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010 421 #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 422 #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 423 424 /* Description REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32 425 426 Consumer: REO 427 428 Producer: RXDMA 429 430 431 432 Address (upper 8 bits) of the REO queue descriptor. 433 434 <legal all> 435 */ 436 #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014 437 #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 438 #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 439 440 /* Description REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT 441 442 An approximation of the number of bytes received in this 443 MPDU. 444 445 Used to keeps stats on the amount of data flowing 446 through a queue. 447 448 <legal all> 449 */ 450 #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014 451 #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_LSB 8 452 #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00 453 454 /* Description REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION 455 456 RXDMA copy the MPDU's first MSDU's destination 457 indication field here. This is used for REO to be able to 458 re-route the packet to a different SW destination ring if 459 the packet is detected as error in REO. 460 461 462 463 The ID of the REO exit ring where the MSDU frame shall 464 push after (MPDU level) reordering has finished. 465 466 467 468 <enum 0 reo_destination_tcl> Reo will push the frame 469 into the REO2TCL ring 470 471 <enum 1 reo_destination_sw1> Reo will push the frame 472 into the REO2SW1 ring 473 474 <enum 2 reo_destination_sw2> Reo will push the frame 475 into the REO2SW1 ring 476 477 <enum 3 reo_destination_sw3> Reo will push the frame 478 into the REO2SW1 ring 479 480 <enum 4 reo_destination_sw4> Reo will push the frame 481 into the REO2SW1 ring 482 483 <enum 5 reo_destination_release> Reo will push the frame 484 into the REO_release ring 485 486 <enum 6 reo_destination_fw> Reo will push the frame into 487 the REO2FW ring 488 489 <enum 7 reo_destination_7> REO remaps this 490 491 <enum 8 reo_destination_8> REO remaps this <enum 9 492 reo_destination_9> REO remaps this <enum 10 493 reo_destination_10> REO remaps this 494 495 <enum 11 reo_destination_11> REO remaps this 496 497 <enum 12 reo_destination_12> REO remaps this <enum 13 498 reo_destination_13> REO remaps this 499 500 <enum 14 reo_destination_14> REO remaps this 501 502 <enum 15 reo_destination_15> REO remaps this 503 504 <enum 16 reo_destination_16> REO remaps this 505 506 <enum 17 reo_destination_17> REO remaps this 507 508 <enum 18 reo_destination_18> REO remaps this 509 510 <enum 19 reo_destination_19> REO remaps this 511 512 <enum 20 reo_destination_20> REO remaps this 513 514 <enum 21 reo_destination_21> REO remaps this 515 516 <enum 22 reo_destination_22> REO remaps this 517 518 <enum 23 reo_destination_23> REO remaps this 519 520 <enum 24 reo_destination_24> REO remaps this 521 522 <enum 25 reo_destination_25> REO remaps this 523 524 <enum 26 reo_destination_26> REO remaps this 525 526 <enum 27 reo_destination_27> REO remaps this 527 528 <enum 28 reo_destination_28> REO remaps this 529 530 <enum 29 reo_destination_29> REO remaps this 531 532 <enum 30 reo_destination_30> REO remaps this 533 534 <enum 31 reo_destination_31> REO remaps this 535 536 537 538 <legal all> 539 */ 540 #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_OFFSET 0x00000014 541 #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_LSB 22 542 #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_MASK 0x07c00000 543 544 /* Description REO_ENTRANCE_RING_5_FRAMELESS_BAR 545 546 When set, this REO entrance ring struct contains BAR 547 info from a multi TID BAR frame. The original multi TID BAR 548 frame itself contained all the REO info for the first TID, 549 but all the subsequent TID info and their linkage to the REO 550 descriptors is passed down as 'frameless' BAR info. 551 552 553 554 The only fields valid in this descriptor when this bit 555 is set are: 556 557 Rx_reo_queue_desc_addr_31_0 558 559 RX_reo_queue_desc_addr_39_32 560 561 562 563 And within the 564 565 Reo_level_mpdu_frame_info: 566 567 Within Rx_mpdu_desc_info_details: 568 569 Mpdu_Sequence_number 570 571 BAR_frame 572 573 Peer_meta_data 574 575 All other fields shall be set to 0 576 577 578 579 <legal all> 580 */ 581 #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_OFFSET 0x00000014 582 #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_LSB 27 583 #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_MASK 0x08000000 584 585 /* Description REO_ENTRANCE_RING_5_RESERVED_5A 586 587 <legal 0> 588 */ 589 #define REO_ENTRANCE_RING_5_RESERVED_5A_OFFSET 0x00000014 590 #define REO_ENTRANCE_RING_5_RESERVED_5A_LSB 28 591 #define REO_ENTRANCE_RING_5_RESERVED_5A_MASK 0xf0000000 592 593 /* Description REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON 594 595 Indicates why rxdma pushed the frame to this ring 596 597 598 599 This field is ignored by REO. 600 601 602 603 <enum 0 rxdma_error_detected> RXDMA detected an error an 604 pushed this frame to this queue 605 606 <enum 1 rxdma_routing_instruction> RXDMA pushed the 607 frame to this queue per received routing instructions. No 608 error within RXDMA was detected 609 610 <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a 611 result the MSDU link descriptor might not have the 612 last_msdu_in_mpdu_flag set, but instead WBM might just see a 613 NULL pointer in the MSDU link descriptor. This is to be 614 considered a normal condition for this scenario. 615 616 617 618 <legal 0 - 2> 619 */ 620 #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET 0x00000018 621 #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_LSB 0 622 #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_MASK 0x00000003 623 624 /* Description REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE 625 626 Field only valid when 'rxdma_push_reason' set to 627 'rxdma_error_detected'. 628 629 630 631 This field is ignored by REO. 632 633 634 635 <enum 0 rxdma_overflow_err>MPDU frame is not complete 636 due to a FIFO overflow error in RXPCU. 637 638 <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 639 due to receiving incomplete MPDU from the PHY 640 641 642 <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 643 error or CRYPTO received an encrypted frame, but did not get 644 a valid corresponding key id in the peer entry. 645 646 <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 647 error 648 649 <enum 5 rxdma_unecrypted_err>CRYPTO reported an 650 unencrypted frame error when encrypted was expected 651 652 <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 653 length error 654 655 <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 656 number of MSDUs allowed in an MPDU got exceeded 657 658 <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 659 error 660 661 <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 662 parsing error 663 664 <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 665 during SA search 666 667 <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 668 during DA search 669 670 <enum 12 rxdma_flow_timeout_err>RX OLE reported a 671 timeout during flow search 672 673 <enum 13 rxdma_flush_request>RXDMA received a flush 674 request 675 676 <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU 677 present as well as a fragmented MPDU. A-MSDU defragmentation 678 is not supported in Lithium SW so this is treated as an 679 error. 680 */ 681 #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET 0x00000018 682 #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_LSB 2 683 #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_MASK 0x0000007c 684 685 /* Description REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER 686 687 Field only valid when Reo_level_mpdu_frame_info. 688 Rx_mpdu_desc_info_details.Fragment_flag is set. 689 690 691 692 The fragment number from the 802.11 header. 693 694 695 696 Note that the sequence number is embedded in the field: 697 Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details. 698 Mpdu_sequence_number 699 700 701 702 <legal all> 703 */ 704 #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018 705 #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_LSB 7 706 #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_MASK 0x00000780 707 708 /* Description REO_ENTRANCE_RING_6_RESERVED_6A 709 710 <legal 0> 711 */ 712 #define REO_ENTRANCE_RING_6_RESERVED_6A_OFFSET 0x00000018 713 #define REO_ENTRANCE_RING_6_RESERVED_6A_LSB 11 714 #define REO_ENTRANCE_RING_6_RESERVED_6A_MASK 0xfffff800 715 716 /* Description REO_ENTRANCE_RING_7_RESERVED_7A 717 718 <legal 0> 719 */ 720 #define REO_ENTRANCE_RING_7_RESERVED_7A_OFFSET 0x0000001c 721 #define REO_ENTRANCE_RING_7_RESERVED_7A_LSB 0 722 #define REO_ENTRANCE_RING_7_RESERVED_7A_MASK 0x000fffff 723 724 /* Description REO_ENTRANCE_RING_7_RING_ID 725 726 Consumer: SW/REO/DEBUG 727 728 Producer: SRNG (of RXDMA) 729 730 731 732 For debugging. 733 734 This field is filled in by the SRNG module. 735 736 It help to identify the ring that is being looked <legal 737 all> 738 */ 739 #define REO_ENTRANCE_RING_7_RING_ID_OFFSET 0x0000001c 740 #define REO_ENTRANCE_RING_7_RING_ID_LSB 20 741 #define REO_ENTRANCE_RING_7_RING_ID_MASK 0x0ff00000 742 743 /* Description REO_ENTRANCE_RING_7_LOOPING_COUNT 744 745 Consumer: SW/REO/DEBUG 746 747 Producer: SRNG (of RXDMA) 748 749 750 751 For debugging. 752 753 This field is filled in by the SRNG module. 754 755 756 757 A count value that indicates the number of times the 758 producer of entries into this Ring has looped around the 759 ring. 760 761 At initialization time, this value is set to 0. On the 762 first loop, this value is set to 1. After the max value is 763 reached allowed by the number of bits for this field, the 764 count value continues with 0 again. 765 766 767 768 In case SW is the consumer of the ring entries, it can 769 use this field to figure out up to where the producer of 770 entries has created new entries. This eliminates the need to 771 check where the head pointer' of the ring is located once 772 the SW starts processing an interrupt indicating that new 773 entries have been put into this ring... 774 775 776 777 Also note that SW if it wants only needs to look at the 778 LSB bit of this count value. 779 780 <legal all> 781 */ 782 #define REO_ENTRANCE_RING_7_LOOPING_COUNT_OFFSET 0x0000001c 783 #define REO_ENTRANCE_RING_7_LOOPING_COUNT_LSB 28 784 #define REO_ENTRANCE_RING_7_LOOPING_COUNT_MASK 0xf0000000 785 786 787 #endif // _REO_ENTRANCE_RING_H_ 788