1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _REO_FLUSH_QUEUE_H_ 20 #define _REO_FLUSH_QUEUE_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "uniform_reo_cmd_header.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0 struct uniform_reo_cmd_header cmd_header; 30 // 1 flush_desc_addr_31_0[31:0] 31 // 2 flush_desc_addr_39_32[7:0], block_desc_addr_usage_after_flush[8], block_resource_index[10:9], reserved_2a[31:11] 32 // 3 reserved_3a[31:0] 33 // 4 reserved_4a[31:0] 34 // 5 reserved_5a[31:0] 35 // 6 reserved_6a[31:0] 36 // 7 reserved_7a[31:0] 37 // 8 reserved_8a[31:0] 38 // 39 // ################ END SUMMARY ################# 40 41 #define NUM_OF_DWORDS_REO_FLUSH_QUEUE 9 42 43 struct reo_flush_queue { 44 struct uniform_reo_cmd_header cmd_header; 45 uint32_t flush_desc_addr_31_0 : 32; //[31:0] 46 uint32_t flush_desc_addr_39_32 : 8, //[7:0] 47 block_desc_addr_usage_after_flush: 1, //[8] 48 block_resource_index : 2, //[10:9] 49 reserved_2a : 21; //[31:11] 50 uint32_t reserved_3a : 32; //[31:0] 51 uint32_t reserved_4a : 32; //[31:0] 52 uint32_t reserved_5a : 32; //[31:0] 53 uint32_t reserved_6a : 32; //[31:0] 54 uint32_t reserved_7a : 32; //[31:0] 55 uint32_t reserved_8a : 32; //[31:0] 56 }; 57 58 /* 59 60 struct uniform_reo_cmd_header cmd_header 61 62 Consumer: REO 63 64 Producer: SW 65 66 67 68 Details for command execution tracking purposes. 69 70 flush_desc_addr_31_0 71 72 Consumer: REO 73 74 Producer: SW 75 76 77 78 Address (lower 32 bits) of the descriptor to flush 79 80 <legal all> 81 82 flush_desc_addr_39_32 83 84 Consumer: REO 85 86 Producer: SW 87 88 89 90 Address (upper 8 bits) of the descriptor to flush 91 92 <legal all> 93 94 block_desc_addr_usage_after_flush 95 96 When set, REO shall not re-fetch this address till SW 97 explicitly unblocked this address 98 99 100 101 If the blocking resource was already used, this command 102 shall fail and an error is reported 103 104 105 106 <legal all> 107 108 block_resource_index 109 110 Field only valid when 'Block_desc_addr_usage_after_flush 111 ' is set. 112 113 114 115 Indicates which of the four blocking resources in REO 116 will be assigned for managing the blocking of this address. 117 118 <legal all> 119 120 reserved_2a 121 122 <legal 0> 123 124 reserved_3a 125 126 <legal 0> 127 128 reserved_4a 129 130 <legal 0> 131 132 reserved_5a 133 134 <legal 0> 135 136 reserved_6a 137 138 <legal 0> 139 140 reserved_7a 141 142 <legal 0> 143 144 reserved_8a 145 146 <legal 0> 147 */ 148 149 #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000 150 #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0 151 #define REO_FLUSH_QUEUE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff 152 153 /* Description REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0 154 155 Consumer: REO 156 157 Producer: SW 158 159 160 161 Address (lower 32 bits) of the descriptor to flush 162 163 <legal all> 164 */ 165 #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_OFFSET 0x00000004 166 #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_LSB 0 167 #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_MASK 0xffffffff 168 169 /* Description REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32 170 171 Consumer: REO 172 173 Producer: SW 174 175 176 177 Address (upper 8 bits) of the descriptor to flush 178 179 <legal all> 180 */ 181 #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_OFFSET 0x00000008 182 #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_LSB 0 183 #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_MASK 0x000000ff 184 185 /* Description REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH 186 187 When set, REO shall not re-fetch this address till SW 188 explicitly unblocked this address 189 190 191 192 If the blocking resource was already used, this command 193 shall fail and an error is reported 194 195 196 197 <legal all> 198 */ 199 #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_OFFSET 0x00000008 200 #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_LSB 8 201 #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_MASK 0x00000100 202 203 /* Description REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX 204 205 Field only valid when 'Block_desc_addr_usage_after_flush 206 ' is set. 207 208 209 210 Indicates which of the four blocking resources in REO 211 will be assigned for managing the blocking of this address. 212 213 <legal all> 214 */ 215 #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_OFFSET 0x00000008 216 #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_LSB 9 217 #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_MASK 0x00000600 218 219 /* Description REO_FLUSH_QUEUE_2_RESERVED_2A 220 221 <legal 0> 222 */ 223 #define REO_FLUSH_QUEUE_2_RESERVED_2A_OFFSET 0x00000008 224 #define REO_FLUSH_QUEUE_2_RESERVED_2A_LSB 11 225 #define REO_FLUSH_QUEUE_2_RESERVED_2A_MASK 0xfffff800 226 227 /* Description REO_FLUSH_QUEUE_3_RESERVED_3A 228 229 <legal 0> 230 */ 231 #define REO_FLUSH_QUEUE_3_RESERVED_3A_OFFSET 0x0000000c 232 #define REO_FLUSH_QUEUE_3_RESERVED_3A_LSB 0 233 #define REO_FLUSH_QUEUE_3_RESERVED_3A_MASK 0xffffffff 234 235 /* Description REO_FLUSH_QUEUE_4_RESERVED_4A 236 237 <legal 0> 238 */ 239 #define REO_FLUSH_QUEUE_4_RESERVED_4A_OFFSET 0x00000010 240 #define REO_FLUSH_QUEUE_4_RESERVED_4A_LSB 0 241 #define REO_FLUSH_QUEUE_4_RESERVED_4A_MASK 0xffffffff 242 243 /* Description REO_FLUSH_QUEUE_5_RESERVED_5A 244 245 <legal 0> 246 */ 247 #define REO_FLUSH_QUEUE_5_RESERVED_5A_OFFSET 0x00000014 248 #define REO_FLUSH_QUEUE_5_RESERVED_5A_LSB 0 249 #define REO_FLUSH_QUEUE_5_RESERVED_5A_MASK 0xffffffff 250 251 /* Description REO_FLUSH_QUEUE_6_RESERVED_6A 252 253 <legal 0> 254 */ 255 #define REO_FLUSH_QUEUE_6_RESERVED_6A_OFFSET 0x00000018 256 #define REO_FLUSH_QUEUE_6_RESERVED_6A_LSB 0 257 #define REO_FLUSH_QUEUE_6_RESERVED_6A_MASK 0xffffffff 258 259 /* Description REO_FLUSH_QUEUE_7_RESERVED_7A 260 261 <legal 0> 262 */ 263 #define REO_FLUSH_QUEUE_7_RESERVED_7A_OFFSET 0x0000001c 264 #define REO_FLUSH_QUEUE_7_RESERVED_7A_LSB 0 265 #define REO_FLUSH_QUEUE_7_RESERVED_7A_MASK 0xffffffff 266 267 /* Description REO_FLUSH_QUEUE_8_RESERVED_8A 268 269 <legal 0> 270 */ 271 #define REO_FLUSH_QUEUE_8_RESERVED_8A_OFFSET 0x00000020 272 #define REO_FLUSH_QUEUE_8_RESERVED_8A_LSB 0 273 #define REO_FLUSH_QUEUE_8_RESERVED_8A_MASK 0xffffffff 274 275 276 #endif // _REO_FLUSH_QUEUE_H_ 277