xref: /wlan-driver/fw-api/hw/qca6390/v1/rx_attention.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _RX_ATTENTION_H_
20 #define _RX_ATTENTION_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 
25 // ################ START SUMMARY #################
26 //
27 //	Dword	Fields
28 //	0	rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16]
29 //	1	first_mpdu[0], reserved_1a[1], mcast_bcast[2], ast_index_not_found[3], ast_index_timeout[4], power_mgmt[5], non_qos[6], null_data[7], mgmt_type[8], ctrl_type[9], more_data[10], eosp[11], a_msdu_error[12], fragment_flag[13], order[14], cce_match[15], overflow_err[16], msdu_length_err[17], tcp_udp_chksum_fail[18], ip_chksum_fail[19], sa_idx_invalid[20], da_idx_invalid[21], reserved_1b[22], rx_in_tx_decrypt_byp[23], encrypt_required[24], directed[25], buffer_fragment[26], mpdu_length_err[27], tkip_mic_err[28], decrypt_err[29], unencrypted_frame_err[30], fcs_err[31]
30 //	2	flow_idx_timeout[0], flow_idx_invalid[1], wifi_parser_error[2], amsdu_parser_error[3], sa_idx_timeout[4], da_idx_timeout[5], msdu_limit_error[6], da_is_valid[7], da_is_mcbc[8], sa_is_valid[9], decrypt_status_code[12:10], rx_bitmap_not_updated[13], reserved_2[30:14], msdu_done[31]
31 //
32 // ################ END SUMMARY #################
33 
34 #define NUM_OF_DWORDS_RX_ATTENTION 3
35 
36 struct rx_attention {
37              uint32_t rxpcu_mpdu_filter_in_category   :  2, //[1:0]
38                       sw_frame_group_id               :  7, //[8:2]
39                       reserved_0                      :  7, //[15:9]
40                       phy_ppdu_id                     : 16; //[31:16]
41              uint32_t first_mpdu                      :  1, //[0]
42                       reserved_1a                     :  1, //[1]
43                       mcast_bcast                     :  1, //[2]
44                       ast_index_not_found             :  1, //[3]
45                       ast_index_timeout               :  1, //[4]
46                       power_mgmt                      :  1, //[5]
47                       non_qos                         :  1, //[6]
48                       null_data                       :  1, //[7]
49                       mgmt_type                       :  1, //[8]
50                       ctrl_type                       :  1, //[9]
51                       more_data                       :  1, //[10]
52                       eosp                            :  1, //[11]
53                       a_msdu_error                    :  1, //[12]
54                       fragment_flag                   :  1, //[13]
55                       order                           :  1, //[14]
56                       cce_match                       :  1, //[15]
57                       overflow_err                    :  1, //[16]
58                       msdu_length_err                 :  1, //[17]
59                       tcp_udp_chksum_fail             :  1, //[18]
60                       ip_chksum_fail                  :  1, //[19]
61                       sa_idx_invalid                  :  1, //[20]
62                       da_idx_invalid                  :  1, //[21]
63                       reserved_1b                     :  1, //[22]
64                       rx_in_tx_decrypt_byp            :  1, //[23]
65                       encrypt_required                :  1, //[24]
66                       directed                        :  1, //[25]
67                       buffer_fragment                 :  1, //[26]
68                       mpdu_length_err                 :  1, //[27]
69                       tkip_mic_err                    :  1, //[28]
70                       decrypt_err                     :  1, //[29]
71                       unencrypted_frame_err           :  1, //[30]
72                       fcs_err                         :  1; //[31]
73              uint32_t flow_idx_timeout                :  1, //[0]
74                       flow_idx_invalid                :  1, //[1]
75                       wifi_parser_error               :  1, //[2]
76                       amsdu_parser_error              :  1, //[3]
77                       sa_idx_timeout                  :  1, //[4]
78                       da_idx_timeout                  :  1, //[5]
79                       msdu_limit_error                :  1, //[6]
80                       da_is_valid                     :  1, //[7]
81                       da_is_mcbc                      :  1, //[8]
82                       sa_is_valid                     :  1, //[9]
83                       decrypt_status_code             :  3, //[12:10]
84                       rx_bitmap_not_updated           :  1, //[13]
85                       reserved_2                      : 17, //[30:14]
86                       msdu_done                       :  1; //[31]
87 };
88 
89 /*
90 
91 rxpcu_mpdu_filter_in_category
92 
93 			Field indicates what the reason was that this MPDU frame
94 			was allowed to come into the receive path by RXPCU
95 
96 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
97 			frame filter programming of rxpcu
98 
99 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
100 			regular frame filter and would have been dropped, were it
101 			not for the frame fitting into the 'monitor_client'
102 			category.
103 
104 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
105 			regular frame filter and also did not pass the
106 			rxpcu_monitor_client filter. It would have been dropped
107 			accept that it did pass the 'monitor_other' category.
108 
109 			<legal 0-2>
110 
111 sw_frame_group_id
112 
113 			SW processes frames based on certain classifications.
114 			This field indicates to what sw classification this MPDU is
115 			mapped.
116 
117 			The classification is given in priority order
118 
119 
120 
121 			<enum 0 sw_frame_group_NDP_frame>
122 
123 
124 
125 			<enum 1 sw_frame_group_Multicast_data>
126 
127 			<enum 2 sw_frame_group_Unicast_data>
128 
129 			<enum 3 sw_frame_group_Null_data > This includes mpdus
130 			of type Data Null as well as QoS Data Null
131 
132 
133 
134 			<enum 4 sw_frame_group_mgmt_0000 >
135 
136 			<enum 5 sw_frame_group_mgmt_0001 >
137 
138 			<enum 6 sw_frame_group_mgmt_0010 >
139 
140 			<enum 7 sw_frame_group_mgmt_0011 >
141 
142 			<enum 8 sw_frame_group_mgmt_0100 >
143 
144 			<enum 9 sw_frame_group_mgmt_0101 >
145 
146 			<enum 10 sw_frame_group_mgmt_0110 >
147 
148 			<enum 11 sw_frame_group_mgmt_0111 >
149 
150 			<enum 12 sw_frame_group_mgmt_1000 >
151 
152 			<enum 13 sw_frame_group_mgmt_1001 >
153 
154 			<enum 14 sw_frame_group_mgmt_1010 >
155 
156 			<enum 15 sw_frame_group_mgmt_1011 >
157 
158 			<enum 16 sw_frame_group_mgmt_1100 >
159 
160 			<enum 17 sw_frame_group_mgmt_1101 >
161 
162 			<enum 18 sw_frame_group_mgmt_1110 >
163 
164 			<enum 19 sw_frame_group_mgmt_1111 >
165 
166 
167 
168 			<enum 20 sw_frame_group_ctrl_0000 >
169 
170 			<enum 21 sw_frame_group_ctrl_0001 >
171 
172 			<enum 22 sw_frame_group_ctrl_0010 >
173 
174 			<enum 23 sw_frame_group_ctrl_0011 >
175 
176 			<enum 24 sw_frame_group_ctrl_0100 >
177 
178 			<enum 25 sw_frame_group_ctrl_0101 >
179 
180 			<enum 26 sw_frame_group_ctrl_0110 >
181 
182 			<enum 27 sw_frame_group_ctrl_0111 >
183 
184 			<enum 28 sw_frame_group_ctrl_1000 >
185 
186 			<enum 29 sw_frame_group_ctrl_1001 >
187 
188 			<enum 30 sw_frame_group_ctrl_1010 >
189 
190 			<enum 31 sw_frame_group_ctrl_1011 >
191 
192 			<enum 32 sw_frame_group_ctrl_1100 >
193 
194 			<enum 33 sw_frame_group_ctrl_1101 >
195 
196 			<enum 34 sw_frame_group_ctrl_1110 >
197 
198 			<enum 35 sw_frame_group_ctrl_1111 >
199 
200 
201 
202 			<enum 36 sw_frame_group_unsupported> This covers type 3
203 			and protocol version != 0
204 
205 
206 
207 
208 
209 
210 			<legal 0-37>
211 
212 reserved_0
213 
214 			<legal 0>
215 
216 phy_ppdu_id
217 
218 			A ppdu counter value that PHY increments for every PPDU
219 			received. The counter value wraps around
220 
221 			<legal all>
222 
223 first_mpdu
224 
225 			Indicates the first MSDU of the PPDU.  If both
226 			first_mpdu and last_mpdu are set in the MSDU then this is a
227 			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
228 			in an A-MPDU shall have both first_mpdu and last_mpdu bits
229 			set to 0.  The PPDU start status will only be valid when
230 			this bit is set.
231 
232 reserved_1a
233 
234 			<legal 0>
235 
236 mcast_bcast
237 
238 			Multicast / broadcast indicator.  Only set when the MAC
239 			address 1 bit 0 is set indicating mcast/bcast and the BSSID
240 			matches one of the 4 BSSID registers. Only set when
241 			first_msdu is set.
242 
243 ast_index_not_found
244 
245 			Only valid when first_msdu is set.
246 
247 
248 
249 			Indicates no AST matching entries within the the max
250 			search count.
251 
252 ast_index_timeout
253 
254 			Only valid when first_msdu is set.
255 
256 
257 
258 			Indicates an unsuccessful search in the address seach
259 			table due to timeout.
260 
261 power_mgmt
262 
263 			Power management bit set in the 802.11 header.  Only set
264 			when first_msdu is set.
265 
266 non_qos
267 
268 			Set if packet is not a non-QoS data frame.  Only set
269 			when first_msdu is set.
270 
271 null_data
272 
273 			Set if frame type indicates either null data or QoS null
274 			data format.  Only set when first_msdu is set.
275 
276 mgmt_type
277 
278 			Set if packet is a management packet.  Only set when
279 			first_msdu is set.
280 
281 ctrl_type
282 
283 			Set if packet is a control packet.  Only set when
284 			first_msdu is set.
285 
286 more_data
287 
288 			Set if more bit in frame control is set.  Only set when
289 			first_msdu is set.
290 
291 eosp
292 
293 			Set if the EOSP (end of service period) bit in the QoS
294 			control field is set.  Only set when first_msdu is set.
295 
296 a_msdu_error
297 
298 			Set if number of MSDUs in A-MSDU is above a threshold or
299 			if the size of the MSDU is invalid.  This receive buffer
300 			will contain all of the remainder of the MSDUs in this MPDU
301 			without decapsulation.
302 
303 fragment_flag
304 
305 			Indicates that this is an 802.11 fragment frame.  This
306 			is set when either the more_frag bit is set in the frame
307 			control or the fragment number is not zero.  Only set when
308 			first_msdu is set.
309 
310 order
311 
312 			Set if the order bit in the frame control is set.  Only
313 			set when first_msdu is set.
314 
315 cce_match
316 
317 			Indicates that this status has a corresponding MSDU that
318 			requires FW processing.  The OLE will have classification
319 			ring mask registers which will indicate the ring(s) for
320 			packets and descriptors which need FW attention.
321 
322 overflow_err
323 
324 			RXPCU Receive FIFO ran out of space to receive the full
325 			MPDU. Therefor this MPDU is terminated early and is thus
326 			corrupted.
327 
328 
329 
330 			This MPDU will not be ACKed.
331 
332 			RXPCU might still be able to correctly receive the
333 			following MPDUs in the PPDU if enough fifo space became
334 			available in time
335 
336 msdu_length_err
337 
338 			Indicates that the MSDU length from the 802.3
339 			encapsulated length field extends beyond the MPDU boundary
340 			or if the length is less than 14 bytes.
341 
342 			Merged with original other_msdu_err: Indicates that the
343 			MSDU threshold was exceeded and thus all the rest of the
344 			MSDUs will not be scattered and will not be decasulated but
345 			will be DMA'ed in RAW format as a single MSDU buffer
346 
347 tcp_udp_chksum_fail
348 
349 			Indicates that the computed checksum (tcp_udp_chksum)
350 			did not match the checksum in the TCP/UDP header.
351 
352 ip_chksum_fail
353 
354 			Indicates that the computed checksum did not match the
355 			checksum in the IP header.
356 
357 sa_idx_invalid
358 
359 			Indicates no matching entry was found in the address
360 			search table for the source MAC address.
361 
362 da_idx_invalid
363 
364 			Indicates no matching entry was found in the address
365 			search table for the destination MAC address.
366 
367 reserved_1b
368 
369 
370 rx_in_tx_decrypt_byp
371 
372 			Indicates that RX packet is not decrypted as Crypto is
373 			busy with TX packet processing.
374 
375 encrypt_required
376 
377 			Indicates that this data type frame is not encrypted
378 			even if the policy for this MPDU requires encryption as
379 			indicated in the peer entry key type.
380 
381 directed
382 
383 			MPDU is a directed packet which means that the RA
384 			matched our STA addresses.  In proxySTA it means that the TA
385 			matched an entry in our address search table with the
386 			corresponding no_ack bit is the address search entry
387 			cleared.
388 
389 buffer_fragment
390 
391 			Indicates that at least one of the rx buffers has been
392 			fragmented.  If set the FW should look at the rx_frag_info
393 			descriptor described below.
394 
395 mpdu_length_err
396 
397 			Indicates that the MPDU was pre-maturely terminated
398 			resulting in a truncated MPDU.  Don't trust the MPDU length
399 			field.
400 
401 tkip_mic_err
402 
403 			Indicates that the MPDU Michael integrity check failed
404 
405 decrypt_err
406 
407 			Indicates that the MPDU decrypt integrity check failed
408 			or CRYPTO received an encrypted frame, but did not get a
409 			valid corresponding key id in the peer entry.
410 
411 unencrypted_frame_err
412 
413 			Copied here by RX OLE from the RX_MPDU_END TLV
414 
415 fcs_err
416 
417 			Indicates that the MPDU FCS check failed
418 
419 flow_idx_timeout
420 
421 			Indicates an unsuccessful flow search due to the
422 			expiring of the search timer.
423 
424 			<legal all>
425 
426 flow_idx_invalid
427 
428 			flow id is not valid
429 
430 			<legal all>
431 
432 wifi_parser_error
433 
434 			Indicates that the WiFi frame has one of the following
435 			errors
436 
437 			o has less than minimum allowed bytes as per standard
438 
439 			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
440 
441 			<legal all>
442 
443 amsdu_parser_error
444 
445 			A-MSDU could not be properly de-agregated.
446 
447 			<legal all>
448 
449 sa_idx_timeout
450 
451 			Indicates an unsuccessful MAC source address search due
452 			to the expiring of the search timer.
453 
454 da_idx_timeout
455 
456 			Indicates an unsuccessful MAC destination address search
457 			due to the expiring of the search timer.
458 
459 msdu_limit_error
460 
461 			Indicates that the MSDU threshold was exceeded and thus
462 			all the rest of the MSDUs will not be scattered and will not
463 			be decasulated but will be DMA'ed in RAW format as a single
464 			MSDU buffer
465 
466 da_is_valid
467 
468 			Indicates that OLE found a valid DA entry
469 
470 da_is_mcbc
471 
472 			Field Only valid if da_is_valid is set
473 
474 
475 
476 			Indicates the DA address was a Multicast of Broadcast
477 			address.
478 
479 sa_is_valid
480 
481 			Indicates that OLE found a valid SA entry
482 
483 decrypt_status_code
484 
485 			Field provides insight into the decryption performed
486 
487 
488 
489 			<enum 0 decrypt_ok> Frame had protection enabled and
490 			decrypted properly
491 
492 			<enum 1 decrypt_unprotected_frame > Frame is unprotected
493 			and hence bypassed
494 
495 			<enum 2 decrypt_data_err > Frame has protection enabled
496 			and could not be properly decrypted due to MIC/ICV mismatch
497 			etc.
498 
499 			<enum 3 decrypt_key_invalid > Frame has protection
500 			enabled but the key that was required to decrypt this frame
501 			was not valid
502 
503 			<enum 4 decrypt_peer_entry_invalid > Frame has
504 			protection enabled but the key that was required to decrypt
505 			this frame was not valid
506 
507 			<enum 5 decrypt_other > Reserved for other indications
508 
509 
510 
511 			<legal 0 - 5>
512 
513 rx_bitmap_not_updated
514 
515 			Frame is received, but RXPCU could not update the
516 			receive bitmap due to (temporary) fifo contraints.
517 
518 			<legal all>
519 
520 reserved_2
521 
522 			<legal 0>
523 
524 msdu_done
525 
526 			If set indicates that the RX packet data, RX header
527 			data, RX PPDU start descriptor, RX MPDU start/end
528 			descriptor, RX MSDU start/end descriptors and RX Attention
529 			descriptor are all valid.  This bit must be in the last
530 			octet of the descriptor.
531 */
532 
533 
534 /* Description		RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY
535 
536 			Field indicates what the reason was that this MPDU frame
537 			was allowed to come into the receive path by RXPCU
538 
539 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
540 			frame filter programming of rxpcu
541 
542 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
543 			regular frame filter and would have been dropped, were it
544 			not for the frame fitting into the 'monitor_client'
545 			category.
546 
547 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
548 			regular frame filter and also did not pass the
549 			rxpcu_monitor_client filter. It would have been dropped
550 			accept that it did pass the 'monitor_other' category.
551 
552 			<legal 0-2>
553 */
554 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET          0x00000000
555 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB             0
556 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK            0x00000003
557 
558 /* Description		RX_ATTENTION_0_SW_FRAME_GROUP_ID
559 
560 			SW processes frames based on certain classifications.
561 			This field indicates to what sw classification this MPDU is
562 			mapped.
563 
564 			The classification is given in priority order
565 
566 
567 
568 			<enum 0 sw_frame_group_NDP_frame>
569 
570 
571 
572 			<enum 1 sw_frame_group_Multicast_data>
573 
574 			<enum 2 sw_frame_group_Unicast_data>
575 
576 			<enum 3 sw_frame_group_Null_data > This includes mpdus
577 			of type Data Null as well as QoS Data Null
578 
579 
580 
581 			<enum 4 sw_frame_group_mgmt_0000 >
582 
583 			<enum 5 sw_frame_group_mgmt_0001 >
584 
585 			<enum 6 sw_frame_group_mgmt_0010 >
586 
587 			<enum 7 sw_frame_group_mgmt_0011 >
588 
589 			<enum 8 sw_frame_group_mgmt_0100 >
590 
591 			<enum 9 sw_frame_group_mgmt_0101 >
592 
593 			<enum 10 sw_frame_group_mgmt_0110 >
594 
595 			<enum 11 sw_frame_group_mgmt_0111 >
596 
597 			<enum 12 sw_frame_group_mgmt_1000 >
598 
599 			<enum 13 sw_frame_group_mgmt_1001 >
600 
601 			<enum 14 sw_frame_group_mgmt_1010 >
602 
603 			<enum 15 sw_frame_group_mgmt_1011 >
604 
605 			<enum 16 sw_frame_group_mgmt_1100 >
606 
607 			<enum 17 sw_frame_group_mgmt_1101 >
608 
609 			<enum 18 sw_frame_group_mgmt_1110 >
610 
611 			<enum 19 sw_frame_group_mgmt_1111 >
612 
613 
614 
615 			<enum 20 sw_frame_group_ctrl_0000 >
616 
617 			<enum 21 sw_frame_group_ctrl_0001 >
618 
619 			<enum 22 sw_frame_group_ctrl_0010 >
620 
621 			<enum 23 sw_frame_group_ctrl_0011 >
622 
623 			<enum 24 sw_frame_group_ctrl_0100 >
624 
625 			<enum 25 sw_frame_group_ctrl_0101 >
626 
627 			<enum 26 sw_frame_group_ctrl_0110 >
628 
629 			<enum 27 sw_frame_group_ctrl_0111 >
630 
631 			<enum 28 sw_frame_group_ctrl_1000 >
632 
633 			<enum 29 sw_frame_group_ctrl_1001 >
634 
635 			<enum 30 sw_frame_group_ctrl_1010 >
636 
637 			<enum 31 sw_frame_group_ctrl_1011 >
638 
639 			<enum 32 sw_frame_group_ctrl_1100 >
640 
641 			<enum 33 sw_frame_group_ctrl_1101 >
642 
643 			<enum 34 sw_frame_group_ctrl_1110 >
644 
645 			<enum 35 sw_frame_group_ctrl_1111 >
646 
647 
648 
649 			<enum 36 sw_frame_group_unsupported> This covers type 3
650 			and protocol version != 0
651 
652 
653 
654 
655 
656 
657 			<legal 0-37>
658 */
659 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_OFFSET                      0x00000000
660 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_LSB                         2
661 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_MASK                        0x000001fc
662 
663 /* Description		RX_ATTENTION_0_RESERVED_0
664 
665 			<legal 0>
666 */
667 #define RX_ATTENTION_0_RESERVED_0_OFFSET                             0x00000000
668 #define RX_ATTENTION_0_RESERVED_0_LSB                                9
669 #define RX_ATTENTION_0_RESERVED_0_MASK                               0x0000fe00
670 
671 /* Description		RX_ATTENTION_0_PHY_PPDU_ID
672 
673 			A ppdu counter value that PHY increments for every PPDU
674 			received. The counter value wraps around
675 
676 			<legal all>
677 */
678 #define RX_ATTENTION_0_PHY_PPDU_ID_OFFSET                            0x00000000
679 #define RX_ATTENTION_0_PHY_PPDU_ID_LSB                               16
680 #define RX_ATTENTION_0_PHY_PPDU_ID_MASK                              0xffff0000
681 
682 /* Description		RX_ATTENTION_1_FIRST_MPDU
683 
684 			Indicates the first MSDU of the PPDU.  If both
685 			first_mpdu and last_mpdu are set in the MSDU then this is a
686 			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
687 			in an A-MPDU shall have both first_mpdu and last_mpdu bits
688 			set to 0.  The PPDU start status will only be valid when
689 			this bit is set.
690 */
691 #define RX_ATTENTION_1_FIRST_MPDU_OFFSET                             0x00000004
692 #define RX_ATTENTION_1_FIRST_MPDU_LSB                                0
693 #define RX_ATTENTION_1_FIRST_MPDU_MASK                               0x00000001
694 
695 /* Description		RX_ATTENTION_1_RESERVED_1A
696 
697 			<legal 0>
698 */
699 #define RX_ATTENTION_1_RESERVED_1A_OFFSET                            0x00000004
700 #define RX_ATTENTION_1_RESERVED_1A_LSB                               1
701 #define RX_ATTENTION_1_RESERVED_1A_MASK                              0x00000002
702 
703 /* Description		RX_ATTENTION_1_MCAST_BCAST
704 
705 			Multicast / broadcast indicator.  Only set when the MAC
706 			address 1 bit 0 is set indicating mcast/bcast and the BSSID
707 			matches one of the 4 BSSID registers. Only set when
708 			first_msdu is set.
709 */
710 #define RX_ATTENTION_1_MCAST_BCAST_OFFSET                            0x00000004
711 #define RX_ATTENTION_1_MCAST_BCAST_LSB                               2
712 #define RX_ATTENTION_1_MCAST_BCAST_MASK                              0x00000004
713 
714 /* Description		RX_ATTENTION_1_AST_INDEX_NOT_FOUND
715 
716 			Only valid when first_msdu is set.
717 
718 
719 
720 			Indicates no AST matching entries within the the max
721 			search count.
722 */
723 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_OFFSET                    0x00000004
724 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_LSB                       3
725 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_MASK                      0x00000008
726 
727 /* Description		RX_ATTENTION_1_AST_INDEX_TIMEOUT
728 
729 			Only valid when first_msdu is set.
730 
731 
732 
733 			Indicates an unsuccessful search in the address seach
734 			table due to timeout.
735 */
736 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_OFFSET                      0x00000004
737 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_LSB                         4
738 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_MASK                        0x00000010
739 
740 /* Description		RX_ATTENTION_1_POWER_MGMT
741 
742 			Power management bit set in the 802.11 header.  Only set
743 			when first_msdu is set.
744 */
745 #define RX_ATTENTION_1_POWER_MGMT_OFFSET                             0x00000004
746 #define RX_ATTENTION_1_POWER_MGMT_LSB                                5
747 #define RX_ATTENTION_1_POWER_MGMT_MASK                               0x00000020
748 
749 /* Description		RX_ATTENTION_1_NON_QOS
750 
751 			Set if packet is not a non-QoS data frame.  Only set
752 			when first_msdu is set.
753 */
754 #define RX_ATTENTION_1_NON_QOS_OFFSET                                0x00000004
755 #define RX_ATTENTION_1_NON_QOS_LSB                                   6
756 #define RX_ATTENTION_1_NON_QOS_MASK                                  0x00000040
757 
758 /* Description		RX_ATTENTION_1_NULL_DATA
759 
760 			Set if frame type indicates either null data or QoS null
761 			data format.  Only set when first_msdu is set.
762 */
763 #define RX_ATTENTION_1_NULL_DATA_OFFSET                              0x00000004
764 #define RX_ATTENTION_1_NULL_DATA_LSB                                 7
765 #define RX_ATTENTION_1_NULL_DATA_MASK                                0x00000080
766 
767 /* Description		RX_ATTENTION_1_MGMT_TYPE
768 
769 			Set if packet is a management packet.  Only set when
770 			first_msdu is set.
771 */
772 #define RX_ATTENTION_1_MGMT_TYPE_OFFSET                              0x00000004
773 #define RX_ATTENTION_1_MGMT_TYPE_LSB                                 8
774 #define RX_ATTENTION_1_MGMT_TYPE_MASK                                0x00000100
775 
776 /* Description		RX_ATTENTION_1_CTRL_TYPE
777 
778 			Set if packet is a control packet.  Only set when
779 			first_msdu is set.
780 */
781 #define RX_ATTENTION_1_CTRL_TYPE_OFFSET                              0x00000004
782 #define RX_ATTENTION_1_CTRL_TYPE_LSB                                 9
783 #define RX_ATTENTION_1_CTRL_TYPE_MASK                                0x00000200
784 
785 /* Description		RX_ATTENTION_1_MORE_DATA
786 
787 			Set if more bit in frame control is set.  Only set when
788 			first_msdu is set.
789 */
790 #define RX_ATTENTION_1_MORE_DATA_OFFSET                              0x00000004
791 #define RX_ATTENTION_1_MORE_DATA_LSB                                 10
792 #define RX_ATTENTION_1_MORE_DATA_MASK                                0x00000400
793 
794 /* Description		RX_ATTENTION_1_EOSP
795 
796 			Set if the EOSP (end of service period) bit in the QoS
797 			control field is set.  Only set when first_msdu is set.
798 */
799 #define RX_ATTENTION_1_EOSP_OFFSET                                   0x00000004
800 #define RX_ATTENTION_1_EOSP_LSB                                      11
801 #define RX_ATTENTION_1_EOSP_MASK                                     0x00000800
802 
803 /* Description		RX_ATTENTION_1_A_MSDU_ERROR
804 
805 			Set if number of MSDUs in A-MSDU is above a threshold or
806 			if the size of the MSDU is invalid.  This receive buffer
807 			will contain all of the remainder of the MSDUs in this MPDU
808 			without decapsulation.
809 */
810 #define RX_ATTENTION_1_A_MSDU_ERROR_OFFSET                           0x00000004
811 #define RX_ATTENTION_1_A_MSDU_ERROR_LSB                              12
812 #define RX_ATTENTION_1_A_MSDU_ERROR_MASK                             0x00001000
813 
814 /* Description		RX_ATTENTION_1_FRAGMENT_FLAG
815 
816 			Indicates that this is an 802.11 fragment frame.  This
817 			is set when either the more_frag bit is set in the frame
818 			control or the fragment number is not zero.  Only set when
819 			first_msdu is set.
820 */
821 #define RX_ATTENTION_1_FRAGMENT_FLAG_OFFSET                          0x00000004
822 #define RX_ATTENTION_1_FRAGMENT_FLAG_LSB                             13
823 #define RX_ATTENTION_1_FRAGMENT_FLAG_MASK                            0x00002000
824 
825 /* Description		RX_ATTENTION_1_ORDER
826 
827 			Set if the order bit in the frame control is set.  Only
828 			set when first_msdu is set.
829 */
830 #define RX_ATTENTION_1_ORDER_OFFSET                                  0x00000004
831 #define RX_ATTENTION_1_ORDER_LSB                                     14
832 #define RX_ATTENTION_1_ORDER_MASK                                    0x00004000
833 
834 /* Description		RX_ATTENTION_1_CCE_MATCH
835 
836 			Indicates that this status has a corresponding MSDU that
837 			requires FW processing.  The OLE will have classification
838 			ring mask registers which will indicate the ring(s) for
839 			packets and descriptors which need FW attention.
840 */
841 #define RX_ATTENTION_1_CCE_MATCH_OFFSET                              0x00000004
842 #define RX_ATTENTION_1_CCE_MATCH_LSB                                 15
843 #define RX_ATTENTION_1_CCE_MATCH_MASK                                0x00008000
844 
845 /* Description		RX_ATTENTION_1_OVERFLOW_ERR
846 
847 			RXPCU Receive FIFO ran out of space to receive the full
848 			MPDU. Therefor this MPDU is terminated early and is thus
849 			corrupted.
850 
851 
852 
853 			This MPDU will not be ACKed.
854 
855 			RXPCU might still be able to correctly receive the
856 			following MPDUs in the PPDU if enough fifo space became
857 			available in time
858 */
859 #define RX_ATTENTION_1_OVERFLOW_ERR_OFFSET                           0x00000004
860 #define RX_ATTENTION_1_OVERFLOW_ERR_LSB                              16
861 #define RX_ATTENTION_1_OVERFLOW_ERR_MASK                             0x00010000
862 
863 /* Description		RX_ATTENTION_1_MSDU_LENGTH_ERR
864 
865 			Indicates that the MSDU length from the 802.3
866 			encapsulated length field extends beyond the MPDU boundary
867 			or if the length is less than 14 bytes.
868 
869 			Merged with original other_msdu_err: Indicates that the
870 			MSDU threshold was exceeded and thus all the rest of the
871 			MSDUs will not be scattered and will not be decasulated but
872 			will be DMA'ed in RAW format as a single MSDU buffer
873 */
874 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET                        0x00000004
875 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB                           17
876 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK                          0x00020000
877 
878 /* Description		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL
879 
880 			Indicates that the computed checksum (tcp_udp_chksum)
881 			did not match the checksum in the TCP/UDP header.
882 */
883 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET                    0x00000004
884 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB                       18
885 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK                      0x00040000
886 
887 /* Description		RX_ATTENTION_1_IP_CHKSUM_FAIL
888 
889 			Indicates that the computed checksum did not match the
890 			checksum in the IP header.
891 */
892 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET                         0x00000004
893 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB                            19
894 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK                           0x00080000
895 
896 /* Description		RX_ATTENTION_1_SA_IDX_INVALID
897 
898 			Indicates no matching entry was found in the address
899 			search table for the source MAC address.
900 */
901 #define RX_ATTENTION_1_SA_IDX_INVALID_OFFSET                         0x00000004
902 #define RX_ATTENTION_1_SA_IDX_INVALID_LSB                            20
903 #define RX_ATTENTION_1_SA_IDX_INVALID_MASK                           0x00100000
904 
905 /* Description		RX_ATTENTION_1_DA_IDX_INVALID
906 
907 			Indicates no matching entry was found in the address
908 			search table for the destination MAC address.
909 */
910 #define RX_ATTENTION_1_DA_IDX_INVALID_OFFSET                         0x00000004
911 #define RX_ATTENTION_1_DA_IDX_INVALID_LSB                            21
912 #define RX_ATTENTION_1_DA_IDX_INVALID_MASK                           0x00200000
913 
914 /* Description		RX_ATTENTION_1_RESERVED_1B
915 
916 */
917 #define RX_ATTENTION_1_RESERVED_1B_OFFSET                            0x00000004
918 #define RX_ATTENTION_1_RESERVED_1B_LSB                               22
919 #define RX_ATTENTION_1_RESERVED_1B_MASK                              0x00400000
920 
921 /* Description		RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP
922 
923 			Indicates that RX packet is not decrypted as Crypto is
924 			busy with TX packet processing.
925 */
926 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_OFFSET                   0x00000004
927 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_LSB                      23
928 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_MASK                     0x00800000
929 
930 /* Description		RX_ATTENTION_1_ENCRYPT_REQUIRED
931 
932 			Indicates that this data type frame is not encrypted
933 			even if the policy for this MPDU requires encryption as
934 			indicated in the peer entry key type.
935 */
936 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_OFFSET                       0x00000004
937 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_LSB                          24
938 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_MASK                         0x01000000
939 
940 /* Description		RX_ATTENTION_1_DIRECTED
941 
942 			MPDU is a directed packet which means that the RA
943 			matched our STA addresses.  In proxySTA it means that the TA
944 			matched an entry in our address search table with the
945 			corresponding no_ack bit is the address search entry
946 			cleared.
947 */
948 #define RX_ATTENTION_1_DIRECTED_OFFSET                               0x00000004
949 #define RX_ATTENTION_1_DIRECTED_LSB                                  25
950 #define RX_ATTENTION_1_DIRECTED_MASK                                 0x02000000
951 
952 /* Description		RX_ATTENTION_1_BUFFER_FRAGMENT
953 
954 			Indicates that at least one of the rx buffers has been
955 			fragmented.  If set the FW should look at the rx_frag_info
956 			descriptor described below.
957 */
958 #define RX_ATTENTION_1_BUFFER_FRAGMENT_OFFSET                        0x00000004
959 #define RX_ATTENTION_1_BUFFER_FRAGMENT_LSB                           26
960 #define RX_ATTENTION_1_BUFFER_FRAGMENT_MASK                          0x04000000
961 
962 /* Description		RX_ATTENTION_1_MPDU_LENGTH_ERR
963 
964 			Indicates that the MPDU was pre-maturely terminated
965 			resulting in a truncated MPDU.  Don't trust the MPDU length
966 			field.
967 */
968 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_OFFSET                        0x00000004
969 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_LSB                           27
970 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_MASK                          0x08000000
971 
972 /* Description		RX_ATTENTION_1_TKIP_MIC_ERR
973 
974 			Indicates that the MPDU Michael integrity check failed
975 */
976 #define RX_ATTENTION_1_TKIP_MIC_ERR_OFFSET                           0x00000004
977 #define RX_ATTENTION_1_TKIP_MIC_ERR_LSB                              28
978 #define RX_ATTENTION_1_TKIP_MIC_ERR_MASK                             0x10000000
979 
980 /* Description		RX_ATTENTION_1_DECRYPT_ERR
981 
982 			Indicates that the MPDU decrypt integrity check failed
983 			or CRYPTO received an encrypted frame, but did not get a
984 			valid corresponding key id in the peer entry.
985 */
986 #define RX_ATTENTION_1_DECRYPT_ERR_OFFSET                            0x00000004
987 #define RX_ATTENTION_1_DECRYPT_ERR_LSB                               29
988 #define RX_ATTENTION_1_DECRYPT_ERR_MASK                              0x20000000
989 
990 /* Description		RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR
991 
992 			Copied here by RX OLE from the RX_MPDU_END TLV
993 */
994 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_OFFSET                  0x00000004
995 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_LSB                     30
996 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_MASK                    0x40000000
997 
998 /* Description		RX_ATTENTION_1_FCS_ERR
999 
1000 			Indicates that the MPDU FCS check failed
1001 */
1002 #define RX_ATTENTION_1_FCS_ERR_OFFSET                                0x00000004
1003 #define RX_ATTENTION_1_FCS_ERR_LSB                                   31
1004 #define RX_ATTENTION_1_FCS_ERR_MASK                                  0x80000000
1005 
1006 /* Description		RX_ATTENTION_2_FLOW_IDX_TIMEOUT
1007 
1008 			Indicates an unsuccessful flow search due to the
1009 			expiring of the search timer.
1010 
1011 			<legal all>
1012 */
1013 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_OFFSET                       0x00000008
1014 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_LSB                          0
1015 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_MASK                         0x00000001
1016 
1017 /* Description		RX_ATTENTION_2_FLOW_IDX_INVALID
1018 
1019 			flow id is not valid
1020 
1021 			<legal all>
1022 */
1023 #define RX_ATTENTION_2_FLOW_IDX_INVALID_OFFSET                       0x00000008
1024 #define RX_ATTENTION_2_FLOW_IDX_INVALID_LSB                          1
1025 #define RX_ATTENTION_2_FLOW_IDX_INVALID_MASK                         0x00000002
1026 
1027 /* Description		RX_ATTENTION_2_WIFI_PARSER_ERROR
1028 
1029 			Indicates that the WiFi frame has one of the following
1030 			errors
1031 
1032 			o has less than minimum allowed bytes as per standard
1033 
1034 			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
1035 
1036 			<legal all>
1037 */
1038 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_OFFSET                      0x00000008
1039 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_LSB                         2
1040 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_MASK                        0x00000004
1041 
1042 /* Description		RX_ATTENTION_2_AMSDU_PARSER_ERROR
1043 
1044 			A-MSDU could not be properly de-agregated.
1045 
1046 			<legal all>
1047 */
1048 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_OFFSET                     0x00000008
1049 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_LSB                        3
1050 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_MASK                       0x00000008
1051 
1052 /* Description		RX_ATTENTION_2_SA_IDX_TIMEOUT
1053 
1054 			Indicates an unsuccessful MAC source address search due
1055 			to the expiring of the search timer.
1056 */
1057 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_OFFSET                         0x00000008
1058 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_LSB                            4
1059 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_MASK                           0x00000010
1060 
1061 /* Description		RX_ATTENTION_2_DA_IDX_TIMEOUT
1062 
1063 			Indicates an unsuccessful MAC destination address search
1064 			due to the expiring of the search timer.
1065 */
1066 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_OFFSET                         0x00000008
1067 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_LSB                            5
1068 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_MASK                           0x00000020
1069 
1070 /* Description		RX_ATTENTION_2_MSDU_LIMIT_ERROR
1071 
1072 			Indicates that the MSDU threshold was exceeded and thus
1073 			all the rest of the MSDUs will not be scattered and will not
1074 			be decasulated but will be DMA'ed in RAW format as a single
1075 			MSDU buffer
1076 */
1077 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_OFFSET                       0x00000008
1078 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_LSB                          6
1079 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_MASK                         0x00000040
1080 
1081 /* Description		RX_ATTENTION_2_DA_IS_VALID
1082 
1083 			Indicates that OLE found a valid DA entry
1084 */
1085 #define RX_ATTENTION_2_DA_IS_VALID_OFFSET                            0x00000008
1086 #define RX_ATTENTION_2_DA_IS_VALID_LSB                               7
1087 #define RX_ATTENTION_2_DA_IS_VALID_MASK                              0x00000080
1088 
1089 /* Description		RX_ATTENTION_2_DA_IS_MCBC
1090 
1091 			Field Only valid if da_is_valid is set
1092 
1093 
1094 
1095 			Indicates the DA address was a Multicast of Broadcast
1096 			address.
1097 */
1098 #define RX_ATTENTION_2_DA_IS_MCBC_OFFSET                             0x00000008
1099 #define RX_ATTENTION_2_DA_IS_MCBC_LSB                                8
1100 #define RX_ATTENTION_2_DA_IS_MCBC_MASK                               0x00000100
1101 
1102 /* Description		RX_ATTENTION_2_SA_IS_VALID
1103 
1104 			Indicates that OLE found a valid SA entry
1105 */
1106 #define RX_ATTENTION_2_SA_IS_VALID_OFFSET                            0x00000008
1107 #define RX_ATTENTION_2_SA_IS_VALID_LSB                               9
1108 #define RX_ATTENTION_2_SA_IS_VALID_MASK                              0x00000200
1109 
1110 /* Description		RX_ATTENTION_2_DECRYPT_STATUS_CODE
1111 
1112 			Field provides insight into the decryption performed
1113 
1114 
1115 
1116 			<enum 0 decrypt_ok> Frame had protection enabled and
1117 			decrypted properly
1118 
1119 			<enum 1 decrypt_unprotected_frame > Frame is unprotected
1120 			and hence bypassed
1121 
1122 			<enum 2 decrypt_data_err > Frame has protection enabled
1123 			and could not be properly decrypted due to MIC/ICV mismatch
1124 			etc.
1125 
1126 			<enum 3 decrypt_key_invalid > Frame has protection
1127 			enabled but the key that was required to decrypt this frame
1128 			was not valid
1129 
1130 			<enum 4 decrypt_peer_entry_invalid > Frame has
1131 			protection enabled but the key that was required to decrypt
1132 			this frame was not valid
1133 
1134 			<enum 5 decrypt_other > Reserved for other indications
1135 
1136 
1137 
1138 			<legal 0 - 5>
1139 */
1140 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET                    0x00000008
1141 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB                       10
1142 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK                      0x00001c00
1143 
1144 /* Description		RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED
1145 
1146 			Frame is received, but RXPCU could not update the
1147 			receive bitmap due to (temporary) fifo contraints.
1148 
1149 			<legal all>
1150 */
1151 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_OFFSET                  0x00000008
1152 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_LSB                     13
1153 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_MASK                    0x00002000
1154 
1155 /* Description		RX_ATTENTION_2_RESERVED_2
1156 
1157 			<legal 0>
1158 */
1159 #define RX_ATTENTION_2_RESERVED_2_OFFSET                             0x00000008
1160 #define RX_ATTENTION_2_RESERVED_2_LSB                                14
1161 #define RX_ATTENTION_2_RESERVED_2_MASK                               0x7fffc000
1162 
1163 /* Description		RX_ATTENTION_2_MSDU_DONE
1164 
1165 			If set indicates that the RX packet data, RX header
1166 			data, RX PPDU start descriptor, RX MPDU start/end
1167 			descriptor, RX MSDU start/end descriptors and RX Attention
1168 			descriptor are all valid.  This bit must be in the last
1169 			octet of the descriptor.
1170 */
1171 #define RX_ATTENTION_2_MSDU_DONE_OFFSET                              0x00000008
1172 #define RX_ATTENTION_2_MSDU_DONE_LSB                                 31
1173 #define RX_ATTENTION_2_MSDU_DONE_MASK                                0x80000000
1174 
1175 
1176 #endif // _RX_ATTENTION_H_
1177