1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _RX_PPDU_END_USER_STATS_H_ 20 #define _RX_PPDU_END_USER_STATS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "rx_rxpcu_classification_overview.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 30 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], ofdma_info_valid[20], dl_ofdma_ru_start_index[27:21], reserved_1a[31:28] 31 // 2 dl_ofdma_ru_width[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 32 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], ht_control_info_null_valid[13], reserved_3a[15:14], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 33 // 4 ast_index[15:0], frame_control_field[31:16] 34 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 35 // 6 ht_control_field[31:0] 36 // 7 fcs_ok_bitmap_31_0[31:0] 37 // 8 fcs_ok_bitmap_63_32[31:0] 38 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 39 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 40 // 11 sw_response_reference_ptr[31:0] 41 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 42 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 43 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 44 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 45 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 46 // 17 mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25] 47 // 18 ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25] 48 // 19 mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25] 49 // 20 non_consecutive_delimiter_err[15:0], reserved_20a[31:16] 50 // 21 ht_control_null_field[31:0] 51 // 22 sw_response_reference_ptr_ext[31:0] 52 // 53 // ################ END SUMMARY ################# 54 55 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 23 56 57 struct rx_ppdu_end_user_stats { 58 struct rx_rxpcu_classification_overview rxpcu_classification_details; 59 uint32_t sta_full_aid : 13, //[12:0] 60 mcs : 4, //[16:13] 61 nss : 3, //[19:17] 62 ofdma_info_valid : 1, //[20] 63 dl_ofdma_ru_start_index : 7, //[27:21] 64 reserved_1a : 4; //[31:28] 65 uint32_t dl_ofdma_ru_width : 7, //[6:0] 66 reserved_2a : 1, //[7] 67 user_receive_quality : 8, //[15:8] 68 mpdu_cnt_fcs_err : 10, //[25:16] 69 wbm2rxdma_buf_source_used : 1, //[26] 70 fw2rxdma_buf_source_used : 1, //[27] 71 sw2rxdma_buf_source_used : 1, //[28] 72 reserved_2b : 3; //[31:29] 73 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 74 frame_control_info_valid : 1, //[9] 75 qos_control_info_valid : 1, //[10] 76 ht_control_info_valid : 1, //[11] 77 data_sequence_control_info_valid: 1, //[12] 78 ht_control_info_null_valid : 1, //[13] 79 reserved_3a : 2, //[15:14] 80 rxdma2reo_ring_used : 1, //[16] 81 rxdma2fw_ring_used : 1, //[17] 82 rxdma2sw_ring_used : 1, //[18] 83 rxdma_release_ring_used : 1, //[19] 84 ht_control_field_pkt_type : 4, //[23:20] 85 reserved_3b : 8; //[31:24] 86 uint32_t ast_index : 16, //[15:0] 87 frame_control_field : 16; //[31:16] 88 uint32_t first_data_seq_ctrl : 16, //[15:0] 89 qos_control_field : 16; //[31:16] 90 uint32_t ht_control_field : 32; //[31:0] 91 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 92 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 93 uint32_t udp_msdu_count : 16, //[15:0] 94 tcp_msdu_count : 16; //[31:16] 95 uint32_t other_msdu_count : 16, //[15:0] 96 tcp_ack_msdu_count : 16; //[31:16] 97 uint32_t sw_response_reference_ptr : 32; //[31:0] 98 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 99 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 100 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 101 qosctrl_15_8_tid1 : 8, //[15:8] 102 qosctrl_15_8_tid2 : 8, //[23:16] 103 qosctrl_15_8_tid3 : 8; //[31:24] 104 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 105 qosctrl_15_8_tid5 : 8, //[15:8] 106 qosctrl_15_8_tid6 : 8, //[23:16] 107 qosctrl_15_8_tid7 : 8; //[31:24] 108 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 109 qosctrl_15_8_tid9 : 8, //[15:8] 110 qosctrl_15_8_tid10 : 8, //[23:16] 111 qosctrl_15_8_tid11 : 8; //[31:24] 112 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 113 qosctrl_15_8_tid13 : 8, //[15:8] 114 qosctrl_15_8_tid14 : 8, //[23:16] 115 qosctrl_15_8_tid15 : 8; //[31:24] 116 uint32_t mpdu_ok_byte_count : 25, //[24:0] 117 ampdu_delim_ok_count_6_0 : 7; //[31:25] 118 uint32_t ampdu_delim_err_count : 25, //[24:0] 119 ampdu_delim_ok_count_13_7 : 7; //[31:25] 120 uint32_t mpdu_err_byte_count : 25, //[24:0] 121 ampdu_delim_ok_count_20_14 : 7; //[31:25] 122 uint32_t non_consecutive_delimiter_err : 16, //[15:0] 123 reserved_20a : 16; //[31:16] 124 uint32_t ht_control_null_field : 32; //[31:0] 125 uint32_t sw_response_reference_ptr_ext : 32; //[31:0] 126 }; 127 128 /* 129 130 struct rx_rxpcu_classification_overview rxpcu_classification_details 131 132 Details related to what RXPCU classification types of 133 MPDUs have been received 134 135 sta_full_aid 136 137 Consumer: FW 138 139 Producer: RXPCU 140 141 142 143 The full AID of this station. 144 145 146 147 <legal all> 148 149 mcs 150 151 MCS of the received frame 152 153 154 155 For details, refer to MCS_TYPE description 156 157 Note: This is rate in case of 11a/11b 158 159 160 161 <legal all> 162 163 nss 164 165 Number of spatial streams. 166 167 168 169 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 170 171 172 173 <enum 0 1_spatial_stream>Single spatial stream 174 175 <enum 1 2_spatial_streams>2 spatial streams 176 177 <enum 2 3_spatial_streams>3 spatial streams 178 179 <enum 3 4_spatial_streams>4 spatial streams 180 181 <enum 4 5_spatial_streams>5 spatial streams 182 183 <enum 5 6_spatial_streams>6 spatial streams 184 185 <enum 6 7_spatial_streams>7 spatial streams 186 187 <enum 7 8_spatial_streams>8 spatial streams 188 189 ofdma_info_valid 190 191 When set, ofdma RU related info in the following fields 192 is valid 193 194 <legal all> 195 196 dl_ofdma_ru_start_index 197 198 Field only valid when Ofdma_info_valid is set 199 200 201 202 RU index number to which User is assigned 203 204 RU numbering is over the entire BW, starting from 0 205 206 <legal 0-73> 207 208 reserved_1a 209 210 <legal 0> 211 212 dl_ofdma_ru_width 213 214 The size of the RU for this user. 215 216 In units of 1 (26 tone) RU 217 218 <legal 1-74> 219 220 reserved_2a 221 222 <legal 0> 223 224 user_receive_quality 225 226 RSSI / EVM for this user ??? 227 228 229 230 Details TBD 231 232 <legal all> 233 234 mpdu_cnt_fcs_err 235 236 The number of MPDUs received from this STA in this PPDU 237 with FCS errors 238 239 <legal all> 240 241 wbm2rxdma_buf_source_used 242 243 Field filled in by RXDMA 244 245 246 247 When set, RXDMA has used the wbm2rxdma_buf ring as 248 source for at least one of the frames in this PPDU. 249 250 fw2rxdma_buf_source_used 251 252 Field filled in by RXDMA 253 254 255 256 When set, RXDMA has used the fw2rxdma_buf ring as source 257 for at least one of the frames in this PPDU. 258 259 sw2rxdma_buf_source_used 260 261 Field filled in by RXDMA 262 263 264 265 When set, RXDMA has used the sw2rxdma_buf ring as source 266 for at least one of the frames in this PPDU. 267 268 reserved_2b 269 270 <legal 0> 271 272 mpdu_cnt_fcs_ok 273 274 The number of MPDUs received from this STA in this PPDU 275 with correct FCS 276 277 <legal all> 278 279 frame_control_info_valid 280 281 When set, the frame_control_info field contains valid 282 information 283 284 <legal all> 285 286 qos_control_info_valid 287 288 When set, the QoS_control_info field contains valid 289 information 290 291 <legal all> 292 293 ht_control_info_valid 294 295 When set, the HT_control_field contains valid 296 information 297 298 <legal all> 299 300 data_sequence_control_info_valid 301 302 When set, the First_data_seq_ctrl field contains valid 303 information 304 305 <legal all> 306 307 ht_control_info_null_valid 308 309 When set, the HT_control_NULL_field contains valid 310 information 311 312 <legal all> 313 314 reserved_3a 315 316 <legal 0> 317 318 rxdma2reo_ring_used 319 320 Field filled in by RXDMA 321 322 323 324 Set when at least one frame during this PPDU got pushed 325 to this ring by RXDMA 326 327 rxdma2fw_ring_used 328 329 Field filled in by RXDMA 330 331 332 333 Set when at least one frame during this PPDU got pushed 334 to this ring by RXDMA 335 336 rxdma2sw_ring_used 337 338 Field filled in by RXDMA 339 340 341 342 Set when at least one frame during this PPDU got pushed 343 to this ring by RXDMA 344 345 rxdma_release_ring_used 346 347 Field filled in by RXDMA 348 349 350 351 Set when at least one frame during this PPDU got pushed 352 to this ring by RXDMA 353 354 ht_control_field_pkt_type 355 356 Field only valid when HT_control_info_valid or 357 HT_control_info_NULL_valid is set. 358 359 360 361 Indicates what the PHY receive type was for receiving 362 this frame. Can help determine if the HT_CONTROL field shall 363 be interpreted as HT/VHT or HE. 364 365 366 367 NOTE: later on in the 11ax IEEE spec a bit within the HT 368 control field was introduced that explicitly indicated how 369 to interpret the HT control field.... As HT, VHT, or HE. 370 371 372 373 <enum 0 dot11a>802.11a PPDU type 374 375 <enum 1 dot11b>802.11b PPDU type 376 377 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 378 379 <enum 3 dot11ac>802.11ac PPDU type 380 381 <enum 4 dot11ax>802.11ax PPDU type 382 383 reserved_3b 384 385 <legal 0> 386 387 ast_index 388 389 This field indicates the index of the AST entry 390 corresponding to this MPDU. It is provided by the GSE module 391 instantiated in RXPCU. 392 393 A value of 0xFFFF indicates an invalid AST index, 394 meaning that No AST entry was found or NO AST search was 395 performed 396 397 <legal all> 398 399 frame_control_field 400 401 Field only valid when Frame_control_info_valid is set. 402 403 404 405 Last successfully received Frame_control field of data 406 frame (excluding Data NULL/ QoS Null) for this user 407 408 Mainly used to track the PM state of the transmitted 409 device 410 411 412 413 NOTE: only data frame info is needed, as control and 414 management frames are already routed to the FW. 415 416 <legal all> 417 418 first_data_seq_ctrl 419 420 Field only valid when Data_sequence_control_info_valid 421 is set. 422 423 424 425 Sequence control field of the first data frame 426 (excluding Data NULL or QoS Data null) received for this 427 user with correct FCS 428 429 430 431 NOTE: only data frame info is needed, as control and 432 management frames are already routed to the FW. 433 434 <legal all> 435 436 qos_control_field 437 438 Field only valid when QoS_control_info_valid is set. 439 440 441 442 Last successfully received QoS_control field of data 443 frame (excluding Data NULL/ QoS Null) for this user 444 445 446 447 Note that in case of multi TID, this field can only 448 reflect the last properly received MPDU, and thus can not 449 indicate all potentially different TIDs that had been 450 received earlier. 451 452 453 454 There are however per TID fields, that will contain 455 among other things all buffer status info: See 456 457 QoSCtrl_15_8_tid??? 458 459 <legal all> 460 461 ht_control_field 462 463 Field only valid when HT_control_info_valid is set. 464 465 466 467 Last successfully received 468 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 469 excluding QoS Null frames for this user. 470 471 472 473 NOTE: HT control fields from QoS Null frames are 474 captured in field HT_control_NULL_field 475 476 <legal all> 477 478 fcs_ok_bitmap_31_0 479 480 Bitmap indicates in order of received MPDUs, which MPDUs 481 had an passing FCS or had an error. 482 483 1: FCS OK 484 485 0: FCS error 486 487 <legal all> 488 489 fcs_ok_bitmap_63_32 490 491 Bitmap indicates in order of received MPDUs, which MPDUs 492 had an passing FCS or had an error. 493 494 1: FCS OK 495 496 0: FCS error 497 498 499 500 NOTE: for users 0, 1, 2 and 3, additional bitmap info 501 (up to 256 bitmap window) is provided in 502 RX_PPDU_END_USER_STATS_EXT TLV 503 504 <legal all> 505 506 udp_msdu_count 507 508 Field filled in by RX OLE 509 510 Set to 0 by RXPCU 511 512 513 514 The number of MSDUs that are part of MPDUs without FCS 515 error, that contain UDP frames. 516 517 <legal all> 518 519 tcp_msdu_count 520 521 Field filled in by RX OLE 522 523 Set to 0 by RXPCU 524 525 526 527 The number of MSDUs that are part of MPDUs without FCS 528 error, that contain TCP frames. 529 530 531 532 (Note: This does NOT include TCP-ACK) 533 534 <legal all> 535 536 other_msdu_count 537 538 Field filled in by RX OLE 539 540 Set to 0 by RXPCU 541 542 543 544 The number of MSDUs that are part of MPDUs without FCS 545 error, that contain neither UDP or TCP frames. 546 547 548 549 Includes Management and control frames. 550 551 552 553 <legal all> 554 555 tcp_ack_msdu_count 556 557 Field filled in by RX OLE 558 559 Set to 0 by RXPCU 560 561 562 563 The number of MSDUs that are part of MPDUs without FCS 564 error, that contain TCP ack frames. 565 566 <legal all> 567 568 sw_response_reference_ptr 569 570 Pointer that SW uses to refer back to an expected 571 response reception. Used for Rate adaptation purposes. 572 573 When a reception occurs that is not tied to an expected 574 response, this field is set to 0x0. 575 576 577 578 Note: further on in this TLV there is also the field: 579 Sw_response_reference_ptr_ext. 580 581 <legal all> 582 583 received_qos_data_tid_bitmap 584 585 Whenever a frame is received that contains a QoS control 586 field (that includes QoS Data and/or QoS Null), the bit in 587 this field that corresponds to the received TID shall be 588 set. 589 590 ...Bitmap[0] = TID0 591 592 ...Bitmap[1] = TID1 593 594 Etc. 595 596 <legal all> 597 598 received_qos_data_tid_eosp_bitmap 599 600 Field initialized to 0 601 602 For every QoS Data frame that is correctly received, the 603 EOSP bit of that frame is copied over into the corresponding 604 TID related field. 605 606 Note that this implies that the bits here represent the 607 EOSP bit status for each TID of the last MPDU received for 608 that TID. 609 610 611 612 received TID shall be set. 613 614 ...eosp_bitmap[0] = eosp of TID0 615 616 ...eosp_bitmap[1] = eosp of TID1 617 618 Etc. 619 620 <legal all> 621 622 qosctrl_15_8_tid0 623 624 Field only valid when Received_qos_data_tid_bitmap[0] is 625 set 626 627 628 629 QoS control field bits 15-8 of the last properly 630 received MPDU with a QoS control field embedded, with TID 631 == 0 632 633 qosctrl_15_8_tid1 634 635 Field only valid when Received_qos_data_tid_bitmap[1] is 636 set 637 638 639 640 QoS control field bits 15-8 of the last properly 641 received MPDU with a QoS control field embedded, with TID 642 == 1 643 644 qosctrl_15_8_tid2 645 646 Field only valid when Received_qos_data_tid_bitmap[2] is 647 set 648 649 650 651 QoS control field bits 15-8 of the last properly 652 received MPDU with a QoS control field embedded, with TID 653 == 2 654 655 qosctrl_15_8_tid3 656 657 Field only valid when Received_qos_data_tid_bitmap[3] is 658 set 659 660 661 662 QoS control field bits 15-8 of the last properly 663 received MPDU with a QoS control field embedded, with TID 664 == 3 665 666 qosctrl_15_8_tid4 667 668 Field only valid when Received_qos_data_tid_bitmap[4] is 669 set 670 671 672 673 QoS control field bits 15-8 of the last properly 674 received MPDU with a QoS control field embedded, with TID 675 == 4 676 677 qosctrl_15_8_tid5 678 679 Field only valid when Received_qos_data_tid_bitmap[5] is 680 set 681 682 683 684 QoS control field bits 15-8 of the last properly 685 received MPDU with a QoS control field embedded, with TID 686 == 5 687 688 qosctrl_15_8_tid6 689 690 Field only valid when Received_qos_data_tid_bitmap[6] is 691 set 692 693 694 695 QoS control field bits 15-8 of the last properly 696 received MPDU with a QoS control field embedded, with TID 697 == 6 698 699 qosctrl_15_8_tid7 700 701 Field only valid when Received_qos_data_tid_bitmap[7] is 702 set 703 704 705 706 QoS control field bits 15-8 of the last properly 707 received MPDU with a QoS control field embedded, with TID 708 == 7 709 710 qosctrl_15_8_tid8 711 712 Field only valid when Received_qos_data_tid_bitmap[8] is 713 set 714 715 716 717 QoS control field bits 15-8 of the last properly 718 received MPDU with a QoS control field embedded, with TID 719 == 8 720 721 qosctrl_15_8_tid9 722 723 Field only valid when Received_qos_data_tid_bitmap[9] is 724 set 725 726 727 728 QoS control field bits 15-8 of the last properly 729 received MPDU with a QoS control field embedded, with TID 730 == 9 731 732 qosctrl_15_8_tid10 733 734 Field only valid when Received_qos_data_tid_bitmap[10] 735 is set 736 737 738 739 QoS control field bits 15-8 of the last properly 740 received MPDU with a QoS control field embedded, with TID 741 == 10 742 743 qosctrl_15_8_tid11 744 745 Field only valid when Received_qos_data_tid_bitmap[11] 746 is set 747 748 749 750 QoS control field bits 15-8 of the last properly 751 received MPDU with a QoS control field embedded, with TID 752 == 11 753 754 qosctrl_15_8_tid12 755 756 Field only valid when Received_qos_data_tid_bitmap[12] 757 is set 758 759 760 761 QoS control field bits 15-8 of the last properly 762 received MPDU with a QoS control field embedded, with TID 763 == 12 764 765 qosctrl_15_8_tid13 766 767 Field only valid when Received_qos_data_tid_bitmap[13] 768 is set 769 770 771 772 QoS control field bits 15-8 of the last properly 773 received MPDU with a QoS control field embedded, with TID 774 == 13 775 776 qosctrl_15_8_tid14 777 778 Field only valid when Received_qos_data_tid_bitmap[14] 779 is set 780 781 782 783 QoS control field bits 15-8 of the last properly 784 received MPDU with a QoS control field embedded, with TID 785 == 14 786 787 qosctrl_15_8_tid15 788 789 Field only valid when Received_qos_data_tid_bitmap[15] 790 is set 791 792 793 794 QoS control field bits 15-8 of the last properly 795 received MPDU with a QoS control field embedded, with TID 796 == 15 797 798 mpdu_ok_byte_count 799 800 The number of bytes received within an MPDU for this 801 user with correct FCS. This includes the FCS field 802 803 804 805 NOTE: 806 807 The sum of the four fields..... 808 809 Mpdu_ok_byte_count + 810 811 mpdu_err_byte_count + 812 813 814 .....is the total number of bytes that were received for 815 this user from the PHY. 816 817 818 819 <legal all> 820 821 ampdu_delim_ok_count_6_0 822 823 Number of AMPDU delimiter received with correct 824 structure 825 826 LSB 7 bits from this counter 827 828 829 830 Note that this is a delimiter count and not byte count. 831 To get to the number of bytes occupied by these delimiters, 832 multiply this number by 4 833 834 835 836 <legal all> 837 838 ampdu_delim_err_count 839 840 The number of MPDU delimiter errors counted for this 841 user. 842 843 844 845 Note that this is a delimiter count and not byte count. 846 To get to the number of bytes occupied by these delimiters, 847 multiply this number by 4 848 849 <legal all> 850 851 ampdu_delim_ok_count_13_7 852 853 Number of AMPDU delimiters received with correct 854 structure 855 856 Bits 13-7 from this counter 857 858 859 860 Note that this is a delimiter count and not byte count. 861 To get to the number of bytes occupied by these delimiters, 862 multiply this number by 4 863 864 <legal all> 865 866 mpdu_err_byte_count 867 868 The number of bytes belonging to MPDUs with an FCS 869 error. This includes the FCS field. 870 871 872 873 <legal all> 874 875 ampdu_delim_ok_count_20_14 876 877 Number of AMPDU delimiters received with correct 878 structure 879 880 Bits 20-14 from this counter 881 882 883 884 Note that this is a delimiter count and not byte count. 885 To get to the number of bytes occupied by these delimiters, 886 multiply this number by 4 887 888 889 890 <legal all> 891 892 non_consecutive_delimiter_err 893 894 The number of times an MPDU delimiter error is detected 895 that is not immediately preceded by another MPDU delimiter 896 also with FCS error. 897 898 899 900 The counter saturates at 0xFFFF 901 902 903 904 <legal all> 905 906 reserved_20a 907 908 <legal 0> 909 910 ht_control_null_field 911 912 913 914 915 Last successfully received 916 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 917 for this user. 918 919 <legal all> 920 921 sw_response_reference_ptr_ext 922 923 Extended Pointer info that SW uses to refer back to an 924 expected response transmission. Used for Rate adaptation 925 purposes. 926 927 When a reception occurs that is not tied to an expected 928 response, this field is set to 0x0. 929 930 931 932 Note: earlier on in this TLV there is also the field: 933 Sw_response_reference_ptr. 934 935 <legal all> 936 */ 937 938 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000 939 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 0 940 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff 941 942 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 943 944 Consumer: FW 945 946 Producer: RXPCU 947 948 949 950 The full AID of this station. 951 952 953 954 <legal all> 955 */ 956 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 957 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 958 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 959 960 /* Description RX_PPDU_END_USER_STATS_1_MCS 961 962 MCS of the received frame 963 964 965 966 For details, refer to MCS_TYPE description 967 968 Note: This is rate in case of 11a/11b 969 970 971 972 <legal all> 973 */ 974 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 975 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 976 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 977 978 /* Description RX_PPDU_END_USER_STATS_1_NSS 979 980 Number of spatial streams. 981 982 983 984 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 985 986 987 988 <enum 0 1_spatial_stream>Single spatial stream 989 990 <enum 1 2_spatial_streams>2 spatial streams 991 992 <enum 2 3_spatial_streams>3 spatial streams 993 994 <enum 3 4_spatial_streams>4 spatial streams 995 996 <enum 4 5_spatial_streams>5 spatial streams 997 998 <enum 5 6_spatial_streams>6 spatial streams 999 1000 <enum 6 7_spatial_streams>7 spatial streams 1001 1002 <enum 7 8_spatial_streams>8 spatial streams 1003 */ 1004 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 1005 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 1006 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 1007 1008 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID 1009 1010 When set, ofdma RU related info in the following fields 1011 is valid 1012 1013 <legal all> 1014 */ 1015 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_OFFSET 0x00000004 1016 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_LSB 20 1017 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_MASK 0x00100000 1018 1019 /* Description RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX 1020 1021 Field only valid when Ofdma_info_valid is set 1022 1023 1024 1025 RU index number to which User is assigned 1026 1027 RU numbering is over the entire BW, starting from 0 1028 1029 <legal 0-73> 1030 */ 1031 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_OFFSET 0x00000004 1032 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_LSB 21 1033 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_MASK 0x0fe00000 1034 1035 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 1036 1037 <legal 0> 1038 */ 1039 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 1040 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 1041 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 1042 1043 /* Description RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH 1044 1045 The size of the RU for this user. 1046 1047 In units of 1 (26 tone) RU 1048 1049 <legal 1-74> 1050 */ 1051 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_OFFSET 0x00000008 1052 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_LSB 0 1053 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_MASK 0x0000007f 1054 1055 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 1056 1057 <legal 0> 1058 */ 1059 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 1060 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 1061 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 1062 1063 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 1064 1065 RSSI / EVM for this user ??? 1066 1067 1068 1069 Details TBD 1070 1071 <legal all> 1072 */ 1073 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 1074 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 1075 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 1076 1077 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 1078 1079 The number of MPDUs received from this STA in this PPDU 1080 with FCS errors 1081 1082 <legal all> 1083 */ 1084 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 1085 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 1086 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 1087 1088 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 1089 1090 Field filled in by RXDMA 1091 1092 1093 1094 When set, RXDMA has used the wbm2rxdma_buf ring as 1095 source for at least one of the frames in this PPDU. 1096 */ 1097 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1098 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 1099 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 1100 1101 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 1102 1103 Field filled in by RXDMA 1104 1105 1106 1107 When set, RXDMA has used the fw2rxdma_buf ring as source 1108 for at least one of the frames in this PPDU. 1109 */ 1110 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1111 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 1112 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 1113 1114 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 1115 1116 Field filled in by RXDMA 1117 1118 1119 1120 When set, RXDMA has used the sw2rxdma_buf ring as source 1121 for at least one of the frames in this PPDU. 1122 */ 1123 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1124 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 1125 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 1126 1127 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 1128 1129 <legal 0> 1130 */ 1131 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 1132 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 1133 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 1134 1135 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 1136 1137 The number of MPDUs received from this STA in this PPDU 1138 with correct FCS 1139 1140 <legal all> 1141 */ 1142 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 1143 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 1144 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 1145 1146 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 1147 1148 When set, the frame_control_info field contains valid 1149 information 1150 1151 <legal all> 1152 */ 1153 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 1154 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 1155 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 1156 1157 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 1158 1159 When set, the QoS_control_info field contains valid 1160 information 1161 1162 <legal all> 1163 */ 1164 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 1165 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 1166 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 1167 1168 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 1169 1170 When set, the HT_control_field contains valid 1171 information 1172 1173 <legal all> 1174 */ 1175 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 1176 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 1177 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 1178 1179 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 1180 1181 When set, the First_data_seq_ctrl field contains valid 1182 information 1183 1184 <legal all> 1185 */ 1186 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 1187 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 1188 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 1189 1190 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID 1191 1192 When set, the HT_control_NULL_field contains valid 1193 information 1194 1195 <legal all> 1196 */ 1197 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_OFFSET 0x0000000c 1198 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_LSB 13 1199 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_MASK 0x00002000 1200 1201 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 1202 1203 <legal 0> 1204 */ 1205 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 1206 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 14 1207 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000c000 1208 1209 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 1210 1211 Field filled in by RXDMA 1212 1213 1214 1215 Set when at least one frame during this PPDU got pushed 1216 to this ring by RXDMA 1217 */ 1218 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 1219 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 1220 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 1221 1222 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 1223 1224 Field filled in by RXDMA 1225 1226 1227 1228 Set when at least one frame during this PPDU got pushed 1229 to this ring by RXDMA 1230 */ 1231 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1232 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1233 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1234 1235 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1236 1237 Field filled in by RXDMA 1238 1239 1240 1241 Set when at least one frame during this PPDU got pushed 1242 to this ring by RXDMA 1243 */ 1244 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1245 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1246 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1247 1248 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1249 1250 Field filled in by RXDMA 1251 1252 1253 1254 Set when at least one frame during this PPDU got pushed 1255 to this ring by RXDMA 1256 */ 1257 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1258 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1259 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1260 1261 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1262 1263 Field only valid when HT_control_info_valid or 1264 HT_control_info_NULL_valid is set. 1265 1266 1267 1268 Indicates what the PHY receive type was for receiving 1269 this frame. Can help determine if the HT_CONTROL field shall 1270 be interpreted as HT/VHT or HE. 1271 1272 1273 1274 NOTE: later on in the 11ax IEEE spec a bit within the HT 1275 control field was introduced that explicitly indicated how 1276 to interpret the HT control field.... As HT, VHT, or HE. 1277 1278 1279 1280 <enum 0 dot11a>802.11a PPDU type 1281 1282 <enum 1 dot11b>802.11b PPDU type 1283 1284 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1285 1286 <enum 3 dot11ac>802.11ac PPDU type 1287 1288 <enum 4 dot11ax>802.11ax PPDU type 1289 */ 1290 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1291 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1292 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1293 1294 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1295 1296 <legal 0> 1297 */ 1298 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1299 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1300 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1301 1302 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1303 1304 This field indicates the index of the AST entry 1305 corresponding to this MPDU. It is provided by the GSE module 1306 instantiated in RXPCU. 1307 1308 A value of 0xFFFF indicates an invalid AST index, 1309 meaning that No AST entry was found or NO AST search was 1310 performed 1311 1312 <legal all> 1313 */ 1314 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1315 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1316 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1317 1318 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1319 1320 Field only valid when Frame_control_info_valid is set. 1321 1322 1323 1324 Last successfully received Frame_control field of data 1325 frame (excluding Data NULL/ QoS Null) for this user 1326 1327 Mainly used to track the PM state of the transmitted 1328 device 1329 1330 1331 1332 NOTE: only data frame info is needed, as control and 1333 management frames are already routed to the FW. 1334 1335 <legal all> 1336 */ 1337 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1338 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1339 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1340 1341 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1342 1343 Field only valid when Data_sequence_control_info_valid 1344 is set. 1345 1346 1347 1348 Sequence control field of the first data frame 1349 (excluding Data NULL or QoS Data null) received for this 1350 user with correct FCS 1351 1352 1353 1354 NOTE: only data frame info is needed, as control and 1355 management frames are already routed to the FW. 1356 1357 <legal all> 1358 */ 1359 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1360 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1361 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1362 1363 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1364 1365 Field only valid when QoS_control_info_valid is set. 1366 1367 1368 1369 Last successfully received QoS_control field of data 1370 frame (excluding Data NULL/ QoS Null) for this user 1371 1372 1373 1374 Note that in case of multi TID, this field can only 1375 reflect the last properly received MPDU, and thus can not 1376 indicate all potentially different TIDs that had been 1377 received earlier. 1378 1379 1380 1381 There are however per TID fields, that will contain 1382 among other things all buffer status info: See 1383 1384 QoSCtrl_15_8_tid??? 1385 1386 <legal all> 1387 */ 1388 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1389 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1390 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1391 1392 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1393 1394 Field only valid when HT_control_info_valid is set. 1395 1396 1397 1398 Last successfully received 1399 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1400 excluding QoS Null frames for this user. 1401 1402 1403 1404 NOTE: HT control fields from QoS Null frames are 1405 captured in field HT_control_NULL_field 1406 1407 <legal all> 1408 */ 1409 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1410 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1411 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1412 1413 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1414 1415 Bitmap indicates in order of received MPDUs, which MPDUs 1416 had an passing FCS or had an error. 1417 1418 1: FCS OK 1419 1420 0: FCS error 1421 1422 <legal all> 1423 */ 1424 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1425 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1426 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1427 1428 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1429 1430 Bitmap indicates in order of received MPDUs, which MPDUs 1431 had an passing FCS or had an error. 1432 1433 1: FCS OK 1434 1435 0: FCS error 1436 1437 1438 1439 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1440 (up to 256 bitmap window) is provided in 1441 RX_PPDU_END_USER_STATS_EXT TLV 1442 1443 <legal all> 1444 */ 1445 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1446 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1447 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1448 1449 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1450 1451 Field filled in by RX OLE 1452 1453 Set to 0 by RXPCU 1454 1455 1456 1457 The number of MSDUs that are part of MPDUs without FCS 1458 error, that contain UDP frames. 1459 1460 <legal all> 1461 */ 1462 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1463 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1464 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1465 1466 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1467 1468 Field filled in by RX OLE 1469 1470 Set to 0 by RXPCU 1471 1472 1473 1474 The number of MSDUs that are part of MPDUs without FCS 1475 error, that contain TCP frames. 1476 1477 1478 1479 (Note: This does NOT include TCP-ACK) 1480 1481 <legal all> 1482 */ 1483 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1484 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1485 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1486 1487 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1488 1489 Field filled in by RX OLE 1490 1491 Set to 0 by RXPCU 1492 1493 1494 1495 The number of MSDUs that are part of MPDUs without FCS 1496 error, that contain neither UDP or TCP frames. 1497 1498 1499 1500 Includes Management and control frames. 1501 1502 1503 1504 <legal all> 1505 */ 1506 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1507 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1508 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1509 1510 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1511 1512 Field filled in by RX OLE 1513 1514 Set to 0 by RXPCU 1515 1516 1517 1518 The number of MSDUs that are part of MPDUs without FCS 1519 error, that contain TCP ack frames. 1520 1521 <legal all> 1522 */ 1523 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1524 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1525 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1526 1527 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1528 1529 Pointer that SW uses to refer back to an expected 1530 response reception. Used for Rate adaptation purposes. 1531 1532 When a reception occurs that is not tied to an expected 1533 response, this field is set to 0x0. 1534 1535 1536 1537 Note: further on in this TLV there is also the field: 1538 Sw_response_reference_ptr_ext. 1539 1540 <legal all> 1541 */ 1542 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1543 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1544 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1545 1546 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1547 1548 Whenever a frame is received that contains a QoS control 1549 field (that includes QoS Data and/or QoS Null), the bit in 1550 this field that corresponds to the received TID shall be 1551 set. 1552 1553 ...Bitmap[0] = TID0 1554 1555 ...Bitmap[1] = TID1 1556 1557 Etc. 1558 1559 <legal all> 1560 */ 1561 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1562 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1563 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1564 1565 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1566 1567 Field initialized to 0 1568 1569 For every QoS Data frame that is correctly received, the 1570 EOSP bit of that frame is copied over into the corresponding 1571 TID related field. 1572 1573 Note that this implies that the bits here represent the 1574 EOSP bit status for each TID of the last MPDU received for 1575 that TID. 1576 1577 1578 1579 received TID shall be set. 1580 1581 ...eosp_bitmap[0] = eosp of TID0 1582 1583 ...eosp_bitmap[1] = eosp of TID1 1584 1585 Etc. 1586 1587 <legal all> 1588 */ 1589 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1590 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1591 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1592 1593 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1594 1595 Field only valid when Received_qos_data_tid_bitmap[0] is 1596 set 1597 1598 1599 1600 QoS control field bits 15-8 of the last properly 1601 received MPDU with a QoS control field embedded, with TID 1602 == 0 1603 */ 1604 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1605 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1606 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1607 1608 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1609 1610 Field only valid when Received_qos_data_tid_bitmap[1] is 1611 set 1612 1613 1614 1615 QoS control field bits 15-8 of the last properly 1616 received MPDU with a QoS control field embedded, with TID 1617 == 1 1618 */ 1619 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1620 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1621 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1622 1623 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1624 1625 Field only valid when Received_qos_data_tid_bitmap[2] is 1626 set 1627 1628 1629 1630 QoS control field bits 15-8 of the last properly 1631 received MPDU with a QoS control field embedded, with TID 1632 == 2 1633 */ 1634 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1635 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1636 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1637 1638 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1639 1640 Field only valid when Received_qos_data_tid_bitmap[3] is 1641 set 1642 1643 1644 1645 QoS control field bits 15-8 of the last properly 1646 received MPDU with a QoS control field embedded, with TID 1647 == 3 1648 */ 1649 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1650 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1651 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1652 1653 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1654 1655 Field only valid when Received_qos_data_tid_bitmap[4] is 1656 set 1657 1658 1659 1660 QoS control field bits 15-8 of the last properly 1661 received MPDU with a QoS control field embedded, with TID 1662 == 4 1663 */ 1664 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1665 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1666 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1667 1668 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1669 1670 Field only valid when Received_qos_data_tid_bitmap[5] is 1671 set 1672 1673 1674 1675 QoS control field bits 15-8 of the last properly 1676 received MPDU with a QoS control field embedded, with TID 1677 == 5 1678 */ 1679 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1680 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1681 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1682 1683 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1684 1685 Field only valid when Received_qos_data_tid_bitmap[6] is 1686 set 1687 1688 1689 1690 QoS control field bits 15-8 of the last properly 1691 received MPDU with a QoS control field embedded, with TID 1692 == 6 1693 */ 1694 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1695 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1696 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1697 1698 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1699 1700 Field only valid when Received_qos_data_tid_bitmap[7] is 1701 set 1702 1703 1704 1705 QoS control field bits 15-8 of the last properly 1706 received MPDU with a QoS control field embedded, with TID 1707 == 7 1708 */ 1709 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1710 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1711 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1712 1713 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1714 1715 Field only valid when Received_qos_data_tid_bitmap[8] is 1716 set 1717 1718 1719 1720 QoS control field bits 15-8 of the last properly 1721 received MPDU with a QoS control field embedded, with TID 1722 == 8 1723 */ 1724 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1725 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1726 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1727 1728 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1729 1730 Field only valid when Received_qos_data_tid_bitmap[9] is 1731 set 1732 1733 1734 1735 QoS control field bits 15-8 of the last properly 1736 received MPDU with a QoS control field embedded, with TID 1737 == 9 1738 */ 1739 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1740 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1741 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1742 1743 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1744 1745 Field only valid when Received_qos_data_tid_bitmap[10] 1746 is set 1747 1748 1749 1750 QoS control field bits 15-8 of the last properly 1751 received MPDU with a QoS control field embedded, with TID 1752 == 10 1753 */ 1754 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1755 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1756 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1757 1758 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1759 1760 Field only valid when Received_qos_data_tid_bitmap[11] 1761 is set 1762 1763 1764 1765 QoS control field bits 15-8 of the last properly 1766 received MPDU with a QoS control field embedded, with TID 1767 == 11 1768 */ 1769 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1770 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1771 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1772 1773 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1774 1775 Field only valid when Received_qos_data_tid_bitmap[12] 1776 is set 1777 1778 1779 1780 QoS control field bits 15-8 of the last properly 1781 received MPDU with a QoS control field embedded, with TID 1782 == 12 1783 */ 1784 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1785 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1786 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1787 1788 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1789 1790 Field only valid when Received_qos_data_tid_bitmap[13] 1791 is set 1792 1793 1794 1795 QoS control field bits 15-8 of the last properly 1796 received MPDU with a QoS control field embedded, with TID 1797 == 13 1798 */ 1799 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1800 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1801 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1802 1803 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1804 1805 Field only valid when Received_qos_data_tid_bitmap[14] 1806 is set 1807 1808 1809 1810 QoS control field bits 15-8 of the last properly 1811 received MPDU with a QoS control field embedded, with TID 1812 == 14 1813 */ 1814 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1815 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1816 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1817 1818 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1819 1820 Field only valid when Received_qos_data_tid_bitmap[15] 1821 is set 1822 1823 1824 1825 QoS control field bits 15-8 of the last properly 1826 received MPDU with a QoS control field embedded, with TID 1827 == 15 1828 */ 1829 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1830 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1831 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1832 1833 /* Description RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT 1834 1835 The number of bytes received within an MPDU for this 1836 user with correct FCS. This includes the FCS field 1837 1838 1839 1840 NOTE: 1841 1842 The sum of the four fields..... 1843 1844 Mpdu_ok_byte_count + 1845 1846 mpdu_err_byte_count + 1847 1848 1849 .....is the total number of bytes that were received for 1850 this user from the PHY. 1851 1852 1853 1854 <legal all> 1855 */ 1856 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET 0x00000044 1857 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB 0 1858 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK 0x01ffffff 1859 1860 /* Description RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0 1861 1862 Number of AMPDU delimiter received with correct 1863 structure 1864 1865 LSB 7 bits from this counter 1866 1867 1868 1869 Note that this is a delimiter count and not byte count. 1870 To get to the number of bytes occupied by these delimiters, 1871 multiply this number by 4 1872 1873 1874 1875 <legal all> 1876 */ 1877 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET 0x00000044 1878 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB 25 1879 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK 0xfe000000 1880 1881 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT 1882 1883 The number of MPDU delimiter errors counted for this 1884 user. 1885 1886 1887 1888 Note that this is a delimiter count and not byte count. 1889 To get to the number of bytes occupied by these delimiters, 1890 multiply this number by 4 1891 1892 <legal all> 1893 */ 1894 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET 0x00000048 1895 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB 0 1896 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK 0x01ffffff 1897 1898 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7 1899 1900 Number of AMPDU delimiters received with correct 1901 structure 1902 1903 Bits 13-7 from this counter 1904 1905 1906 1907 Note that this is a delimiter count and not byte count. 1908 To get to the number of bytes occupied by these delimiters, 1909 multiply this number by 4 1910 1911 <legal all> 1912 */ 1913 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET 0x00000048 1914 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB 25 1915 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK 0xfe000000 1916 1917 /* Description RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT 1918 1919 The number of bytes belonging to MPDUs with an FCS 1920 error. This includes the FCS field. 1921 1922 1923 1924 <legal all> 1925 */ 1926 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET 0x0000004c 1927 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB 0 1928 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK 0x01ffffff 1929 1930 /* Description RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14 1931 1932 Number of AMPDU delimiters received with correct 1933 structure 1934 1935 Bits 20-14 from this counter 1936 1937 1938 1939 Note that this is a delimiter count and not byte count. 1940 To get to the number of bytes occupied by these delimiters, 1941 multiply this number by 4 1942 1943 1944 1945 <legal all> 1946 */ 1947 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET 0x0000004c 1948 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB 25 1949 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK 0xfe000000 1950 1951 /* Description RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR 1952 1953 The number of times an MPDU delimiter error is detected 1954 that is not immediately preceded by another MPDU delimiter 1955 also with FCS error. 1956 1957 1958 1959 The counter saturates at 0xFFFF 1960 1961 1962 1963 <legal all> 1964 */ 1965 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_OFFSET 0x00000050 1966 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_LSB 0 1967 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_MASK 0x0000ffff 1968 1969 /* Description RX_PPDU_END_USER_STATS_20_RESERVED_20A 1970 1971 <legal 0> 1972 */ 1973 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_OFFSET 0x00000050 1974 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_LSB 16 1975 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_MASK 0xffff0000 1976 1977 /* Description RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD 1978 1979 1980 1981 1982 Last successfully received 1983 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 1984 for this user. 1985 1986 <legal all> 1987 */ 1988 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_OFFSET 0x00000054 1989 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_LSB 0 1990 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_MASK 0xffffffff 1991 1992 /* Description RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT 1993 1994 Extended Pointer info that SW uses to refer back to an 1995 expected response transmission. Used for Rate adaptation 1996 purposes. 1997 1998 When a reception occurs that is not tied to an expected 1999 response, this field is set to 0x0. 2000 2001 2002 2003 Note: earlier on in this TLV there is also the field: 2004 Sw_response_reference_ptr. 2005 2006 <legal all> 2007 */ 2008 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_OFFSET 0x00000058 2009 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_LSB 0 2010 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_MASK 0xffffffff 2011 2012 2013 #endif // _RX_PPDU_END_USER_STATS_H_ 2014