1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.8 8/13/2018 22*5113495bSYour Name // User Name:pparekh 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 29*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 30*5113495bSYour Name 31*5113495bSYour Name #ifdef SCALE_INCLUDES 32*5113495bSYour Name #include "HALhwio.h" 33*5113495bSYour Name #else 34*5113495bSYour Name #include "msmhwio.h" 35*5113495bSYour Name #endif 36*5113495bSYour Name 37*5113495bSYour Name #ifndef SOC_WCSS_BASE_ADDR 38*5113495bSYour Name #if defined(WCSS_BASE) 39*5113495bSYour Name #if ( WCSS_BASE != 0xC000000 ) 40*5113495bSYour Name #error WCSS_BASE incorrectly redefined! 41*5113495bSYour Name #endif 42*5113495bSYour Name #endif 43*5113495bSYour Name #define SOC_WCSS_BASE_ADDR 0x000000 44*5113495bSYour Name #else 45*5113495bSYour Name #endif 46*5113495bSYour Name 47*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 48*5113495bSYour Name // Instance Relative Offsets from Block wcss 49*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 50*5113495bSYour Name 51*5113495bSYour Name #define SEQ_WCSS_ECAHB_OFFSET 0x00008400 52*5113495bSYour Name #define SEQ_WCSS_ECAHB_TSLV_OFFSET 0x00009000 53*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 54*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00400000 55*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00400000 56*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00480000 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00480400 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00480800 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00480c00 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00481000 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00481400 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00481800 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00481c00 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC5_REG_MAP_OFFSET 0x00482c00 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00484000 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x00488000 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00500000 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x00520000 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x00528000 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00530000 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x005a0000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_AO_SYSCTRL_OFFSET 0x005c1000 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_AO_TLMM_OFFSET 0x005c1400 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_AO_OVERRIDE_REG_OFFSET 0x005c1800 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_CM_TLMM_OFFSET 0x005c2000 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_CM_TRC_OFFSET 0x005c2200 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_HZ_COEX_LTE_REG_OFFSET 0x005c7000 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_PMU_OFFSET 0x005cb000 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_OFFSET 0x005cc000 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x005ceb00 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x005cc000 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x005d0000 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x005d4240 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x005d42c0 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x005d4400 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x005d4480 91*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800 92*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x005d4c00 93*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x005d5000 94*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x005d5400 95*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 96*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 97*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6100 98*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d6140 99*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6180 100*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d61c0 101*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x005d6280 102*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x005d6800 103*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x005d6840 104*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x005d6900 105*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x005d6940 106*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6980 107*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d69c0 108*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a80 109*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x005d7000 110*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x005d7040 111*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x005d7100 112*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x005d7140 113*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x005d7180 114*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x005d71c0 115*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x005d7280 116*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x005d7c00 117*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x005dc000 118*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x005dc000 119*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x005de800 120*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x005de980 121*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x005de9c0 122*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x005deac0 123*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x005dec00 124*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x005df000 125*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x005df200 126*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x005dfc00 127*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x005dfc40 128*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x005dfc80 129*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x005dfcc0 130*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 131*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x005e0000 132*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x005e0400 133*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x005e0800 134*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x005e1000 135*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x005e1300 136*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x005e2000 137*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x005e2400 138*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x005e2580 139*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x005e25c0 140*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x005e26c0 141*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x005e2734 142*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x005e2740 143*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x005e2800 144*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x005e2840 145*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x005e2880 146*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x005e28c0 147*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x005e2900 148*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x005e299c 149*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x005e4000 150*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x005e8000 151*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x005e8400 152*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x005e8800 153*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x005e9000 154*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x005e9300 155*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x005ea000 156*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x005ea400 157*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x005ea580 158*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x005ea5c0 159*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x005ea6c0 160*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x005ea734 161*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x005ea740 162*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x005ea800 163*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x005ea840 164*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x005ea880 165*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x005ea8c0 166*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x005ea900 167*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x005ea99c 168*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x005ec000 169*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x005f0000 170*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x005f0400 171*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x005f0800 172*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x005f1000 173*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x005f1300 174*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x005f2000 175*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x005f2400 176*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_OFFSET 0x005f2500 177*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x005f2580 178*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x005f25c0 179*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x005f26c0 180*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x005f2734 181*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x005f2740 182*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x005f2800 183*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x005f2840 184*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x005f2880 185*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x005f28c0 186*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x005f2900 187*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x005f299c 188*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_CAL_CORE_OFFSET 0x005f2c00 189*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x005f4000 190*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x005f8000 191*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x005f8400 192*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x005f8800 193*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x005f9000 194*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x005f9300 195*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x005fa000 196*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x005fa400 197*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x005fa580 198*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x005fa5c0 199*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x005fa6c0 200*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x005fa734 201*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x005fa740 202*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x005fa800 203*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x005fa840 204*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x005fa880 205*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x005fa8c0 206*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x005fa900 207*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x005fa99c 208*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x005fc000 209*5113495bSYour Name #define SEQ_WCSS_PHYB_OFFSET 0x00600000 210*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00600000 211*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_B_REG_MAP_OFFSET 0x00680000 212*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00680400 213*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00680800 214*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00680c00 215*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00681000 216*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00681400 217*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00681800 218*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00681c00 219*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC5_B_REG_MAP_OFFSET 0x00682c00 220*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_NOC_B_REG_MAP_OFFSET 0x00684000 221*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXTD_B_REG_MAP_OFFSET 0x00688000 222*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXFD_B_REG_MAP_OFFSET 0x00700000 223*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_ROBE_B_REG_MAP_OFFSET 0x00720000 224*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_RXTD_B_REG_MAP_OFFSET 0x00728000 225*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00730000 226*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PHYRF_B_REG_MAP_OFFSET 0x007a0000 227*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_OFFSET 0x007c0000 228*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_AO_SYSCTRL_OFFSET 0x007c1000 229*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_AO_TLMM_OFFSET 0x007c1400 230*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_AO_OVERRIDE_REG_OFFSET 0x007c1800 231*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_CM_TLMM_OFFSET 0x007c2000 232*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_CM_TRC_OFFSET 0x007c2200 233*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_HZ_COEX_LTE_REG_OFFSET 0x007c7000 234*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_PMU_OFFSET 0x007cb000 235*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_OFFSET 0x007cc000 236*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x007ceb00 237*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x007cc000 238*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x007d0000 239*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x007d4000 240*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x007d4000 241*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x007d4240 242*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x007d42c0 243*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x007d4300 244*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x007d4400 245*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x007d4480 246*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4800 247*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x007d4c00 248*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x007d5000 249*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x007d5400 250*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000 251*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040 252*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d6100 253*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x007d6140 254*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x007d6180 255*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x007d61c0 256*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x007d6280 257*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x007d6800 258*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x007d6840 259*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x007d6900 260*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x007d6940 261*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6980 262*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d69c0 263*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x007d6a80 264*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x007d7000 265*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x007d7040 266*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x007d7100 267*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x007d7140 268*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x007d7180 269*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x007d71c0 270*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x007d7280 271*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x007d7c00 272*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_OFFSET 0x007dc000 273*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x007dc000 274*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x007de800 275*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x007de980 276*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x007de9c0 277*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x007deac0 278*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_TX_OFFSET 0x007dec00 279*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x007df000 280*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x007df200 281*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x007dfc00 282*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x007dfc40 283*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x007dfc80 284*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x007dfcc0 285*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x007e0000 286*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x007e0000 287*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x007e0400 288*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x007e0800 289*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x007e1000 290*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x007e1300 291*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x007e2000 292*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x007e2400 293*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x007e2580 294*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x007e25c0 295*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x007e26c0 296*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x007e2734 297*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x007e2740 298*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x007e2800 299*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x007e2840 300*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x007e2880 301*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x007e28c0 302*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x007e2900 303*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x007e299c 304*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x007e4000 305*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x007e8000 306*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x007e8400 307*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x007e8800 308*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x007e9000 309*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x007e9300 310*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x007ea000 311*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x007ea400 312*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x007ea580 313*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x007ea5c0 314*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x007ea6c0 315*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x007ea734 316*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x007ea740 317*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x007ea800 318*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x007ea840 319*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x007ea880 320*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x007ea8c0 321*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x007ea900 322*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x007ea99c 323*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x007ec000 324*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x007f0000 325*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x007f0400 326*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x007f0800 327*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x007f1000 328*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x007f1300 329*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x007f2000 330*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x007f2400 331*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_OFFSET 0x007f2500 332*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x007f2580 333*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x007f25c0 334*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x007f26c0 335*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x007f2734 336*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x007f2740 337*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x007f2800 338*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x007f2840 339*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x007f2880 340*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x007f28c0 341*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x007f2900 342*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x007f299c 343*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_CAL_CORE_OFFSET 0x007f2c00 344*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x007f4000 345*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x007f8000 346*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x007f8400 347*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x007f8800 348*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x007f9000 349*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x007f9300 350*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x007fa000 351*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x007fa400 352*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x007fa580 353*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x007fa5c0 354*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x007fa6c0 355*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x007fa734 356*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x007fa740 357*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x007fa800 358*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x007fa840 359*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x007fa880 360*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x007fa8c0 361*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x007fa900 362*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x007fa99c 363*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x007fc000 364*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 365*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_OFFSET 0x00a00000 366*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00a00000 367*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00a01000 368*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00a02000 369*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00a03000 370*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00a04000 371*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00a05000 372*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00a06000 373*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00a07000 374*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00a08000 375*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00a09000 376*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x00a0a000 377*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x00a0b000 378*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x00a0c000 379*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x00a0d000 380*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x00a0e000 381*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x00a0f000 382*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00a10000 383*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00a11000 384*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00a12000 385*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00a13000 386*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00a14000 387*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00a15000 388*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00a16000 389*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00a17000 390*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00a18000 391*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 392*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 393*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 394*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 395*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 396*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 397*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 398*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 399*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 400*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 401*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 402*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 403*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 404*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_CE_REG_OFFSET 0x00a47000 405*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 406*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 407*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 408*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 409*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 410*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 411*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 412*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 413*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 414*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 415*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 416*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 417*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 418*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 419*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 420*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 421*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 422*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 423*5113495bSYour Name #define SEQ_WCSS_WMAC1_OFFSET 0x00b00000 424*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_PDG_REG_OFFSET 0x00b00000 425*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXDMA_REG_OFFSET 0x00b03000 426*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA_REG_OFFSET 0x00b06000 427*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MCMN_REG_OFFSET 0x00b09000 428*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXPCU_REG_OFFSET 0x00b0c000 429*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXPCU_REG_OFFSET 0x00b0f000 430*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_AMPI_REG_OFFSET 0x00b12000 431*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_REG_OFFSET 0x00b15000 432*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_PARSER_REG_OFFSET 0x00b18000 433*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CCE_REG_OFFSET 0x00b1b000 434*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_REG_OFFSET 0x00b1e000 435*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_PARSER_REG_OFFSET 0x00b21000 436*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RRI_REG_OFFSET 0x00b24000 437*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CRYPTO_REG_OFFSET 0x00b27000 438*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_HWSCH_REG_OFFSET 0x00b2a000 439*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MXI_REG_OFFSET 0x00b30000 440*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_SFM_REG_OFFSET 0x00b33000 441*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 442*5113495bSYour Name #define SEQ_WCSS_TOP_CMN_OFFSET 0x00b50000 443*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 444*5113495bSYour Name #define SEQ_WCSS_PMM_TOP_OFFSET 0x00b70000 445*5113495bSYour Name #define SEQ_WCSS_WCMN_CORE_OFFSET 0x00b80000 446*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 447*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_DAPROM_OFFSET 0x00b90000 448*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 449*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 450*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00b94000 451*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 452*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 453*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00ba0000 454*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_OFFSET 0x00ba1000 455*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00ba1280 456*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00ba1000 457*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_OFFSET 0x00ba2000 458*5113495bSYour Name #define SEQ_WCSS_DBG_CXATBFUNNEL_128W8SP_OFFSET 0x00ba3000 459*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W32K_OFFSET 0x00ba4000 460*5113495bSYour Name #define SEQ_WCSS_DBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00ba6000 461*5113495bSYour Name #define SEQ_WCSS_DBG_UMACDMUX_ATB_DEMUX_OFFSET 0x00ba7000 462*5113495bSYour Name #define SEQ_WCSS_DBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00ba8000 463*5113495bSYour Name #define SEQ_WCSS_DBG_TRCCNTRS_OFFSET 0x00ba9000 464*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_OFFSET 0x00bb0000 465*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UNOC_UMAC_NOC_OFFSET 0x00bb0000 466*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UDBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bb8000 467*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UDBG_CTI_QC_CTI_15T_8CH_OFFSET 0x00bb9000 468*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UDBG_P0_MACDBG_CTRL_OFFSET 0x00bba000 469*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UDBG_P1_MACDBG_CTRL_OFFSET 0x00bbb000 470*5113495bSYour Name #define SEQ_WCSS_DBG_UMAC_UMAC_DBG_UDBG_P2_MACDBG_CTRL_OFFSET 0x00bbc000 471*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_OFFSET 0x00bc0000 472*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00bc0000 473*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc4000 474*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00bc5000 475*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00bc6000 476*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00bc8000 477*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00bc9000 478*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FPB_OFFSET 0x00bca000 479*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_SCS_OFFSET 0x00bcb000 480*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x00bcc000 481*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bcd000 482*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bce000 483*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_OFFSET 0x00bd0000 484*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_PHYB_NOC_OFFSET 0x00bd0000 485*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bd4000 486*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00bd5000 487*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00bd6000 488*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_ITM_OFFSET 0x00bd8000 489*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_DWT_OFFSET 0x00bd9000 490*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_FPB_OFFSET 0x00bda000 491*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_SCS_OFFSET 0x00bdb000 492*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_ETM_OFFSET 0x00bdc000 493*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bdd000 494*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bde000 495*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00c01000 496*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c10000 497*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00c20000 498*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00c30000 499*5113495bSYour Name #define SEQ_WCSS_UMAC_ACMT_OFFSET 0x00c40000 500*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_OFFSET 0x00d00000 501*5113495bSYour Name #define SEQ_WCSS_Q6SS_PUBCSR_QDSP6SS_PUB_OFFSET 0x00d00000 502*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_OFFSET 0x00d80000 503*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_CSR_OFFSET 0x00d80000 504*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_L2VIC_OFFSET 0x00d90000 505*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_QTMR_AC_OFFSET 0x00da0000 506*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F0_OFFSET 0x00da1000 507*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F1_OFFSET 0x00da2000 508*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F2_OFFSET 0x00da3000 509*5113495bSYour Name #define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_SAW2_OFFSET 0x00db0000 510*5113495bSYour Name 511*5113495bSYour Name 512*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 513*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 514*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 515*5113495bSYour Name 516*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 517*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 518*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 519*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 520*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 521*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 522*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 523*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 524*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 525*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC5_REG_MAP_OFFSET 0x00082c00 526*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00084000 527*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x00088000 528*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00100000 529*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x00120000 530*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x00128000 531*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_NPRA_REG_MAP_OFFSET 0x00130000 532*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x001a0000 533*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x001c0000 534*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_AO_SYSCTRL_OFFSET 0x001c1000 535*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_AO_TLMM_OFFSET 0x001c1400 536*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_AO_OVERRIDE_REG_OFFSET 0x001c1800 537*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_CM_TLMM_OFFSET 0x001c2000 538*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_CM_TRC_OFFSET 0x001c2200 539*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_HZ_COEX_LTE_REG_OFFSET 0x001c7000 540*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_PMU_OFFSET 0x001cb000 541*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_OFFSET 0x001cc000 542*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x001ceb00 543*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x001cc000 544*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x001d0000 545*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x001d4000 546*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 547*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x001d4240 548*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x001d42c0 549*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300 550*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x001d4400 551*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x001d4480 552*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800 553*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x001d4c00 554*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x001d5000 555*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x001d5400 556*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 557*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 558*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6100 559*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d6140 560*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6180 561*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d61c0 562*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x001d6280 563*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 564*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 565*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d6900 566*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d6940 567*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6980 568*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d69c0 569*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a80 570*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x001d7000 571*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x001d7040 572*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x001d7100 573*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x001d7140 574*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x001d7180 575*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x001d71c0 576*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x001d7280 577*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x001d7c00 578*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x001dc000 579*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x001dc000 580*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x001de800 581*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x001de980 582*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x001de9c0 583*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x001deac0 584*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x001dec00 585*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x001df000 586*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x001df200 587*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x001dfc00 588*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x001dfc40 589*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x001dfc80 590*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x001dfcc0 591*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x001e0000 592*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x001e0000 593*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x001e0400 594*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x001e0800 595*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x001e1000 596*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x001e1300 597*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x001e2000 598*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x001e2400 599*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x001e2580 600*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x001e25c0 601*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x001e26c0 602*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x001e2734 603*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x001e2740 604*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x001e2800 605*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x001e2840 606*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x001e2880 607*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x001e28c0 608*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x001e2900 609*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x001e299c 610*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x001e4000 611*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x001e8000 612*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x001e8400 613*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x001e8800 614*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x001e9000 615*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x001e9300 616*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x001ea000 617*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x001ea400 618*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x001ea580 619*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x001ea5c0 620*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x001ea6c0 621*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x001ea734 622*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x001ea740 623*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x001ea800 624*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x001ea840 625*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x001ea880 626*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x001ea8c0 627*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x001ea900 628*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x001ea99c 629*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x001ec000 630*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x001f0000 631*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x001f0400 632*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x001f0800 633*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x001f1000 634*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x001f1300 635*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x001f2000 636*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x001f2400 637*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_RX_OFFSET 0x001f2500 638*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x001f2580 639*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x001f25c0 640*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x001f26c0 641*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x001f2734 642*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x001f2740 643*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x001f2800 644*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x001f2840 645*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x001f2880 646*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x001f28c0 647*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x001f2900 648*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x001f299c 649*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_CAL_CORE_OFFSET 0x001f2c00 650*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x001f4000 651*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x001f8000 652*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x001f8400 653*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x001f8800 654*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x001f9000 655*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x001f9300 656*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x001fa000 657*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x001fa400 658*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x001fa580 659*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x001fa5c0 660*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x001fa6c0 661*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x001fa734 662*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x001fa740 663*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x001fa800 664*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x001fa840 665*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x001fa880 666*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x001fa8c0 667*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x001fa900 668*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x001fa99c 669*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x001fc000 670*5113495bSYour Name 671*5113495bSYour Name 672*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 673*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 674*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 675*5113495bSYour Name 676*5113495bSYour Name #define SEQ_RFA_FROM_WSI_AO_SYSCTRL_OFFSET 0x00001000 677*5113495bSYour Name #define SEQ_RFA_FROM_WSI_AO_TLMM_OFFSET 0x00001400 678*5113495bSYour Name #define SEQ_RFA_FROM_WSI_AO_OVERRIDE_REG_OFFSET 0x00001800 679*5113495bSYour Name #define SEQ_RFA_FROM_WSI_CM_TLMM_OFFSET 0x00002000 680*5113495bSYour Name #define SEQ_RFA_FROM_WSI_CM_TRC_OFFSET 0x00002200 681*5113495bSYour Name #define SEQ_RFA_FROM_WSI_HZ_COEX_LTE_REG_OFFSET 0x00007000 682*5113495bSYour Name #define SEQ_RFA_FROM_WSI_PMU_OFFSET 0x0000b000 683*5113495bSYour Name #define SEQ_RFA_FROM_WSI_BT_SECURITY_CONTROL_OFFSET 0x0000c000 684*5113495bSYour Name #define SEQ_RFA_FROM_WSI_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x0000eb00 685*5113495bSYour Name #define SEQ_RFA_FROM_WSI_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x0000c000 686*5113495bSYour Name #define SEQ_RFA_FROM_WSI_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x00010000 687*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 688*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 689*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET 0x00014240 690*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET 0x000142c0 691*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 692*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00014400 693*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_OTP_OFFSET 0x00014480 694*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 695*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BTFMPLL_OFFSET 0x00014c00 696*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_OFFSET 0x00015000 697*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00015400 698*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 699*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 700*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016100 701*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016140 702*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016180 703*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000161c0 704*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016280 705*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00016800 706*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00016840 707*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00016900 708*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00016940 709*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016980 710*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000169c0 711*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00016a80 712*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00017000 713*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00017040 714*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00017100 715*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00017140 716*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00017180 717*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000171c0 718*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00017280 719*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00017c00 720*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET 0x0001c000 721*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TOP_OFFSET 0x0001c000 722*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x0001e800 723*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_OFFSET 0x0001e980 724*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x0001e9c0 725*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_MISC_OFFSET 0x0001eac0 726*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TX_OFFSET 0x0001ec00 727*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RX_CH0_OFFSET 0x0001f000 728*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RX_CH1_OFFSET 0x0001f200 729*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BS_OFFSET 0x0001fc00 730*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BIST_OFFSET 0x0001fc40 731*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_PC_OFFSET 0x0001fc80 732*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_AC_OFFSET 0x0001fcc0 733*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 734*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00020000 735*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00020400 736*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00020800 737*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00021000 738*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00021300 739*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00022000 740*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00022400 741*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00022580 742*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x000225c0 743*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x000226c0 744*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x00022734 745*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00022740 746*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x00022800 747*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x00022840 748*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x00022880 749*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x000228c0 750*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x00022900 751*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x0002299c 752*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00024000 753*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00028000 754*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00028400 755*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00028800 756*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00029000 757*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00029300 758*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0002a000 759*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0002a400 760*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0002a580 761*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x0002a5c0 762*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x0002a6c0 763*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x0002a734 764*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0002a740 765*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x0002a800 766*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x0002a840 767*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x0002a880 768*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x0002a8c0 769*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x0002a900 770*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x0002a99c 771*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0002c000 772*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00030000 773*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00030400 774*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00030800 775*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00031000 776*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00031300 777*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00032000 778*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00032400 779*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_RX_OFFSET 0x00032500 780*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00032580 781*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x000325c0 782*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x000326c0 783*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x00032734 784*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00032740 785*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x00032800 786*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x00032840 787*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x00032880 788*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x000328c0 789*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x00032900 790*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x0003299c 791*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_CAL_CORE_OFFSET 0x00032c00 792*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00034000 793*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00038000 794*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00038400 795*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00038800 796*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00039000 797*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00039300 798*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0003a000 799*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0003a400 800*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0003a580 801*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x0003a5c0 802*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x0003a6c0 803*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x0003a734 804*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0003a740 805*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x0003a800 806*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x0003a840 807*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x0003a880 808*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x0003a8c0 809*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x0003a900 810*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x0003a99c 811*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0003c000 812*5113495bSYour Name 813*5113495bSYour Name 814*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 815*5113495bSYour Name // Instance Relative Offsets from Block security_control_bt 816*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 817*5113495bSYour Name 818*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_SECURITY_CONTROL_CORE_OFFSET 0x00002b00 819*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_RAW_FUSE_OFFSET 0x00000000 820*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_CORR_FUSE_OFFSET 0x00004000 821*5113495bSYour Name 822*5113495bSYour Name 823*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 824*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 825*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 826*5113495bSYour Name 827*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 828*5113495bSYour Name #define SEQ_RFA_CMN_AON_XFEM_OFFSET 0x00000240 829*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_OFFSET 0x000002c0 830*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 831*5113495bSYour Name #define SEQ_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00000400 832*5113495bSYour Name #define SEQ_RFA_CMN_RFA_OTP_OFFSET 0x00000480 833*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 834*5113495bSYour Name #define SEQ_RFA_CMN_BTFMPLL_OFFSET 0x00000c00 835*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_OFFSET 0x00001000 836*5113495bSYour Name #define SEQ_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00001400 837*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 838*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 839*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002100 840*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002140 841*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002180 842*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000021c0 843*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002280 844*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00002800 845*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00002840 846*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00002900 847*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00002940 848*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002980 849*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000029c0 850*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00002a80 851*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00003000 852*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00003040 853*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00003100 854*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00003140 855*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00003180 856*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000031c0 857*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00003280 858*5113495bSYour Name #define SEQ_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00003c00 859*5113495bSYour Name 860*5113495bSYour Name 861*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 862*5113495bSYour Name // Instance Relative Offsets from Block rfa_bt 863*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 864*5113495bSYour Name 865*5113495bSYour Name #define SEQ_RFA_BT_BT_TOP_OFFSET 0x00000000 866*5113495bSYour Name #define SEQ_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x00002800 867*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_OFFSET 0x00002980 868*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x000029c0 869*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_MISC_OFFSET 0x00002ac0 870*5113495bSYour Name #define SEQ_RFA_BT_BT_TX_OFFSET 0x00002c00 871*5113495bSYour Name #define SEQ_RFA_BT_BT_RX_CH0_OFFSET 0x00003000 872*5113495bSYour Name #define SEQ_RFA_BT_BT_RX_CH1_OFFSET 0x00003200 873*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BS_OFFSET 0x00003c00 874*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BIST_OFFSET 0x00003c40 875*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_PC_OFFSET 0x00003c80 876*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_AC_OFFSET 0x00003cc0 877*5113495bSYour Name 878*5113495bSYour Name 879*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 880*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 881*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 882*5113495bSYour Name 883*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00000000 884*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00000400 885*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00000800 886*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00001000 887*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00001300 888*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00002000 889*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00002400 890*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00002580 891*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x000025c0 892*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x000026c0 893*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x00002734 894*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00002740 895*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x00002800 896*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x00002840 897*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x00002880 898*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x000028c0 899*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x00002900 900*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x0000299c 901*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00004000 902*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00008000 903*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00008400 904*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00008800 905*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00009000 906*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00009300 907*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0000a000 908*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0000a400 909*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0000a580 910*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x0000a5c0 911*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x0000a6c0 912*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x0000a734 913*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0000a740 914*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x0000a800 915*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x0000a840 916*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x0000a880 917*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x0000a8c0 918*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x0000a900 919*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x0000a99c 920*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0000c000 921*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00010000 922*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00010400 923*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00010800 924*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00011000 925*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00011300 926*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00012000 927*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00012400 928*5113495bSYour Name #define SEQ_RFA_WL_RBIST_RX_OFFSET 0x00012500 929*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00012580 930*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x000125c0 931*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x000126c0 932*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x00012734 933*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00012740 934*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x00012800 935*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x00012840 936*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x00012880 937*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x000128c0 938*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x00012900 939*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x0001299c 940*5113495bSYour Name #define SEQ_RFA_WL_WL_CAL_CORE_OFFSET 0x00012c00 941*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00014000 942*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00018000 943*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00018400 944*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00018800 945*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00019000 946*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00019300 947*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0001a000 948*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0001a400 949*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0001a580 950*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x0001a5c0 951*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x0001a6c0 952*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x0001a734 953*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0001a740 954*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x0001a800 955*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x0001a840 956*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x0001a880 957*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x0001a8c0 958*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x0001a900 959*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x0001a99c 960*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0001c000 961*5113495bSYour Name 962*5113495bSYour Name 963*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 964*5113495bSYour Name // Instance Relative Offsets from Block wfax_top_b 965*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 966*5113495bSYour Name 967*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00000000 968*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_B_REG_MAP_OFFSET 0x00080000 969*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00080400 970*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00080800 971*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00080c00 972*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00081000 973*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00081400 974*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00081800 975*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00081c00 976*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC5_B_REG_MAP_OFFSET 0x00082c00 977*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_NOC_B_REG_MAP_OFFSET 0x00084000 978*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXTD_B_REG_MAP_OFFSET 0x00088000 979*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXFD_B_REG_MAP_OFFSET 0x00100000 980*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_ROBE_B_REG_MAP_OFFSET 0x00120000 981*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_RXTD_B_REG_MAP_OFFSET 0x00128000 982*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00130000 983*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PHYRF_B_REG_MAP_OFFSET 0x001a0000 984*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_OFFSET 0x001c0000 985*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_AO_SYSCTRL_OFFSET 0x001c1000 986*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_AO_TLMM_OFFSET 0x001c1400 987*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_AO_OVERRIDE_REG_OFFSET 0x001c1800 988*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_CM_TLMM_OFFSET 0x001c2000 989*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_CM_TRC_OFFSET 0x001c2200 990*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_HZ_COEX_LTE_REG_OFFSET 0x001c7000 991*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_PMU_OFFSET 0x001cb000 992*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_OFFSET 0x001cc000 993*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x001ceb00 994*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x001cc000 995*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x001d0000 996*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x001d4000 997*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 998*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x001d4240 999*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x001d42c0 1000*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300 1001*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x001d4400 1002*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x001d4480 1003*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800 1004*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x001d4c00 1005*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x001d5000 1006*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x001d5400 1007*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 1008*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 1009*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6100 1010*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d6140 1011*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6180 1012*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d61c0 1013*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x001d6280 1014*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 1015*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 1016*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d6900 1017*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d6940 1018*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6980 1019*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d69c0 1020*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a80 1021*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x001d7000 1022*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x001d7040 1023*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x001d7100 1024*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x001d7140 1025*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x001d7180 1026*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x001d71c0 1027*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x001d7280 1028*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x001d7c00 1029*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_OFFSET 0x001dc000 1030*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x001dc000 1031*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x001de800 1032*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x001de980 1033*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x001de9c0 1034*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x001deac0 1035*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_TX_OFFSET 0x001dec00 1036*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x001df000 1037*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x001df200 1038*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x001dfc00 1039*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x001dfc40 1040*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x001dfc80 1041*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x001dfcc0 1042*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x001e0000 1043*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x001e0000 1044*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x001e0400 1045*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x001e0800 1046*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x001e1000 1047*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x001e1300 1048*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x001e2000 1049*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x001e2400 1050*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x001e2580 1051*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x001e25c0 1052*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x001e26c0 1053*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x001e2734 1054*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x001e2740 1055*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x001e2800 1056*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x001e2840 1057*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x001e2880 1058*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x001e28c0 1059*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x001e2900 1060*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x001e299c 1061*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x001e4000 1062*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x001e8000 1063*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x001e8400 1064*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x001e8800 1065*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x001e9000 1066*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x001e9300 1067*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x001ea000 1068*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x001ea400 1069*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x001ea580 1070*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x001ea5c0 1071*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x001ea6c0 1072*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x001ea734 1073*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x001ea740 1074*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x001ea800 1075*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x001ea840 1076*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x001ea880 1077*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x001ea8c0 1078*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x001ea900 1079*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x001ea99c 1080*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x001ec000 1081*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x001f0000 1082*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x001f0400 1083*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x001f0800 1084*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x001f1000 1085*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x001f1300 1086*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x001f2000 1087*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x001f2400 1088*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_RX_OFFSET 0x001f2500 1089*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x001f2580 1090*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x001f25c0 1091*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x001f26c0 1092*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x001f2734 1093*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x001f2740 1094*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x001f2800 1095*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x001f2840 1096*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x001f2880 1097*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x001f28c0 1098*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x001f2900 1099*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x001f299c 1100*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_CAL_CORE_OFFSET 0x001f2c00 1101*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x001f4000 1102*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x001f8000 1103*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x001f8400 1104*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x001f8800 1105*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x001f9000 1106*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x001f9300 1107*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x001fa000 1108*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x001fa400 1109*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x001fa580 1110*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x001fa5c0 1111*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x001fa6c0 1112*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x001fa734 1113*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x001fa740 1114*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x001fa800 1115*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x001fa840 1116*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x001fa880 1117*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x001fa8c0 1118*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x001fa900 1119*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x001fa99c 1120*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x001fc000 1121*5113495bSYour Name 1122*5113495bSYour Name 1123*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1124*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 1125*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1126*5113495bSYour Name 1127*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_OFFSET 0x00000000 1128*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 1129*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 1130*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 1131*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 1132*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 1133*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 1134*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 1135*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 1136*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 1137*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 1138*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 1139*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 1140*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 1141*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 1142*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 1143*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 1144*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 1145*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 1146*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 1147*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 1148*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 1149*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 1150*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 1151*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 1152*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 1153*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 1154*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 1155*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 1156*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 1157*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 1158*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 1159*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 1160*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 1161*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 1162*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 1163*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 1164*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 1165*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 1166*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_CE_REG_OFFSET 0x00047000 1167*5113495bSYour Name 1168*5113495bSYour Name 1169*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1170*5113495bSYour Name // Instance Relative Offsets from Block wfss_ce_reg 1171*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1172*5113495bSYour Name 1173*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x00000000 1174*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x00001000 1175*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x00002000 1176*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x00003000 1177*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x00004000 1178*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x00005000 1179*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x00006000 1180*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x00007000 1181*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x00008000 1182*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x00009000 1183*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x0000a000 1184*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x0000b000 1185*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x0000c000 1186*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x0000d000 1187*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x0000e000 1188*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x0000f000 1189*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x00010000 1190*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x00011000 1191*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x00012000 1192*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x00013000 1193*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x00014000 1194*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x00015000 1195*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x00016000 1196*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x00017000 1197*5113495bSYour Name #define SEQ_WFSS_CE_REG_WFSS_CE_COMMON_REG_OFFSET 0x00018000 1198*5113495bSYour Name 1199*5113495bSYour Name 1200*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1201*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 1202*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1203*5113495bSYour Name 1204*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 1205*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 1206*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 1207*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 1208*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 1209*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 1210*5113495bSYour Name 1211*5113495bSYour Name 1212*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1213*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 1214*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1215*5113495bSYour Name 1216*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 1217*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 1218*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 1219*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 1220*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 1221*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 1222*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 1223*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 1224*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 1225*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 1226*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 1227*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 1228*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 1229*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 1230*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 1231*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 1232*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 1233*5113495bSYour Name 1234*5113495bSYour Name 1235*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1236*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg 1237*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1238*5113495bSYour Name 1239*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_DAPROM_OFFSET 0x00000000 1240*5113495bSYour Name #define SEQ_WCSSDBG_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 1241*5113495bSYour Name #define SEQ_WCSSDBG_TSGEN_CXTSGEN_OFFSET 0x00002000 1242*5113495bSYour Name #define SEQ_WCSSDBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00004000 1243*5113495bSYour Name #define SEQ_WCSSDBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 1244*5113495bSYour Name #define SEQ_WCSSDBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 1245*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00010000 1246*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_OFFSET 0x00011000 1247*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00011280 1248*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00011000 1249*5113495bSYour Name #define SEQ_WCSSDBG_TPDA_OFFSET 0x00012000 1250*5113495bSYour Name #define SEQ_WCSSDBG_CXATBFUNNEL_128W8SP_OFFSET 0x00013000 1251*5113495bSYour Name #define SEQ_WCSSDBG_TMC_CXTMC_F128W32K_OFFSET 0x00014000 1252*5113495bSYour Name #define SEQ_WCSSDBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00016000 1253*5113495bSYour Name #define SEQ_WCSSDBG_UMACDMUX_ATB_DEMUX_OFFSET 0x00017000 1254*5113495bSYour Name #define SEQ_WCSSDBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00018000 1255*5113495bSYour Name #define SEQ_WCSSDBG_TRCCNTRS_OFFSET 0x00019000 1256*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_OFFSET 0x00020000 1257*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UNOC_UMAC_NOC_OFFSET 0x00020000 1258*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UDBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00028000 1259*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UDBG_CTI_QC_CTI_15T_8CH_OFFSET 0x00029000 1260*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UDBG_P0_MACDBG_CTRL_OFFSET 0x0002a000 1261*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UDBG_P1_MACDBG_CTRL_OFFSET 0x0002b000 1262*5113495bSYour Name #define SEQ_WCSSDBG_UMAC_UMAC_DBG_UDBG_P2_MACDBG_CTRL_OFFSET 0x0002c000 1263*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_OFFSET 0x00030000 1264*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00030000 1265*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00034000 1266*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00035000 1267*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00036000 1268*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00038000 1269*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00039000 1270*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FPB_OFFSET 0x0003a000 1271*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_SCS_OFFSET 0x0003b000 1272*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x0003c000 1273*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0003d000 1274*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0003e000 1275*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_OFFSET 0x00040000 1276*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_PHYB_NOC_OFFSET 0x00040000 1277*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00044000 1278*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00045000 1279*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00046000 1280*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_ITM_OFFSET 0x00048000 1281*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_DWT_OFFSET 0x00049000 1282*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_FPB_OFFSET 0x0004a000 1283*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_SCS_OFFSET 0x0004b000 1284*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_ETM_OFFSET 0x0004c000 1285*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0004d000 1286*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0004e000 1287*5113495bSYour Name #define SEQ_WCSSDBG_BUS_TIMEOUT_OFFSET 0x00071000 1288*5113495bSYour Name 1289*5113495bSYour Name 1290*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1291*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 1292*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1293*5113495bSYour Name 1294*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 1295*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 1296*5113495bSYour Name 1297*5113495bSYour Name 1298*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1299*5113495bSYour Name // Instance Relative Offsets from Block umac_dbg 1300*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1301*5113495bSYour Name 1302*5113495bSYour Name #define SEQ_UMAC_DBG_UNOC_UMAC_NOC_OFFSET 0x00000000 1303*5113495bSYour Name #define SEQ_UMAC_DBG_UDBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00008000 1304*5113495bSYour Name #define SEQ_UMAC_DBG_UDBG_CTI_QC_CTI_15T_8CH_OFFSET 0x00009000 1305*5113495bSYour Name #define SEQ_UMAC_DBG_UDBG_P0_MACDBG_CTRL_OFFSET 0x0000a000 1306*5113495bSYour Name #define SEQ_UMAC_DBG_UDBG_P1_MACDBG_CTRL_OFFSET 0x0000b000 1307*5113495bSYour Name #define SEQ_UMAC_DBG_UDBG_P2_MACDBG_CTRL_OFFSET 0x0000c000 1308*5113495bSYour Name 1309*5113495bSYour Name 1310*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1311*5113495bSYour Name // Instance Relative Offsets from Block phya_dbg 1312*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1313*5113495bSYour Name 1314*5113495bSYour Name #define SEQ_PHYA_DBG_PHYA_NOC_OFFSET 0x00000000 1315*5113495bSYour Name #define SEQ_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 1316*5113495bSYour Name #define SEQ_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 1317*5113495bSYour Name #define SEQ_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 1318*5113495bSYour Name #define SEQ_PHYA_DBG_ITM_OFFSET 0x00008000 1319*5113495bSYour Name #define SEQ_PHYA_DBG_DWT_OFFSET 0x00009000 1320*5113495bSYour Name #define SEQ_PHYA_DBG_FPB_OFFSET 0x0000a000 1321*5113495bSYour Name #define SEQ_PHYA_DBG_SCS_OFFSET 0x0000b000 1322*5113495bSYour Name #define SEQ_PHYA_DBG_M3_ETM_OFFSET 0x0000c000 1323*5113495bSYour Name #define SEQ_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 1324*5113495bSYour Name #define SEQ_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 1325*5113495bSYour Name 1326*5113495bSYour Name 1327*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1328*5113495bSYour Name // Instance Relative Offsets from Block phyb_dbg 1329*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1330*5113495bSYour Name 1331*5113495bSYour Name #define SEQ_PHYB_DBG_PHYB_NOC_OFFSET 0x00000000 1332*5113495bSYour Name #define SEQ_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 1333*5113495bSYour Name #define SEQ_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 1334*5113495bSYour Name #define SEQ_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 1335*5113495bSYour Name #define SEQ_PHYB_DBG_ITM_OFFSET 0x00008000 1336*5113495bSYour Name #define SEQ_PHYB_DBG_DWT_OFFSET 0x00009000 1337*5113495bSYour Name #define SEQ_PHYB_DBG_FPB_OFFSET 0x0000a000 1338*5113495bSYour Name #define SEQ_PHYB_DBG_SCS_OFFSET 0x0000b000 1339*5113495bSYour Name #define SEQ_PHYB_DBG_ETM_OFFSET 0x0000c000 1340*5113495bSYour Name #define SEQ_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 1341*5113495bSYour Name #define SEQ_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 1342*5113495bSYour Name 1343*5113495bSYour Name 1344*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1345*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_public 1346*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1347*5113495bSYour Name 1348*5113495bSYour Name #define SEQ_QDSP6SS_PUBLIC_QDSP6SS_PUB_OFFSET 0x00000000 1349*5113495bSYour Name 1350*5113495bSYour Name 1351*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1352*5113495bSYour Name // Instance Relative Offsets from Block qdsp6ss_private 1353*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1354*5113495bSYour Name 1355*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_CSR_OFFSET 0x00000000 1356*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_L2VIC_OFFSET 0x00010000 1357*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00020000 1358*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F0_OFFSET 0x00021000 1359*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F1_OFFSET 0x00022000 1360*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QTMR_F2_OFFSET 0x00023000 1361*5113495bSYour Name #define SEQ_QDSP6SS_PRIVATE_QDSP6SS_SAW2_OFFSET 0x00030000 1362*5113495bSYour Name 1363*5113495bSYour Name 1364*5113495bSYour Name #endif 1365*5113495bSYour Name 1366