1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2019 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // mac_tcl_reg_seq_hwioreg.h : automatically generated by Autoseq 3.8 3/26/2019 22*5113495bSYour Name // User Name:c_landav 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __MAC_TCL_REG_SEQ_REG_H__ 29*5113495bSYour Name #define __MAC_TCL_REG_SEQ_REG_H__ 30*5113495bSYour Name 31*5113495bSYour Name #include "seq_hwio.h" 32*5113495bSYour Name #include "mac_tcl_reg_seq_hwiobase.h" 33*5113495bSYour Name #ifdef SCALE_INCLUDES 34*5113495bSYour Name #include "HALhwio.h" 35*5113495bSYour Name #else 36*5113495bSYour Name #include "msmhwio.h" 37*5113495bSYour Name #endif 38*5113495bSYour Name 39*5113495bSYour Name 40*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 41*5113495bSYour Name // Register Data for Block MAC_TCL_REG 42*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 43*5113495bSYour Name 44*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CTRL //// 45*5113495bSYour Name 46*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x) (x+0x00000000) 47*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_PHYS(x) (x+0x00000000) 48*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK 0x0003ffe0 49*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_SHFT 5 50*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x) \ 51*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK) 52*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ 53*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask) 54*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUT(x, val) \ 55*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), val) 56*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 57*5113495bSYour Name do {\ 58*5113495bSYour Name HWIO_INTLOCK(); \ 59*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x)); \ 60*5113495bSYour Name HWIO_INTFREE();\ 61*5113495bSYour Name } while (0) 62*5113495bSYour Name 63*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 64*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 65*5113495bSYour Name 66*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 67*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 68*5113495bSYour Name 69*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CTRL //// 70*5113495bSYour Name 71*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x) (x+0x00000004) 72*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_PHYS(x) (x+0x00000004) 73*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK 0x0003ffe0 74*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_SHFT 5 75*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x) \ 76*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK) 77*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ 78*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask) 79*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUT(x, val) \ 80*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), val) 81*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ 82*5113495bSYour Name do {\ 83*5113495bSYour Name HWIO_INTLOCK(); \ 84*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x)); \ 85*5113495bSYour Name HWIO_INTFREE();\ 86*5113495bSYour Name } while (0) 87*5113495bSYour Name 88*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 89*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 90*5113495bSYour Name 91*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_BMSK 0x00000020 92*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_SHFT 0x5 93*5113495bSYour Name 94*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CTRL //// 95*5113495bSYour Name 96*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x) (x+0x00000008) 97*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_PHYS(x) (x+0x00000008) 98*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK 0x0003ffe0 99*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_SHFT 5 100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x) \ 101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK) 102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ 103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask) 104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUT(x, val) \ 105*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), val) 106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUTM(x, mask, val) \ 107*5113495bSYour Name do {\ 108*5113495bSYour Name HWIO_INTLOCK(); \ 109*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x)); \ 110*5113495bSYour Name HWIO_INTFREE();\ 111*5113495bSYour Name } while (0) 112*5113495bSYour Name 113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 114*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 115*5113495bSYour Name 116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_BMSK 0x00000020 117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_SHFT 0x5 118*5113495bSYour Name 119*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CTRL //// 120*5113495bSYour Name 121*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x) (x+0x0000000c) 122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_PHYS(x) (x+0x0000000c) 123*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK 0x0003ffe0 124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_SHFT 5 125*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x) \ 126*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK) 127*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_INM(x, mask) \ 128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask) 129*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUT(x, val) \ 130*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), val) 131*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 132*5113495bSYour Name do {\ 133*5113495bSYour Name HWIO_INTLOCK(); \ 134*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x)); \ 135*5113495bSYour Name HWIO_INTFREE();\ 136*5113495bSYour Name } while (0) 137*5113495bSYour Name 138*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 139*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 140*5113495bSYour Name 141*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 142*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 143*5113495bSYour Name 144*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CTRL //// 145*5113495bSYour Name 146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x) (x+0x00000010) 147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_PHYS(x) (x+0x00000010) 148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK 0x0003ffe0 149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_SHFT 5 150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x) \ 151*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK) 152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_INM(x, mask) \ 153*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask) 154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUT(x, val) \ 155*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), val) 156*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUTM(x, mask, val) \ 157*5113495bSYour Name do {\ 158*5113495bSYour Name HWIO_INTLOCK(); \ 159*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x)); \ 160*5113495bSYour Name HWIO_INTFREE();\ 161*5113495bSYour Name } while (0) 162*5113495bSYour Name 163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 165*5113495bSYour Name 166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_BMSK 0x00000020 167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_SHFT 0x5 168*5113495bSYour Name 169*5113495bSYour Name //// Register TCL_R0_CONS_RING_CMN_CTRL_REG //// 170*5113495bSYour Name 171*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x) (x+0x00000014) 172*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_PHYS(x) (x+0x00000014) 173*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK 0x000fffff 174*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SHFT 0 175*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x) \ 176*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK) 177*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INM(x, mask) \ 178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask) 179*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUT(x, val) \ 180*5113495bSYour Name out_dword( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), val) 181*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUTM(x, mask, val) \ 182*5113495bSYour Name do {\ 183*5113495bSYour Name HWIO_INTLOCK(); \ 184*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask, val, HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x)); \ 185*5113495bSYour Name HWIO_INTFREE();\ 186*5113495bSYour Name } while (0) 187*5113495bSYour Name 188*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_BMSK 0x00080000 189*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_SHFT 0x13 190*5113495bSYour Name 191*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_BMSK 0x00040000 192*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_SHFT 0x12 193*5113495bSYour Name 194*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK 0x00020000 195*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT 0x11 196*5113495bSYour Name 197*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_BMSK 0x0001c000 198*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_SHFT 0xe 199*5113495bSYour Name 200*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_BMSK 0x00002000 201*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_SHFT 0xd 202*5113495bSYour Name 203*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RNG_HALT_STAT_BMSK 0x00001000 204*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RNG_HALT_STAT_SHFT 0xc 205*5113495bSYour Name 206*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_BMSK 0x00000800 207*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_SHFT 0xb 208*5113495bSYour Name 209*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_BMSK 0x00000400 210*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_SHFT 0xa 211*5113495bSYour Name 212*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_BMSK 0x00000200 213*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_SHFT 0x9 214*5113495bSYour Name 215*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_BMSK 0x00000100 216*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_SHFT 0x8 217*5113495bSYour Name 218*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RNG_HALT_BMSK 0x00000080 219*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RNG_HALT_SHFT 0x7 220*5113495bSYour Name 221*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_BMSK 0x00000040 222*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_SHFT 0x6 223*5113495bSYour Name 224*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_BMSK 0x00000020 225*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_SHFT 0x5 226*5113495bSYour Name 227*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_BMSK 0x00000010 228*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_SHFT 0x4 229*5113495bSYour Name 230*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_BMSK 0x00000008 231*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_SHFT 0x3 232*5113495bSYour Name 233*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_BMSK 0x00000004 234*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_SHFT 0x2 235*5113495bSYour Name 236*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_BMSK 0x00000002 237*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_SHFT 0x1 238*5113495bSYour Name 239*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_BMSK 0x00000001 240*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_SHFT 0x0 241*5113495bSYour Name 242*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_CTRL //// 243*5113495bSYour Name 244*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x) (x+0x00000018) 245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_PHYS(x) (x+0x00000018) 246*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK 0x0000ffff 247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_SHFT 0 248*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x) \ 249*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK) 250*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_INM(x, mask) \ 251*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask) 252*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUT(x, val) \ 253*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), val) 254*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUTM(x, mask, val) \ 255*5113495bSYour Name do {\ 256*5113495bSYour Name HWIO_INTLOCK(); \ 257*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x)); \ 258*5113495bSYour Name HWIO_INTFREE();\ 259*5113495bSYour Name } while (0) 260*5113495bSYour Name 261*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_BMSK 0x0000c000 262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_SHFT 0xe 263*5113495bSYour Name 264*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_BMSK 0x00002000 265*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_SHFT 0xd 266*5113495bSYour Name 267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_BMSK 0x00001000 268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_SHFT 0xc 269*5113495bSYour Name 270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 271*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 272*5113495bSYour Name 273*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_CTRL //// 274*5113495bSYour Name 275*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x) (x+0x0000001c) 276*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_PHYS(x) (x+0x0000001c) 277*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK 0x00000fff 278*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_SHFT 0 279*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x) \ 280*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK) 281*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_INM(x, mask) \ 282*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask) 283*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUT(x, val) \ 284*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), val) 285*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUTM(x, mask, val) \ 286*5113495bSYour Name do {\ 287*5113495bSYour Name HWIO_INTLOCK(); \ 288*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x)); \ 289*5113495bSYour Name HWIO_INTFREE();\ 290*5113495bSYour Name } while (0) 291*5113495bSYour Name 292*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 293*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 294*5113495bSYour Name 295*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_CTRL //// 296*5113495bSYour Name 297*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x) (x+0x00000020) 298*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_PHYS(x) (x+0x00000020) 299*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK 0x00000fff 300*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_SHFT 0 301*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x) \ 302*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK) 303*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_INM(x, mask) \ 304*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask) 305*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUT(x, val) \ 306*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), val) 307*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUTM(x, mask, val) \ 308*5113495bSYour Name do {\ 309*5113495bSYour Name HWIO_INTLOCK(); \ 310*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x)); \ 311*5113495bSYour Name HWIO_INTFREE();\ 312*5113495bSYour Name } while (0) 313*5113495bSYour Name 314*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 315*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 316*5113495bSYour Name 317*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_CTRL //// 318*5113495bSYour Name 319*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x) (x+0x00000024) 320*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_PHYS(x) (x+0x00000024) 321*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK 0x00000fff 322*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_SHFT 0 323*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x) \ 324*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK) 325*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_INM(x, mask) \ 326*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask) 327*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUT(x, val) \ 328*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), val) 329*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUTM(x, mask, val) \ 330*5113495bSYour Name do {\ 331*5113495bSYour Name HWIO_INTLOCK(); \ 332*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x)); \ 333*5113495bSYour Name HWIO_INTFREE();\ 334*5113495bSYour Name } while (0) 335*5113495bSYour Name 336*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 337*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 338*5113495bSYour Name 339*5113495bSYour Name //// Register TCL_R0_GEN_CTRL //// 340*5113495bSYour Name 341*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDR(x) (x+0x00000028) 342*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PHYS(x) (x+0x00000028) 343*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_RMSK 0xfffff1fb 344*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_SHFT 0 345*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_IN(x) \ 346*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), HWIO_TCL_R0_GEN_CTRL_RMSK) 347*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_INM(x, mask) \ 348*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask) 349*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUT(x, val) \ 350*5113495bSYour Name out_dword( HWIO_TCL_R0_GEN_CTRL_ADDR(x), val) 351*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUTM(x, mask, val) \ 352*5113495bSYour Name do {\ 353*5113495bSYour Name HWIO_INTLOCK(); \ 354*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GEN_CTRL_IN(x)); \ 355*5113495bSYour Name HWIO_INTFREE();\ 356*5113495bSYour Name } while (0) 357*5113495bSYour Name 358*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_BMSK 0xffff0000 359*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_SHFT 0x10 360*5113495bSYour Name 361*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_BMSK 0x00008000 362*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_SHFT 0xf 363*5113495bSYour Name 364*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_BMSK 0x00004000 365*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_SHFT 0xe 366*5113495bSYour Name 367*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_BMSK 0x00002000 368*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_SHFT 0xd 369*5113495bSYour Name 370*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_BMSK 0x00001000 371*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_SHFT 0xc 372*5113495bSYour Name 373*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_BMSK 0x00000100 374*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_SHFT 0x8 375*5113495bSYour Name 376*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_BMSK 0x00000080 377*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_SHFT 0x7 378*5113495bSYour Name 379*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_BMSK 0x00000040 380*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_SHFT 0x6 381*5113495bSYour Name 382*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_BMSK 0x00000020 383*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_SHFT 0x5 384*5113495bSYour Name 385*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_BMSK 0x00000010 386*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_SHFT 0x4 387*5113495bSYour Name 388*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_BMSK 0x00000008 389*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_SHFT 0x3 390*5113495bSYour Name 391*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_BMSK 0x00000002 392*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_SHFT 0x1 393*5113495bSYour Name 394*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_BMSK 0x00000001 395*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_SHFT 0x0 396*5113495bSYour Name 397*5113495bSYour Name //// Register TCL_R0_DSCP_TID_MAP_n //// 398*5113495bSYour Name 399*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n) (base+0x2C+0x4*n) 400*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_PHYS(base, n) (base+0x2C+0x4*n) 401*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK 0xffffffff 402*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_SHFT 0 403*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_MAXn 287 404*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n) \ 405*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK) 406*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INMI(base, n, mask) \ 407*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask) 408*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTI(base, n, val) \ 409*5113495bSYour Name out_dword( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), val) 410*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTMI(base, n, mask, val) \ 411*5113495bSYour Name do {\ 412*5113495bSYour Name HWIO_INTLOCK(); \ 413*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask, val, HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n)); \ 414*5113495bSYour Name HWIO_INTFREE();\ 415*5113495bSYour Name } while (0) 416*5113495bSYour Name 417*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_BMSK 0xffffffff 418*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_SHFT 0x0 419*5113495bSYour Name 420*5113495bSYour Name //// Register TCL_R0_PCP_TID_MAP //// 421*5113495bSYour Name 422*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_ADDR(x) (x+0x000004ac) 423*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PHYS(x) (x+0x000004ac) 424*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_RMSK 0x00ffffff 425*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_SHFT 0 426*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_IN(x) \ 427*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), HWIO_TCL_R0_PCP_TID_MAP_RMSK) 428*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_INM(x, mask) \ 429*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask) 430*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUT(x, val) \ 431*5113495bSYour Name out_dword( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), val) 432*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUTM(x, mask, val) \ 433*5113495bSYour Name do {\ 434*5113495bSYour Name HWIO_INTLOCK(); \ 435*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask, val, HWIO_TCL_R0_PCP_TID_MAP_IN(x)); \ 436*5113495bSYour Name HWIO_INTFREE();\ 437*5113495bSYour Name } while (0) 438*5113495bSYour Name 439*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_BMSK 0x00e00000 440*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT 0x15 441*5113495bSYour Name 442*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_BMSK 0x001c0000 443*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT 0x12 444*5113495bSYour Name 445*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_BMSK 0x00038000 446*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT 0xf 447*5113495bSYour Name 448*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_BMSK 0x00007000 449*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT 0xc 450*5113495bSYour Name 451*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_BMSK 0x00000e00 452*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT 0x9 453*5113495bSYour Name 454*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_BMSK 0x000001c0 455*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT 0x6 456*5113495bSYour Name 457*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_BMSK 0x00000038 458*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT 0x3 459*5113495bSYour Name 460*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_BMSK 0x00000007 461*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_SHFT 0x0 462*5113495bSYour Name 463*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_31_0 //// 464*5113495bSYour Name 465*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x) (x+0x000004b0) 466*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_PHYS(x) (x+0x000004b0) 467*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK 0xffffffff 468*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_SHFT 0 469*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x) \ 470*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK) 471*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_INM(x, mask) \ 472*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask) 473*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUT(x, val) \ 474*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), val) 475*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUTM(x, mask, val) \ 476*5113495bSYour Name do {\ 477*5113495bSYour Name HWIO_INTLOCK(); \ 478*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x)); \ 479*5113495bSYour Name HWIO_INTFREE();\ 480*5113495bSYour Name } while (0) 481*5113495bSYour Name 482*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_BMSK 0xffffffff 483*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_SHFT 0x0 484*5113495bSYour Name 485*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_63_32 //// 486*5113495bSYour Name 487*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x) (x+0x000004b4) 488*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_PHYS(x) (x+0x000004b4) 489*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK 0xffffffff 490*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_SHFT 0 491*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x) \ 492*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK) 493*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_INM(x, mask) \ 494*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask) 495*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUT(x, val) \ 496*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), val) 497*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUTM(x, mask, val) \ 498*5113495bSYour Name do {\ 499*5113495bSYour Name HWIO_INTLOCK(); \ 500*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x)); \ 501*5113495bSYour Name HWIO_INTFREE();\ 502*5113495bSYour Name } while (0) 503*5113495bSYour Name 504*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_BMSK 0xffffffff 505*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_SHFT 0x0 506*5113495bSYour Name 507*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_64 //// 508*5113495bSYour Name 509*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x) (x+0x000004b8) 510*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_PHYS(x) (x+0x000004b8) 511*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK 0x00000001 512*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_SHFT 0 513*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x) \ 514*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK) 515*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_INM(x, mask) \ 516*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask) 517*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUT(x, val) \ 518*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), val) 519*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUTM(x, mask, val) \ 520*5113495bSYour Name do {\ 521*5113495bSYour Name HWIO_INTLOCK(); \ 522*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x)); \ 523*5113495bSYour Name HWIO_INTFREE();\ 524*5113495bSYour Name } while (0) 525*5113495bSYour Name 526*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_BMSK 0x00000001 527*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_SHFT 0x0 528*5113495bSYour Name 529*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_QUEUE //// 530*5113495bSYour Name 531*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x) (x+0x000004bc) 532*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PHYS(x) (x+0x000004bc) 533*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK 0x00fffdfc 534*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_SHFT 2 535*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x) \ 536*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK) 537*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_INM(x, mask) \ 538*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask) 539*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUT(x, val) \ 540*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), val) 541*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUTM(x, mask, val) \ 542*5113495bSYour Name do {\ 543*5113495bSYour Name HWIO_INTLOCK(); \ 544*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x)); \ 545*5113495bSYour Name HWIO_INTFREE();\ 546*5113495bSYour Name } while (0) 547*5113495bSYour Name 548*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_BMSK 0x00800000 549*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_SHFT 0x17 550*5113495bSYour Name 551*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_BMSK 0x00700000 552*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_SHFT 0x14 553*5113495bSYour Name 554*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_BMSK 0x000e0000 555*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_SHFT 0x11 556*5113495bSYour Name 557*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_BMSK 0x0001c000 558*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_SHFT 0xe 559*5113495bSYour Name 560*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_BMSK 0x00002000 561*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_SHFT 0xd 562*5113495bSYour Name 563*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_BMSK 0x00001000 564*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_SHFT 0xc 565*5113495bSYour Name 566*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_BMSK 0x00000800 567*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_SHFT 0xb 568*5113495bSYour Name 569*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_BMSK 0x00000400 570*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_SHFT 0xa 571*5113495bSYour Name 572*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_BMSK 0x000001c0 573*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_SHFT 0x6 574*5113495bSYour Name 575*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_BMSK 0x00000030 576*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_SHFT 0x4 577*5113495bSYour Name 578*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_BMSK 0x0000000c 579*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_SHFT 0x2 580*5113495bSYour Name 581*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_LOW //// 582*5113495bSYour Name 583*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c0) 584*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c0) 585*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 586*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_SHFT 0 587*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x) \ 588*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK) 589*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 590*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 591*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 592*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 593*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 594*5113495bSYour Name do {\ 595*5113495bSYour Name HWIO_INTLOCK(); \ 596*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 597*5113495bSYour Name HWIO_INTFREE();\ 598*5113495bSYour Name } while (0) 599*5113495bSYour Name 600*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 601*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 602*5113495bSYour Name 603*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH //// 604*5113495bSYour Name 605*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004c4) 606*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004c4) 607*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 608*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_SHFT 0 609*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 610*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK) 611*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 612*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 613*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 614*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 615*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 616*5113495bSYour Name do {\ 617*5113495bSYour Name HWIO_INTLOCK(); \ 618*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 619*5113495bSYour Name HWIO_INTFREE();\ 620*5113495bSYour Name } while (0) 621*5113495bSYour Name 622*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 623*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 624*5113495bSYour Name 625*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_LOW //// 626*5113495bSYour Name 627*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c8) 628*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c8) 629*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 630*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_SHFT 0 631*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x) \ 632*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK) 633*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 634*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 635*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 636*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 637*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 638*5113495bSYour Name do {\ 639*5113495bSYour Name HWIO_INTLOCK(); \ 640*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 641*5113495bSYour Name HWIO_INTFREE();\ 642*5113495bSYour Name } while (0) 643*5113495bSYour Name 644*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 645*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 646*5113495bSYour Name 647*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH //// 648*5113495bSYour Name 649*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004cc) 650*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004cc) 651*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 652*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_SHFT 0 653*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 654*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK) 655*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 656*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 657*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 658*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 659*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 660*5113495bSYour Name do {\ 661*5113495bSYour Name HWIO_INTLOCK(); \ 662*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 663*5113495bSYour Name HWIO_INTFREE();\ 664*5113495bSYour Name } while (0) 665*5113495bSYour Name 666*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 667*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 668*5113495bSYour Name 669*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_METADATA //// 670*5113495bSYour Name 671*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x) (x+0x000004d0) 672*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_PHYS(x) (x+0x000004d0) 673*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK 0xffffffff 674*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_SHFT 0 675*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x) \ 676*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK) 677*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_INM(x, mask) \ 678*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask) 679*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUT(x, val) \ 680*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), val) 681*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUTM(x, mask, val) \ 682*5113495bSYour Name do {\ 683*5113495bSYour Name HWIO_INTLOCK(); \ 684*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x)); \ 685*5113495bSYour Name HWIO_INTFREE();\ 686*5113495bSYour Name } while (0) 687*5113495bSYour Name 688*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_BMSK 0xffff0000 689*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_SHFT 0x10 690*5113495bSYour Name 691*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_BMSK 0x0000ffff 692*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_SHFT 0x0 693*5113495bSYour Name 694*5113495bSYour Name //// Register TCL_R0_TID_MAP_PRTY //// 695*5113495bSYour Name 696*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x) (x+0x000004d4) 697*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_PHYS(x) (x+0x000004d4) 698*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_RMSK 0x000000ef 699*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_SHFT 0 700*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_IN(x) \ 701*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), HWIO_TCL_R0_TID_MAP_PRTY_RMSK) 702*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_INM(x, mask) \ 703*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask) 704*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUT(x, val) \ 705*5113495bSYour Name out_dword( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), val) 706*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUTM(x, mask, val) \ 707*5113495bSYour Name do {\ 708*5113495bSYour Name HWIO_INTLOCK(); \ 709*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask, val, HWIO_TCL_R0_TID_MAP_PRTY_IN(x)); \ 710*5113495bSYour Name HWIO_INTFREE();\ 711*5113495bSYour Name } while (0) 712*5113495bSYour Name 713*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_BMSK 0x000000e0 714*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_SHFT 0x5 715*5113495bSYour Name 716*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_BMSK 0x0000000f 717*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_SHFT 0x0 718*5113495bSYour Name 719*5113495bSYour Name //// Register TCL_R0_INVALID_APB_ACC_ADDR //// 720*5113495bSYour Name 721*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x) (x+0x000004d8) 722*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_PHYS(x) (x+0x000004d8) 723*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK 0xffffffff 724*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_SHFT 0 725*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x) \ 726*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK) 727*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_INM(x, mask) \ 728*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask) 729*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUT(x, val) \ 730*5113495bSYour Name out_dword( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), val) 731*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUTM(x, mask, val) \ 732*5113495bSYour Name do {\ 733*5113495bSYour Name HWIO_INTLOCK(); \ 734*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask, val, HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x)); \ 735*5113495bSYour Name HWIO_INTFREE();\ 736*5113495bSYour Name } while (0) 737*5113495bSYour Name 738*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_BMSK 0xffffffff 739*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_SHFT 0x0 740*5113495bSYour Name 741*5113495bSYour Name //// Register TCL_R0_WATCHDOG //// 742*5113495bSYour Name 743*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_ADDR(x) (x+0x000004dc) 744*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_PHYS(x) (x+0x000004dc) 745*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_RMSK 0xffffffff 746*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_SHFT 0 747*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_IN(x) \ 748*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), HWIO_TCL_R0_WATCHDOG_RMSK) 749*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_INM(x, mask) \ 750*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), mask) 751*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUT(x, val) \ 752*5113495bSYour Name out_dword( HWIO_TCL_R0_WATCHDOG_ADDR(x), val) 753*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUTM(x, mask, val) \ 754*5113495bSYour Name do {\ 755*5113495bSYour Name HWIO_INTLOCK(); \ 756*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_WATCHDOG_IN(x)); \ 757*5113495bSYour Name HWIO_INTFREE();\ 758*5113495bSYour Name } while (0) 759*5113495bSYour Name 760*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_BMSK 0xffff0000 761*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_SHFT 0x10 762*5113495bSYour Name 763*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_BMSK 0x0000ffff 764*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_SHFT 0x0 765*5113495bSYour Name 766*5113495bSYour Name //// Register TCL_R0_LCE_RULE_n //// 767*5113495bSYour Name 768*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n) (base+0x4E0+0x4*n) 769*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_PHYS(base, n) (base+0x4E0+0x4*n) 770*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_RMSK 0x007fffff 771*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_SHFT 0 772*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MAXn 25 773*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INI(base, n) \ 774*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), HWIO_TCL_R0_LCE_RULE_n_RMSK) 775*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INMI(base, n, mask) \ 776*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask) 777*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTI(base, n, val) \ 778*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), val) 779*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTMI(base, n, mask, val) \ 780*5113495bSYour Name do {\ 781*5113495bSYour Name HWIO_INTLOCK(); \ 782*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_RULE_n_INI(base, n)); \ 783*5113495bSYour Name HWIO_INTFREE();\ 784*5113495bSYour Name } while (0) 785*5113495bSYour Name 786*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_BMSK 0x00400000 787*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_SHFT 0x16 788*5113495bSYour Name 789*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_BMSK 0x00200000 790*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_SHFT 0x15 791*5113495bSYour Name 792*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_BMSK 0x00180000 793*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_SHFT 0x13 794*5113495bSYour Name 795*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_BMSK 0x00040000 796*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_SHFT 0x12 797*5113495bSYour Name 798*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_BMSK 0x00020000 799*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_SHFT 0x11 800*5113495bSYour Name 801*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_BMSK 0x00010000 802*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_SHFT 0x10 803*5113495bSYour Name 804*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_BMSK 0x0000ffff 805*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_SHFT 0x0 806*5113495bSYour Name 807*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n //// 808*5113495bSYour Name 809*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n) (base+0x548+0x4*n) 810*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_PHYS(base, n) (base+0x548+0x4*n) 811*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK 0xffffffff 812*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_SHFT 0 813*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_MAXn 25 814*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n) \ 815*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK) 816*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INMI(base, n, mask) \ 817*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask) 818*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTI(base, n, val) \ 819*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), val) 820*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTMI(base, n, mask, val) \ 821*5113495bSYour Name do {\ 822*5113495bSYour Name HWIO_INTLOCK(); \ 823*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n)); \ 824*5113495bSYour Name HWIO_INTFREE();\ 825*5113495bSYour Name } while (0) 826*5113495bSYour Name 827*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_BMSK 0xffffffff 828*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_SHFT 0x0 829*5113495bSYour Name 830*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n //// 831*5113495bSYour Name 832*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n) (base+0x5B0+0x4*n) 833*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_PHYS(base, n) (base+0x5B0+0x4*n) 834*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK 0x000000ff 835*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_SHFT 0 836*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_MAXn 25 837*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n) \ 838*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK) 839*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INMI(base, n, mask) \ 840*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask) 841*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTI(base, n, val) \ 842*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), val) 843*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTMI(base, n, mask, val) \ 844*5113495bSYour Name do {\ 845*5113495bSYour Name HWIO_INTLOCK(); \ 846*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n)); \ 847*5113495bSYour Name HWIO_INTFREE();\ 848*5113495bSYour Name } while (0) 849*5113495bSYour Name 850*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_BMSK 0x000000ff 851*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_SHFT 0x0 852*5113495bSYour Name 853*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_HANDLER_n //// 854*5113495bSYour Name 855*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n) (base+0x618+0x4*n) 856*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_PHYS(base, n) (base+0x618+0x4*n) 857*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK 0x003fffff 858*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_SHFT 0 859*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MAXn 25 860*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n) \ 861*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK) 862*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INMI(base, n, mask) \ 863*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask) 864*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTI(base, n, val) \ 865*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), val) 866*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTMI(base, n, mask, val) \ 867*5113495bSYour Name do {\ 868*5113495bSYour Name HWIO_INTLOCK(); \ 869*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n)); \ 870*5113495bSYour Name HWIO_INTFREE();\ 871*5113495bSYour Name } while (0) 872*5113495bSYour Name 873*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_BMSK 0x00200000 874*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_SHFT 0x15 875*5113495bSYour Name 876*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_BMSK 0x001fffe0 877*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_SHFT 0x5 878*5113495bSYour Name 879*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_BMSK 0x00000010 880*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_SHFT 0x4 881*5113495bSYour Name 882*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_BMSK 0x00000008 883*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_SHFT 0x3 884*5113495bSYour Name 885*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_BMSK 0x00000004 886*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_SHFT 0x2 887*5113495bSYour Name 888*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_BMSK 0x00000003 889*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_SHFT 0x0 890*5113495bSYour Name 891*5113495bSYour Name //// Register TCL_R0_CLKGATE_DISABLE //// 892*5113495bSYour Name 893*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x) (x+0x00000680) 894*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PHYS(x) (x+0x00000680) 895*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_RMSK 0xffffffff 896*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SHFT 0 897*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_IN(x) \ 898*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_CLKGATE_DISABLE_RMSK) 899*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_INM(x, mask) \ 900*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask) 901*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUT(x, val) \ 902*5113495bSYour Name out_dword( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), val) 903*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUTM(x, mask, val) \ 904*5113495bSYour Name do {\ 905*5113495bSYour Name HWIO_INTLOCK(); \ 906*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_CLKGATE_DISABLE_IN(x)); \ 907*5113495bSYour Name HWIO_INTFREE();\ 908*5113495bSYour Name } while (0) 909*5113495bSYour Name 910*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_BMSK 0x80000000 911*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_SHFT 0x1f 912*5113495bSYour Name 913*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 914*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 915*5113495bSYour Name 916*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_BMSK 0x20000000 917*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_SHFT 0x1d 918*5113495bSYour Name 919*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_BMSK 0x10000000 920*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_SHFT 0x1c 921*5113495bSYour Name 922*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_BMSK 0x08000000 923*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_SHFT 0x1b 924*5113495bSYour Name 925*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_BMSK 0x04000000 926*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_SHFT 0x1a 927*5113495bSYour Name 928*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_BMSK 0x02000000 929*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_SHFT 0x19 930*5113495bSYour Name 931*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_BMSK 0x01000000 932*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_SHFT 0x18 933*5113495bSYour Name 934*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_BMSK 0x00800000 935*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_SHFT 0x17 936*5113495bSYour Name 937*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_BMSK 0x00400000 938*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_SHFT 0x16 939*5113495bSYour Name 940*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_BMSK 0x00200000 941*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_SHFT 0x15 942*5113495bSYour Name 943*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_BMSK 0x00100000 944*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_SHFT 0x14 945*5113495bSYour Name 946*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_BMSK 0x00080000 947*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_SHFT 0x13 948*5113495bSYour Name 949*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_BMSK 0x00040000 950*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_SHFT 0x12 951*5113495bSYour Name 952*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_BMSK 0x00020000 953*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_SHFT 0x11 954*5113495bSYour Name 955*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_BMSK 0x00010000 956*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_SHFT 0x10 957*5113495bSYour Name 958*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_BMSK 0x00008000 959*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_SHFT 0xf 960*5113495bSYour Name 961*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_BMSK 0x00004000 962*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_SHFT 0xe 963*5113495bSYour Name 964*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_BMSK 0x00002000 965*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_SHFT 0xd 966*5113495bSYour Name 967*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_BMSK 0x00001000 968*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_SHFT 0xc 969*5113495bSYour Name 970*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_BMSK 0x00000800 971*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_SHFT 0xb 972*5113495bSYour Name 973*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_BMSK 0x00000400 974*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_SHFT 0xa 975*5113495bSYour Name 976*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_BMSK 0x00000200 977*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_SHFT 0x9 978*5113495bSYour Name 979*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_BMSK 0x00000100 980*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_SHFT 0x8 981*5113495bSYour Name 982*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_BMSK 0x00000080 983*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_SHFT 0x7 984*5113495bSYour Name 985*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_BMSK 0x00000040 986*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_SHFT 0x6 987*5113495bSYour Name 988*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_BMSK 0x00000020 989*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_SHFT 0x5 990*5113495bSYour Name 991*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_BMSK 0x00000010 992*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_SHFT 0x4 993*5113495bSYour Name 994*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_BMSK 0x00000008 995*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_SHFT 0x3 996*5113495bSYour Name 997*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_BMSK 0x00000004 998*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_SHFT 0x2 999*5113495bSYour Name 1000*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_BMSK 0x00000002 1001*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_SHFT 0x1 1002*5113495bSYour Name 1003*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_BMSK 0x00000001 1004*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_SHFT 0x0 1005*5113495bSYour Name 1006*5113495bSYour Name //// Register TCL_R0_CREDIT_COUNT //// 1007*5113495bSYour Name 1008*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ADDR(x) (x+0x00000684) 1009*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_PHYS(x) (x+0x00000684) 1010*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_RMSK 0x0001ffff 1011*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_SHFT 0 1012*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_IN(x) \ 1013*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CREDIT_COUNT_RMSK) 1014*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_INM(x, mask) \ 1015*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask) 1016*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUT(x, val) \ 1017*5113495bSYour Name out_dword( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), val) 1018*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUTM(x, mask, val) \ 1019*5113495bSYour Name do {\ 1020*5113495bSYour Name HWIO_INTLOCK(); \ 1021*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CREDIT_COUNT_IN(x)); \ 1022*5113495bSYour Name HWIO_INTFREE();\ 1023*5113495bSYour Name } while (0) 1024*5113495bSYour Name 1025*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_BMSK 0x00010000 1026*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_SHFT 0x10 1027*5113495bSYour Name 1028*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1029*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_SHFT 0x0 1030*5113495bSYour Name 1031*5113495bSYour Name //// Register TCL_R0_CURRENT_CREDIT_COUNT //// 1032*5113495bSYour Name 1033*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x) (x+0x00000688) 1034*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_PHYS(x) (x+0x00000688) 1035*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK 0x0000ffff 1036*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_SHFT 0 1037*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x) \ 1038*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK) 1039*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_INM(x, mask) \ 1040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask) 1041*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUT(x, val) \ 1042*5113495bSYour Name out_dword( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), val) 1043*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUTM(x, mask, val) \ 1044*5113495bSYour Name do {\ 1045*5113495bSYour Name HWIO_INTLOCK(); \ 1046*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x)); \ 1047*5113495bSYour Name HWIO_INTFREE();\ 1048*5113495bSYour Name } while (0) 1049*5113495bSYour Name 1050*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1051*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_SHFT 0x0 1052*5113495bSYour Name 1053*5113495bSYour Name //// Register TCL_R0_S_PARE_REGISTER //// 1054*5113495bSYour Name 1055*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x) (x+0x0000068c) 1056*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_PHYS(x) (x+0x0000068c) 1057*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_RMSK 0xffffffff 1058*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_SHFT 0 1059*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_IN(x) \ 1060*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), HWIO_TCL_R0_S_PARE_REGISTER_RMSK) 1061*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_INM(x, mask) \ 1062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask) 1063*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUT(x, val) \ 1064*5113495bSYour Name out_dword( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), val) 1065*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUTM(x, mask, val) \ 1066*5113495bSYour Name do {\ 1067*5113495bSYour Name HWIO_INTLOCK(); \ 1068*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R0_S_PARE_REGISTER_IN(x)); \ 1069*5113495bSYour Name HWIO_INTFREE();\ 1070*5113495bSYour Name } while (0) 1071*5113495bSYour Name 1072*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_BMSK 0xffffffff 1073*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_SHFT 0x0 1074*5113495bSYour Name 1075*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_LSB //// 1076*5113495bSYour Name 1077*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x00000690) 1078*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x00000690) 1079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 1080*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_SHFT 0 1081*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x) \ 1082*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK) 1083*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_INM(x, mask) \ 1084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask) 1085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUT(x, val) \ 1086*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), val) 1087*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 1088*5113495bSYour Name do {\ 1089*5113495bSYour Name HWIO_INTLOCK(); \ 1090*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x)); \ 1091*5113495bSYour Name HWIO_INTFREE();\ 1092*5113495bSYour Name } while (0) 1093*5113495bSYour Name 1094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1095*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1096*5113495bSYour Name 1097*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_MSB //// 1098*5113495bSYour Name 1099*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x00000694) 1100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x00000694) 1101*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK 0x0fffffff 1102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_SHFT 0 1103*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x) \ 1104*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK) 1105*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_INM(x, mask) \ 1106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask) 1107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUT(x, val) \ 1108*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), val) 1109*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 1110*5113495bSYour Name do {\ 1111*5113495bSYour Name HWIO_INTLOCK(); \ 1112*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x)); \ 1113*5113495bSYour Name HWIO_INTFREE();\ 1114*5113495bSYour Name } while (0) 1115*5113495bSYour Name 1116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1118*5113495bSYour Name 1119*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1121*5113495bSYour Name 1122*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_ID //// 1123*5113495bSYour Name 1124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x) (x+0x00000698) 1125*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_PHYS(x) (x+0x00000698) 1126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK 0x000000ff 1127*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_SHFT 0 1128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x) \ 1129*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK) 1130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_INM(x, mask) \ 1131*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask) 1132*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUT(x, val) \ 1133*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), val) 1134*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUTM(x, mask, val) \ 1135*5113495bSYour Name do {\ 1136*5113495bSYour Name HWIO_INTLOCK(); \ 1137*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x)); \ 1138*5113495bSYour Name HWIO_INTFREE();\ 1139*5113495bSYour Name } while (0) 1140*5113495bSYour Name 1141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 1143*5113495bSYour Name 1144*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_STATUS //// 1145*5113495bSYour Name 1146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x) (x+0x0000069c) 1147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_PHYS(x) (x+0x0000069c) 1148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK 0xffffffff 1149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_SHFT 0 1150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x) \ 1151*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK) 1152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_INM(x, mask) \ 1153*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask) 1154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUT(x, val) \ 1155*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), val) 1156*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 1157*5113495bSYour Name do {\ 1158*5113495bSYour Name HWIO_INTLOCK(); \ 1159*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x)); \ 1160*5113495bSYour Name HWIO_INTFREE();\ 1161*5113495bSYour Name } while (0) 1162*5113495bSYour Name 1163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1165*5113495bSYour Name 1166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1168*5113495bSYour Name 1169*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MISC //// 1170*5113495bSYour Name 1171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x) (x+0x000006a0) 1172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_PHYS(x) (x+0x000006a0) 1173*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK 0x003fffff 1174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SHFT 0 1175*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x) \ 1176*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK) 1177*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_INM(x, mask) \ 1178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask) 1179*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUT(x, val) \ 1180*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), val) 1181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUTM(x, mask, val) \ 1182*5113495bSYour Name do {\ 1183*5113495bSYour Name HWIO_INTLOCK(); \ 1184*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x)); \ 1185*5113495bSYour Name HWIO_INTFREE();\ 1186*5113495bSYour Name } while (0) 1187*5113495bSYour Name 1188*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1189*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 1190*5113495bSYour Name 1191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1193*5113495bSYour Name 1194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1195*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1196*5113495bSYour Name 1197*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1198*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1199*5113495bSYour Name 1200*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1201*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 1202*5113495bSYour Name 1203*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1204*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1205*5113495bSYour Name 1206*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1208*5113495bSYour Name 1209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1210*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1211*5113495bSYour Name 1212*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1213*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 1214*5113495bSYour Name 1215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1216*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1217*5113495bSYour Name 1218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1220*5113495bSYour Name 1221*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_LSB //// 1222*5113495bSYour Name 1223*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000006ac) 1224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000006ac) 1225*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 1226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_SHFT 0 1227*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 1228*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK) 1229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 1230*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 1231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 1232*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 1233*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1234*5113495bSYour Name do {\ 1235*5113495bSYour Name HWIO_INTLOCK(); \ 1236*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 1237*5113495bSYour Name HWIO_INTFREE();\ 1238*5113495bSYour Name } while (0) 1239*5113495bSYour Name 1240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1241*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1242*5113495bSYour Name 1243*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_MSB //// 1244*5113495bSYour Name 1245*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000006b0) 1246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000006b0) 1247*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 1248*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_SHFT 0 1249*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 1250*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK) 1251*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 1252*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 1253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 1254*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 1255*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1256*5113495bSYour Name do {\ 1257*5113495bSYour Name HWIO_INTLOCK(); \ 1258*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 1259*5113495bSYour Name HWIO_INTFREE();\ 1260*5113495bSYour Name } while (0) 1261*5113495bSYour Name 1262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1263*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1264*5113495bSYour Name 1265*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 1266*5113495bSYour Name 1267*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000006c0) 1268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000006c0) 1269*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1271*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1272*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1273*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1274*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1275*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1276*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1277*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1278*5113495bSYour Name do {\ 1279*5113495bSYour Name HWIO_INTLOCK(); \ 1280*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1281*5113495bSYour Name HWIO_INTFREE();\ 1282*5113495bSYour Name } while (0) 1283*5113495bSYour Name 1284*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1285*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1286*5113495bSYour Name 1287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1289*5113495bSYour Name 1290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1292*5113495bSYour Name 1293*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 1294*5113495bSYour Name 1295*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000006c4) 1296*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000006c4) 1297*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1298*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1299*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1300*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1301*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1302*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1303*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1304*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1306*5113495bSYour Name do {\ 1307*5113495bSYour Name HWIO_INTLOCK(); \ 1308*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1309*5113495bSYour Name HWIO_INTFREE();\ 1310*5113495bSYour Name } while (0) 1311*5113495bSYour Name 1312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1314*5113495bSYour Name 1315*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS //// 1316*5113495bSYour Name 1317*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000006c8) 1318*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000006c8) 1319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1320*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 1321*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 1322*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 1323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1324*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1325*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1326*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1327*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1328*5113495bSYour Name do {\ 1329*5113495bSYour Name HWIO_INTLOCK(); \ 1330*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 1331*5113495bSYour Name HWIO_INTFREE();\ 1332*5113495bSYour Name } while (0) 1333*5113495bSYour Name 1334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1336*5113495bSYour Name 1337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1339*5113495bSYour Name 1340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1341*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1342*5113495bSYour Name 1343*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 1344*5113495bSYour Name 1345*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000006cc) 1346*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000006cc) 1347*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1348*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1349*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1350*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1352*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1354*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1356*5113495bSYour Name do {\ 1357*5113495bSYour Name HWIO_INTLOCK(); \ 1358*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1359*5113495bSYour Name HWIO_INTFREE();\ 1360*5113495bSYour Name } while (0) 1361*5113495bSYour Name 1362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1364*5113495bSYour Name 1365*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 1366*5113495bSYour Name 1367*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000006d0) 1368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000006d0) 1369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1370*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1371*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1372*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1373*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1374*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1376*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1377*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1378*5113495bSYour Name do {\ 1379*5113495bSYour Name HWIO_INTLOCK(); \ 1380*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1381*5113495bSYour Name HWIO_INTFREE();\ 1382*5113495bSYour Name } while (0) 1383*5113495bSYour Name 1384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1385*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1386*5113495bSYour Name 1387*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 1388*5113495bSYour Name 1389*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000006d4) 1390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000006d4) 1391*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1392*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1393*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1394*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1395*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1396*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1398*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1399*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1400*5113495bSYour Name do {\ 1401*5113495bSYour Name HWIO_INTLOCK(); \ 1402*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1403*5113495bSYour Name HWIO_INTFREE();\ 1404*5113495bSYour Name } while (0) 1405*5113495bSYour Name 1406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1407*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1408*5113495bSYour Name 1409*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1411*5113495bSYour Name 1412*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB //// 1413*5113495bSYour Name 1414*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000006d8) 1415*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000006d8) 1416*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1417*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 1418*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 1419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK) 1420*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 1421*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 1422*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 1423*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 1424*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1425*5113495bSYour Name do {\ 1426*5113495bSYour Name HWIO_INTLOCK(); \ 1427*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 1428*5113495bSYour Name HWIO_INTFREE();\ 1429*5113495bSYour Name } while (0) 1430*5113495bSYour Name 1431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1433*5113495bSYour Name 1434*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB //// 1435*5113495bSYour Name 1436*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000006dc) 1437*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000006dc) 1438*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1439*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 1440*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 1441*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK) 1442*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 1443*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 1444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 1445*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 1446*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1447*5113495bSYour Name do {\ 1448*5113495bSYour Name HWIO_INTLOCK(); \ 1449*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 1450*5113495bSYour Name HWIO_INTFREE();\ 1451*5113495bSYour Name } while (0) 1452*5113495bSYour Name 1453*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1455*5113495bSYour Name 1456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1458*5113495bSYour Name 1459*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_DATA //// 1460*5113495bSYour Name 1461*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x000006e0) 1462*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x000006e0) 1463*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 1464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_SHFT 0 1465*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x) \ 1466*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK) 1467*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 1468*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 1469*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 1470*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), val) 1471*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 1472*5113495bSYour Name do {\ 1473*5113495bSYour Name HWIO_INTLOCK(); \ 1474*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x)); \ 1475*5113495bSYour Name HWIO_INTFREE();\ 1476*5113495bSYour Name } while (0) 1477*5113495bSYour Name 1478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 1480*5113495bSYour Name 1481*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET //// 1482*5113495bSYour Name 1483*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006e4) 1484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006e4) 1485*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1486*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 1487*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 1488*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 1489*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1490*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1492*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1494*5113495bSYour Name do {\ 1495*5113495bSYour Name HWIO_INTLOCK(); \ 1496*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 1497*5113495bSYour Name HWIO_INTFREE();\ 1498*5113495bSYour Name } while (0) 1499*5113495bSYour Name 1500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1502*5113495bSYour Name 1503*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_LSB //// 1504*5113495bSYour Name 1505*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x) (x+0x000006e8) 1506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_PHYS(x) (x+0x000006e8) 1507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK 0xffffffff 1508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_SHFT 0 1509*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x) \ 1510*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK) 1511*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_INM(x, mask) \ 1512*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask) 1513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUT(x, val) \ 1514*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), val) 1515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUTM(x, mask, val) \ 1516*5113495bSYour Name do {\ 1517*5113495bSYour Name HWIO_INTLOCK(); \ 1518*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x)); \ 1519*5113495bSYour Name HWIO_INTFREE();\ 1520*5113495bSYour Name } while (0) 1521*5113495bSYour Name 1522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1523*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1524*5113495bSYour Name 1525*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_MSB //// 1526*5113495bSYour Name 1527*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x) (x+0x000006ec) 1528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_PHYS(x) (x+0x000006ec) 1529*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK 0x0fffffff 1530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_SHFT 0 1531*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x) \ 1532*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK) 1533*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_INM(x, mask) \ 1534*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask) 1535*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUT(x, val) \ 1536*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), val) 1537*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUTM(x, mask, val) \ 1538*5113495bSYour Name do {\ 1539*5113495bSYour Name HWIO_INTLOCK(); \ 1540*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x)); \ 1541*5113495bSYour Name HWIO_INTFREE();\ 1542*5113495bSYour Name } while (0) 1543*5113495bSYour Name 1544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1545*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1546*5113495bSYour Name 1547*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1549*5113495bSYour Name 1550*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_ID //// 1551*5113495bSYour Name 1552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x) (x+0x000006f0) 1553*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_PHYS(x) (x+0x000006f0) 1554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK 0x000000ff 1555*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_SHFT 0 1556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x) \ 1557*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK) 1558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_INM(x, mask) \ 1559*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask) 1560*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUT(x, val) \ 1561*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), val) 1562*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUTM(x, mask, val) \ 1563*5113495bSYour Name do {\ 1564*5113495bSYour Name HWIO_INTLOCK(); \ 1565*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x)); \ 1566*5113495bSYour Name HWIO_INTFREE();\ 1567*5113495bSYour Name } while (0) 1568*5113495bSYour Name 1569*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_SHFT 0x0 1571*5113495bSYour Name 1572*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_STATUS //// 1573*5113495bSYour Name 1574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x) (x+0x000006f4) 1575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_PHYS(x) (x+0x000006f4) 1576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK 0xffffffff 1577*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_SHFT 0 1578*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x) \ 1579*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK) 1580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_INM(x, mask) \ 1581*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask) 1582*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUT(x, val) \ 1583*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), val) 1584*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUTM(x, mask, val) \ 1585*5113495bSYour Name do {\ 1586*5113495bSYour Name HWIO_INTLOCK(); \ 1587*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x)); \ 1588*5113495bSYour Name HWIO_INTFREE();\ 1589*5113495bSYour Name } while (0) 1590*5113495bSYour Name 1591*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1592*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1593*5113495bSYour Name 1594*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1595*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1596*5113495bSYour Name 1597*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MISC //// 1598*5113495bSYour Name 1599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x) (x+0x000006f8) 1600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_PHYS(x) (x+0x000006f8) 1601*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK 0x003fffff 1602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SHFT 0 1603*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x) \ 1604*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK) 1605*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_INM(x, mask) \ 1606*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask) 1607*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUT(x, val) \ 1608*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), val) 1609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUTM(x, mask, val) \ 1610*5113495bSYour Name do {\ 1611*5113495bSYour Name HWIO_INTLOCK(); \ 1612*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x)); \ 1613*5113495bSYour Name HWIO_INTFREE();\ 1614*5113495bSYour Name } while (0) 1615*5113495bSYour Name 1616*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1617*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_SHFT 0xe 1618*5113495bSYour Name 1619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1621*5113495bSYour Name 1622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1623*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1624*5113495bSYour Name 1625*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1626*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1627*5113495bSYour Name 1628*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1629*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_SHFT 0x6 1630*5113495bSYour Name 1631*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1632*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1633*5113495bSYour Name 1634*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1636*5113495bSYour Name 1637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1638*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1639*5113495bSYour Name 1640*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1641*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_SHFT 0x2 1642*5113495bSYour Name 1643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1644*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1645*5113495bSYour Name 1646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1648*5113495bSYour Name 1649*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_LSB //// 1650*5113495bSYour Name 1651*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000704) 1652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000704) 1653*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK 0xffffffff 1654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_SHFT 0 1655*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x) \ 1656*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK) 1657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_INM(x, mask) \ 1658*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask) 1659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUT(x, val) \ 1660*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), val) 1661*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1662*5113495bSYour Name do {\ 1663*5113495bSYour Name HWIO_INTLOCK(); \ 1664*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x)); \ 1665*5113495bSYour Name HWIO_INTFREE();\ 1666*5113495bSYour Name } while (0) 1667*5113495bSYour Name 1668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1669*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1670*5113495bSYour Name 1671*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_MSB //// 1672*5113495bSYour Name 1673*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000708) 1674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000708) 1675*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK 0x000000ff 1676*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_SHFT 0 1677*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x) \ 1678*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK) 1679*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_INM(x, mask) \ 1680*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask) 1681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUT(x, val) \ 1682*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), val) 1683*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1684*5113495bSYour Name do {\ 1685*5113495bSYour Name HWIO_INTLOCK(); \ 1686*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x)); \ 1687*5113495bSYour Name HWIO_INTFREE();\ 1688*5113495bSYour Name } while (0) 1689*5113495bSYour Name 1690*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1691*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1692*5113495bSYour Name 1693*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0 //// 1694*5113495bSYour Name 1695*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000718) 1696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000718) 1697*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1699*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1700*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1701*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1702*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1703*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1704*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1705*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1706*5113495bSYour Name do {\ 1707*5113495bSYour Name HWIO_INTLOCK(); \ 1708*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1709*5113495bSYour Name HWIO_INTFREE();\ 1710*5113495bSYour Name } while (0) 1711*5113495bSYour Name 1712*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1713*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1714*5113495bSYour Name 1715*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1716*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1717*5113495bSYour Name 1718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1719*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1720*5113495bSYour Name 1721*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1 //// 1722*5113495bSYour Name 1723*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x0000071c) 1724*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x0000071c) 1725*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1726*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1727*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1728*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1729*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1730*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1731*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1732*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1733*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1734*5113495bSYour Name do {\ 1735*5113495bSYour Name HWIO_INTLOCK(); \ 1736*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1737*5113495bSYour Name HWIO_INTFREE();\ 1738*5113495bSYour Name } while (0) 1739*5113495bSYour Name 1740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1742*5113495bSYour Name 1743*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS //// 1744*5113495bSYour Name 1745*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000720) 1746*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000720) 1747*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1748*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_SHFT 0 1749*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x) \ 1750*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK) 1751*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1752*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1753*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1754*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1755*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1756*5113495bSYour Name do {\ 1757*5113495bSYour Name HWIO_INTLOCK(); \ 1758*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x)); \ 1759*5113495bSYour Name HWIO_INTFREE();\ 1760*5113495bSYour Name } while (0) 1761*5113495bSYour Name 1762*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1763*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1764*5113495bSYour Name 1765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1766*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1767*5113495bSYour Name 1768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1769*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1770*5113495bSYour Name 1771*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER //// 1772*5113495bSYour Name 1773*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000724) 1774*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000724) 1775*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1776*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1777*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1778*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1781*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1782*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1783*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1784*5113495bSYour Name do {\ 1785*5113495bSYour Name HWIO_INTLOCK(); \ 1786*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1787*5113495bSYour Name HWIO_INTFREE();\ 1788*5113495bSYour Name } while (0) 1789*5113495bSYour Name 1790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1791*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1792*5113495bSYour Name 1793*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER //// 1794*5113495bSYour Name 1795*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000728) 1796*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000728) 1797*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1798*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1799*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1800*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1801*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1802*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1803*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1804*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1805*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1806*5113495bSYour Name do {\ 1807*5113495bSYour Name HWIO_INTLOCK(); \ 1808*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1809*5113495bSYour Name HWIO_INTFREE();\ 1810*5113495bSYour Name } while (0) 1811*5113495bSYour Name 1812*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1813*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1814*5113495bSYour Name 1815*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS //// 1816*5113495bSYour Name 1817*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x0000072c) 1818*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x0000072c) 1819*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1820*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1821*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1822*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1823*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1824*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1825*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1826*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1827*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1828*5113495bSYour Name do {\ 1829*5113495bSYour Name HWIO_INTLOCK(); \ 1830*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1831*5113495bSYour Name HWIO_INTFREE();\ 1832*5113495bSYour Name } while (0) 1833*5113495bSYour Name 1834*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1835*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1836*5113495bSYour Name 1837*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1838*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1839*5113495bSYour Name 1840*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB //// 1841*5113495bSYour Name 1842*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000730) 1843*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000730) 1844*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1845*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_SHFT 0 1846*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x) \ 1847*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK) 1848*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_INM(x, mask) \ 1849*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask) 1850*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUT(x, val) \ 1851*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), val) 1852*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1853*5113495bSYour Name do {\ 1854*5113495bSYour Name HWIO_INTLOCK(); \ 1855*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x)); \ 1856*5113495bSYour Name HWIO_INTFREE();\ 1857*5113495bSYour Name } while (0) 1858*5113495bSYour Name 1859*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1860*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1861*5113495bSYour Name 1862*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB //// 1863*5113495bSYour Name 1864*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000734) 1865*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000734) 1866*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1867*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_SHFT 0 1868*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x) \ 1869*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK) 1870*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_INM(x, mask) \ 1871*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask) 1872*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUT(x, val) \ 1873*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), val) 1874*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1875*5113495bSYour Name do {\ 1876*5113495bSYour Name HWIO_INTLOCK(); \ 1877*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x)); \ 1878*5113495bSYour Name HWIO_INTFREE();\ 1879*5113495bSYour Name } while (0) 1880*5113495bSYour Name 1881*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1882*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1883*5113495bSYour Name 1884*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1885*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1886*5113495bSYour Name 1887*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_DATA //// 1888*5113495bSYour Name 1889*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x) (x+0x00000738) 1890*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_PHYS(x) (x+0x00000738) 1891*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK 0xffffffff 1892*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_SHFT 0 1893*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x) \ 1894*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK) 1895*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_INM(x, mask) \ 1896*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask) 1897*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUT(x, val) \ 1898*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), val) 1899*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUTM(x, mask, val) \ 1900*5113495bSYour Name do {\ 1901*5113495bSYour Name HWIO_INTLOCK(); \ 1902*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x)); \ 1903*5113495bSYour Name HWIO_INTFREE();\ 1904*5113495bSYour Name } while (0) 1905*5113495bSYour Name 1906*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1907*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_SHFT 0x0 1908*5113495bSYour Name 1909*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET //// 1910*5113495bSYour Name 1911*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x0000073c) 1912*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x0000073c) 1913*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1914*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_SHFT 0 1915*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x) \ 1916*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK) 1917*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1918*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1919*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1920*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1921*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1922*5113495bSYour Name do {\ 1923*5113495bSYour Name HWIO_INTLOCK(); \ 1924*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x)); \ 1925*5113495bSYour Name HWIO_INTFREE();\ 1926*5113495bSYour Name } while (0) 1927*5113495bSYour Name 1928*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1929*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1930*5113495bSYour Name 1931*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_LSB //// 1932*5113495bSYour Name 1933*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x) (x+0x00000740) 1934*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_PHYS(x) (x+0x00000740) 1935*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK 0xffffffff 1936*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_SHFT 0 1937*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x) \ 1938*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK) 1939*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_INM(x, mask) \ 1940*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask) 1941*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUT(x, val) \ 1942*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), val) 1943*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUTM(x, mask, val) \ 1944*5113495bSYour Name do {\ 1945*5113495bSYour Name HWIO_INTLOCK(); \ 1946*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x)); \ 1947*5113495bSYour Name HWIO_INTFREE();\ 1948*5113495bSYour Name } while (0) 1949*5113495bSYour Name 1950*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1951*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1952*5113495bSYour Name 1953*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_MSB //// 1954*5113495bSYour Name 1955*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x) (x+0x00000744) 1956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_PHYS(x) (x+0x00000744) 1957*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK 0x0fffffff 1958*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_SHFT 0 1959*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x) \ 1960*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK) 1961*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_INM(x, mask) \ 1962*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask) 1963*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUT(x, val) \ 1964*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), val) 1965*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUTM(x, mask, val) \ 1966*5113495bSYour Name do {\ 1967*5113495bSYour Name HWIO_INTLOCK(); \ 1968*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x)); \ 1969*5113495bSYour Name HWIO_INTFREE();\ 1970*5113495bSYour Name } while (0) 1971*5113495bSYour Name 1972*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1973*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1974*5113495bSYour Name 1975*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1976*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1977*5113495bSYour Name 1978*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_ID //// 1979*5113495bSYour Name 1980*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x) (x+0x00000748) 1981*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_PHYS(x) (x+0x00000748) 1982*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK 0x000000ff 1983*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_SHFT 0 1984*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x) \ 1985*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK) 1986*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_INM(x, mask) \ 1987*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask) 1988*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUT(x, val) \ 1989*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), val) 1990*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUTM(x, mask, val) \ 1991*5113495bSYour Name do {\ 1992*5113495bSYour Name HWIO_INTLOCK(); \ 1993*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x)); \ 1994*5113495bSYour Name HWIO_INTFREE();\ 1995*5113495bSYour Name } while (0) 1996*5113495bSYour Name 1997*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1998*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_SHFT 0x0 1999*5113495bSYour Name 2000*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_STATUS //// 2001*5113495bSYour Name 2002*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x) (x+0x0000074c) 2003*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_PHYS(x) (x+0x0000074c) 2004*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK 0xffffffff 2005*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_SHFT 0 2006*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x) \ 2007*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK) 2008*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_INM(x, mask) \ 2009*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask) 2010*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUT(x, val) \ 2011*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), val) 2012*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUTM(x, mask, val) \ 2013*5113495bSYour Name do {\ 2014*5113495bSYour Name HWIO_INTLOCK(); \ 2015*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x)); \ 2016*5113495bSYour Name HWIO_INTFREE();\ 2017*5113495bSYour Name } while (0) 2018*5113495bSYour Name 2019*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2020*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2021*5113495bSYour Name 2022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2023*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2024*5113495bSYour Name 2025*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MISC //// 2026*5113495bSYour Name 2027*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x) (x+0x00000750) 2028*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_PHYS(x) (x+0x00000750) 2029*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK 0x003fffff 2030*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SHFT 0 2031*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x) \ 2032*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK) 2033*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_INM(x, mask) \ 2034*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask) 2035*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUT(x, val) \ 2036*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), val) 2037*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUTM(x, mask, val) \ 2038*5113495bSYour Name do {\ 2039*5113495bSYour Name HWIO_INTLOCK(); \ 2040*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x)); \ 2041*5113495bSYour Name HWIO_INTFREE();\ 2042*5113495bSYour Name } while (0) 2043*5113495bSYour Name 2044*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2045*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_SHFT 0xe 2046*5113495bSYour Name 2047*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2049*5113495bSYour Name 2050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2051*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2052*5113495bSYour Name 2053*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2054*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2055*5113495bSYour Name 2056*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2057*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_SHFT 0x6 2058*5113495bSYour Name 2059*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2060*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2061*5113495bSYour Name 2062*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2063*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2064*5113495bSYour Name 2065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2066*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2067*5113495bSYour Name 2068*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2069*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_SHFT 0x2 2070*5113495bSYour Name 2071*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2072*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2073*5113495bSYour Name 2074*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2075*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2076*5113495bSYour Name 2077*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_LSB //// 2078*5113495bSYour Name 2079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x) (x+0x0000075c) 2080*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_PHYS(x) (x+0x0000075c) 2081*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK 0xffffffff 2082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_SHFT 0 2083*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x) \ 2084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK) 2085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_INM(x, mask) \ 2086*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask) 2087*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUT(x, val) \ 2088*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), val) 2089*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2090*5113495bSYour Name do {\ 2091*5113495bSYour Name HWIO_INTLOCK(); \ 2092*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x)); \ 2093*5113495bSYour Name HWIO_INTFREE();\ 2094*5113495bSYour Name } while (0) 2095*5113495bSYour Name 2096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2097*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2098*5113495bSYour Name 2099*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_MSB //// 2100*5113495bSYour Name 2101*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000760) 2102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000760) 2103*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK 0x000000ff 2104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_SHFT 0 2105*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x) \ 2106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK) 2107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_INM(x, mask) \ 2108*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask) 2109*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUT(x, val) \ 2110*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), val) 2111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2112*5113495bSYour Name do {\ 2113*5113495bSYour Name HWIO_INTLOCK(); \ 2114*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x)); \ 2115*5113495bSYour Name HWIO_INTFREE();\ 2116*5113495bSYour Name } while (0) 2117*5113495bSYour Name 2118*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2119*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2120*5113495bSYour Name 2121*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0 //// 2122*5113495bSYour Name 2123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000770) 2124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000770) 2125*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2127*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2129*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2130*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2131*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2132*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2133*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2134*5113495bSYour Name do {\ 2135*5113495bSYour Name HWIO_INTLOCK(); \ 2136*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2137*5113495bSYour Name HWIO_INTFREE();\ 2138*5113495bSYour Name } while (0) 2139*5113495bSYour Name 2140*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2142*5113495bSYour Name 2143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2145*5113495bSYour Name 2146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2148*5113495bSYour Name 2149*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1 //// 2150*5113495bSYour Name 2151*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000774) 2152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000774) 2153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2156*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2157*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2158*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2160*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2161*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2162*5113495bSYour Name do {\ 2163*5113495bSYour Name HWIO_INTLOCK(); \ 2164*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2165*5113495bSYour Name HWIO_INTFREE();\ 2166*5113495bSYour Name } while (0) 2167*5113495bSYour Name 2168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2170*5113495bSYour Name 2171*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS //// 2172*5113495bSYour Name 2173*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000778) 2174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000778) 2175*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2176*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_SHFT 0 2177*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x) \ 2178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK) 2179*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2180*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2182*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2183*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2184*5113495bSYour Name do {\ 2185*5113495bSYour Name HWIO_INTLOCK(); \ 2186*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x)); \ 2187*5113495bSYour Name HWIO_INTFREE();\ 2188*5113495bSYour Name } while (0) 2189*5113495bSYour Name 2190*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2192*5113495bSYour Name 2193*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2195*5113495bSYour Name 2196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2197*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2198*5113495bSYour Name 2199*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER //// 2200*5113495bSYour Name 2201*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x0000077c) 2202*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x0000077c) 2203*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2204*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2205*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2208*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2210*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2211*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2212*5113495bSYour Name do {\ 2213*5113495bSYour Name HWIO_INTLOCK(); \ 2214*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2215*5113495bSYour Name HWIO_INTFREE();\ 2216*5113495bSYour Name } while (0) 2217*5113495bSYour Name 2218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2220*5113495bSYour Name 2221*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER //// 2222*5113495bSYour Name 2223*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000780) 2224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000780) 2225*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2227*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2228*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2230*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2232*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2233*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2234*5113495bSYour Name do {\ 2235*5113495bSYour Name HWIO_INTLOCK(); \ 2236*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2237*5113495bSYour Name HWIO_INTFREE();\ 2238*5113495bSYour Name } while (0) 2239*5113495bSYour Name 2240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2241*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2242*5113495bSYour Name 2243*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS //// 2244*5113495bSYour Name 2245*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000784) 2246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000784) 2247*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2248*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2249*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2250*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2251*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2252*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2254*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2255*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2256*5113495bSYour Name do {\ 2257*5113495bSYour Name HWIO_INTLOCK(); \ 2258*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2259*5113495bSYour Name HWIO_INTFREE();\ 2260*5113495bSYour Name } while (0) 2261*5113495bSYour Name 2262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2263*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2264*5113495bSYour Name 2265*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2267*5113495bSYour Name 2268*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB //// 2269*5113495bSYour Name 2270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000788) 2271*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000788) 2272*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2273*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_SHFT 0 2274*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x) \ 2275*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK) 2276*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_INM(x, mask) \ 2277*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask) 2278*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUT(x, val) \ 2279*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), val) 2280*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2281*5113495bSYour Name do {\ 2282*5113495bSYour Name HWIO_INTLOCK(); \ 2283*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x)); \ 2284*5113495bSYour Name HWIO_INTFREE();\ 2285*5113495bSYour Name } while (0) 2286*5113495bSYour Name 2287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2289*5113495bSYour Name 2290*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB //// 2291*5113495bSYour Name 2292*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x0000078c) 2293*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x0000078c) 2294*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2295*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_SHFT 0 2296*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x) \ 2297*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK) 2298*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_INM(x, mask) \ 2299*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask) 2300*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUT(x, val) \ 2301*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), val) 2302*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2303*5113495bSYour Name do {\ 2304*5113495bSYour Name HWIO_INTLOCK(); \ 2305*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x)); \ 2306*5113495bSYour Name HWIO_INTFREE();\ 2307*5113495bSYour Name } while (0) 2308*5113495bSYour Name 2309*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2310*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2311*5113495bSYour Name 2312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2314*5113495bSYour Name 2315*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_DATA //// 2316*5113495bSYour Name 2317*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x) (x+0x00000790) 2318*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_PHYS(x) (x+0x00000790) 2319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK 0xffffffff 2320*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_SHFT 0 2321*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x) \ 2322*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK) 2323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_INM(x, mask) \ 2324*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask) 2325*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUT(x, val) \ 2326*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), val) 2327*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUTM(x, mask, val) \ 2328*5113495bSYour Name do {\ 2329*5113495bSYour Name HWIO_INTLOCK(); \ 2330*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x)); \ 2331*5113495bSYour Name HWIO_INTFREE();\ 2332*5113495bSYour Name } while (0) 2333*5113495bSYour Name 2334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_SHFT 0x0 2336*5113495bSYour Name 2337*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET //// 2338*5113495bSYour Name 2339*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000794) 2340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000794) 2341*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2342*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_SHFT 0 2343*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x) \ 2344*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK) 2345*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2346*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2347*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2348*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2349*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2350*5113495bSYour Name do {\ 2351*5113495bSYour Name HWIO_INTLOCK(); \ 2352*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x)); \ 2353*5113495bSYour Name HWIO_INTFREE();\ 2354*5113495bSYour Name } while (0) 2355*5113495bSYour Name 2356*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2358*5113495bSYour Name 2359*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB //// 2360*5113495bSYour Name 2361*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x) (x+0x00000798) 2362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_PHYS(x) (x+0x00000798) 2363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK 0xffffffff 2364*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_SHFT 0 2365*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x) \ 2366*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK) 2367*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_INM(x, mask) \ 2368*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask) 2369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUT(x, val) \ 2370*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), val) 2371*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUTM(x, mask, val) \ 2372*5113495bSYour Name do {\ 2373*5113495bSYour Name HWIO_INTLOCK(); \ 2374*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x)); \ 2375*5113495bSYour Name HWIO_INTFREE();\ 2376*5113495bSYour Name } while (0) 2377*5113495bSYour Name 2378*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2379*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2380*5113495bSYour Name 2381*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB //// 2382*5113495bSYour Name 2383*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x) (x+0x0000079c) 2384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_PHYS(x) (x+0x0000079c) 2385*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK 0x0fffffff 2386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_SHFT 0 2387*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x) \ 2388*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK) 2389*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_INM(x, mask) \ 2390*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask) 2391*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUT(x, val) \ 2392*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), val) 2393*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUTM(x, mask, val) \ 2394*5113495bSYour Name do {\ 2395*5113495bSYour Name HWIO_INTLOCK(); \ 2396*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x)); \ 2397*5113495bSYour Name HWIO_INTFREE();\ 2398*5113495bSYour Name } while (0) 2399*5113495bSYour Name 2400*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2401*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2402*5113495bSYour Name 2403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2405*5113495bSYour Name 2406*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_ID //// 2407*5113495bSYour Name 2408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x) (x+0x000007a0) 2409*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_PHYS(x) (x+0x000007a0) 2410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK 0x000000ff 2411*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_SHFT 0 2412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x) \ 2413*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK) 2414*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_INM(x, mask) \ 2415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask) 2416*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUT(x, val) \ 2417*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), val) 2418*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUTM(x, mask, val) \ 2419*5113495bSYour Name do {\ 2420*5113495bSYour Name HWIO_INTLOCK(); \ 2421*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x)); \ 2422*5113495bSYour Name HWIO_INTFREE();\ 2423*5113495bSYour Name } while (0) 2424*5113495bSYour Name 2425*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_SHFT 0x0 2427*5113495bSYour Name 2428*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_STATUS //// 2429*5113495bSYour Name 2430*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x) (x+0x000007a4) 2431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_PHYS(x) (x+0x000007a4) 2432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK 0xffffffff 2433*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_SHFT 0 2434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x) \ 2435*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK) 2436*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_INM(x, mask) \ 2437*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask) 2438*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUT(x, val) \ 2439*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), val) 2440*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUTM(x, mask, val) \ 2441*5113495bSYour Name do {\ 2442*5113495bSYour Name HWIO_INTLOCK(); \ 2443*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x)); \ 2444*5113495bSYour Name HWIO_INTFREE();\ 2445*5113495bSYour Name } while (0) 2446*5113495bSYour Name 2447*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2449*5113495bSYour Name 2450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2451*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2452*5113495bSYour Name 2453*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MISC //// 2454*5113495bSYour Name 2455*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x) (x+0x000007a8) 2456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_PHYS(x) (x+0x000007a8) 2457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK 0x003fffff 2458*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SHFT 0 2459*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x) \ 2460*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK) 2461*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_INM(x, mask) \ 2462*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask) 2463*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUT(x, val) \ 2464*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), val) 2465*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUTM(x, mask, val) \ 2466*5113495bSYour Name do {\ 2467*5113495bSYour Name HWIO_INTLOCK(); \ 2468*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x)); \ 2469*5113495bSYour Name HWIO_INTFREE();\ 2470*5113495bSYour Name } while (0) 2471*5113495bSYour Name 2472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2473*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_SHFT 0xe 2474*5113495bSYour Name 2475*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2477*5113495bSYour Name 2478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2480*5113495bSYour Name 2481*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2483*5113495bSYour Name 2484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2485*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_SHFT 0x6 2486*5113495bSYour Name 2487*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2488*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2489*5113495bSYour Name 2490*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2492*5113495bSYour Name 2493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2494*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2495*5113495bSYour Name 2496*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2497*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_SHFT 0x2 2498*5113495bSYour Name 2499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2501*5113495bSYour Name 2502*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2503*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2504*5113495bSYour Name 2505*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB //// 2506*5113495bSYour Name 2507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x) (x+0x000007b4) 2508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_PHYS(x) (x+0x000007b4) 2509*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK 0xffffffff 2510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_SHFT 0 2511*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x) \ 2512*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK) 2513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_INM(x, mask) \ 2514*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask) 2515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUT(x, val) \ 2516*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), val) 2517*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2518*5113495bSYour Name do {\ 2519*5113495bSYour Name HWIO_INTLOCK(); \ 2520*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x)); \ 2521*5113495bSYour Name HWIO_INTFREE();\ 2522*5113495bSYour Name } while (0) 2523*5113495bSYour Name 2524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2525*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2526*5113495bSYour Name 2527*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB //// 2528*5113495bSYour Name 2529*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x) (x+0x000007b8) 2530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_PHYS(x) (x+0x000007b8) 2531*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK 0x000000ff 2532*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_SHFT 0 2533*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x) \ 2534*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK) 2535*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_INM(x, mask) \ 2536*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask) 2537*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUT(x, val) \ 2538*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), val) 2539*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2540*5113495bSYour Name do {\ 2541*5113495bSYour Name HWIO_INTLOCK(); \ 2542*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x)); \ 2543*5113495bSYour Name HWIO_INTFREE();\ 2544*5113495bSYour Name } while (0) 2545*5113495bSYour Name 2546*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2547*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2548*5113495bSYour Name 2549*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0 //// 2550*5113495bSYour Name 2551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000007c8) 2552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000007c8) 2553*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2555*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2556*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2557*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2558*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2559*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2560*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2561*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2562*5113495bSYour Name do {\ 2563*5113495bSYour Name HWIO_INTLOCK(); \ 2564*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2565*5113495bSYour Name HWIO_INTFREE();\ 2566*5113495bSYour Name } while (0) 2567*5113495bSYour Name 2568*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2569*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2570*5113495bSYour Name 2571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2573*5113495bSYour Name 2574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2576*5113495bSYour Name 2577*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1 //// 2578*5113495bSYour Name 2579*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000007cc) 2580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000007cc) 2581*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2582*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2583*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2584*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2585*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2586*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2588*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2589*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2590*5113495bSYour Name do {\ 2591*5113495bSYour Name HWIO_INTLOCK(); \ 2592*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2593*5113495bSYour Name HWIO_INTFREE();\ 2594*5113495bSYour Name } while (0) 2595*5113495bSYour Name 2596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2598*5113495bSYour Name 2599*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS //// 2600*5113495bSYour Name 2601*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000007d0) 2602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000007d0) 2603*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2604*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_SHFT 0 2605*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x) \ 2606*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK) 2607*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2608*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2610*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2611*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2612*5113495bSYour Name do {\ 2613*5113495bSYour Name HWIO_INTLOCK(); \ 2614*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x)); \ 2615*5113495bSYour Name HWIO_INTFREE();\ 2616*5113495bSYour Name } while (0) 2617*5113495bSYour Name 2618*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2620*5113495bSYour Name 2621*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2623*5113495bSYour Name 2624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2625*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2626*5113495bSYour Name 2627*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER //// 2628*5113495bSYour Name 2629*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000007d4) 2630*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000007d4) 2631*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2632*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2633*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2634*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2636*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2638*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2639*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2640*5113495bSYour Name do {\ 2641*5113495bSYour Name HWIO_INTLOCK(); \ 2642*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2643*5113495bSYour Name HWIO_INTFREE();\ 2644*5113495bSYour Name } while (0) 2645*5113495bSYour Name 2646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2648*5113495bSYour Name 2649*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER //// 2650*5113495bSYour Name 2651*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000007d8) 2652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000007d8) 2653*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2655*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2656*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2658*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2660*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2661*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2662*5113495bSYour Name do {\ 2663*5113495bSYour Name HWIO_INTLOCK(); \ 2664*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2665*5113495bSYour Name HWIO_INTFREE();\ 2666*5113495bSYour Name } while (0) 2667*5113495bSYour Name 2668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2669*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2670*5113495bSYour Name 2671*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS //// 2672*5113495bSYour Name 2673*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000007dc) 2674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000007dc) 2675*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2676*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2677*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2678*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2679*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2680*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2682*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2683*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2684*5113495bSYour Name do {\ 2685*5113495bSYour Name HWIO_INTLOCK(); \ 2686*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2687*5113495bSYour Name HWIO_INTFREE();\ 2688*5113495bSYour Name } while (0) 2689*5113495bSYour Name 2690*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2691*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2692*5113495bSYour Name 2693*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2695*5113495bSYour Name 2696*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB //// 2697*5113495bSYour Name 2698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000007e0) 2699*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000007e0) 2700*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2701*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_SHFT 0 2702*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x) \ 2703*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK) 2704*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_INM(x, mask) \ 2705*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask) 2706*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUT(x, val) \ 2707*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), val) 2708*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2709*5113495bSYour Name do {\ 2710*5113495bSYour Name HWIO_INTLOCK(); \ 2711*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x)); \ 2712*5113495bSYour Name HWIO_INTFREE();\ 2713*5113495bSYour Name } while (0) 2714*5113495bSYour Name 2715*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2716*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2717*5113495bSYour Name 2718*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB //// 2719*5113495bSYour Name 2720*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000007e4) 2721*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000007e4) 2722*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2723*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_SHFT 0 2724*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x) \ 2725*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK) 2726*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_INM(x, mask) \ 2727*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask) 2728*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUT(x, val) \ 2729*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), val) 2730*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2731*5113495bSYour Name do {\ 2732*5113495bSYour Name HWIO_INTLOCK(); \ 2733*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x)); \ 2734*5113495bSYour Name HWIO_INTFREE();\ 2735*5113495bSYour Name } while (0) 2736*5113495bSYour Name 2737*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2738*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2739*5113495bSYour Name 2740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2742*5113495bSYour Name 2743*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA //// 2744*5113495bSYour Name 2745*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x) (x+0x000007e8) 2746*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_PHYS(x) (x+0x000007e8) 2747*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK 0xffffffff 2748*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_SHFT 0 2749*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x) \ 2750*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK) 2751*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_INM(x, mask) \ 2752*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask) 2753*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUT(x, val) \ 2754*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), val) 2755*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUTM(x, mask, val) \ 2756*5113495bSYour Name do {\ 2757*5113495bSYour Name HWIO_INTLOCK(); \ 2758*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x)); \ 2759*5113495bSYour Name HWIO_INTFREE();\ 2760*5113495bSYour Name } while (0) 2761*5113495bSYour Name 2762*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2763*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_SHFT 0x0 2764*5113495bSYour Name 2765*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET //// 2766*5113495bSYour Name 2767*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000007ec) 2768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000007ec) 2769*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2770*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_SHFT 0 2771*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x) \ 2772*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK) 2773*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2774*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2775*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2776*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2777*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2778*5113495bSYour Name do {\ 2779*5113495bSYour Name HWIO_INTLOCK(); \ 2780*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x)); \ 2781*5113495bSYour Name HWIO_INTFREE();\ 2782*5113495bSYour Name } while (0) 2783*5113495bSYour Name 2784*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2785*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2786*5113495bSYour Name 2787*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_LSB //// 2788*5113495bSYour Name 2789*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x000007f0) 2790*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x000007f0) 2791*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 2792*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_SHFT 0 2793*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x) \ 2794*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK) 2795*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_INM(x, mask) \ 2796*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask) 2797*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUT(x, val) \ 2798*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), val) 2799*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 2800*5113495bSYour Name do {\ 2801*5113495bSYour Name HWIO_INTLOCK(); \ 2802*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x)); \ 2803*5113495bSYour Name HWIO_INTFREE();\ 2804*5113495bSYour Name } while (0) 2805*5113495bSYour Name 2806*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2807*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2808*5113495bSYour Name 2809*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_MSB //// 2810*5113495bSYour Name 2811*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x000007f4) 2812*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x000007f4) 2813*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK 0x00ffffff 2814*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_SHFT 0 2815*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x) \ 2816*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK) 2817*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_INM(x, mask) \ 2818*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask) 2819*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUT(x, val) \ 2820*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), val) 2821*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 2822*5113495bSYour Name do {\ 2823*5113495bSYour Name HWIO_INTLOCK(); \ 2824*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x)); \ 2825*5113495bSYour Name HWIO_INTFREE();\ 2826*5113495bSYour Name } while (0) 2827*5113495bSYour Name 2828*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 2829*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2830*5113495bSYour Name 2831*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2832*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2833*5113495bSYour Name 2834*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_ID //// 2835*5113495bSYour Name 2836*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x) (x+0x000007f8) 2837*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_PHYS(x) (x+0x000007f8) 2838*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK 0x000000ff 2839*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_SHFT 0 2840*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x) \ 2841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK) 2842*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_INM(x, mask) \ 2843*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask) 2844*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUT(x, val) \ 2845*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), val) 2846*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUTM(x, mask, val) \ 2847*5113495bSYour Name do {\ 2848*5113495bSYour Name HWIO_INTLOCK(); \ 2849*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x)); \ 2850*5113495bSYour Name HWIO_INTFREE();\ 2851*5113495bSYour Name } while (0) 2852*5113495bSYour Name 2853*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2854*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 2855*5113495bSYour Name 2856*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_STATUS //// 2857*5113495bSYour Name 2858*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x) (x+0x000007fc) 2859*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_PHYS(x) (x+0x000007fc) 2860*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK 0xffffffff 2861*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_SHFT 0 2862*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x) \ 2863*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK) 2864*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_INM(x, mask) \ 2865*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask) 2866*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUT(x, val) \ 2867*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), val) 2868*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 2869*5113495bSYour Name do {\ 2870*5113495bSYour Name HWIO_INTLOCK(); \ 2871*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x)); \ 2872*5113495bSYour Name HWIO_INTFREE();\ 2873*5113495bSYour Name } while (0) 2874*5113495bSYour Name 2875*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2876*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2877*5113495bSYour Name 2878*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2879*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2880*5113495bSYour Name 2881*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MISC //// 2882*5113495bSYour Name 2883*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x) (x+0x00000800) 2884*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_PHYS(x) (x+0x00000800) 2885*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK 0x003fffff 2886*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SHFT 0 2887*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x) \ 2888*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK) 2889*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_INM(x, mask) \ 2890*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask) 2891*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUT(x, val) \ 2892*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), val) 2893*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUTM(x, mask, val) \ 2894*5113495bSYour Name do {\ 2895*5113495bSYour Name HWIO_INTLOCK(); \ 2896*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x)); \ 2897*5113495bSYour Name HWIO_INTFREE();\ 2898*5113495bSYour Name } while (0) 2899*5113495bSYour Name 2900*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2901*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 2902*5113495bSYour Name 2903*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2904*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2905*5113495bSYour Name 2906*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2907*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2908*5113495bSYour Name 2909*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2910*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2911*5113495bSYour Name 2912*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2913*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 2914*5113495bSYour Name 2915*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2916*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2917*5113495bSYour Name 2918*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2919*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2920*5113495bSYour Name 2921*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2922*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2923*5113495bSYour Name 2924*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2925*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 2926*5113495bSYour Name 2927*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2928*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2929*5113495bSYour Name 2930*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2931*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2932*5113495bSYour Name 2933*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_LSB //// 2934*5113495bSYour Name 2935*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x0000080c) 2936*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x0000080c) 2937*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 2938*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_SHFT 0 2939*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 2940*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK) 2941*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 2942*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 2943*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 2944*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 2945*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2946*5113495bSYour Name do {\ 2947*5113495bSYour Name HWIO_INTLOCK(); \ 2948*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 2949*5113495bSYour Name HWIO_INTFREE();\ 2950*5113495bSYour Name } while (0) 2951*5113495bSYour Name 2952*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2953*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2954*5113495bSYour Name 2955*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_MSB //// 2956*5113495bSYour Name 2957*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000810) 2958*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000810) 2959*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 2960*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_SHFT 0 2961*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 2962*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK) 2963*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 2964*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 2965*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 2966*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 2967*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2968*5113495bSYour Name do {\ 2969*5113495bSYour Name HWIO_INTLOCK(); \ 2970*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 2971*5113495bSYour Name HWIO_INTFREE();\ 2972*5113495bSYour Name } while (0) 2973*5113495bSYour Name 2974*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2975*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2976*5113495bSYour Name 2977*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 2978*5113495bSYour Name 2979*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000820) 2980*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000820) 2981*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2982*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2983*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2984*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2985*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2986*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2987*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2988*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2989*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2990*5113495bSYour Name do {\ 2991*5113495bSYour Name HWIO_INTLOCK(); \ 2992*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2993*5113495bSYour Name HWIO_INTFREE();\ 2994*5113495bSYour Name } while (0) 2995*5113495bSYour Name 2996*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2997*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2998*5113495bSYour Name 2999*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 3000*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 3001*5113495bSYour Name 3002*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3003*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3004*5113495bSYour Name 3005*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 3006*5113495bSYour Name 3007*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000824) 3008*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000824) 3009*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 3010*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 3011*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 3012*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 3013*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 3014*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 3015*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 3016*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 3017*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 3018*5113495bSYour Name do {\ 3019*5113495bSYour Name HWIO_INTLOCK(); \ 3020*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 3021*5113495bSYour Name HWIO_INTFREE();\ 3022*5113495bSYour Name } while (0) 3023*5113495bSYour Name 3024*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 3025*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 3026*5113495bSYour Name 3027*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS //// 3028*5113495bSYour Name 3029*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000828) 3030*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000828) 3031*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 3032*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 3033*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 3034*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 3035*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 3036*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 3037*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 3038*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 3039*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 3040*5113495bSYour Name do {\ 3041*5113495bSYour Name HWIO_INTLOCK(); \ 3042*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 3043*5113495bSYour Name HWIO_INTFREE();\ 3044*5113495bSYour Name } while (0) 3045*5113495bSYour Name 3046*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3047*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3048*5113495bSYour Name 3049*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 3050*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 3051*5113495bSYour Name 3052*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3053*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3054*5113495bSYour Name 3055*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 3056*5113495bSYour Name 3057*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x0000082c) 3058*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x0000082c) 3059*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 3060*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 3061*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 3062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 3063*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 3064*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 3065*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 3066*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 3067*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 3068*5113495bSYour Name do {\ 3069*5113495bSYour Name HWIO_INTLOCK(); \ 3070*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 3071*5113495bSYour Name HWIO_INTFREE();\ 3072*5113495bSYour Name } while (0) 3073*5113495bSYour Name 3074*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 3075*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 3076*5113495bSYour Name 3077*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 3078*5113495bSYour Name 3079*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000830) 3080*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000830) 3081*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 3082*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 3083*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 3084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 3085*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 3086*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 3087*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 3088*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 3089*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 3090*5113495bSYour Name do {\ 3091*5113495bSYour Name HWIO_INTLOCK(); \ 3092*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 3093*5113495bSYour Name HWIO_INTFREE();\ 3094*5113495bSYour Name } while (0) 3095*5113495bSYour Name 3096*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 3097*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 3098*5113495bSYour Name 3099*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 3100*5113495bSYour Name 3101*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000834) 3102*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000834) 3103*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x00ffffff 3104*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 3105*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 3106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 3107*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 3108*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 3109*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 3110*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 3111*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 3112*5113495bSYour Name do {\ 3113*5113495bSYour Name HWIO_INTLOCK(); \ 3114*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 3115*5113495bSYour Name HWIO_INTFREE();\ 3116*5113495bSYour Name } while (0) 3117*5113495bSYour Name 3118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x00ff0000 3119*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10 3120*5113495bSYour Name 3121*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x0000ffff 3122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 3123*5113495bSYour Name 3124*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB //// 3125*5113495bSYour Name 3126*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000838) 3127*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000838) 3128*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3129*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 3130*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 3131*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK) 3132*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3133*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3134*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3135*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 3136*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3137*5113495bSYour Name do {\ 3138*5113495bSYour Name HWIO_INTLOCK(); \ 3139*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 3140*5113495bSYour Name HWIO_INTFREE();\ 3141*5113495bSYour Name } while (0) 3142*5113495bSYour Name 3143*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3144*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3145*5113495bSYour Name 3146*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB //// 3147*5113495bSYour Name 3148*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x0000083c) 3149*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x0000083c) 3150*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3151*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 3152*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 3153*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK) 3154*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3155*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3156*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3157*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 3158*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3159*5113495bSYour Name do {\ 3160*5113495bSYour Name HWIO_INTLOCK(); \ 3161*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 3162*5113495bSYour Name HWIO_INTFREE();\ 3163*5113495bSYour Name } while (0) 3164*5113495bSYour Name 3165*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3166*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3167*5113495bSYour Name 3168*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3169*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3170*5113495bSYour Name 3171*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_DATA //// 3172*5113495bSYour Name 3173*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x00000840) 3174*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x00000840) 3175*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 3176*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_SHFT 0 3177*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x) \ 3178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK) 3179*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 3180*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 3181*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 3182*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), val) 3183*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3184*5113495bSYour Name do {\ 3185*5113495bSYour Name HWIO_INTLOCK(); \ 3186*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x)); \ 3187*5113495bSYour Name HWIO_INTFREE();\ 3188*5113495bSYour Name } while (0) 3189*5113495bSYour Name 3190*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3191*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 3192*5113495bSYour Name 3193*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET //// 3194*5113495bSYour Name 3195*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000844) 3196*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000844) 3197*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3198*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 3199*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 3200*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 3201*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3202*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3203*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3204*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3205*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3206*5113495bSYour Name do {\ 3207*5113495bSYour Name HWIO_INTLOCK(); \ 3208*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3209*5113495bSYour Name HWIO_INTFREE();\ 3210*5113495bSYour Name } while (0) 3211*5113495bSYour Name 3212*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3213*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3214*5113495bSYour Name 3215*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_LSB //// 3216*5113495bSYour Name 3217*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x) (x+0x00000848) 3218*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_PHYS(x) (x+0x00000848) 3219*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK 0xffffffff 3220*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_SHFT 0 3221*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x) \ 3222*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK) 3223*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_INM(x, mask) \ 3224*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask) 3225*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUT(x, val) \ 3226*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), val) 3227*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUTM(x, mask, val) \ 3228*5113495bSYour Name do {\ 3229*5113495bSYour Name HWIO_INTLOCK(); \ 3230*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x)); \ 3231*5113495bSYour Name HWIO_INTFREE();\ 3232*5113495bSYour Name } while (0) 3233*5113495bSYour Name 3234*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3235*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3236*5113495bSYour Name 3237*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_MSB //// 3238*5113495bSYour Name 3239*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x) (x+0x0000084c) 3240*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_PHYS(x) (x+0x0000084c) 3241*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK 0x00ffffff 3242*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_SHFT 0 3243*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x) \ 3244*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK) 3245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_INM(x, mask) \ 3246*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask) 3247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUT(x, val) \ 3248*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), val) 3249*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUTM(x, mask, val) \ 3250*5113495bSYour Name do {\ 3251*5113495bSYour Name HWIO_INTLOCK(); \ 3252*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x)); \ 3253*5113495bSYour Name HWIO_INTFREE();\ 3254*5113495bSYour Name } while (0) 3255*5113495bSYour Name 3256*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3257*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3258*5113495bSYour Name 3259*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3260*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3261*5113495bSYour Name 3262*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_ID //// 3263*5113495bSYour Name 3264*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x) (x+0x00000850) 3265*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_PHYS(x) (x+0x00000850) 3266*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK 0x0000ffff 3267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_SHFT 0 3268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x) \ 3269*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK) 3270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_INM(x, mask) \ 3271*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask) 3272*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUT(x, val) \ 3273*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), val) 3274*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUTM(x, mask, val) \ 3275*5113495bSYour Name do {\ 3276*5113495bSYour Name HWIO_INTLOCK(); \ 3277*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x)); \ 3278*5113495bSYour Name HWIO_INTFREE();\ 3279*5113495bSYour Name } while (0) 3280*5113495bSYour Name 3281*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_BMSK 0x0000ff00 3282*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_SHFT 0x8 3283*5113495bSYour Name 3284*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3285*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_SHFT 0x0 3286*5113495bSYour Name 3287*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_STATUS //// 3288*5113495bSYour Name 3289*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x) (x+0x00000854) 3290*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_PHYS(x) (x+0x00000854) 3291*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK 0xffffffff 3292*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_SHFT 0 3293*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x) \ 3294*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK) 3295*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_INM(x, mask) \ 3296*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask) 3297*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUT(x, val) \ 3298*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), val) 3299*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUTM(x, mask, val) \ 3300*5113495bSYour Name do {\ 3301*5113495bSYour Name HWIO_INTLOCK(); \ 3302*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x)); \ 3303*5113495bSYour Name HWIO_INTFREE();\ 3304*5113495bSYour Name } while (0) 3305*5113495bSYour Name 3306*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3307*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3308*5113495bSYour Name 3309*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3310*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3311*5113495bSYour Name 3312*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MISC //// 3313*5113495bSYour Name 3314*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x) (x+0x00000858) 3315*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_PHYS(x) (x+0x00000858) 3316*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK 0x03ffffff 3317*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SHFT 0 3318*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x) \ 3319*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK) 3320*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_INM(x, mask) \ 3321*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask) 3322*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUT(x, val) \ 3323*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), val) 3324*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUTM(x, mask, val) \ 3325*5113495bSYour Name do {\ 3326*5113495bSYour Name HWIO_INTLOCK(); \ 3327*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x)); \ 3328*5113495bSYour Name HWIO_INTFREE();\ 3329*5113495bSYour Name } while (0) 3330*5113495bSYour Name 3331*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3332*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_SHFT 0x16 3333*5113495bSYour Name 3334*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3335*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_SHFT 0xe 3336*5113495bSYour Name 3337*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3338*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3339*5113495bSYour Name 3340*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3341*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3342*5113495bSYour Name 3343*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3344*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3345*5113495bSYour Name 3346*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3347*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_SHFT 0x6 3348*5113495bSYour Name 3349*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3350*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3351*5113495bSYour Name 3352*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3353*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3354*5113495bSYour Name 3355*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3356*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3357*5113495bSYour Name 3358*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3359*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_SHFT 0x2 3360*5113495bSYour Name 3361*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3362*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3363*5113495bSYour Name 3364*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3365*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3366*5113495bSYour Name 3367*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_LSB //// 3368*5113495bSYour Name 3369*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x) (x+0x0000085c) 3370*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_PHYS(x) (x+0x0000085c) 3371*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK 0xffffffff 3372*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_SHFT 0 3373*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x) \ 3374*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK) 3375*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_INM(x, mask) \ 3376*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask) 3377*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUT(x, val) \ 3378*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), val) 3379*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3380*5113495bSYour Name do {\ 3381*5113495bSYour Name HWIO_INTLOCK(); \ 3382*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x)); \ 3383*5113495bSYour Name HWIO_INTFREE();\ 3384*5113495bSYour Name } while (0) 3385*5113495bSYour Name 3386*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3387*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3388*5113495bSYour Name 3389*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_MSB //// 3390*5113495bSYour Name 3391*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000860) 3392*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000860) 3393*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK 0x000000ff 3394*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_SHFT 0 3395*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x) \ 3396*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK) 3397*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_INM(x, mask) \ 3398*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask) 3399*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUT(x, val) \ 3400*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), val) 3401*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3402*5113495bSYour Name do {\ 3403*5113495bSYour Name HWIO_INTLOCK(); \ 3404*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x)); \ 3405*5113495bSYour Name HWIO_INTFREE();\ 3406*5113495bSYour Name } while (0) 3407*5113495bSYour Name 3408*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3409*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3410*5113495bSYour Name 3411*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP //// 3412*5113495bSYour Name 3413*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x0000086c) 3414*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x0000086c) 3415*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3416*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SHFT 0 3417*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x) \ 3418*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK) 3419*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3420*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3421*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3422*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3423*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3424*5113495bSYour Name do {\ 3425*5113495bSYour Name HWIO_INTLOCK(); \ 3426*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x)); \ 3427*5113495bSYour Name HWIO_INTFREE();\ 3428*5113495bSYour Name } while (0) 3429*5113495bSYour Name 3430*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3431*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3432*5113495bSYour Name 3433*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3434*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3435*5113495bSYour Name 3436*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3437*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3438*5113495bSYour Name 3439*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS //// 3440*5113495bSYour Name 3441*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000870) 3442*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000870) 3443*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3444*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_SHFT 0 3445*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x) \ 3446*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK) 3447*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3448*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3449*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3450*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3451*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3452*5113495bSYour Name do {\ 3453*5113495bSYour Name HWIO_INTLOCK(); \ 3454*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x)); \ 3455*5113495bSYour Name HWIO_INTFREE();\ 3456*5113495bSYour Name } while (0) 3457*5113495bSYour Name 3458*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3459*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3460*5113495bSYour Name 3461*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3462*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3463*5113495bSYour Name 3464*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3465*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3466*5113495bSYour Name 3467*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER //// 3468*5113495bSYour Name 3469*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000874) 3470*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000874) 3471*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3472*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_SHFT 0 3473*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3474*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK) 3475*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3476*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3477*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3478*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3479*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3480*5113495bSYour Name do {\ 3481*5113495bSYour Name HWIO_INTLOCK(); \ 3482*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3483*5113495bSYour Name HWIO_INTFREE();\ 3484*5113495bSYour Name } while (0) 3485*5113495bSYour Name 3486*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3487*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3488*5113495bSYour Name 3489*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET //// 3490*5113495bSYour Name 3491*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x0000089c) 3492*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x0000089c) 3493*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3494*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_SHFT 0 3495*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x) \ 3496*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK) 3497*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3498*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3499*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3500*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3501*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3502*5113495bSYour Name do {\ 3503*5113495bSYour Name HWIO_INTLOCK(); \ 3504*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x)); \ 3505*5113495bSYour Name HWIO_INTFREE();\ 3506*5113495bSYour Name } while (0) 3507*5113495bSYour Name 3508*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3509*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3510*5113495bSYour Name 3511*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_LSB //// 3512*5113495bSYour Name 3513*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x) (x+0x000008a0) 3514*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_PHYS(x) (x+0x000008a0) 3515*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK 0xffffffff 3516*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_SHFT 0 3517*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x) \ 3518*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK) 3519*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_INM(x, mask) \ 3520*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask) 3521*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUT(x, val) \ 3522*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), val) 3523*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUTM(x, mask, val) \ 3524*5113495bSYour Name do {\ 3525*5113495bSYour Name HWIO_INTLOCK(); \ 3526*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x)); \ 3527*5113495bSYour Name HWIO_INTFREE();\ 3528*5113495bSYour Name } while (0) 3529*5113495bSYour Name 3530*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3531*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3532*5113495bSYour Name 3533*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_MSB //// 3534*5113495bSYour Name 3535*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x) (x+0x000008a4) 3536*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_PHYS(x) (x+0x000008a4) 3537*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK 0x00ffffff 3538*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_SHFT 0 3539*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x) \ 3540*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK) 3541*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_INM(x, mask) \ 3542*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask) 3543*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUT(x, val) \ 3544*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), val) 3545*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUTM(x, mask, val) \ 3546*5113495bSYour Name do {\ 3547*5113495bSYour Name HWIO_INTLOCK(); \ 3548*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x)); \ 3549*5113495bSYour Name HWIO_INTFREE();\ 3550*5113495bSYour Name } while (0) 3551*5113495bSYour Name 3552*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3553*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3554*5113495bSYour Name 3555*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3556*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3557*5113495bSYour Name 3558*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_ID //// 3559*5113495bSYour Name 3560*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x) (x+0x000008a8) 3561*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_PHYS(x) (x+0x000008a8) 3562*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK 0x0000ffff 3563*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_SHFT 0 3564*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x) \ 3565*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK) 3566*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_INM(x, mask) \ 3567*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask) 3568*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUT(x, val) \ 3569*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), val) 3570*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUTM(x, mask, val) \ 3571*5113495bSYour Name do {\ 3572*5113495bSYour Name HWIO_INTLOCK(); \ 3573*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x)); \ 3574*5113495bSYour Name HWIO_INTFREE();\ 3575*5113495bSYour Name } while (0) 3576*5113495bSYour Name 3577*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_BMSK 0x0000ff00 3578*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_SHFT 0x8 3579*5113495bSYour Name 3580*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3581*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_SHFT 0x0 3582*5113495bSYour Name 3583*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_STATUS //// 3584*5113495bSYour Name 3585*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x) (x+0x000008ac) 3586*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_PHYS(x) (x+0x000008ac) 3587*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK 0xffffffff 3588*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_SHFT 0 3589*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x) \ 3590*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK) 3591*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_INM(x, mask) \ 3592*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask) 3593*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUT(x, val) \ 3594*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), val) 3595*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUTM(x, mask, val) \ 3596*5113495bSYour Name do {\ 3597*5113495bSYour Name HWIO_INTLOCK(); \ 3598*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x)); \ 3599*5113495bSYour Name HWIO_INTFREE();\ 3600*5113495bSYour Name } while (0) 3601*5113495bSYour Name 3602*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3603*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3604*5113495bSYour Name 3605*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3606*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3607*5113495bSYour Name 3608*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MISC //// 3609*5113495bSYour Name 3610*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x) (x+0x000008b0) 3611*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_PHYS(x) (x+0x000008b0) 3612*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK 0x03ffffff 3613*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SHFT 0 3614*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x) \ 3615*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK) 3616*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_INM(x, mask) \ 3617*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask) 3618*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUT(x, val) \ 3619*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), val) 3620*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUTM(x, mask, val) \ 3621*5113495bSYour Name do {\ 3622*5113495bSYour Name HWIO_INTLOCK(); \ 3623*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x)); \ 3624*5113495bSYour Name HWIO_INTFREE();\ 3625*5113495bSYour Name } while (0) 3626*5113495bSYour Name 3627*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3628*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_SHFT 0x16 3629*5113495bSYour Name 3630*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3631*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_SHFT 0xe 3632*5113495bSYour Name 3633*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3634*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3635*5113495bSYour Name 3636*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3637*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3638*5113495bSYour Name 3639*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3640*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3641*5113495bSYour Name 3642*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3643*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_SHFT 0x6 3644*5113495bSYour Name 3645*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3646*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3647*5113495bSYour Name 3648*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3649*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3650*5113495bSYour Name 3651*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3652*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3653*5113495bSYour Name 3654*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3655*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_SHFT 0x2 3656*5113495bSYour Name 3657*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3658*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3659*5113495bSYour Name 3660*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3661*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3662*5113495bSYour Name 3663*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB //// 3664*5113495bSYour Name 3665*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x) (x+0x000008b4) 3666*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_PHYS(x) (x+0x000008b4) 3667*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK 0xffffffff 3668*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_SHFT 0 3669*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x) \ 3670*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK) 3671*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_INM(x, mask) \ 3672*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask) 3673*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUT(x, val) \ 3674*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), val) 3675*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3676*5113495bSYour Name do {\ 3677*5113495bSYour Name HWIO_INTLOCK(); \ 3678*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x)); \ 3679*5113495bSYour Name HWIO_INTFREE();\ 3680*5113495bSYour Name } while (0) 3681*5113495bSYour Name 3682*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3683*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3684*5113495bSYour Name 3685*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB //// 3686*5113495bSYour Name 3687*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x) (x+0x000008b8) 3688*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_PHYS(x) (x+0x000008b8) 3689*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK 0x000000ff 3690*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_SHFT 0 3691*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x) \ 3692*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK) 3693*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_INM(x, mask) \ 3694*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask) 3695*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUT(x, val) \ 3696*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), val) 3697*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3698*5113495bSYour Name do {\ 3699*5113495bSYour Name HWIO_INTLOCK(); \ 3700*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x)); \ 3701*5113495bSYour Name HWIO_INTFREE();\ 3702*5113495bSYour Name } while (0) 3703*5113495bSYour Name 3704*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3705*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3706*5113495bSYour Name 3707*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP //// 3708*5113495bSYour Name 3709*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000008c4) 3710*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000008c4) 3711*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3712*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SHFT 0 3713*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x) \ 3714*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK) 3715*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3716*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3717*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3718*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3719*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3720*5113495bSYour Name do {\ 3721*5113495bSYour Name HWIO_INTLOCK(); \ 3722*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x)); \ 3723*5113495bSYour Name HWIO_INTFREE();\ 3724*5113495bSYour Name } while (0) 3725*5113495bSYour Name 3726*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3727*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3728*5113495bSYour Name 3729*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3730*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3731*5113495bSYour Name 3732*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3733*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3734*5113495bSYour Name 3735*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS //// 3736*5113495bSYour Name 3737*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000008c8) 3738*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000008c8) 3739*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3740*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_SHFT 0 3741*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x) \ 3742*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK) 3743*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3744*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3745*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3746*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3747*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3748*5113495bSYour Name do {\ 3749*5113495bSYour Name HWIO_INTLOCK(); \ 3750*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x)); \ 3751*5113495bSYour Name HWIO_INTFREE();\ 3752*5113495bSYour Name } while (0) 3753*5113495bSYour Name 3754*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3755*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3756*5113495bSYour Name 3757*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3758*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3759*5113495bSYour Name 3760*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3761*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3762*5113495bSYour Name 3763*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER //// 3764*5113495bSYour Name 3765*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000008cc) 3766*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000008cc) 3767*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3768*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_SHFT 0 3769*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3770*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK) 3771*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3772*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3773*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3774*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3775*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3776*5113495bSYour Name do {\ 3777*5113495bSYour Name HWIO_INTLOCK(); \ 3778*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3779*5113495bSYour Name HWIO_INTFREE();\ 3780*5113495bSYour Name } while (0) 3781*5113495bSYour Name 3782*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3783*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3784*5113495bSYour Name 3785*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB //// 3786*5113495bSYour Name 3787*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000008e8) 3788*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000008e8) 3789*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3790*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_SHFT 0 3791*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x) \ 3792*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK) 3793*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3794*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3795*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3796*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), val) 3797*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3798*5113495bSYour Name do {\ 3799*5113495bSYour Name HWIO_INTLOCK(); \ 3800*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x)); \ 3801*5113495bSYour Name HWIO_INTFREE();\ 3802*5113495bSYour Name } while (0) 3803*5113495bSYour Name 3804*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3805*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3806*5113495bSYour Name 3807*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB //// 3808*5113495bSYour Name 3809*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000008ec) 3810*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000008ec) 3811*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3812*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_SHFT 0 3813*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x) \ 3814*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK) 3815*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3816*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3817*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3818*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), val) 3819*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3820*5113495bSYour Name do {\ 3821*5113495bSYour Name HWIO_INTLOCK(); \ 3822*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x)); \ 3823*5113495bSYour Name HWIO_INTFREE();\ 3824*5113495bSYour Name } while (0) 3825*5113495bSYour Name 3826*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3827*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3828*5113495bSYour Name 3829*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3830*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3831*5113495bSYour Name 3832*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_DATA //// 3833*5113495bSYour Name 3834*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x) (x+0x000008f0) 3835*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_PHYS(x) (x+0x000008f0) 3836*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK 0xffffffff 3837*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_SHFT 0 3838*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x) \ 3839*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK) 3840*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_INM(x, mask) \ 3841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask) 3842*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUT(x, val) \ 3843*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), val) 3844*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3845*5113495bSYour Name do {\ 3846*5113495bSYour Name HWIO_INTLOCK(); \ 3847*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x)); \ 3848*5113495bSYour Name HWIO_INTFREE();\ 3849*5113495bSYour Name } while (0) 3850*5113495bSYour Name 3851*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3852*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_SHFT 0x0 3853*5113495bSYour Name 3854*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET //// 3855*5113495bSYour Name 3856*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008f4) 3857*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008f4) 3858*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3859*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_SHFT 0 3860*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x) \ 3861*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK) 3862*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3863*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3864*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3865*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3866*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3867*5113495bSYour Name do {\ 3868*5113495bSYour Name HWIO_INTLOCK(); \ 3869*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3870*5113495bSYour Name HWIO_INTFREE();\ 3871*5113495bSYour Name } while (0) 3872*5113495bSYour Name 3873*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3874*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3875*5113495bSYour Name 3876*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_LSB //// 3877*5113495bSYour Name 3878*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x) (x+0x000008f8) 3879*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_PHYS(x) (x+0x000008f8) 3880*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK 0xffffffff 3881*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_SHFT 0 3882*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x) \ 3883*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK) 3884*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_INM(x, mask) \ 3885*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask) 3886*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUT(x, val) \ 3887*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), val) 3888*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUTM(x, mask, val) \ 3889*5113495bSYour Name do {\ 3890*5113495bSYour Name HWIO_INTLOCK(); \ 3891*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x)); \ 3892*5113495bSYour Name HWIO_INTFREE();\ 3893*5113495bSYour Name } while (0) 3894*5113495bSYour Name 3895*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3896*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3897*5113495bSYour Name 3898*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_MSB //// 3899*5113495bSYour Name 3900*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x) (x+0x000008fc) 3901*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_PHYS(x) (x+0x000008fc) 3902*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK 0x00ffffff 3903*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_SHFT 0 3904*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x) \ 3905*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK) 3906*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_INM(x, mask) \ 3907*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask) 3908*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUT(x, val) \ 3909*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), val) 3910*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUTM(x, mask, val) \ 3911*5113495bSYour Name do {\ 3912*5113495bSYour Name HWIO_INTLOCK(); \ 3913*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x)); \ 3914*5113495bSYour Name HWIO_INTFREE();\ 3915*5113495bSYour Name } while (0) 3916*5113495bSYour Name 3917*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3918*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3919*5113495bSYour Name 3920*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3921*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3922*5113495bSYour Name 3923*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_ID //// 3924*5113495bSYour Name 3925*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x) (x+0x00000900) 3926*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_PHYS(x) (x+0x00000900) 3927*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK 0x0000ffff 3928*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_SHFT 0 3929*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x) \ 3930*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK) 3931*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_INM(x, mask) \ 3932*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask) 3933*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUT(x, val) \ 3934*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), val) 3935*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUTM(x, mask, val) \ 3936*5113495bSYour Name do {\ 3937*5113495bSYour Name HWIO_INTLOCK(); \ 3938*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x)); \ 3939*5113495bSYour Name HWIO_INTFREE();\ 3940*5113495bSYour Name } while (0) 3941*5113495bSYour Name 3942*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_BMSK 0x0000ff00 3943*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_SHFT 0x8 3944*5113495bSYour Name 3945*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3946*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_SHFT 0x0 3947*5113495bSYour Name 3948*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_STATUS //// 3949*5113495bSYour Name 3950*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x) (x+0x00000904) 3951*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_PHYS(x) (x+0x00000904) 3952*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK 0xffffffff 3953*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_SHFT 0 3954*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x) \ 3955*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK) 3956*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_INM(x, mask) \ 3957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask) 3958*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUT(x, val) \ 3959*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), val) 3960*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUTM(x, mask, val) \ 3961*5113495bSYour Name do {\ 3962*5113495bSYour Name HWIO_INTLOCK(); \ 3963*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x)); \ 3964*5113495bSYour Name HWIO_INTFREE();\ 3965*5113495bSYour Name } while (0) 3966*5113495bSYour Name 3967*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3968*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3969*5113495bSYour Name 3970*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3971*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3972*5113495bSYour Name 3973*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MISC //// 3974*5113495bSYour Name 3975*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x) (x+0x00000908) 3976*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_PHYS(x) (x+0x00000908) 3977*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK 0x03ffffff 3978*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SHFT 0 3979*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x) \ 3980*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK) 3981*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_INM(x, mask) \ 3982*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask) 3983*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUT(x, val) \ 3984*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), val) 3985*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUTM(x, mask, val) \ 3986*5113495bSYour Name do {\ 3987*5113495bSYour Name HWIO_INTLOCK(); \ 3988*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x)); \ 3989*5113495bSYour Name HWIO_INTFREE();\ 3990*5113495bSYour Name } while (0) 3991*5113495bSYour Name 3992*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3993*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_SHFT 0x16 3994*5113495bSYour Name 3995*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3996*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_SHFT 0xe 3997*5113495bSYour Name 3998*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3999*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4000*5113495bSYour Name 4001*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4002*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4003*5113495bSYour Name 4004*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4005*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4006*5113495bSYour Name 4007*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4008*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_SHFT 0x6 4009*5113495bSYour Name 4010*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4011*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4012*5113495bSYour Name 4013*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4014*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4015*5113495bSYour Name 4016*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4017*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4018*5113495bSYour Name 4019*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4020*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_SHFT 0x2 4021*5113495bSYour Name 4022*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4023*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4024*5113495bSYour Name 4025*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4026*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4027*5113495bSYour Name 4028*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB //// 4029*5113495bSYour Name 4030*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x) (x+0x0000090c) 4031*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_PHYS(x) (x+0x0000090c) 4032*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK 0xffffffff 4033*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_SHFT 0 4034*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x) \ 4035*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK) 4036*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_INM(x, mask) \ 4037*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask) 4038*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUT(x, val) \ 4039*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), val) 4040*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4041*5113495bSYour Name do {\ 4042*5113495bSYour Name HWIO_INTLOCK(); \ 4043*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x)); \ 4044*5113495bSYour Name HWIO_INTFREE();\ 4045*5113495bSYour Name } while (0) 4046*5113495bSYour Name 4047*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4048*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4049*5113495bSYour Name 4050*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB //// 4051*5113495bSYour Name 4052*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000910) 4053*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000910) 4054*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK 0x000000ff 4055*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_SHFT 0 4056*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x) \ 4057*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK) 4058*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_INM(x, mask) \ 4059*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask) 4060*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUT(x, val) \ 4061*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), val) 4062*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4063*5113495bSYour Name do {\ 4064*5113495bSYour Name HWIO_INTLOCK(); \ 4065*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x)); \ 4066*5113495bSYour Name HWIO_INTFREE();\ 4067*5113495bSYour Name } while (0) 4068*5113495bSYour Name 4069*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4070*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4071*5113495bSYour Name 4072*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP //// 4073*5113495bSYour Name 4074*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x0000091c) 4075*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x0000091c) 4076*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4077*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SHFT 0 4078*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x) \ 4079*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK) 4080*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4082*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4083*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4084*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4085*5113495bSYour Name do {\ 4086*5113495bSYour Name HWIO_INTLOCK(); \ 4087*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x)); \ 4088*5113495bSYour Name HWIO_INTFREE();\ 4089*5113495bSYour Name } while (0) 4090*5113495bSYour Name 4091*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4092*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4093*5113495bSYour Name 4094*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4095*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4096*5113495bSYour Name 4097*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4098*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4099*5113495bSYour Name 4100*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS //// 4101*5113495bSYour Name 4102*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000920) 4103*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000920) 4104*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4105*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_SHFT 0 4106*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x) \ 4107*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK) 4108*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4109*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4110*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4111*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4112*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4113*5113495bSYour Name do {\ 4114*5113495bSYour Name HWIO_INTLOCK(); \ 4115*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x)); \ 4116*5113495bSYour Name HWIO_INTFREE();\ 4117*5113495bSYour Name } while (0) 4118*5113495bSYour Name 4119*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4120*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4121*5113495bSYour Name 4122*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4123*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4124*5113495bSYour Name 4125*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4126*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4127*5113495bSYour Name 4128*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER //// 4129*5113495bSYour Name 4130*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000924) 4131*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000924) 4132*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4133*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_SHFT 0 4134*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4135*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK) 4136*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4137*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4138*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4139*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4140*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4141*5113495bSYour Name do {\ 4142*5113495bSYour Name HWIO_INTLOCK(); \ 4143*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4144*5113495bSYour Name HWIO_INTFREE();\ 4145*5113495bSYour Name } while (0) 4146*5113495bSYour Name 4147*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4148*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4149*5113495bSYour Name 4150*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB //// 4151*5113495bSYour Name 4152*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000940) 4153*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000940) 4154*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4155*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_SHFT 0 4156*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x) \ 4157*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK) 4158*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_INM(x, mask) \ 4159*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask) 4160*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUT(x, val) \ 4161*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), val) 4162*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4163*5113495bSYour Name do {\ 4164*5113495bSYour Name HWIO_INTLOCK(); \ 4165*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x)); \ 4166*5113495bSYour Name HWIO_INTFREE();\ 4167*5113495bSYour Name } while (0) 4168*5113495bSYour Name 4169*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4170*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4171*5113495bSYour Name 4172*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB //// 4173*5113495bSYour Name 4174*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000944) 4175*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000944) 4176*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4177*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_SHFT 0 4178*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x) \ 4179*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK) 4180*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_INM(x, mask) \ 4181*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask) 4182*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUT(x, val) \ 4183*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), val) 4184*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4185*5113495bSYour Name do {\ 4186*5113495bSYour Name HWIO_INTLOCK(); \ 4187*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x)); \ 4188*5113495bSYour Name HWIO_INTFREE();\ 4189*5113495bSYour Name } while (0) 4190*5113495bSYour Name 4191*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4192*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4193*5113495bSYour Name 4194*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4195*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4196*5113495bSYour Name 4197*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_DATA //// 4198*5113495bSYour Name 4199*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x) (x+0x00000948) 4200*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_PHYS(x) (x+0x00000948) 4201*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK 0xffffffff 4202*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_SHFT 0 4203*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x) \ 4204*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK) 4205*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_INM(x, mask) \ 4206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask) 4207*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUT(x, val) \ 4208*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), val) 4209*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUTM(x, mask, val) \ 4210*5113495bSYour Name do {\ 4211*5113495bSYour Name HWIO_INTLOCK(); \ 4212*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x)); \ 4213*5113495bSYour Name HWIO_INTFREE();\ 4214*5113495bSYour Name } while (0) 4215*5113495bSYour Name 4216*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4217*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_SHFT 0x0 4218*5113495bSYour Name 4219*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET //// 4220*5113495bSYour Name 4221*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x0000094c) 4222*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x0000094c) 4223*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4224*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_SHFT 0 4225*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x) \ 4226*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK) 4227*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4228*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4229*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4230*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4231*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4232*5113495bSYour Name do {\ 4233*5113495bSYour Name HWIO_INTLOCK(); \ 4234*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x)); \ 4235*5113495bSYour Name HWIO_INTFREE();\ 4236*5113495bSYour Name } while (0) 4237*5113495bSYour Name 4238*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4239*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4240*5113495bSYour Name 4241*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_LSB //// 4242*5113495bSYour Name 4243*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x) (x+0x00000950) 4244*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_PHYS(x) (x+0x00000950) 4245*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK 0xffffffff 4246*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_SHFT 0 4247*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x) \ 4248*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK) 4249*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_INM(x, mask) \ 4250*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask) 4251*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUT(x, val) \ 4252*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), val) 4253*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUTM(x, mask, val) \ 4254*5113495bSYour Name do {\ 4255*5113495bSYour Name HWIO_INTLOCK(); \ 4256*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x)); \ 4257*5113495bSYour Name HWIO_INTFREE();\ 4258*5113495bSYour Name } while (0) 4259*5113495bSYour Name 4260*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 4261*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 4262*5113495bSYour Name 4263*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_MSB //// 4264*5113495bSYour Name 4265*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x) (x+0x00000954) 4266*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_PHYS(x) (x+0x00000954) 4267*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK 0x00ffffff 4268*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_SHFT 0 4269*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x) \ 4270*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK) 4271*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_INM(x, mask) \ 4272*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask) 4273*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUT(x, val) \ 4274*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), val) 4275*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUTM(x, mask, val) \ 4276*5113495bSYour Name do {\ 4277*5113495bSYour Name HWIO_INTLOCK(); \ 4278*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x)); \ 4279*5113495bSYour Name HWIO_INTFREE();\ 4280*5113495bSYour Name } while (0) 4281*5113495bSYour Name 4282*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4283*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4284*5113495bSYour Name 4285*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4286*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4287*5113495bSYour Name 4288*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_ID //// 4289*5113495bSYour Name 4290*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x) (x+0x00000958) 4291*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_PHYS(x) (x+0x00000958) 4292*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RMSK 0x0000ffff 4293*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_SHFT 0 4294*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_IN(x) \ 4295*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_ID_RMSK) 4296*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_INM(x, mask) \ 4297*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask) 4298*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUT(x, val) \ 4299*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), val) 4300*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUTM(x, mask, val) \ 4301*5113495bSYour Name do {\ 4302*5113495bSYour Name HWIO_INTLOCK(); \ 4303*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_ID_IN(x)); \ 4304*5113495bSYour Name HWIO_INTFREE();\ 4305*5113495bSYour Name } while (0) 4306*5113495bSYour Name 4307*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_BMSK 0x0000ff00 4308*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_SHFT 0x8 4309*5113495bSYour Name 4310*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4311*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_SHFT 0x0 4312*5113495bSYour Name 4313*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_STATUS //// 4314*5113495bSYour Name 4315*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x) (x+0x0000095c) 4316*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_PHYS(x) (x+0x0000095c) 4317*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK 0xffffffff 4318*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_SHFT 0 4319*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x) \ 4320*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK) 4321*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_INM(x, mask) \ 4322*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask) 4323*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUT(x, val) \ 4324*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), val) 4325*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUTM(x, mask, val) \ 4326*5113495bSYour Name do {\ 4327*5113495bSYour Name HWIO_INTLOCK(); \ 4328*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x)); \ 4329*5113495bSYour Name HWIO_INTFREE();\ 4330*5113495bSYour Name } while (0) 4331*5113495bSYour Name 4332*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4333*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4334*5113495bSYour Name 4335*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4336*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4337*5113495bSYour Name 4338*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MISC //// 4339*5113495bSYour Name 4340*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x) (x+0x00000960) 4341*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_PHYS(x) (x+0x00000960) 4342*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK 0x03ffffff 4343*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SHFT 0 4344*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x) \ 4345*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK) 4346*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_INM(x, mask) \ 4347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask) 4348*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUT(x, val) \ 4349*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), val) 4350*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUTM(x, mask, val) \ 4351*5113495bSYour Name do {\ 4352*5113495bSYour Name HWIO_INTLOCK(); \ 4353*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x)); \ 4354*5113495bSYour Name HWIO_INTFREE();\ 4355*5113495bSYour Name } while (0) 4356*5113495bSYour Name 4357*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4358*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_SHFT 0x16 4359*5113495bSYour Name 4360*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4361*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_SHFT 0xe 4362*5113495bSYour Name 4363*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4364*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4365*5113495bSYour Name 4366*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4367*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4368*5113495bSYour Name 4369*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4370*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4371*5113495bSYour Name 4372*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4373*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_SHFT 0x6 4374*5113495bSYour Name 4375*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4376*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4377*5113495bSYour Name 4378*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4379*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4380*5113495bSYour Name 4381*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4382*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4383*5113495bSYour Name 4384*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4385*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_SHFT 0x2 4386*5113495bSYour Name 4387*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4388*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4389*5113495bSYour Name 4390*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4391*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4392*5113495bSYour Name 4393*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_LSB //// 4394*5113495bSYour Name 4395*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000964) 4396*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000964) 4397*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK 0xffffffff 4398*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_SHFT 0 4399*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x) \ 4400*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK) 4401*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_INM(x, mask) \ 4402*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 4403*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUT(x, val) \ 4404*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), val) 4405*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4406*5113495bSYour Name do {\ 4407*5113495bSYour Name HWIO_INTLOCK(); \ 4408*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x)); \ 4409*5113495bSYour Name HWIO_INTFREE();\ 4410*5113495bSYour Name } while (0) 4411*5113495bSYour Name 4412*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4413*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4414*5113495bSYour Name 4415*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_MSB //// 4416*5113495bSYour Name 4417*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000968) 4418*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000968) 4419*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK 0x000000ff 4420*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_SHFT 0 4421*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x) \ 4422*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK) 4423*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_INM(x, mask) \ 4424*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 4425*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUT(x, val) \ 4426*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), val) 4427*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4428*5113495bSYour Name do {\ 4429*5113495bSYour Name HWIO_INTLOCK(); \ 4430*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x)); \ 4431*5113495bSYour Name HWIO_INTFREE();\ 4432*5113495bSYour Name } while (0) 4433*5113495bSYour Name 4434*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4435*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4436*5113495bSYour Name 4437*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP //// 4438*5113495bSYour Name 4439*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000974) 4440*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000974) 4441*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4442*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SHFT 0 4443*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x) \ 4444*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK) 4445*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4446*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4447*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4448*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4449*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4450*5113495bSYour Name do {\ 4451*5113495bSYour Name HWIO_INTLOCK(); \ 4452*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x)); \ 4453*5113495bSYour Name HWIO_INTFREE();\ 4454*5113495bSYour Name } while (0) 4455*5113495bSYour Name 4456*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4457*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4458*5113495bSYour Name 4459*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4460*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4461*5113495bSYour Name 4462*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4463*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4464*5113495bSYour Name 4465*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS //// 4466*5113495bSYour Name 4467*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000978) 4468*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000978) 4469*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4470*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_SHFT 0 4471*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x) \ 4472*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK) 4473*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4474*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4475*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4476*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4477*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4478*5113495bSYour Name do {\ 4479*5113495bSYour Name HWIO_INTLOCK(); \ 4480*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x)); \ 4481*5113495bSYour Name HWIO_INTFREE();\ 4482*5113495bSYour Name } while (0) 4483*5113495bSYour Name 4484*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4485*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4486*5113495bSYour Name 4487*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4488*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4489*5113495bSYour Name 4490*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4491*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4492*5113495bSYour Name 4493*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER //// 4494*5113495bSYour Name 4495*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x0000097c) 4496*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x0000097c) 4497*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4498*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_SHFT 0 4499*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4500*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK) 4501*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4502*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4503*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4504*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4505*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4506*5113495bSYour Name do {\ 4507*5113495bSYour Name HWIO_INTLOCK(); \ 4508*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4509*5113495bSYour Name HWIO_INTFREE();\ 4510*5113495bSYour Name } while (0) 4511*5113495bSYour Name 4512*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4513*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4514*5113495bSYour Name 4515*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET //// 4516*5113495bSYour Name 4517*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000009a4) 4518*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000009a4) 4519*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4520*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_SHFT 0 4521*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x) \ 4522*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK) 4523*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4524*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4525*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4526*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4527*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4528*5113495bSYour Name do {\ 4529*5113495bSYour Name HWIO_INTLOCK(); \ 4530*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x)); \ 4531*5113495bSYour Name HWIO_INTFREE();\ 4532*5113495bSYour Name } while (0) 4533*5113495bSYour Name 4534*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4535*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4536*5113495bSYour Name 4537*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_LOWER //// 4538*5113495bSYour Name 4539*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x000009a8) 4540*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x000009a8) 4541*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK 0xffffffff 4542*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_SHFT 0 4543*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x) \ 4544*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK) 4545*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ 4546*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 4547*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ 4548*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), val) 4549*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ 4550*5113495bSYour Name do {\ 4551*5113495bSYour Name HWIO_INTLOCK(); \ 4552*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x)); \ 4553*5113495bSYour Name HWIO_INTFREE();\ 4554*5113495bSYour Name } while (0) 4555*5113495bSYour Name 4556*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_BMSK 0xffffffff 4557*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_SHFT 0x0 4558*5113495bSYour Name 4559*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_UPPER //// 4560*5113495bSYour Name 4561*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000009ac) 4562*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000009ac) 4563*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK 0x000000ff 4564*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_SHFT 0 4565*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x) \ 4566*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK) 4567*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ 4568*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 4569*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ 4570*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), val) 4571*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ 4572*5113495bSYour Name do {\ 4573*5113495bSYour Name HWIO_INTLOCK(); \ 4574*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x)); \ 4575*5113495bSYour Name HWIO_INTFREE();\ 4576*5113495bSYour Name } while (0) 4577*5113495bSYour Name 4578*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_BMSK 0x000000ff 4579*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_SHFT 0x0 4580*5113495bSYour Name 4581*5113495bSYour Name //// Register TCL_R0_GXI_SM_STATES_IX_0 //// 4582*5113495bSYour Name 4583*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000009b0) 4584*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000009b0) 4585*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK 0x00000fff 4586*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SHFT 0 4587*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x) \ 4588*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK) 4589*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ 4590*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 4591*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ 4592*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), val) 4593*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ 4594*5113495bSYour Name do {\ 4595*5113495bSYour Name HWIO_INTLOCK(); \ 4596*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x)); \ 4597*5113495bSYour Name HWIO_INTFREE();\ 4598*5113495bSYour Name } while (0) 4599*5113495bSYour Name 4600*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0x00000e00 4601*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9 4602*5113495bSYour Name 4603*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x000001f0 4604*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4 4605*5113495bSYour Name 4606*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0x0000000f 4607*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0 4608*5113495bSYour Name 4609*5113495bSYour Name //// Register TCL_R0_GXI_END_OF_TEST_CHECK //// 4610*5113495bSYour Name 4611*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000009b4) 4612*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000009b4) 4613*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK 0x00000001 4614*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_SHFT 0 4615*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x) \ 4616*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK) 4617*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ 4618*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 4619*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ 4620*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val) 4621*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 4622*5113495bSYour Name do {\ 4623*5113495bSYour Name HWIO_INTLOCK(); \ 4624*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x)); \ 4625*5113495bSYour Name HWIO_INTFREE();\ 4626*5113495bSYour Name } while (0) 4627*5113495bSYour Name 4628*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 4629*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 4630*5113495bSYour Name 4631*5113495bSYour Name //// Register TCL_R0_GXI_CLOCK_GATE_DISABLE //// 4632*5113495bSYour Name 4633*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000009b8) 4634*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000009b8) 4635*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK 0x80000fff 4636*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SHFT 0 4637*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ 4638*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK) 4639*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ 4640*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 4641*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ 4642*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val) 4643*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ 4644*5113495bSYour Name do {\ 4645*5113495bSYour Name HWIO_INTLOCK(); \ 4646*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x)); \ 4647*5113495bSYour Name HWIO_INTFREE();\ 4648*5113495bSYour Name } while (0) 4649*5113495bSYour Name 4650*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000 4651*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f 4652*5113495bSYour Name 4653*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_BMSK 0x00000800 4654*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb 4655*5113495bSYour Name 4656*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x00000400 4657*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa 4658*5113495bSYour Name 4659*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x00000200 4660*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9 4661*5113495bSYour Name 4662*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x00000100 4663*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8 4664*5113495bSYour Name 4665*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x00000080 4666*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7 4667*5113495bSYour Name 4668*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x00000040 4669*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6 4670*5113495bSYour Name 4671*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x00000020 4672*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5 4673*5113495bSYour Name 4674*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x00000010 4675*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4 4676*5113495bSYour Name 4677*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x00000008 4678*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3 4679*5113495bSYour Name 4680*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x00000004 4681*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2 4682*5113495bSYour Name 4683*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x00000002 4684*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1 4685*5113495bSYour Name 4686*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_BMSK 0x00000001 4687*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_SHFT 0x0 4688*5113495bSYour Name 4689*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_INTS //// 4690*5113495bSYour Name 4691*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000009bc) 4692*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000009bc) 4693*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK 0x01010101 4694*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_SHFT 0 4695*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x) \ 4696*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK) 4697*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ 4698*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 4699*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ 4700*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), val) 4701*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ 4702*5113495bSYour Name do {\ 4703*5113495bSYour Name HWIO_INTLOCK(); \ 4704*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x)); \ 4705*5113495bSYour Name HWIO_INTFREE();\ 4706*5113495bSYour Name } while (0) 4707*5113495bSYour Name 4708*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x01000000 4709*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18 4710*5113495bSYour Name 4711*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x00010000 4712*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10 4713*5113495bSYour Name 4714*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x00000100 4715*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8 4716*5113495bSYour Name 4717*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x00000001 4718*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0 4719*5113495bSYour Name 4720*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_STATS //// 4721*5113495bSYour Name 4722*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000009c0) 4723*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000009c0) 4724*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK 0x003f3f3f 4725*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_SHFT 0 4726*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x) \ 4727*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK) 4728*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ 4729*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 4730*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ 4731*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), val) 4732*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ 4733*5113495bSYour Name do {\ 4734*5113495bSYour Name HWIO_INTLOCK(); \ 4735*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x)); \ 4736*5113495bSYour Name HWIO_INTFREE();\ 4737*5113495bSYour Name } while (0) 4738*5113495bSYour Name 4739*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x003f0000 4740*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10 4741*5113495bSYour Name 4742*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x00003f00 4743*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8 4744*5113495bSYour Name 4745*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x0000003f 4746*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0 4747*5113495bSYour Name 4748*5113495bSYour Name //// Register TCL_R0_GXI_GXI_DEFAULT_CONTROL //// 4749*5113495bSYour Name 4750*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000009c4) 4751*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000009c4) 4752*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f 4753*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_SHFT 0 4754*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ 4755*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK) 4756*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ 4757*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 4758*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ 4759*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val) 4760*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ 4761*5113495bSYour Name do {\ 4762*5113495bSYour Name HWIO_INTLOCK(); \ 4763*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)); \ 4764*5113495bSYour Name HWIO_INTFREE();\ 4765*5113495bSYour Name } while (0) 4766*5113495bSYour Name 4767*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000 4768*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18 4769*5113495bSYour Name 4770*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4771*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10 4772*5113495bSYour Name 4773*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x00003f00 4774*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8 4775*5113495bSYour Name 4776*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x0000003f 4777*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0 4778*5113495bSYour Name 4779*5113495bSYour Name //// Register TCL_R0_GXI_GXI_REDUCED_CONTROL //// 4780*5113495bSYour Name 4781*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000009c8) 4782*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000009c8) 4783*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f 4784*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_SHFT 0 4785*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ 4786*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK) 4787*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ 4788*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 4789*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ 4790*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val) 4791*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ 4792*5113495bSYour Name do {\ 4793*5113495bSYour Name HWIO_INTLOCK(); \ 4794*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x)); \ 4795*5113495bSYour Name HWIO_INTFREE();\ 4796*5113495bSYour Name } while (0) 4797*5113495bSYour Name 4798*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000 4799*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18 4800*5113495bSYour Name 4801*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4802*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10 4803*5113495bSYour Name 4804*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x00003f00 4805*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8 4806*5113495bSYour Name 4807*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x0000003f 4808*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0 4809*5113495bSYour Name 4810*5113495bSYour Name //// Register TCL_R0_GXI_GXI_MISC_CONTROL //// 4811*5113495bSYour Name 4812*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000009cc) 4813*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000009cc) 4814*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK 0x0fffffff 4815*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_SHFT 0 4816*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x) \ 4817*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK) 4818*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ 4819*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 4820*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ 4821*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val) 4822*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ 4823*5113495bSYour Name do {\ 4824*5113495bSYour Name HWIO_INTLOCK(); \ 4825*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x)); \ 4826*5113495bSYour Name HWIO_INTFREE();\ 4827*5113495bSYour Name } while (0) 4828*5113495bSYour Name 4829*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x08000000 4830*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b 4831*5113495bSYour Name 4832*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x04000000 4833*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a 4834*5113495bSYour Name 4835*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x02000000 4836*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19 4837*5113495bSYour Name 4838*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x01000000 4839*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18 4840*5113495bSYour Name 4841*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x00800000 4842*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17 4843*5113495bSYour Name 4844*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x00700000 4845*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14 4846*5113495bSYour Name 4847*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0x000e0000 4848*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11 4849*5113495bSYour Name 4850*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x0001fe00 4851*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9 4852*5113495bSYour Name 4853*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x000001fe 4854*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1 4855*5113495bSYour Name 4856*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x00000001 4857*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0 4858*5113495bSYour Name 4859*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_CONTROL //// 4860*5113495bSYour Name 4861*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x000009d0) 4862*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x000009d0) 4863*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK 0xffff0001 4864*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_SHFT 0 4865*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ 4866*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK) 4867*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ 4868*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 4869*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ 4870*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val) 4871*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ 4872*5113495bSYour Name do {\ 4873*5113495bSYour Name HWIO_INTLOCK(); \ 4874*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x)); \ 4875*5113495bSYour Name HWIO_INTFREE();\ 4876*5113495bSYour Name } while (0) 4877*5113495bSYour Name 4878*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000 4879*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10 4880*5113495bSYour Name 4881*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x00000001 4882*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0 4883*5113495bSYour Name 4884*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_STATUS //// 4885*5113495bSYour Name 4886*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x000009d4) 4887*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x000009d4) 4888*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK 0x0000ffff 4889*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_SHFT 0 4890*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x) \ 4891*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK) 4892*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ 4893*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 4894*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ 4895*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val) 4896*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ 4897*5113495bSYour Name do {\ 4898*5113495bSYour Name HWIO_INTLOCK(); \ 4899*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x)); \ 4900*5113495bSYour Name HWIO_INTFREE();\ 4901*5113495bSYour Name } while (0) 4902*5113495bSYour Name 4903*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0x0000ffff 4904*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0 4905*5113495bSYour Name 4906*5113495bSYour Name //// Register TCL_R0_GXI_GXI_IDLE_COUNTERS //// 4907*5113495bSYour Name 4908*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x000009d8) 4909*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x000009d8) 4910*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK 0xffffffff 4911*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_SHFT 0 4912*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ 4913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK) 4914*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ 4915*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 4916*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ 4917*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val) 4918*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ 4919*5113495bSYour Name do {\ 4920*5113495bSYour Name HWIO_INTLOCK(); \ 4921*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x)); \ 4922*5113495bSYour Name HWIO_INTFREE();\ 4923*5113495bSYour Name } while (0) 4924*5113495bSYour Name 4925*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000 4926*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10 4927*5113495bSYour Name 4928*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0x0000ffff 4929*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0 4930*5113495bSYour Name 4931*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_LATENCY_CTRL //// 4932*5113495bSYour Name 4933*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x000009dc) 4934*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x000009dc) 4935*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK 0x000fffff 4936*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_SHFT 0 4937*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ 4938*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK) 4939*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ 4940*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 4941*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ 4942*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val) 4943*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ 4944*5113495bSYour Name do {\ 4945*5113495bSYour Name HWIO_INTLOCK(); \ 4946*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)); \ 4947*5113495bSYour Name HWIO_INTFREE();\ 4948*5113495bSYour Name } while (0) 4949*5113495bSYour Name 4950*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4951*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4952*5113495bSYour Name 4953*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4954*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4955*5113495bSYour Name 4956*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4957*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4958*5113495bSYour Name 4959*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_LATENCY_CTRL //// 4960*5113495bSYour Name 4961*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x000009e0) 4962*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x000009e0) 4963*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK 0x000fffff 4964*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_SHFT 0 4965*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ 4966*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK) 4967*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ 4968*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 4969*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ 4970*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val) 4971*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ 4972*5113495bSYour Name do {\ 4973*5113495bSYour Name HWIO_INTLOCK(); \ 4974*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)); \ 4975*5113495bSYour Name HWIO_INTFREE();\ 4976*5113495bSYour Name } while (0) 4977*5113495bSYour Name 4978*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4979*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4980*5113495bSYour Name 4981*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4982*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4983*5113495bSYour Name 4984*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4985*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4986*5113495bSYour Name 4987*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0 //// 4988*5113495bSYour Name 4989*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009e4) 4990*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009e4) 4991*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 4992*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_SHFT 0 4993*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ 4994*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK) 4995*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 4996*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 4997*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 4998*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 4999*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5000*5113495bSYour Name do {\ 5001*5113495bSYour Name HWIO_INTLOCK(); \ 5002*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5003*5113495bSYour Name HWIO_INTFREE();\ 5004*5113495bSYour Name } while (0) 5005*5113495bSYour Name 5006*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5007*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5008*5113495bSYour Name 5009*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1 //// 5010*5113495bSYour Name 5011*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009e8) 5012*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009e8) 5013*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5014*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_SHFT 0 5015*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ 5016*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK) 5017*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5018*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5019*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5020*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5021*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5022*5113495bSYour Name do {\ 5023*5113495bSYour Name HWIO_INTLOCK(); \ 5024*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5025*5113495bSYour Name HWIO_INTFREE();\ 5026*5113495bSYour Name } while (0) 5027*5113495bSYour Name 5028*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5029*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5030*5113495bSYour Name 5031*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0 //// 5032*5113495bSYour Name 5033*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009ec) 5034*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009ec) 5035*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 5036*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_SHFT 0 5037*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ 5038*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK) 5039*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 5040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 5041*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 5042*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 5043*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5044*5113495bSYour Name do {\ 5045*5113495bSYour Name HWIO_INTLOCK(); \ 5046*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5047*5113495bSYour Name HWIO_INTFREE();\ 5048*5113495bSYour Name } while (0) 5049*5113495bSYour Name 5050*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5051*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5052*5113495bSYour Name 5053*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1 //// 5054*5113495bSYour Name 5055*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009f0) 5056*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009f0) 5057*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5058*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_SHFT 0 5059*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ 5060*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK) 5061*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5063*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5064*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5065*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5066*5113495bSYour Name do {\ 5067*5113495bSYour Name HWIO_INTLOCK(); \ 5068*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5069*5113495bSYour Name HWIO_INTFREE();\ 5070*5113495bSYour Name } while (0) 5071*5113495bSYour Name 5072*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5073*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5074*5113495bSYour Name 5075*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_LOW //// 5076*5113495bSYour Name 5077*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x) (x+0x000009f4) 5078*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_PHYS(x) (x+0x000009f4) 5079*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK 0xffffffff 5080*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_SHFT 0 5081*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x) \ 5082*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK) 5083*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_INM(x, mask) \ 5084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask) 5085*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUT(x, val) \ 5086*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), val) 5087*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUTM(x, mask, val) \ 5088*5113495bSYour Name do {\ 5089*5113495bSYour Name HWIO_INTLOCK(); \ 5090*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x)); \ 5091*5113495bSYour Name HWIO_INTFREE();\ 5092*5113495bSYour Name } while (0) 5093*5113495bSYour Name 5094*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_BMSK 0xffffffff 5095*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_SHFT 0x0 5096*5113495bSYour Name 5097*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_HIGH //// 5098*5113495bSYour Name 5099*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x) (x+0x000009f8) 5100*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_PHYS(x) (x+0x000009f8) 5101*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK 0x000000ff 5102*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_SHFT 0 5103*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x) \ 5104*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK) 5105*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_INM(x, mask) \ 5106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask) 5107*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUT(x, val) \ 5108*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), val) 5109*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUTM(x, mask, val) \ 5110*5113495bSYour Name do {\ 5111*5113495bSYour Name HWIO_INTLOCK(); \ 5112*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x)); \ 5113*5113495bSYour Name HWIO_INTFREE();\ 5114*5113495bSYour Name } while (0) 5115*5113495bSYour Name 5116*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_BMSK 0x000000ff 5117*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_SHFT 0x0 5118*5113495bSYour Name 5119*5113495bSYour Name //// Register TCL_R0_ASE_GST_SIZE //// 5120*5113495bSYour Name 5121*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x) (x+0x000009fc) 5122*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_PHYS(x) (x+0x000009fc) 5123*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_RMSK 0x000fffff 5124*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_SHFT 0 5125*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_IN(x) \ 5126*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), HWIO_TCL_R0_ASE_GST_SIZE_RMSK) 5127*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_INM(x, mask) \ 5128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask) 5129*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUT(x, val) \ 5130*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), val) 5131*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUTM(x, mask, val) \ 5132*5113495bSYour Name do {\ 5133*5113495bSYour Name HWIO_INTLOCK(); \ 5134*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_SIZE_IN(x)); \ 5135*5113495bSYour Name HWIO_INTFREE();\ 5136*5113495bSYour Name } while (0) 5137*5113495bSYour Name 5138*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_BMSK 0x000fffff 5139*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_SHFT 0x0 5140*5113495bSYour Name 5141*5113495bSYour Name //// Register TCL_R0_ASE_SEARCH_CTRL //// 5142*5113495bSYour Name 5143*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x) (x+0x00000a00) 5144*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_PHYS(x) (x+0x00000a00) 5145*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK 0xffff07ff 5146*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SHFT 0 5147*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x) \ 5148*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK) 5149*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_INM(x, mask) \ 5150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask) 5151*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUT(x, val) \ 5152*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), val) 5153*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUTM(x, mask, val) \ 5154*5113495bSYour Name do {\ 5155*5113495bSYour Name HWIO_INTLOCK(); \ 5156*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x)); \ 5157*5113495bSYour Name HWIO_INTFREE();\ 5158*5113495bSYour Name } while (0) 5159*5113495bSYour Name 5160*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_BMSK 0xffff0000 5161*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SHFT 0x10 5162*5113495bSYour Name 5163*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_BMSK 0x00000400 5164*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_SHFT 0xa 5165*5113495bSYour Name 5166*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_BMSK 0x00000200 5167*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_SHFT 0x9 5168*5113495bSYour Name 5169*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_BMSK 0x00000100 5170*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_SHFT 0x8 5171*5113495bSYour Name 5172*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_BMSK 0x000000ff 5173*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_SHFT 0x0 5174*5113495bSYour Name 5175*5113495bSYour Name //// Register TCL_R0_ASE_WATCHDOG //// 5176*5113495bSYour Name 5177*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x) (x+0x00000a04) 5178*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_PHYS(x) (x+0x00000a04) 5179*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_RMSK 0xffffffff 5180*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_SHFT 0 5181*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_IN(x) \ 5182*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), HWIO_TCL_R0_ASE_WATCHDOG_RMSK) 5183*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_INM(x, mask) \ 5184*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask) 5185*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUT(x, val) \ 5186*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), val) 5187*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUTM(x, mask, val) \ 5188*5113495bSYour Name do {\ 5189*5113495bSYour Name HWIO_INTLOCK(); \ 5190*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WATCHDOG_IN(x)); \ 5191*5113495bSYour Name HWIO_INTFREE();\ 5192*5113495bSYour Name } while (0) 5193*5113495bSYour Name 5194*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_BMSK 0xffff0000 5195*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_SHFT 0x10 5196*5113495bSYour Name 5197*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_BMSK 0x0000ffff 5198*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_SHFT 0x0 5199*5113495bSYour Name 5200*5113495bSYour Name //// Register TCL_R0_ASE_CLKGATE_DISABLE //// 5201*5113495bSYour Name 5202*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x) (x+0x00000a08) 5203*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PHYS(x) (x+0x00000a08) 5204*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK 0xffffffff 5205*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SHFT 0 5206*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x) \ 5207*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK) 5208*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_INM(x, mask) \ 5209*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask) 5210*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUT(x, val) \ 5211*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), val) 5212*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUTM(x, mask, val) \ 5213*5113495bSYour Name do {\ 5214*5113495bSYour Name HWIO_INTLOCK(); \ 5215*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x)); \ 5216*5113495bSYour Name HWIO_INTFREE();\ 5217*5113495bSYour Name } while (0) 5218*5113495bSYour Name 5219*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_BMSK 0x80000000 5220*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_SHFT 0x1f 5221*5113495bSYour Name 5222*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 5223*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 5224*5113495bSYour Name 5225*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_BMSK 0x3fffff80 5226*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_SHFT 0x7 5227*5113495bSYour Name 5228*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_BMSK 0x00000040 5229*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_SHFT 0x6 5230*5113495bSYour Name 5231*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_BMSK 0x00000020 5232*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_SHFT 0x5 5233*5113495bSYour Name 5234*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_BMSK 0x00000010 5235*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_SHFT 0x4 5236*5113495bSYour Name 5237*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_BMSK 0x00000008 5238*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_SHFT 0x3 5239*5113495bSYour Name 5240*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_BMSK 0x00000004 5241*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_SHFT 0x2 5242*5113495bSYour Name 5243*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_BMSK 0x00000002 5244*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_SHFT 0x1 5245*5113495bSYour Name 5246*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_BMSK 0x00000001 5247*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_SHFT 0x0 5248*5113495bSYour Name 5249*5113495bSYour Name //// Register TCL_R0_ASE_WRITE_BACK_PENDING //// 5250*5113495bSYour Name 5251*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x) (x+0x00000a0c) 5252*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_PHYS(x) (x+0x00000a0c) 5253*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK 0x00000001 5254*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_SHFT 0 5255*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x) \ 5256*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK) 5257*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_INM(x, mask) \ 5258*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask) 5259*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUT(x, val) \ 5260*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), val) 5261*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUTM(x, mask, val) \ 5262*5113495bSYour Name do {\ 5263*5113495bSYour Name HWIO_INTLOCK(); \ 5264*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x)); \ 5265*5113495bSYour Name HWIO_INTFREE();\ 5266*5113495bSYour Name } while (0) 5267*5113495bSYour Name 5268*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_BMSK 0x00000001 5269*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_SHFT 0x0 5270*5113495bSYour Name 5271*5113495bSYour Name //// Register TCL_R1_CACHE_FLUSH //// 5272*5113495bSYour Name 5273*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ADDR(x) (x+0x00001000) 5274*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_PHYS(x) (x+0x00001000) 5275*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_RMSK 0x00000003 5276*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_SHFT 0 5277*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_IN(x) \ 5278*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), HWIO_TCL_R1_CACHE_FLUSH_RMSK) 5279*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_INM(x, mask) \ 5280*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask) 5281*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUT(x, val) \ 5282*5113495bSYour Name out_dword( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), val) 5283*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUTM(x, mask, val) \ 5284*5113495bSYour Name do {\ 5285*5113495bSYour Name HWIO_INTLOCK(); \ 5286*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask, val, HWIO_TCL_R1_CACHE_FLUSH_IN(x)); \ 5287*5113495bSYour Name HWIO_INTFREE();\ 5288*5113495bSYour Name } while (0) 5289*5113495bSYour Name 5290*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_BMSK 0x00000002 5291*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_SHFT 0x1 5292*5113495bSYour Name 5293*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_BMSK 0x00000001 5294*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_SHFT 0x0 5295*5113495bSYour Name 5296*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_0 //// 5297*5113495bSYour Name 5298*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x) (x+0x00001004) 5299*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_PHYS(x) (x+0x00001004) 5300*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_RMSK 0x07ffffff 5301*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SHFT 0 5302*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_IN(x) \ 5303*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_0_RMSK) 5304*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_INM(x, mask) \ 5305*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask) 5306*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUT(x, val) \ 5307*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), val) 5308*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ 5309*5113495bSYour Name do {\ 5310*5113495bSYour Name HWIO_INTLOCK(); \ 5311*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_0_IN(x)); \ 5312*5113495bSYour Name HWIO_INTFREE();\ 5313*5113495bSYour Name } while (0) 5314*5113495bSYour Name 5315*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_BMSK 0x07000000 5316*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_SHFT 0x18 5317*5113495bSYour Name 5318*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_BMSK 0x00e00000 5319*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_SHFT 0x15 5320*5113495bSYour Name 5321*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_BMSK 0x001c0000 5322*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_SHFT 0x12 5323*5113495bSYour Name 5324*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_BMSK 0x00038000 5325*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_SHFT 0xf 5326*5113495bSYour Name 5327*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_BMSK 0x00007000 5328*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_SHFT 0xc 5329*5113495bSYour Name 5330*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_BMSK 0x00000e00 5331*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_SHFT 0x9 5332*5113495bSYour Name 5333*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_BMSK 0x000001c0 5334*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_SHFT 0x6 5335*5113495bSYour Name 5336*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_BMSK 0x00000038 5337*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_SHFT 0x3 5338*5113495bSYour Name 5339*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_BMSK 0x00000007 5340*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_SHFT 0x0 5341*5113495bSYour Name 5342*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_1 //// 5343*5113495bSYour Name 5344*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x) (x+0x00001008) 5345*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PHYS(x) (x+0x00001008) 5346*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_RMSK 0x0003ffff 5347*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_SHFT 0 5348*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_IN(x) \ 5349*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_1_RMSK) 5350*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_INM(x, mask) \ 5351*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask) 5352*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUT(x, val) \ 5353*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), val) 5354*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ 5355*5113495bSYour Name do {\ 5356*5113495bSYour Name HWIO_INTLOCK(); \ 5357*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_1_IN(x)); \ 5358*5113495bSYour Name HWIO_INTFREE();\ 5359*5113495bSYour Name } while (0) 5360*5113495bSYour Name 5361*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_BMSK 0x00038000 5362*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_SHFT 0xf 5363*5113495bSYour Name 5364*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_BMSK 0x00007000 5365*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_SHFT 0xc 5366*5113495bSYour Name 5367*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_BMSK 0x00000e00 5368*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_SHFT 0x9 5369*5113495bSYour Name 5370*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_BMSK 0x000001c0 5371*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_SHFT 0x6 5372*5113495bSYour Name 5373*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_BMSK 0x00000038 5374*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_SHFT 0x3 5375*5113495bSYour Name 5376*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_BMSK 0x00000007 5377*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_SHFT 0x0 5378*5113495bSYour Name 5379*5113495bSYour Name //// Register TCL_R1_TESTBUS_CTRL_0 //// 5380*5113495bSYour Name 5381*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x) (x+0x0000100c) 5382*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PHYS(x) (x+0x0000100c) 5383*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK 0x3fffffff 5384*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_SHFT 0 5385*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x) \ 5386*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK) 5387*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_INM(x, mask) \ 5388*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask) 5389*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUT(x, val) \ 5390*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), val) 5391*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUTM(x, mask, val) \ 5392*5113495bSYour Name do {\ 5393*5113495bSYour Name HWIO_INTLOCK(); \ 5394*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x)); \ 5395*5113495bSYour Name HWIO_INTFREE();\ 5396*5113495bSYour Name } while (0) 5397*5113495bSYour Name 5398*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x20000000 5399*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x1d 5400*5113495bSYour Name 5401*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_BMSK 0x1f800000 5402*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_SHFT 0x17 5403*5113495bSYour Name 5404*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_BMSK 0x007c0000 5405*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_SHFT 0x12 5406*5113495bSYour Name 5407*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_BMSK 0x0003c000 5408*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_SHFT 0xe 5409*5113495bSYour Name 5410*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_BMSK 0x00003c00 5411*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_SHFT 0xa 5412*5113495bSYour Name 5413*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_BMSK 0x000003e0 5414*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_SHFT 0x5 5415*5113495bSYour Name 5416*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_BMSK 0x0000001f 5417*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_SHFT 0x0 5418*5113495bSYour Name 5419*5113495bSYour Name //// Register TCL_R1_TESTBUS_LOW //// 5420*5113495bSYour Name 5421*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_ADDR(x) (x+0x00001010) 5422*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_PHYS(x) (x+0x00001010) 5423*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_RMSK 0xffffffff 5424*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_SHFT 0 5425*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_IN(x) \ 5426*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), HWIO_TCL_R1_TESTBUS_LOW_RMSK) 5427*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_INM(x, mask) \ 5428*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask) 5429*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUT(x, val) \ 5430*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), val) 5431*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUTM(x, mask, val) \ 5432*5113495bSYour Name do {\ 5433*5113495bSYour Name HWIO_INTLOCK(); \ 5434*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_LOW_IN(x)); \ 5435*5113495bSYour Name HWIO_INTFREE();\ 5436*5113495bSYour Name } while (0) 5437*5113495bSYour Name 5438*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff 5439*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_SHFT 0x0 5440*5113495bSYour Name 5441*5113495bSYour Name //// Register TCL_R1_TESTBUS_HIGH //// 5442*5113495bSYour Name 5443*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x) (x+0x00001014) 5444*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_PHYS(x) (x+0x00001014) 5445*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_RMSK 0x000000ff 5446*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_SHFT 0 5447*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_IN(x) \ 5448*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), HWIO_TCL_R1_TESTBUS_HIGH_RMSK) 5449*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_INM(x, mask) \ 5450*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask) 5451*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUT(x, val) \ 5452*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), val) 5453*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUTM(x, mask, val) \ 5454*5113495bSYour Name do {\ 5455*5113495bSYour Name HWIO_INTLOCK(); \ 5456*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_HIGH_IN(x)); \ 5457*5113495bSYour Name HWIO_INTFREE();\ 5458*5113495bSYour Name } while (0) 5459*5113495bSYour Name 5460*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_BMSK 0x000000ff 5461*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_SHFT 0x0 5462*5113495bSYour Name 5463*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_0 //// 5464*5113495bSYour Name 5465*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x) (x+0x00001018) 5466*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_PHYS(x) (x+0x00001018) 5467*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_RMSK 0xffffffff 5468*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_SHFT 0 5469*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_IN(x) \ 5470*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_0_RMSK) 5471*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_INM(x, mask) \ 5472*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask) 5473*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUT(x, val) \ 5474*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), val) 5475*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUTM(x, mask, val) \ 5476*5113495bSYour Name do {\ 5477*5113495bSYour Name HWIO_INTLOCK(); \ 5478*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_0_IN(x)); \ 5479*5113495bSYour Name HWIO_INTFREE();\ 5480*5113495bSYour Name } while (0) 5481*5113495bSYour Name 5482*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_BMSK 0xffffffff 5483*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_SHFT 0x0 5484*5113495bSYour Name 5485*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_1 //// 5486*5113495bSYour Name 5487*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x) (x+0x0000101c) 5488*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_PHYS(x) (x+0x0000101c) 5489*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_RMSK 0xffffffff 5490*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_SHFT 0 5491*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_IN(x) \ 5492*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_1_RMSK) 5493*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_INM(x, mask) \ 5494*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask) 5495*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUT(x, val) \ 5496*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), val) 5497*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUTM(x, mask, val) \ 5498*5113495bSYour Name do {\ 5499*5113495bSYour Name HWIO_INTLOCK(); \ 5500*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_1_IN(x)); \ 5501*5113495bSYour Name HWIO_INTFREE();\ 5502*5113495bSYour Name } while (0) 5503*5113495bSYour Name 5504*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_BMSK 0xffffffff 5505*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_SHFT 0x0 5506*5113495bSYour Name 5507*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_2 //// 5508*5113495bSYour Name 5509*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x) (x+0x00001020) 5510*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_PHYS(x) (x+0x00001020) 5511*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_RMSK 0xffffffff 5512*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_SHFT 0 5513*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_IN(x) \ 5514*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_2_RMSK) 5515*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_INM(x, mask) \ 5516*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask) 5517*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUT(x, val) \ 5518*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), val) 5519*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUTM(x, mask, val) \ 5520*5113495bSYour Name do {\ 5521*5113495bSYour Name HWIO_INTLOCK(); \ 5522*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_2_IN(x)); \ 5523*5113495bSYour Name HWIO_INTFREE();\ 5524*5113495bSYour Name } while (0) 5525*5113495bSYour Name 5526*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_BMSK 0xffffffff 5527*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_SHFT 0x0 5528*5113495bSYour Name 5529*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_3 //// 5530*5113495bSYour Name 5531*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x) (x+0x00001024) 5532*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_PHYS(x) (x+0x00001024) 5533*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_RMSK 0xffffffff 5534*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_SHFT 0 5535*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_IN(x) \ 5536*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_3_RMSK) 5537*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_INM(x, mask) \ 5538*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask) 5539*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUT(x, val) \ 5540*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), val) 5541*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUTM(x, mask, val) \ 5542*5113495bSYour Name do {\ 5543*5113495bSYour Name HWIO_INTLOCK(); \ 5544*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_3_IN(x)); \ 5545*5113495bSYour Name HWIO_INTFREE();\ 5546*5113495bSYour Name } while (0) 5547*5113495bSYour Name 5548*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_BMSK 0xffffffff 5549*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_SHFT 0x0 5550*5113495bSYour Name 5551*5113495bSYour Name //// Register TCL_R1_REG_ACCESS_EVENT_GEN_CTRL //// 5552*5113495bSYour Name 5553*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x) (x+0x00001028) 5554*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_PHYS(x) (x+0x00001028) 5555*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff 5556*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_SHFT 0 5557*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x) \ 5558*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK) 5559*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(x, mask) \ 5560*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask) 5561*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(x, val) \ 5562*5113495bSYour Name out_dword( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), val) 5563*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(x, mask, val) \ 5564*5113495bSYour Name do {\ 5565*5113495bSYour Name HWIO_INTLOCK(); \ 5566*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x)); \ 5567*5113495bSYour Name HWIO_INTFREE();\ 5568*5113495bSYour Name } while (0) 5569*5113495bSYour Name 5570*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000 5571*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11 5572*5113495bSYour Name 5573*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x0001fffc 5574*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2 5575*5113495bSYour Name 5576*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x00000002 5577*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1 5578*5113495bSYour Name 5579*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x00000001 5580*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0 5581*5113495bSYour Name 5582*5113495bSYour Name //// Register TCL_R1_END_OF_TEST_CHECK //// 5583*5113495bSYour Name 5584*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x0000102c) 5585*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x0000102c) 5586*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK 0x00000001 5587*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_SHFT 0 5588*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x) \ 5589*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK) 5590*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_INM(x, mask) \ 5591*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask) 5592*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUT(x, val) \ 5593*5113495bSYour Name out_dword( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), val) 5594*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5595*5113495bSYour Name do {\ 5596*5113495bSYour Name HWIO_INTLOCK(); \ 5597*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x)); \ 5598*5113495bSYour Name HWIO_INTFREE();\ 5599*5113495bSYour Name } while (0) 5600*5113495bSYour Name 5601*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5602*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5603*5113495bSYour Name 5604*5113495bSYour Name //// Register TCL_R1_SPARE_REGISTER //// 5605*5113495bSYour Name 5606*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_ADDR(x) (x+0x00001030) 5607*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_PHYS(x) (x+0x00001030) 5608*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_RMSK 0xffffffff 5609*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_SHFT 0 5610*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_IN(x) \ 5611*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), HWIO_TCL_R1_SPARE_REGISTER_RMSK) 5612*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_INM(x, mask) \ 5613*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask) 5614*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUT(x, val) \ 5615*5113495bSYour Name out_dword( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), val) 5616*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUTM(x, mask, val) \ 5617*5113495bSYour Name do {\ 5618*5113495bSYour Name HWIO_INTLOCK(); \ 5619*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R1_SPARE_REGISTER_IN(x)); \ 5620*5113495bSYour Name HWIO_INTFREE();\ 5621*5113495bSYour Name } while (0) 5622*5113495bSYour Name 5623*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_BMSK 0xffffffff 5624*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_SHFT 0x0 5625*5113495bSYour Name 5626*5113495bSYour Name //// Register TCL_R1_ASE_END_OF_TEST_CHECK //// 5627*5113495bSYour Name 5628*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x) (x+0x00001034) 5629*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_PHYS(x) (x+0x00001034) 5630*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK 0x00000001 5631*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_SHFT 0 5632*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x) \ 5633*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK) 5634*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_INM(x, mask) \ 5635*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask) 5636*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUT(x, val) \ 5637*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), val) 5638*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5639*5113495bSYour Name do {\ 5640*5113495bSYour Name HWIO_INTLOCK(); \ 5641*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x)); \ 5642*5113495bSYour Name HWIO_INTFREE();\ 5643*5113495bSYour Name } while (0) 5644*5113495bSYour Name 5645*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5646*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5647*5113495bSYour Name 5648*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CLEAR_COUNTERS //// 5649*5113495bSYour Name 5650*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x) (x+0x00001038) 5651*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_PHYS(x) (x+0x00001038) 5652*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK 0x00000001 5653*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_SHFT 0 5654*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x) \ 5655*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK) 5656*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_INM(x, mask) \ 5657*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask) 5658*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUT(x, val) \ 5659*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), val) 5660*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUTM(x, mask, val) \ 5661*5113495bSYour Name do {\ 5662*5113495bSYour Name HWIO_INTLOCK(); \ 5663*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x)); \ 5664*5113495bSYour Name HWIO_INTFREE();\ 5665*5113495bSYour Name } while (0) 5666*5113495bSYour Name 5667*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_BMSK 0x00000001 5668*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_SHFT 0x0 5669*5113495bSYour Name 5670*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER //// 5671*5113495bSYour Name 5672*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x) (x+0x0000103c) 5673*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_PHYS(x) (x+0x0000103c) 5674*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK 0xffffffff 5675*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_SHFT 0 5676*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x) \ 5677*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK) 5678*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_INM(x, mask) \ 5679*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask) 5680*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUT(x, val) \ 5681*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), val) 5682*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUTM(x, mask, val) \ 5683*5113495bSYour Name do {\ 5684*5113495bSYour Name HWIO_INTLOCK(); \ 5685*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x)); \ 5686*5113495bSYour Name HWIO_INTFREE();\ 5687*5113495bSYour Name } while (0) 5688*5113495bSYour Name 5689*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_BMSK 0xffffffff 5690*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_SHFT 0x0 5691*5113495bSYour Name 5692*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER //// 5693*5113495bSYour Name 5694*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x) (x+0x00001040) 5695*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_PHYS(x) (x+0x00001040) 5696*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK 0xffffffff 5697*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_SHFT 0 5698*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x) \ 5699*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK) 5700*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_INM(x, mask) \ 5701*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask) 5702*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUT(x, val) \ 5703*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), val) 5704*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUTM(x, mask, val) \ 5705*5113495bSYour Name do {\ 5706*5113495bSYour Name HWIO_INTLOCK(); \ 5707*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x)); \ 5708*5113495bSYour Name HWIO_INTFREE();\ 5709*5113495bSYour Name } while (0) 5710*5113495bSYour Name 5711*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_BMSK 0xffffffff 5712*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_SHFT 0x0 5713*5113495bSYour Name 5714*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER //// 5715*5113495bSYour Name 5716*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x) (x+0x00001044) 5717*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PHYS(x) (x+0x00001044) 5718*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK 0x000fffff 5719*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_SHFT 0 5720*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x) \ 5721*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK) 5722*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_INM(x, mask) \ 5723*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask) 5724*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUT(x, val) \ 5725*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), val) 5726*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUTM(x, mask, val) \ 5727*5113495bSYour Name do {\ 5728*5113495bSYour Name HWIO_INTLOCK(); \ 5729*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x)); \ 5730*5113495bSYour Name HWIO_INTFREE();\ 5731*5113495bSYour Name } while (0) 5732*5113495bSYour Name 5733*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_BMSK 0x000ffc00 5734*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_SHFT 0xa 5735*5113495bSYour Name 5736*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_BMSK 0x000003ff 5737*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_SHFT 0x0 5738*5113495bSYour Name 5739*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER //// 5740*5113495bSYour Name 5741*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x) (x+0x00001048) 5742*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PHYS(x) (x+0x00001048) 5743*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK 0x03ffffff 5744*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SHFT 0 5745*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x) \ 5746*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK) 5747*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_INM(x, mask) \ 5748*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask) 5749*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUT(x, val) \ 5750*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), val) 5751*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUTM(x, mask, val) \ 5752*5113495bSYour Name do {\ 5753*5113495bSYour Name HWIO_INTLOCK(); \ 5754*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x)); \ 5755*5113495bSYour Name HWIO_INTFREE();\ 5756*5113495bSYour Name } while (0) 5757*5113495bSYour Name 5758*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_BMSK 0x03fffc00 5759*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_SHFT 0xa 5760*5113495bSYour Name 5761*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_BMSK 0x000003e0 5762*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_SHFT 0x5 5763*5113495bSYour Name 5764*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_BMSK 0x0000001f 5765*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_SHFT 0x0 5766*5113495bSYour Name 5767*5113495bSYour Name //// Register TCL_R1_ASE_SM_STATES //// 5768*5113495bSYour Name 5769*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_ADDR(x) (x+0x0000104c) 5770*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PHYS(x) (x+0x0000104c) 5771*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_RMSK 0x00001fff 5772*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_SHFT 0 5773*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_IN(x) \ 5774*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), HWIO_TCL_R1_ASE_SM_STATES_RMSK) 5775*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_INM(x, mask) \ 5776*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask) 5777*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUT(x, val) \ 5778*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), val) 5779*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUTM(x, mask, val) \ 5780*5113495bSYour Name do {\ 5781*5113495bSYour Name HWIO_INTLOCK(); \ 5782*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask, val, HWIO_TCL_R1_ASE_SM_STATES_IN(x)); \ 5783*5113495bSYour Name HWIO_INTFREE();\ 5784*5113495bSYour Name } while (0) 5785*5113495bSYour Name 5786*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_BMSK 0x00001800 5787*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_SHFT 0xb 5788*5113495bSYour Name 5789*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_BMSK 0x00000600 5790*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_SHFT 0x9 5791*5113495bSYour Name 5792*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_BMSK 0x00000180 5793*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_SHFT 0x7 5794*5113495bSYour Name 5795*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_BMSK 0x00000070 5796*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_SHFT 0x4 5797*5113495bSYour Name 5798*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_BMSK 0x0000000f 5799*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_SHFT 0x0 5800*5113495bSYour Name 5801*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG //// 5802*5113495bSYour Name 5803*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x) (x+0x00001050) 5804*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_PHYS(x) (x+0x00001050) 5805*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK 0x000003ff 5806*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_SHFT 0 5807*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x) \ 5808*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK) 5809*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_INM(x, mask) \ 5810*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask) 5811*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUT(x, val) \ 5812*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), val) 5813*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUTM(x, mask, val) \ 5814*5113495bSYour Name do {\ 5815*5113495bSYour Name HWIO_INTLOCK(); \ 5816*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x)); \ 5817*5113495bSYour Name HWIO_INTFREE();\ 5818*5113495bSYour Name } while (0) 5819*5113495bSYour Name 5820*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_BMSK 0x000003ff 5821*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_SHFT 0x0 5822*5113495bSYour Name 5823*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS //// 5824*5113495bSYour Name 5825*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x) (x+0x00001054) 5826*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_PHYS(x) (x+0x00001054) 5827*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK 0x007fffff 5828*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_SHFT 0 5829*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x) \ 5830*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK) 5831*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_INM(x, mask) \ 5832*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask) 5833*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUT(x, val) \ 5834*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), val) 5835*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUTM(x, mask, val) \ 5836*5113495bSYour Name do {\ 5837*5113495bSYour Name HWIO_INTLOCK(); \ 5838*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x)); \ 5839*5113495bSYour Name HWIO_INTFREE();\ 5840*5113495bSYour Name } while (0) 5841*5113495bSYour Name 5842*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_BMSK 0x007ffff8 5843*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_SHFT 0x3 5844*5113495bSYour Name 5845*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_BMSK 0x00000004 5846*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_SHFT 0x2 5847*5113495bSYour Name 5848*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_BMSK 0x00000002 5849*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_SHFT 0x1 5850*5113495bSYour Name 5851*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_BMSK 0x00000001 5852*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_SHFT 0x0 5853*5113495bSYour Name 5854*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_n //// 5855*5113495bSYour Name 5856*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n) (base+0x1058+0x4*n) 5857*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_PHYS(base, n) (base+0x1058+0x4*n) 5858*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK 0xffffffff 5859*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_SHFT 0 5860*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_MAXn 31 5861*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n) \ 5862*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK) 5863*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INMI(base, n, mask) \ 5864*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask) 5865*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTI(base, n, val) \ 5866*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), val) 5867*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTMI(base, n, mask, val) \ 5868*5113495bSYour Name do {\ 5869*5113495bSYour Name HWIO_INTLOCK(); \ 5870*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n)); \ 5871*5113495bSYour Name HWIO_INTFREE();\ 5872*5113495bSYour Name } while (0) 5873*5113495bSYour Name 5874*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_BMSK 0xffffffff 5875*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_SHFT 0x0 5876*5113495bSYour Name 5877*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_HP //// 5878*5113495bSYour Name 5879*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x) (x+0x00002000) 5880*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_PHYS(x) (x+0x00002000) 5881*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK 0x000fffff 5882*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_SHFT 0 5883*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x) \ 5884*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK) 5885*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_INM(x, mask) \ 5886*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask) 5887*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUT(x, val) \ 5888*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), val) 5889*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUTM(x, mask, val) \ 5890*5113495bSYour Name do {\ 5891*5113495bSYour Name HWIO_INTLOCK(); \ 5892*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x)); \ 5893*5113495bSYour Name HWIO_INTFREE();\ 5894*5113495bSYour Name } while (0) 5895*5113495bSYour Name 5896*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_BMSK 0x000fffff 5897*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 5898*5113495bSYour Name 5899*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_TP //// 5900*5113495bSYour Name 5901*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x) (x+0x00002004) 5902*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_PHYS(x) (x+0x00002004) 5903*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK 0x000fffff 5904*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_SHFT 0 5905*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x) \ 5906*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK) 5907*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_INM(x, mask) \ 5908*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask) 5909*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUT(x, val) \ 5910*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), val) 5911*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUTM(x, mask, val) \ 5912*5113495bSYour Name do {\ 5913*5113495bSYour Name HWIO_INTLOCK(); \ 5914*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x)); \ 5915*5113495bSYour Name HWIO_INTFREE();\ 5916*5113495bSYour Name } while (0) 5917*5113495bSYour Name 5918*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_BMSK 0x000fffff 5919*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 5920*5113495bSYour Name 5921*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_HP //// 5922*5113495bSYour Name 5923*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x) (x+0x00002008) 5924*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_PHYS(x) (x+0x00002008) 5925*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK 0x000fffff 5926*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_SHFT 0 5927*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x) \ 5928*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK) 5929*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_INM(x, mask) \ 5930*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask) 5931*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUT(x, val) \ 5932*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), val) 5933*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUTM(x, mask, val) \ 5934*5113495bSYour Name do {\ 5935*5113495bSYour Name HWIO_INTLOCK(); \ 5936*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x)); \ 5937*5113495bSYour Name HWIO_INTFREE();\ 5938*5113495bSYour Name } while (0) 5939*5113495bSYour Name 5940*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_BMSK 0x000fffff 5941*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_SHFT 0x0 5942*5113495bSYour Name 5943*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_TP //// 5944*5113495bSYour Name 5945*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x) (x+0x0000200c) 5946*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_PHYS(x) (x+0x0000200c) 5947*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK 0x000fffff 5948*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_SHFT 0 5949*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x) \ 5950*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK) 5951*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_INM(x, mask) \ 5952*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask) 5953*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUT(x, val) \ 5954*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), val) 5955*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUTM(x, mask, val) \ 5956*5113495bSYour Name do {\ 5957*5113495bSYour Name HWIO_INTLOCK(); \ 5958*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x)); \ 5959*5113495bSYour Name HWIO_INTFREE();\ 5960*5113495bSYour Name } while (0) 5961*5113495bSYour Name 5962*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_BMSK 0x000fffff 5963*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_SHFT 0x0 5964*5113495bSYour Name 5965*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_HP //// 5966*5113495bSYour Name 5967*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x) (x+0x00002010) 5968*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_PHYS(x) (x+0x00002010) 5969*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK 0x000fffff 5970*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_SHFT 0 5971*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x) \ 5972*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK) 5973*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_INM(x, mask) \ 5974*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask) 5975*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUT(x, val) \ 5976*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), val) 5977*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUTM(x, mask, val) \ 5978*5113495bSYour Name do {\ 5979*5113495bSYour Name HWIO_INTLOCK(); \ 5980*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x)); \ 5981*5113495bSYour Name HWIO_INTFREE();\ 5982*5113495bSYour Name } while (0) 5983*5113495bSYour Name 5984*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_BMSK 0x000fffff 5985*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_SHFT 0x0 5986*5113495bSYour Name 5987*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_TP //// 5988*5113495bSYour Name 5989*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x) (x+0x00002014) 5990*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_PHYS(x) (x+0x00002014) 5991*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK 0x000fffff 5992*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_SHFT 0 5993*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x) \ 5994*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK) 5995*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_INM(x, mask) \ 5996*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask) 5997*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUT(x, val) \ 5998*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), val) 5999*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUTM(x, mask, val) \ 6000*5113495bSYour Name do {\ 6001*5113495bSYour Name HWIO_INTLOCK(); \ 6002*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x)); \ 6003*5113495bSYour Name HWIO_INTFREE();\ 6004*5113495bSYour Name } while (0) 6005*5113495bSYour Name 6006*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_BMSK 0x000fffff 6007*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_SHFT 0x0 6008*5113495bSYour Name 6009*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_HP //// 6010*5113495bSYour Name 6011*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x) (x+0x00002018) 6012*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_PHYS(x) (x+0x00002018) 6013*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK 0x000fffff 6014*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_SHFT 0 6015*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x) \ 6016*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK) 6017*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_INM(x, mask) \ 6018*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask) 6019*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUT(x, val) \ 6020*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), val) 6021*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUTM(x, mask, val) \ 6022*5113495bSYour Name do {\ 6023*5113495bSYour Name HWIO_INTLOCK(); \ 6024*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x)); \ 6025*5113495bSYour Name HWIO_INTFREE();\ 6026*5113495bSYour Name } while (0) 6027*5113495bSYour Name 6028*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_BMSK 0x000fffff 6029*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_SHFT 0x0 6030*5113495bSYour Name 6031*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_TP //// 6032*5113495bSYour Name 6033*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x) (x+0x0000201c) 6034*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_PHYS(x) (x+0x0000201c) 6035*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK 0x000fffff 6036*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_SHFT 0 6037*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x) \ 6038*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK) 6039*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_INM(x, mask) \ 6040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask) 6041*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUT(x, val) \ 6042*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), val) 6043*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUTM(x, mask, val) \ 6044*5113495bSYour Name do {\ 6045*5113495bSYour Name HWIO_INTLOCK(); \ 6046*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x)); \ 6047*5113495bSYour Name HWIO_INTFREE();\ 6048*5113495bSYour Name } while (0) 6049*5113495bSYour Name 6050*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_BMSK 0x000fffff 6051*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_SHFT 0x0 6052*5113495bSYour Name 6053*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_HP //// 6054*5113495bSYour Name 6055*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x) (x+0x00002020) 6056*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_PHYS(x) (x+0x00002020) 6057*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK 0x0000ffff 6058*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_SHFT 0 6059*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x) \ 6060*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK) 6061*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_INM(x, mask) \ 6062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask) 6063*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUT(x, val) \ 6064*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), val) 6065*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUTM(x, mask, val) \ 6066*5113495bSYour Name do {\ 6067*5113495bSYour Name HWIO_INTLOCK(); \ 6068*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x)); \ 6069*5113495bSYour Name HWIO_INTFREE();\ 6070*5113495bSYour Name } while (0) 6071*5113495bSYour Name 6072*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6073*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 6074*5113495bSYour Name 6075*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_TP //// 6076*5113495bSYour Name 6077*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x) (x+0x00002024) 6078*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_PHYS(x) (x+0x00002024) 6079*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK 0x0000ffff 6080*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_SHFT 0 6081*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x) \ 6082*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK) 6083*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_INM(x, mask) \ 6084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask) 6085*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUT(x, val) \ 6086*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), val) 6087*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUTM(x, mask, val) \ 6088*5113495bSYour Name do {\ 6089*5113495bSYour Name HWIO_INTLOCK(); \ 6090*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x)); \ 6091*5113495bSYour Name HWIO_INTFREE();\ 6092*5113495bSYour Name } while (0) 6093*5113495bSYour Name 6094*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6095*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 6096*5113495bSYour Name 6097*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_HP //// 6098*5113495bSYour Name 6099*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x) (x+0x00002028) 6100*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_PHYS(x) (x+0x00002028) 6101*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK 0x0000ffff 6102*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_SHFT 0 6103*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x) \ 6104*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK) 6105*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_INM(x, mask) \ 6106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask) 6107*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUT(x, val) \ 6108*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), val) 6109*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUTM(x, mask, val) \ 6110*5113495bSYour Name do {\ 6111*5113495bSYour Name HWIO_INTLOCK(); \ 6112*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x)); \ 6113*5113495bSYour Name HWIO_INTFREE();\ 6114*5113495bSYour Name } while (0) 6115*5113495bSYour Name 6116*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6117*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_SHFT 0x0 6118*5113495bSYour Name 6119*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_TP //// 6120*5113495bSYour Name 6121*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x) (x+0x0000202c) 6122*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_PHYS(x) (x+0x0000202c) 6123*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK 0x0000ffff 6124*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_SHFT 0 6125*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x) \ 6126*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK) 6127*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_INM(x, mask) \ 6128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask) 6129*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUT(x, val) \ 6130*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), val) 6131*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUTM(x, mask, val) \ 6132*5113495bSYour Name do {\ 6133*5113495bSYour Name HWIO_INTLOCK(); \ 6134*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x)); \ 6135*5113495bSYour Name HWIO_INTFREE();\ 6136*5113495bSYour Name } while (0) 6137*5113495bSYour Name 6138*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6139*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_SHFT 0x0 6140*5113495bSYour Name 6141*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_HP //// 6142*5113495bSYour Name 6143*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x) (x+0x00002030) 6144*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_PHYS(x) (x+0x00002030) 6145*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK 0x0000ffff 6146*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_SHFT 0 6147*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x) \ 6148*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK) 6149*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_INM(x, mask) \ 6150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask) 6151*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUT(x, val) \ 6152*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), val) 6153*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUTM(x, mask, val) \ 6154*5113495bSYour Name do {\ 6155*5113495bSYour Name HWIO_INTLOCK(); \ 6156*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x)); \ 6157*5113495bSYour Name HWIO_INTFREE();\ 6158*5113495bSYour Name } while (0) 6159*5113495bSYour Name 6160*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6161*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_SHFT 0x0 6162*5113495bSYour Name 6163*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_TP //// 6164*5113495bSYour Name 6165*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x) (x+0x00002034) 6166*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_PHYS(x) (x+0x00002034) 6167*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK 0x0000ffff 6168*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_SHFT 0 6169*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x) \ 6170*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK) 6171*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_INM(x, mask) \ 6172*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask) 6173*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUT(x, val) \ 6174*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), val) 6175*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUTM(x, mask, val) \ 6176*5113495bSYour Name do {\ 6177*5113495bSYour Name HWIO_INTLOCK(); \ 6178*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x)); \ 6179*5113495bSYour Name HWIO_INTFREE();\ 6180*5113495bSYour Name } while (0) 6181*5113495bSYour Name 6182*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6183*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_SHFT 0x0 6184*5113495bSYour Name 6185*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_HP //// 6186*5113495bSYour Name 6187*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x) (x+0x00002038) 6188*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_PHYS(x) (x+0x00002038) 6189*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK 0x0000ffff 6190*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_SHFT 0 6191*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x) \ 6192*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK) 6193*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_INM(x, mask) \ 6194*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask) 6195*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUT(x, val) \ 6196*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), val) 6197*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUTM(x, mask, val) \ 6198*5113495bSYour Name do {\ 6199*5113495bSYour Name HWIO_INTLOCK(); \ 6200*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x)); \ 6201*5113495bSYour Name HWIO_INTFREE();\ 6202*5113495bSYour Name } while (0) 6203*5113495bSYour Name 6204*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6205*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_SHFT 0x0 6206*5113495bSYour Name 6207*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_TP //// 6208*5113495bSYour Name 6209*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x) (x+0x0000203c) 6210*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_PHYS(x) (x+0x0000203c) 6211*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK 0x0000ffff 6212*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_SHFT 0 6213*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x) \ 6214*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK) 6215*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_INM(x, mask) \ 6216*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask) 6217*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUT(x, val) \ 6218*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), val) 6219*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUTM(x, mask, val) \ 6220*5113495bSYour Name do {\ 6221*5113495bSYour Name HWIO_INTLOCK(); \ 6222*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x)); \ 6223*5113495bSYour Name HWIO_INTFREE();\ 6224*5113495bSYour Name } while (0) 6225*5113495bSYour Name 6226*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6227*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_SHFT 0x0 6228*5113495bSYour Name 6229*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_HP //// 6230*5113495bSYour Name 6231*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x) (x+0x00002040) 6232*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_PHYS(x) (x+0x00002040) 6233*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_RMSK 0x0000ffff 6234*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_SHFT 0 6235*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_IN(x) \ 6236*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_HP_RMSK) 6237*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_INM(x, mask) \ 6238*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask) 6239*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUT(x, val) \ 6240*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), val) 6241*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUTM(x, mask, val) \ 6242*5113495bSYour Name do {\ 6243*5113495bSYour Name HWIO_INTLOCK(); \ 6244*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_HP_IN(x)); \ 6245*5113495bSYour Name HWIO_INTFREE();\ 6246*5113495bSYour Name } while (0) 6247*5113495bSYour Name 6248*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6249*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_SHFT 0x0 6250*5113495bSYour Name 6251*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_TP //// 6252*5113495bSYour Name 6253*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x) (x+0x00002044) 6254*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_PHYS(x) (x+0x00002044) 6255*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_RMSK 0x0000ffff 6256*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_SHFT 0 6257*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_IN(x) \ 6258*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_TP_RMSK) 6259*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_INM(x, mask) \ 6260*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask) 6261*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUT(x, val) \ 6262*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), val) 6263*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUTM(x, mask, val) \ 6264*5113495bSYour Name do {\ 6265*5113495bSYour Name HWIO_INTLOCK(); \ 6266*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_TP_IN(x)); \ 6267*5113495bSYour Name HWIO_INTFREE();\ 6268*5113495bSYour Name } while (0) 6269*5113495bSYour Name 6270*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6271*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_SHFT 0x0 6272*5113495bSYour Name 6273*5113495bSYour Name #endif 6274*5113495bSYour Name 6275