xref: /wlan-driver/fw-api/hw/qca6490/v1/phyrx_abort_request_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2019 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
5*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
6*5113495bSYour Name  * above copyright notice and this permission notice appear in all
7*5113495bSYour Name  * copies.
8*5113495bSYour Name  *
9*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
17*5113495bSYour Name  */
18*5113495bSYour Name 
19*5113495bSYour Name //
20*5113495bSYour Name // DO NOT EDIT!  This file is automatically generated
21*5113495bSYour Name //               These definitions are tied to a particular hardware layout
22*5113495bSYour Name 
23*5113495bSYour Name 
24*5113495bSYour Name #ifndef _PHYRX_ABORT_REQUEST_INFO_H_
25*5113495bSYour Name #define _PHYRX_ABORT_REQUEST_INFO_H_
26*5113495bSYour Name #if !defined(__ASSEMBLER__)
27*5113495bSYour Name #endif
28*5113495bSYour Name 
29*5113495bSYour Name 
30*5113495bSYour Name // ################ START SUMMARY #################
31*5113495bSYour Name //
32*5113495bSYour Name //	Dword	Fields
33*5113495bSYour Name //	0	phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16]
34*5113495bSYour Name //
35*5113495bSYour Name // ################ END SUMMARY #################
36*5113495bSYour Name 
37*5113495bSYour Name #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1
38*5113495bSYour Name 
39*5113495bSYour Name struct phyrx_abort_request_info {
40*5113495bSYour Name              uint32_t phyrx_abort_reason              :  8, //[7:0]
41*5113495bSYour Name                       phy_enters_nap_state            :  1, //[8]
42*5113495bSYour Name                       phy_enters_defer_state          :  1, //[9]
43*5113495bSYour Name                       reserved_0                      :  6, //[15:10]
44*5113495bSYour Name                       receive_duration                : 16; //[31:16]
45*5113495bSYour Name };
46*5113495bSYour Name 
47*5113495bSYour Name /*
48*5113495bSYour Name 
49*5113495bSYour Name phyrx_abort_reason
50*5113495bSYour Name 
51*5113495bSYour Name 			<enum 0 phyrx_err_phy_off> Reception aborted due to
52*5113495bSYour Name 			receiving a PHY_OFF TLV
53*5113495bSYour Name 
54*5113495bSYour Name 			<enum 1 phyrx_err_synth_off>
55*5113495bSYour Name 
56*5113495bSYour Name 			<enum 2 phyrx_err_ofdma_timing>
57*5113495bSYour Name 
58*5113495bSYour Name 			<enum 3 phyrx_err_ofdma_signal_parity>
59*5113495bSYour Name 
60*5113495bSYour Name 			<enum 4 phyrx_err_ofdma_rate_illegal>
61*5113495bSYour Name 
62*5113495bSYour Name 			<enum 5 phyrx_err_ofdma_length_illegal>
63*5113495bSYour Name 
64*5113495bSYour Name 			<enum 6 phyrx_err_ofdma_restart>
65*5113495bSYour Name 
66*5113495bSYour Name 			<enum 7 phyrx_err_ofdma_service>
67*5113495bSYour Name 
68*5113495bSYour Name 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
69*5113495bSYour Name 
70*5113495bSYour Name 
71*5113495bSYour Name 
72*5113495bSYour Name 			<enum 9 phyrx_err_cck_blokker>
73*5113495bSYour Name 
74*5113495bSYour Name 			<enum 10 phyrx_err_cck_timing>
75*5113495bSYour Name 
76*5113495bSYour Name 			<enum 11 phyrx_err_cck_header_crc>
77*5113495bSYour Name 
78*5113495bSYour Name 			<enum 12 phyrx_err_cck_rate_illegal>
79*5113495bSYour Name 
80*5113495bSYour Name 			<enum 13 phyrx_err_cck_length_illegal>
81*5113495bSYour Name 
82*5113495bSYour Name 			<enum 14 phyrx_err_cck_restart>
83*5113495bSYour Name 
84*5113495bSYour Name 			<enum 15 phyrx_err_cck_service>
85*5113495bSYour Name 
86*5113495bSYour Name 			<enum 16 phyrx_err_cck_power_drop>
87*5113495bSYour Name 
88*5113495bSYour Name 
89*5113495bSYour Name 
90*5113495bSYour Name 			<enum 17 phyrx_err_ht_crc_err>
91*5113495bSYour Name 
92*5113495bSYour Name 			<enum 18 phyrx_err_ht_length_illegal>
93*5113495bSYour Name 
94*5113495bSYour Name 			<enum 19 phyrx_err_ht_rate_illegal>
95*5113495bSYour Name 
96*5113495bSYour Name 			<enum 20 phyrx_err_ht_zlf>
97*5113495bSYour Name 
98*5113495bSYour Name 			<enum 21 phyrx_err_false_radar_ext>
99*5113495bSYour Name 
100*5113495bSYour Name 
101*5113495bSYour Name 
102*5113495bSYour Name 			<enum 22 phyrx_err_green_field>
103*5113495bSYour Name 
104*5113495bSYour Name 
105*5113495bSYour Name 
106*5113495bSYour Name 			<enum 23 phyrx_err_bw_gt_dyn_bw>
107*5113495bSYour Name 
108*5113495bSYour Name 			<enum 24 phyrx_err_leg_ht_mismatch>
109*5113495bSYour Name 
110*5113495bSYour Name 			<enum 25 phyrx_err_vht_crc_error>
111*5113495bSYour Name 
112*5113495bSYour Name 			<enum 26 phyrx_err_vht_siga_unsupported>
113*5113495bSYour Name 
114*5113495bSYour Name 			<enum 27 phyrx_err_vht_lsig_len_invalid>
115*5113495bSYour Name 
116*5113495bSYour Name 			<enum 28 phyrx_err_vht_ndp_or_zlf>
117*5113495bSYour Name 
118*5113495bSYour Name 			<enum 29 phyrx_err_vht_nsym_lt_zero>
119*5113495bSYour Name 
120*5113495bSYour Name 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
121*5113495bSYour Name 
122*5113495bSYour Name 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
123*5113495bSYour Name 
124*5113495bSYour Name 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
125*5113495bSYour Name 
126*5113495bSYour Name 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
127*5113495bSYour Name 
128*5113495bSYour Name 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
129*5113495bSYour Name 
130*5113495bSYour Name 			<enum 35 phyrx_err_defer_nap>
131*5113495bSYour Name 
132*5113495bSYour Name 			<enum 36 phyrx_err_fdomain_timeout>
133*5113495bSYour Name 
134*5113495bSYour Name 			<enum 37 phyrx_err_lsig_rel_check>
135*5113495bSYour Name 
136*5113495bSYour Name 			<enum 38 phyrx_err_bt_collision>
137*5113495bSYour Name 
138*5113495bSYour Name 			<enum 39 phyrx_err_unsupported_mu_feedback>
139*5113495bSYour Name 
140*5113495bSYour Name 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
141*5113495bSYour Name 
142*5113495bSYour Name 			<enum 41 phyrx_err_unsupported_cbf>
143*5113495bSYour Name 
144*5113495bSYour Name 
145*5113495bSYour Name 
146*5113495bSYour Name 			<enum 42 phyrx_err_other>  Should not really be used. If
147*5113495bSYour Name 			needed, ask for documentation update
148*5113495bSYour Name 
149*5113495bSYour Name 
150*5113495bSYour Name 
151*5113495bSYour Name 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
152*5113495bSYour Name 			phyrx_err_he_crc_error > <enum 45
153*5113495bSYour Name 			phyrx_err_he_sigb_unsupported > <enum 46
154*5113495bSYour Name 			phyrx_err_he_mu_mode_unsupported > <enum 47
155*5113495bSYour Name 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
156*5113495bSYour Name 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
157*5113495bSYour Name 			phyrx_err_he_num_users_unsupported ><enum 51
158*5113495bSYour Name 			phyrx_err_he_sounding_params_unsupported >
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name 
162*5113495bSYour Name 			<enum 52 phyrx_err_MU_UL_no_power_detected>
163*5113495bSYour Name 
164*5113495bSYour Name 			<enum 53 phyrx_err_MU_UL_not_for_me>
165*5113495bSYour Name 
166*5113495bSYour Name 
167*5113495bSYour Name 
168*5113495bSYour Name 			<legal 0 - 53>
169*5113495bSYour Name 
170*5113495bSYour Name phy_enters_nap_state
171*5113495bSYour Name 
172*5113495bSYour Name 			When set, PHY enters PHY NAP state after sending this
173*5113495bSYour Name 			abort
174*5113495bSYour Name 
175*5113495bSYour Name 
176*5113495bSYour Name 
177*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
178*5113495bSYour Name 
179*5113495bSYour Name 
180*5113495bSYour Name 
181*5113495bSYour Name 			Field put pro-actively in place....usage still to be
182*5113495bSYour Name 			agreed upon.
183*5113495bSYour Name 
184*5113495bSYour Name 			<legal all>
185*5113495bSYour Name 
186*5113495bSYour Name phy_enters_defer_state
187*5113495bSYour Name 
188*5113495bSYour Name 			When set, PHY enters PHY defer state after sending this
189*5113495bSYour Name 			abort
190*5113495bSYour Name 
191*5113495bSYour Name 
192*5113495bSYour Name 
193*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
194*5113495bSYour Name 
195*5113495bSYour Name 
196*5113495bSYour Name 
197*5113495bSYour Name 			Field put pro-actively in place....usage still to be
198*5113495bSYour Name 			agreed upon.
199*5113495bSYour Name 
200*5113495bSYour Name 			<legal all>
201*5113495bSYour Name 
202*5113495bSYour Name reserved_0
203*5113495bSYour Name 
204*5113495bSYour Name 			<legal 0>
205*5113495bSYour Name 
206*5113495bSYour Name receive_duration
207*5113495bSYour Name 
208*5113495bSYour Name 			The remaining receive duration of this PPDU in the
209*5113495bSYour Name 			medium (in us). When PHY does not know this duration when
210*5113495bSYour Name 			this TLV is generated, the field will be set to 0.
211*5113495bSYour Name 
212*5113495bSYour Name 			The timing reference point is the reception by the MAC
213*5113495bSYour Name 			of this TLV. The value shall be accurate to within 2us.
214*5113495bSYour Name 
215*5113495bSYour Name 
216*5113495bSYour Name 
217*5113495bSYour Name 			In case Phy_enters_nap_state and/or
218*5113495bSYour Name 			Phy_enters_defer_state is set, there is a possibility that
219*5113495bSYour Name 			MAC PMM can also decide to go into a low(er) power state.
220*5113495bSYour Name 
221*5113495bSYour Name 			<legal all>
222*5113495bSYour Name */
223*5113495bSYour Name 
224*5113495bSYour Name 
225*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON
226*5113495bSYour Name 
227*5113495bSYour Name 			<enum 0 phyrx_err_phy_off> Reception aborted due to
228*5113495bSYour Name 			receiving a PHY_OFF TLV
229*5113495bSYour Name 
230*5113495bSYour Name 			<enum 1 phyrx_err_synth_off>
231*5113495bSYour Name 
232*5113495bSYour Name 			<enum 2 phyrx_err_ofdma_timing>
233*5113495bSYour Name 
234*5113495bSYour Name 			<enum 3 phyrx_err_ofdma_signal_parity>
235*5113495bSYour Name 
236*5113495bSYour Name 			<enum 4 phyrx_err_ofdma_rate_illegal>
237*5113495bSYour Name 
238*5113495bSYour Name 			<enum 5 phyrx_err_ofdma_length_illegal>
239*5113495bSYour Name 
240*5113495bSYour Name 			<enum 6 phyrx_err_ofdma_restart>
241*5113495bSYour Name 
242*5113495bSYour Name 			<enum 7 phyrx_err_ofdma_service>
243*5113495bSYour Name 
244*5113495bSYour Name 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
245*5113495bSYour Name 
246*5113495bSYour Name 
247*5113495bSYour Name 
248*5113495bSYour Name 			<enum 9 phyrx_err_cck_blokker>
249*5113495bSYour Name 
250*5113495bSYour Name 			<enum 10 phyrx_err_cck_timing>
251*5113495bSYour Name 
252*5113495bSYour Name 			<enum 11 phyrx_err_cck_header_crc>
253*5113495bSYour Name 
254*5113495bSYour Name 			<enum 12 phyrx_err_cck_rate_illegal>
255*5113495bSYour Name 
256*5113495bSYour Name 			<enum 13 phyrx_err_cck_length_illegal>
257*5113495bSYour Name 
258*5113495bSYour Name 			<enum 14 phyrx_err_cck_restart>
259*5113495bSYour Name 
260*5113495bSYour Name 			<enum 15 phyrx_err_cck_service>
261*5113495bSYour Name 
262*5113495bSYour Name 			<enum 16 phyrx_err_cck_power_drop>
263*5113495bSYour Name 
264*5113495bSYour Name 
265*5113495bSYour Name 
266*5113495bSYour Name 			<enum 17 phyrx_err_ht_crc_err>
267*5113495bSYour Name 
268*5113495bSYour Name 			<enum 18 phyrx_err_ht_length_illegal>
269*5113495bSYour Name 
270*5113495bSYour Name 			<enum 19 phyrx_err_ht_rate_illegal>
271*5113495bSYour Name 
272*5113495bSYour Name 			<enum 20 phyrx_err_ht_zlf>
273*5113495bSYour Name 
274*5113495bSYour Name 			<enum 21 phyrx_err_false_radar_ext>
275*5113495bSYour Name 
276*5113495bSYour Name 
277*5113495bSYour Name 
278*5113495bSYour Name 			<enum 22 phyrx_err_green_field>
279*5113495bSYour Name 
280*5113495bSYour Name 
281*5113495bSYour Name 
282*5113495bSYour Name 			<enum 23 phyrx_err_bw_gt_dyn_bw>
283*5113495bSYour Name 
284*5113495bSYour Name 			<enum 24 phyrx_err_leg_ht_mismatch>
285*5113495bSYour Name 
286*5113495bSYour Name 			<enum 25 phyrx_err_vht_crc_error>
287*5113495bSYour Name 
288*5113495bSYour Name 			<enum 26 phyrx_err_vht_siga_unsupported>
289*5113495bSYour Name 
290*5113495bSYour Name 			<enum 27 phyrx_err_vht_lsig_len_invalid>
291*5113495bSYour Name 
292*5113495bSYour Name 			<enum 28 phyrx_err_vht_ndp_or_zlf>
293*5113495bSYour Name 
294*5113495bSYour Name 			<enum 29 phyrx_err_vht_nsym_lt_zero>
295*5113495bSYour Name 
296*5113495bSYour Name 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
297*5113495bSYour Name 
298*5113495bSYour Name 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
299*5113495bSYour Name 
300*5113495bSYour Name 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
301*5113495bSYour Name 
302*5113495bSYour Name 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
303*5113495bSYour Name 
304*5113495bSYour Name 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
305*5113495bSYour Name 
306*5113495bSYour Name 			<enum 35 phyrx_err_defer_nap>
307*5113495bSYour Name 
308*5113495bSYour Name 			<enum 36 phyrx_err_fdomain_timeout>
309*5113495bSYour Name 
310*5113495bSYour Name 			<enum 37 phyrx_err_lsig_rel_check>
311*5113495bSYour Name 
312*5113495bSYour Name 			<enum 38 phyrx_err_bt_collision>
313*5113495bSYour Name 
314*5113495bSYour Name 			<enum 39 phyrx_err_unsupported_mu_feedback>
315*5113495bSYour Name 
316*5113495bSYour Name 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
317*5113495bSYour Name 
318*5113495bSYour Name 			<enum 41 phyrx_err_unsupported_cbf>
319*5113495bSYour Name 
320*5113495bSYour Name 
321*5113495bSYour Name 
322*5113495bSYour Name 			<enum 42 phyrx_err_other>  Should not really be used. If
323*5113495bSYour Name 			needed, ask for documentation update
324*5113495bSYour Name 
325*5113495bSYour Name 
326*5113495bSYour Name 
327*5113495bSYour Name 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
328*5113495bSYour Name 			phyrx_err_he_crc_error > <enum 45
329*5113495bSYour Name 			phyrx_err_he_sigb_unsupported > <enum 46
330*5113495bSYour Name 			phyrx_err_he_mu_mode_unsupported > <enum 47
331*5113495bSYour Name 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
332*5113495bSYour Name 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
333*5113495bSYour Name 			phyrx_err_he_num_users_unsupported ><enum 51
334*5113495bSYour Name 			phyrx_err_he_sounding_params_unsupported >
335*5113495bSYour Name 
336*5113495bSYour Name 
337*5113495bSYour Name 
338*5113495bSYour Name 			<enum 52 phyrx_err_MU_UL_no_power_detected>
339*5113495bSYour Name 
340*5113495bSYour Name 			<enum 53 phyrx_err_MU_UL_not_for_me>
341*5113495bSYour Name 
342*5113495bSYour Name 
343*5113495bSYour Name 
344*5113495bSYour Name 			<legal 0 - 53>
345*5113495bSYour Name */
346*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET         0x00000000
347*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB            0
348*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK           0x000000ff
349*5113495bSYour Name 
350*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE
351*5113495bSYour Name 
352*5113495bSYour Name 			When set, PHY enters PHY NAP state after sending this
353*5113495bSYour Name 			abort
354*5113495bSYour Name 
355*5113495bSYour Name 
356*5113495bSYour Name 
357*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
358*5113495bSYour Name 
359*5113495bSYour Name 
360*5113495bSYour Name 
361*5113495bSYour Name 			Field put pro-actively in place....usage still to be
362*5113495bSYour Name 			agreed upon.
363*5113495bSYour Name 
364*5113495bSYour Name 			<legal all>
365*5113495bSYour Name */
366*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET       0x00000000
367*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB          8
368*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK         0x00000100
369*5113495bSYour Name 
370*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE
371*5113495bSYour Name 
372*5113495bSYour Name 			When set, PHY enters PHY defer state after sending this
373*5113495bSYour Name 			abort
374*5113495bSYour Name 
375*5113495bSYour Name 
376*5113495bSYour Name 
377*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
378*5113495bSYour Name 
379*5113495bSYour Name 
380*5113495bSYour Name 
381*5113495bSYour Name 			Field put pro-actively in place....usage still to be
382*5113495bSYour Name 			agreed upon.
383*5113495bSYour Name 
384*5113495bSYour Name 			<legal all>
385*5113495bSYour Name */
386*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET     0x00000000
387*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB        9
388*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK       0x00000200
389*5113495bSYour Name 
390*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0
391*5113495bSYour Name 
392*5113495bSYour Name 			<legal 0>
393*5113495bSYour Name */
394*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET                 0x00000000
395*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB                    10
396*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK                   0x0000fc00
397*5113495bSYour Name 
398*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION
399*5113495bSYour Name 
400*5113495bSYour Name 			The remaining receive duration of this PPDU in the
401*5113495bSYour Name 			medium (in us). When PHY does not know this duration when
402*5113495bSYour Name 			this TLV is generated, the field will be set to 0.
403*5113495bSYour Name 
404*5113495bSYour Name 			The timing reference point is the reception by the MAC
405*5113495bSYour Name 			of this TLV. The value shall be accurate to within 2us.
406*5113495bSYour Name 
407*5113495bSYour Name 
408*5113495bSYour Name 
409*5113495bSYour Name 			In case Phy_enters_nap_state and/or
410*5113495bSYour Name 			Phy_enters_defer_state is set, there is a possibility that
411*5113495bSYour Name 			MAC PMM can also decide to go into a low(er) power state.
412*5113495bSYour Name 
413*5113495bSYour Name 			<legal all>
414*5113495bSYour Name */
415*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET           0x00000000
416*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB              16
417*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK             0xffff0000
418*5113495bSYour Name 
419*5113495bSYour Name 
420*5113495bSYour Name #endif // _PHYRX_ABORT_REQUEST_INFO_H_
421