1 /* 2 * Copyright (c) 2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 25 #define _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "uniform_reo_status_header.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0-1 struct uniform_reo_status_header status_header; 35 // 2 threshold_index[1:0], reserved_2[31:2] 36 // 3 link_descriptor_counter0[23:0], reserved_3[31:24] 37 // 4 link_descriptor_counter1[23:0], reserved_4[31:24] 38 // 5 link_descriptor_counter2[23:0], reserved_5[31:24] 39 // 6 link_descriptor_counter_sum[25:0], reserved_6[31:26] 40 // 7 reserved_7[31:0] 41 // 8 reserved_8[31:0] 42 // 9 reserved_9a[31:0] 43 // 10 reserved_10a[31:0] 44 // 11 reserved_11a[31:0] 45 // 12 reserved_12a[31:0] 46 // 13 reserved_13a[31:0] 47 // 14 reserved_14a[31:0] 48 // 15 reserved_15a[31:0] 49 // 16 reserved_16a[31:0] 50 // 17 reserved_17a[31:0] 51 // 18 reserved_18a[31:0] 52 // 19 reserved_19a[31:0] 53 // 20 reserved_20a[31:0] 54 // 21 reserved_21a[31:0] 55 // 22 reserved_22a[31:0] 56 // 23 reserved_23a[31:0] 57 // 24 reserved_24a[27:0], looping_count[31:28] 58 // 59 // ################ END SUMMARY ################# 60 61 #define NUM_OF_DWORDS_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS 25 62 63 struct reo_descriptor_threshold_reached_status { 64 struct uniform_reo_status_header status_header; 65 uint32_t threshold_index : 2, //[1:0] 66 reserved_2 : 30; //[31:2] 67 uint32_t link_descriptor_counter0 : 24, //[23:0] 68 reserved_3 : 8; //[31:24] 69 uint32_t link_descriptor_counter1 : 24, //[23:0] 70 reserved_4 : 8; //[31:24] 71 uint32_t link_descriptor_counter2 : 24, //[23:0] 72 reserved_5 : 8; //[31:24] 73 uint32_t link_descriptor_counter_sum : 26, //[25:0] 74 reserved_6 : 6; //[31:26] 75 uint32_t reserved_7 : 32; //[31:0] 76 uint32_t reserved_8 : 32; //[31:0] 77 uint32_t reserved_9a : 32; //[31:0] 78 uint32_t reserved_10a : 32; //[31:0] 79 uint32_t reserved_11a : 32; //[31:0] 80 uint32_t reserved_12a : 32; //[31:0] 81 uint32_t reserved_13a : 32; //[31:0] 82 uint32_t reserved_14a : 32; //[31:0] 83 uint32_t reserved_15a : 32; //[31:0] 84 uint32_t reserved_16a : 32; //[31:0] 85 uint32_t reserved_17a : 32; //[31:0] 86 uint32_t reserved_18a : 32; //[31:0] 87 uint32_t reserved_19a : 32; //[31:0] 88 uint32_t reserved_20a : 32; //[31:0] 89 uint32_t reserved_21a : 32; //[31:0] 90 uint32_t reserved_22a : 32; //[31:0] 91 uint32_t reserved_23a : 32; //[31:0] 92 uint32_t reserved_24a : 28, //[27:0] 93 looping_count : 4; //[31:28] 94 }; 95 96 /* 97 98 struct uniform_reo_status_header status_header 99 100 Consumer: SW 101 102 Producer: REO 103 104 105 106 Details that can link this status with the original 107 command. It also contains info on how long REO took to 108 execute this command. 109 110 threshold_index 111 112 The index of the threshold register whose value got 113 reached 114 115 116 117 <enum 0 reo_desc_counter0_threshold> 118 119 <enum 1 reo_desc_counter1_threshold> 120 121 <enum 2 reo_desc_counter2_threshold> 122 123 <enum 3 reo_desc_counter_sum_threshold> 124 125 126 127 <legal all> 128 129 reserved_2 130 131 <legal 0> 132 133 link_descriptor_counter0 134 135 Value of this counter at generation of this message 136 137 <legal all> 138 139 reserved_3 140 141 <legal 0> 142 143 link_descriptor_counter1 144 145 Value of this counter at generation of this message 146 147 <legal all> 148 149 reserved_4 150 151 <legal 0> 152 153 link_descriptor_counter2 154 155 Value of this counter at generation of this message 156 157 <legal all> 158 159 reserved_5 160 161 <legal 0> 162 163 link_descriptor_counter_sum 164 165 Value of this counter at generation of this message 166 167 <legal all> 168 169 reserved_6 170 171 <legal 0> 172 173 reserved_7 174 175 <legal 0> 176 177 reserved_8 178 179 <legal 0> 180 181 reserved_9a 182 183 <legal 0> 184 185 reserved_10a 186 187 <legal 0> 188 189 reserved_11a 190 191 <legal 0> 192 193 reserved_12a 194 195 <legal 0> 196 197 reserved_13a 198 199 <legal 0> 200 201 reserved_14a 202 203 <legal 0> 204 205 reserved_15a 206 207 <legal 0> 208 209 reserved_16a 210 211 <legal 0> 212 213 reserved_17a 214 215 <legal 0> 216 217 reserved_18a 218 219 <legal 0> 220 221 reserved_19a 222 223 <legal 0> 224 225 reserved_20a 226 227 <legal 0> 228 229 reserved_21a 230 231 <legal 0> 232 233 reserved_22a 234 235 <legal 0> 236 237 reserved_23a 238 239 <legal 0> 240 241 reserved_24a 242 243 <legal 0> 244 245 looping_count 246 247 A count value that indicates the number of times the 248 producer of entries into this Ring has looped around the 249 ring. 250 251 At initialization time, this value is set to 0. On the 252 first loop, this value is set to 1. After the max value is 253 reached allowed by the number of bits for this field, the 254 count value continues with 0 again. 255 256 257 258 In case SW is the consumer of the ring entries, it can 259 use this field to figure out up to where the producer of 260 entries has created new entries. This eliminates the need to 261 check where the head pointer' of the ring is located once 262 the SW starts processing an interrupt indicating that new 263 entries have been put into this ring... 264 265 266 267 Also note that SW if it wants only needs to look at the 268 LSB bit of this count value. 269 270 <legal all> 271 */ 272 273 274 /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */ 275 276 277 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER 278 279 Consumer: SW , DEBUG 280 281 Producer: REO 282 283 284 285 The value in this field is equal to value of the 286 'REO_CMD_Number' field the REO command 287 288 289 290 This field helps to correlate the statuses with the REO 291 commands. 292 293 294 295 <legal all> 296 */ 297 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000 298 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0 299 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff 300 301 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME 302 303 Consumer: DEBUG 304 305 Producer: REO 306 307 308 309 The amount of time REO took to excecute the command. 310 Note that this time does not include the duration of the 311 command waiting in the command ring, before the execution 312 started. 313 314 315 316 In us. 317 318 319 320 <legal all> 321 */ 322 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000 323 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16 324 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000 325 326 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS 327 328 Consumer: DEBUG 329 330 Producer: REO 331 332 333 334 Execution status of the command. 335 336 337 338 <enum 0 reo_successful_execution> Command has 339 successfully be executed 340 341 <enum 1 reo_blocked_execution> Command could not be 342 executed as the queue or cache was blocked 343 344 <enum 2 reo_failed_execution> Command has encountered 345 problems when executing, like the queue descriptor not being 346 valid. None of the status fields in the entire STATUS TLV 347 are valid. 348 349 <enum 3 reo_resource_blocked> Command is NOT executed 350 because one or more descriptors were blocked. This is SW 351 programming mistake. 352 353 None of the status fields in the entire STATUS TLV are 354 valid. 355 356 357 358 <legal 0-3> 359 */ 360 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000 361 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26 362 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000 363 364 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A 365 366 <legal 0> 367 */ 368 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET 0x00000000 369 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB 28 370 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK 0xf0000000 371 372 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP 373 374 Timestamp at the moment that this status report is 375 written. 376 377 378 379 <legal all> 380 */ 381 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET 0x00000004 382 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB 0 383 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff 384 385 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX 386 387 The index of the threshold register whose value got 388 reached 389 390 391 392 <enum 0 reo_desc_counter0_threshold> 393 394 <enum 1 reo_desc_counter1_threshold> 395 396 <enum 2 reo_desc_counter2_threshold> 397 398 <enum 3 reo_desc_counter_sum_threshold> 399 400 401 402 <legal all> 403 */ 404 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_OFFSET 0x00000008 405 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_LSB 0 406 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_MASK 0x00000003 407 408 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2 409 410 <legal 0> 411 */ 412 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_OFFSET 0x00000008 413 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_LSB 2 414 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_MASK 0xfffffffc 415 416 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0 417 418 Value of this counter at generation of this message 419 420 <legal all> 421 */ 422 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_OFFSET 0x0000000c 423 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_LSB 0 424 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_MASK 0x00ffffff 425 426 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3 427 428 <legal 0> 429 */ 430 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_OFFSET 0x0000000c 431 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_LSB 24 432 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_MASK 0xff000000 433 434 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1 435 436 Value of this counter at generation of this message 437 438 <legal all> 439 */ 440 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_OFFSET 0x00000010 441 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_LSB 0 442 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_MASK 0x00ffffff 443 444 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4 445 446 <legal 0> 447 */ 448 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_OFFSET 0x00000010 449 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_LSB 24 450 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_MASK 0xff000000 451 452 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2 453 454 Value of this counter at generation of this message 455 456 <legal all> 457 */ 458 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_OFFSET 0x00000014 459 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_LSB 0 460 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_MASK 0x00ffffff 461 462 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5 463 464 <legal 0> 465 */ 466 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_OFFSET 0x00000014 467 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_LSB 24 468 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_MASK 0xff000000 469 470 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM 471 472 Value of this counter at generation of this message 473 474 <legal all> 475 */ 476 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_OFFSET 0x00000018 477 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_LSB 0 478 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_MASK 0x03ffffff 479 480 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6 481 482 <legal 0> 483 */ 484 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_OFFSET 0x00000018 485 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_LSB 26 486 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_MASK 0xfc000000 487 488 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7 489 490 <legal 0> 491 */ 492 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_OFFSET 0x0000001c 493 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_LSB 0 494 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_MASK 0xffffffff 495 496 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8 497 498 <legal 0> 499 */ 500 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_OFFSET 0x00000020 501 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_LSB 0 502 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_MASK 0xffffffff 503 504 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A 505 506 <legal 0> 507 */ 508 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_OFFSET 0x00000024 509 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_LSB 0 510 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_MASK 0xffffffff 511 512 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A 513 514 <legal 0> 515 */ 516 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_OFFSET 0x00000028 517 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_LSB 0 518 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_MASK 0xffffffff 519 520 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A 521 522 <legal 0> 523 */ 524 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 525 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_LSB 0 526 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_MASK 0xffffffff 527 528 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A 529 530 <legal 0> 531 */ 532 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_OFFSET 0x00000030 533 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_LSB 0 534 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_MASK 0xffffffff 535 536 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A 537 538 <legal 0> 539 */ 540 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_OFFSET 0x00000034 541 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_LSB 0 542 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_MASK 0xffffffff 543 544 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A 545 546 <legal 0> 547 */ 548 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_OFFSET 0x00000038 549 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_LSB 0 550 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_MASK 0xffffffff 551 552 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A 553 554 <legal 0> 555 */ 556 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 557 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_LSB 0 558 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_MASK 0xffffffff 559 560 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A 561 562 <legal 0> 563 */ 564 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_OFFSET 0x00000040 565 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_LSB 0 566 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_MASK 0xffffffff 567 568 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A 569 570 <legal 0> 571 */ 572 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_OFFSET 0x00000044 573 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_LSB 0 574 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_MASK 0xffffffff 575 576 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A 577 578 <legal 0> 579 */ 580 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_OFFSET 0x00000048 581 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_LSB 0 582 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_MASK 0xffffffff 583 584 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A 585 586 <legal 0> 587 */ 588 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 589 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_LSB 0 590 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_MASK 0xffffffff 591 592 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A 593 594 <legal 0> 595 */ 596 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_OFFSET 0x00000050 597 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_LSB 0 598 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_MASK 0xffffffff 599 600 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A 601 602 <legal 0> 603 */ 604 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_OFFSET 0x00000054 605 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_LSB 0 606 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_MASK 0xffffffff 607 608 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A 609 610 <legal 0> 611 */ 612 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_OFFSET 0x00000058 613 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_LSB 0 614 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_MASK 0xffffffff 615 616 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A 617 618 <legal 0> 619 */ 620 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 621 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_LSB 0 622 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_MASK 0xffffffff 623 624 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A 625 626 <legal 0> 627 */ 628 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_OFFSET 0x00000060 629 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_LSB 0 630 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_MASK 0x0fffffff 631 632 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT 633 634 A count value that indicates the number of times the 635 producer of entries into this Ring has looped around the 636 ring. 637 638 At initialization time, this value is set to 0. On the 639 first loop, this value is set to 1. After the max value is 640 reached allowed by the number of bits for this field, the 641 count value continues with 0 again. 642 643 644 645 In case SW is the consumer of the ring entries, it can 646 use this field to figure out up to where the producer of 647 entries has created new entries. This eliminates the need to 648 check where the head pointer' of the ring is located once 649 the SW starts processing an interrupt indicating that new 650 entries have been put into this ring... 651 652 653 654 Also note that SW if it wants only needs to look at the 655 LSB bit of this count value. 656 657 <legal all> 658 */ 659 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 660 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_LSB 28 661 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 662 663 664 #endif // _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 665