xref: /wlan-driver/fw-api/hw/qca6490/v1/reo_flush_timeout_list_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
25 #define _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "uniform_reo_status_header.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0-1	struct uniform_reo_status_header status_header;
35 //	2	error_detected[0], timout_list_empty[1], reserved_2a[31:2]
36 //	3	release_desc_count[15:0], forward_buf_count[31:16]
37 //	4	reserved_4a[31:0]
38 //	5	reserved_5a[31:0]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[31:0]
41 //	8	reserved_8a[31:0]
42 //	9	reserved_9a[31:0]
43 //	10	reserved_10a[31:0]
44 //	11	reserved_11a[31:0]
45 //	12	reserved_12a[31:0]
46 //	13	reserved_13a[31:0]
47 //	14	reserved_14a[31:0]
48 //	15	reserved_15a[31:0]
49 //	16	reserved_16a[31:0]
50 //	17	reserved_17a[31:0]
51 //	18	reserved_18a[31:0]
52 //	19	reserved_19a[31:0]
53 //	20	reserved_20a[31:0]
54 //	21	reserved_21a[31:0]
55 //	22	reserved_22a[31:0]
56 //	23	reserved_23a[31:0]
57 //	24	reserved_24a[27:0], looping_count[31:28]
58 //
59 // ################ END SUMMARY #################
60 
61 #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST_STATUS 25
62 
63 struct reo_flush_timeout_list_status {
64     struct            uniform_reo_status_header                       status_header;
65              uint32_t error_detected                  :  1, //[0]
66                       timout_list_empty               :  1, //[1]
67                       reserved_2a                     : 30; //[31:2]
68              uint32_t release_desc_count              : 16, //[15:0]
69                       forward_buf_count               : 16; //[31:16]
70              uint32_t reserved_4a                     : 32; //[31:0]
71              uint32_t reserved_5a                     : 32; //[31:0]
72              uint32_t reserved_6a                     : 32; //[31:0]
73              uint32_t reserved_7a                     : 32; //[31:0]
74              uint32_t reserved_8a                     : 32; //[31:0]
75              uint32_t reserved_9a                     : 32; //[31:0]
76              uint32_t reserved_10a                    : 32; //[31:0]
77              uint32_t reserved_11a                    : 32; //[31:0]
78              uint32_t reserved_12a                    : 32; //[31:0]
79              uint32_t reserved_13a                    : 32; //[31:0]
80              uint32_t reserved_14a                    : 32; //[31:0]
81              uint32_t reserved_15a                    : 32; //[31:0]
82              uint32_t reserved_16a                    : 32; //[31:0]
83              uint32_t reserved_17a                    : 32; //[31:0]
84              uint32_t reserved_18a                    : 32; //[31:0]
85              uint32_t reserved_19a                    : 32; //[31:0]
86              uint32_t reserved_20a                    : 32; //[31:0]
87              uint32_t reserved_21a                    : 32; //[31:0]
88              uint32_t reserved_22a                    : 32; //[31:0]
89              uint32_t reserved_23a                    : 32; //[31:0]
90              uint32_t reserved_24a                    : 28, //[27:0]
91                       looping_count                   :  4; //[31:28]
92 };
93 
94 /*
95 
96 struct uniform_reo_status_header status_header
97 
98 			Consumer: SW
99 
100 			Producer: REO
101 
102 
103 
104 			Details that can link this status with the original
105 			command. It also contains info on how long REO took to
106 			execute this command.
107 
108 error_detected
109 
110 			0: No error has been detected while executing this
111 			command
112 
113 			1: command not properly executed and returned with an
114 			error
115 
116 
117 
118 			NOTE: Current no error is defined, but field is put in
119 			place to avoid data structure changes in future...
120 
121 timout_list_empty
122 
123 			When set, REO has depleted the timeout list and all
124 			entries are gone.
125 
126 			<legal all>
127 
128 reserved_2a
129 
130 			<legal 0>
131 
132 release_desc_count
133 
134 			Consumer: REO
135 
136 			Producer: SW
137 
138 
139 
140 			The number of link descriptors released
141 
142 			<legal all>
143 
144 forward_buf_count
145 
146 			Consumer: REO
147 
148 			Producer: SW
149 
150 
151 
152 			The number of buffers forwarded to the REO destination
153 			rings
154 
155 			<legal all>
156 
157 reserved_4a
158 
159 			<legal 0>
160 
161 reserved_5a
162 
163 			<legal 0>
164 
165 reserved_6a
166 
167 			<legal 0>
168 
169 reserved_7a
170 
171 			<legal 0>
172 
173 reserved_8a
174 
175 			<legal 0>
176 
177 reserved_9a
178 
179 			<legal 0>
180 
181 reserved_10a
182 
183 			<legal 0>
184 
185 reserved_11a
186 
187 			<legal 0>
188 
189 reserved_12a
190 
191 			<legal 0>
192 
193 reserved_13a
194 
195 			<legal 0>
196 
197 reserved_14a
198 
199 			<legal 0>
200 
201 reserved_15a
202 
203 			<legal 0>
204 
205 reserved_16a
206 
207 			<legal 0>
208 
209 reserved_17a
210 
211 			<legal 0>
212 
213 reserved_18a
214 
215 			<legal 0>
216 
217 reserved_19a
218 
219 			<legal 0>
220 
221 reserved_20a
222 
223 			<legal 0>
224 
225 reserved_21a
226 
227 			<legal 0>
228 
229 reserved_22a
230 
231 			<legal 0>
232 
233 reserved_23a
234 
235 			<legal 0>
236 
237 reserved_24a
238 
239 			<legal 0>
240 
241 looping_count
242 
243 			A count value that indicates the number of times the
244 			producer of entries into this Ring has looped around the
245 			ring.
246 
247 			At initialization time, this value is set to 0. On the
248 			first loop, this value is set to 1. After the max value is
249 			reached allowed by the number of bits for this field, the
250 			count value continues with 0 again.
251 
252 
253 
254 			In case SW is the consumer of the ring entries, it can
255 			use this field to figure out up to where the producer of
256 			entries has created new entries. This eliminates the need to
257 			check where the head pointer' of the ring is located once
258 			the SW starts processing an interrupt indicating that new
259 			entries have been put into this ring...
260 
261 
262 
263 			Also note that SW if it wants only needs to look at the
264 			LSB bit of this count value.
265 
266 			<legal all>
267 */
268 
269 
270  /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */
271 
272 
273 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER
274 
275 			Consumer: SW , DEBUG
276 
277 			Producer: REO
278 
279 
280 
281 			The value in this field is equal to value of the
282 			'REO_CMD_Number' field the REO command
283 
284 
285 
286 			This field helps to correlate the statuses with the REO
287 			commands.
288 
289 
290 
291 			<legal all>
292 */
293 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000
294 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0
295 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff
296 
297 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME
298 
299 			Consumer: DEBUG
300 
301 			Producer: REO
302 
303 
304 
305 			The amount of time REO took to excecute the command.
306 			Note that this time does not include the duration of the
307 			command waiting in the command ring, before the execution
308 			started.
309 
310 
311 
312 			In us.
313 
314 
315 
316 			<legal all>
317 */
318 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000
319 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16
320 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000
321 
322 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS
323 
324 			Consumer: DEBUG
325 
326 			Producer: REO
327 
328 
329 
330 			Execution status of the command.
331 
332 
333 
334 			<enum 0 reo_successful_execution> Command has
335 			successfully be executed
336 
337 			<enum 1 reo_blocked_execution> Command could not be
338 			executed as the queue or cache was blocked
339 
340 			<enum 2 reo_failed_execution> Command has encountered
341 			problems when executing, like the queue descriptor not being
342 			valid. None of the status fields in the entire STATUS TLV
343 			are valid.
344 
345 			<enum 3 reo_resource_blocked> Command is NOT  executed
346 			because one or more descriptors were blocked. This is SW
347 			programming mistake.
348 
349 			None of the status fields in the entire STATUS TLV are
350 			valid.
351 
352 
353 
354 			<legal  0-3>
355 */
356 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000
357 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26
358 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000
359 
360 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A
361 
362 			<legal 0>
363 */
364 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET 0x00000000
365 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB 28
366 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK 0xf0000000
367 
368 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP
369 
370 			Timestamp at the moment that this status report is
371 			written.
372 
373 
374 
375 			<legal all>
376 */
377 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET 0x00000004
378 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB  0
379 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff
380 
381 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED
382 
383 			0: No error has been detected while executing this
384 			command
385 
386 			1: command not properly executed and returned with an
387 			error
388 
389 
390 
391 			NOTE: Current no error is defined, but field is put in
392 			place to avoid data structure changes in future...
393 */
394 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_OFFSET        0x00000008
395 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_LSB           0
396 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_MASK          0x00000001
397 
398 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY
399 
400 			When set, REO has depleted the timeout list and all
401 			entries are gone.
402 
403 			<legal all>
404 */
405 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_OFFSET     0x00000008
406 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_LSB        1
407 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_MASK       0x00000002
408 
409 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A
410 
411 			<legal 0>
412 */
413 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_OFFSET           0x00000008
414 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_LSB              2
415 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_MASK             0xfffffffc
416 
417 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT
418 
419 			Consumer: REO
420 
421 			Producer: SW
422 
423 
424 
425 			The number of link descriptors released
426 
427 			<legal all>
428 */
429 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_OFFSET    0x0000000c
430 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_LSB       0
431 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_MASK      0x0000ffff
432 
433 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT
434 
435 			Consumer: REO
436 
437 			Producer: SW
438 
439 
440 
441 			The number of buffers forwarded to the REO destination
442 			rings
443 
444 			<legal all>
445 */
446 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_OFFSET     0x0000000c
447 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_LSB        16
448 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_MASK       0xffff0000
449 
450 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A
451 
452 			<legal 0>
453 */
454 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_OFFSET           0x00000010
455 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_LSB              0
456 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_MASK             0xffffffff
457 
458 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A
459 
460 			<legal 0>
461 */
462 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_OFFSET           0x00000014
463 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_LSB              0
464 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_MASK             0xffffffff
465 
466 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A
467 
468 			<legal 0>
469 */
470 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_OFFSET           0x00000018
471 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_LSB              0
472 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_MASK             0xffffffff
473 
474 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A
475 
476 			<legal 0>
477 */
478 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_OFFSET           0x0000001c
479 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_LSB              0
480 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_MASK             0xffffffff
481 
482 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A
483 
484 			<legal 0>
485 */
486 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_OFFSET           0x00000020
487 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_LSB              0
488 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_MASK             0xffffffff
489 
490 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A
491 
492 			<legal 0>
493 */
494 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_OFFSET           0x00000024
495 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_LSB              0
496 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_MASK             0xffffffff
497 
498 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A
499 
500 			<legal 0>
501 */
502 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_OFFSET         0x00000028
503 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_LSB            0
504 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_MASK           0xffffffff
505 
506 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A
507 
508 			<legal 0>
509 */
510 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_OFFSET         0x0000002c
511 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_LSB            0
512 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_MASK           0xffffffff
513 
514 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A
515 
516 			<legal 0>
517 */
518 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_OFFSET         0x00000030
519 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_LSB            0
520 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_MASK           0xffffffff
521 
522 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A
523 
524 			<legal 0>
525 */
526 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_OFFSET         0x00000034
527 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_LSB            0
528 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_MASK           0xffffffff
529 
530 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A
531 
532 			<legal 0>
533 */
534 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_OFFSET         0x00000038
535 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_LSB            0
536 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_MASK           0xffffffff
537 
538 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A
539 
540 			<legal 0>
541 */
542 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_OFFSET         0x0000003c
543 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_LSB            0
544 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_MASK           0xffffffff
545 
546 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A
547 
548 			<legal 0>
549 */
550 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_OFFSET         0x00000040
551 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_LSB            0
552 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_MASK           0xffffffff
553 
554 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A
555 
556 			<legal 0>
557 */
558 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_OFFSET         0x00000044
559 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_LSB            0
560 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_MASK           0xffffffff
561 
562 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A
563 
564 			<legal 0>
565 */
566 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_OFFSET         0x00000048
567 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_LSB            0
568 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_MASK           0xffffffff
569 
570 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A
571 
572 			<legal 0>
573 */
574 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_OFFSET         0x0000004c
575 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_LSB            0
576 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_MASK           0xffffffff
577 
578 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A
579 
580 			<legal 0>
581 */
582 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_OFFSET         0x00000050
583 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_LSB            0
584 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_MASK           0xffffffff
585 
586 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A
587 
588 			<legal 0>
589 */
590 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_OFFSET         0x00000054
591 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_LSB            0
592 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_MASK           0xffffffff
593 
594 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A
595 
596 			<legal 0>
597 */
598 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_OFFSET         0x00000058
599 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_LSB            0
600 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_MASK           0xffffffff
601 
602 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A
603 
604 			<legal 0>
605 */
606 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_OFFSET         0x0000005c
607 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_LSB            0
608 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_MASK           0xffffffff
609 
610 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A
611 
612 			<legal 0>
613 */
614 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_OFFSET         0x00000060
615 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_LSB            0
616 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_MASK           0x0fffffff
617 
618 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT
619 
620 			A count value that indicates the number of times the
621 			producer of entries into this Ring has looped around the
622 			ring.
623 
624 			At initialization time, this value is set to 0. On the
625 			first loop, this value is set to 1. After the max value is
626 			reached allowed by the number of bits for this field, the
627 			count value continues with 0 again.
628 
629 
630 
631 			In case SW is the consumer of the ring entries, it can
632 			use this field to figure out up to where the producer of
633 			entries has created new entries. This eliminates the need to
634 			check where the head pointer' of the ring is located once
635 			the SW starts processing an interrupt indicating that new
636 			entries have been put into this ring...
637 
638 
639 
640 			Also note that SW if it wants only needs to look at the
641 			LSB bit of this count value.
642 
643 			<legal all>
644 */
645 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_OFFSET        0x00000060
646 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_LSB           28
647 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_MASK          0xf0000000
648 
649 
650 #endif // _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
651