1 /* 2 * Copyright (c) 2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_MSDU_DESC_INFO_H_ 25 #define _RX_MSDU_DESC_INFO_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 first_msdu_in_mpdu_flag[0], last_msdu_in_mpdu_flag[1], msdu_continuation[2], msdu_length[16:3], reo_destination_indication[21:17], msdu_drop[22], sa_is_valid[23], sa_idx_timeout[24], da_is_valid[25], da_is_mcbc[26], da_idx_timeout[27], reserved_0a[31:28] 34 // 1 reserved_1a[31:0] 35 // 36 // ################ END SUMMARY ################# 37 38 #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 2 39 40 struct rx_msdu_desc_info { 41 uint32_t first_msdu_in_mpdu_flag : 1, //[0] 42 last_msdu_in_mpdu_flag : 1, //[1] 43 msdu_continuation : 1, //[2] 44 msdu_length : 14, //[16:3] 45 reo_destination_indication : 5, //[21:17] 46 msdu_drop : 1, //[22] 47 sa_is_valid : 1, //[23] 48 sa_idx_timeout : 1, //[24] 49 da_is_valid : 1, //[25] 50 da_is_mcbc : 1, //[26] 51 da_idx_timeout : 1, //[27] 52 reserved_0a : 4; //[31:28] 53 uint32_t reserved_1a : 32; //[31:0] 54 }; 55 56 /* 57 58 first_msdu_in_mpdu_flag 59 60 Parsed from RX_MSDU_END TLV . In the case MSDU spans 61 over multiple buffers, this field will be valid in the Last 62 buffer used by the MSDU 63 64 65 66 <enum 0 Not_first_msdu> This is not the first MSDU in 67 the MPDU. 68 69 <enum 1 first_msdu> This MSDU is the first one in the 70 MPDU. 71 72 73 74 <legal all> 75 76 last_msdu_in_mpdu_flag 77 78 Consumer: WBM/REO/SW/FW 79 80 Producer: RXDMA 81 82 83 84 Parsed from RX_MSDU_END TLV . In the case MSDU spans 85 over multiple buffers, this field will be valid in the Last 86 buffer used by the MSDU 87 88 89 90 <enum 0 Not_last_msdu> There are more MSDUs linked to 91 this MSDU that belongs to this MPDU 92 93 <enum 1 Last_msdu> this MSDU is the last one in the 94 MPDU. This setting is only allowed in combination with 95 'Msdu_continuation' set to 0. This implies that when an msdu 96 is spread out over multiple buffers and thus 97 msdu_continuation is set, only for the very last buffer of 98 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 99 100 101 102 When both first_msdu_in_mpdu_flag and 103 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 104 belongs to only contains a single MSDU. 105 106 107 108 109 110 <legal all> 111 112 msdu_continuation 113 114 When set, this MSDU buffer was not able to hold the 115 entire MSDU. The next buffer will therefor contain 116 additional information related to this MSDU. 117 118 119 120 <legal all> 121 122 msdu_length 123 124 Parsed from RX_MSDU_START TLV . In the case MSDU spans 125 over multiple buffers, this field will be valid in the First 126 buffer used by MSDU. 127 128 129 130 Full MSDU length in bytes after decapsulation. 131 132 133 134 This field is still valid for MPDU frames without 135 A-MSDU. It still represents MSDU length after decapsulation 136 137 138 139 Or in case of RAW MPDUs, it indicates the length of the 140 entire MPDU (without FCS field) 141 142 <legal all> 143 144 reo_destination_indication 145 146 Parsed from RX_MSDU_END TLV . In the case MSDU spans 147 over multiple buffers, this field will be valid in the Last 148 buffer used by the MSDU 149 150 151 152 The ID of the REO exit ring where the MSDU frame shall 153 push after (MPDU level) reordering has finished. 154 155 156 157 <enum 0 reo_destination_tcl> Reo will push the frame 158 into the REO2TCL ring 159 160 <enum 1 reo_destination_sw1> Reo will push the frame 161 into the REO2SW1 ring 162 163 <enum 2 reo_destination_sw2> Reo will push the frame 164 into the REO2SW2 ring 165 166 <enum 3 reo_destination_sw3> Reo will push the frame 167 into the REO2SW3 ring 168 169 <enum 4 reo_destination_sw4> Reo will push the frame 170 into the REO2SW4 ring 171 172 <enum 5 reo_destination_release> Reo will push the frame 173 into the REO_release ring 174 175 <enum 6 reo_destination_fw> Reo will push the frame into 176 the REO2FW ring 177 178 <enum 7 reo_destination_sw5> Reo will push the frame 179 into the REO2SW5 ring 180 181 <enum 8 reo_destination_sw6> Reo will push the frame 182 into the REO2SW6 ring 183 184 <enum 9 reo_destination_9> REO remaps this <enum 10 185 reo_destination_10> REO remaps this 186 187 <enum 11 reo_destination_11> REO remaps this 188 189 <enum 12 reo_destination_12> REO remaps this <enum 13 190 reo_destination_13> REO remaps this 191 192 <enum 14 reo_destination_14> REO remaps this 193 194 <enum 15 reo_destination_15> REO remaps this 195 196 <enum 16 reo_destination_16> REO remaps this 197 198 <enum 17 reo_destination_17> REO remaps this 199 200 <enum 18 reo_destination_18> REO remaps this 201 202 <enum 19 reo_destination_19> REO remaps this 203 204 <enum 20 reo_destination_20> REO remaps this 205 206 <enum 21 reo_destination_21> REO remaps this 207 208 <enum 22 reo_destination_22> REO remaps this 209 210 <enum 23 reo_destination_23> REO remaps this 211 212 <enum 24 reo_destination_24> REO remaps this 213 214 <enum 25 reo_destination_25> REO remaps this 215 216 <enum 26 reo_destination_26> REO remaps this 217 218 <enum 27 reo_destination_27> REO remaps this 219 220 <enum 28 reo_destination_28> REO remaps this 221 222 <enum 29 reo_destination_29> REO remaps this 223 224 <enum 30 reo_destination_30> REO remaps this 225 226 <enum 31 reo_destination_31> REO remaps this 227 228 229 230 <legal all> 231 232 msdu_drop 233 234 Parsed from RX_MSDU_END TLV . In the case MSDU spans 235 over multiple buffers, this field will be valid in the Last 236 buffer used by the MSDU 237 238 239 240 When set, REO shall drop this MSDU and not forward it to 241 any other ring... 242 243 <legal all> 244 245 sa_is_valid 246 247 Parsed from RX_MSDU_END TLV . In the case MSDU spans 248 over multiple buffers, this field will be valid in the Last 249 buffer used by the MSDU 250 251 252 253 Indicates that OLE found a valid SA entry for this MSDU 254 255 <legal all> 256 257 sa_idx_timeout 258 259 Parsed from RX_MSDU_END TLV . In the case MSDU spans 260 over multiple buffers, this field will be valid in the Last 261 buffer used by the MSDU 262 263 264 265 Indicates an unsuccessful MAC source address search due 266 to the expiring of the search timer for this MSDU 267 268 <legal all> 269 270 da_is_valid 271 272 Parsed from RX_MSDU_END TLV . In the case MSDU spans 273 over multiple buffers, this field will be valid in the Last 274 buffer used by the MSDU 275 276 277 278 Indicates that OLE found a valid DA entry for this MSDU 279 280 <legal all> 281 282 da_is_mcbc 283 284 Field Only valid if da_is_valid is set 285 286 287 288 Indicates the DA address was a Multicast of Broadcast 289 address for this MSDU 290 291 <legal all> 292 293 da_idx_timeout 294 295 Parsed from RX_MSDU_END TLV . In the case MSDU spans 296 over multiple buffers, this field will be valid in the Last 297 buffer used by the MSDU 298 299 300 301 Indicates an unsuccessful MAC destination address search 302 due to the expiring of the search timer for this MSDU 303 304 <legal all> 305 306 reserved_0a 307 308 <legal 0> 309 310 reserved_1a 311 312 <legal 0> 313 */ 314 315 316 /* Description RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG 317 318 Parsed from RX_MSDU_END TLV . In the case MSDU spans 319 over multiple buffers, this field will be valid in the Last 320 buffer used by the MSDU 321 322 323 324 <enum 0 Not_first_msdu> This is not the first MSDU in 325 the MPDU. 326 327 <enum 1 first_msdu> This MSDU is the first one in the 328 MPDU. 329 330 331 332 <legal all> 333 */ 334 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 335 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 336 #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 337 338 /* Description RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG 339 340 Consumer: WBM/REO/SW/FW 341 342 Producer: RXDMA 343 344 345 346 Parsed from RX_MSDU_END TLV . In the case MSDU spans 347 over multiple buffers, this field will be valid in the Last 348 buffer used by the MSDU 349 350 351 352 <enum 0 Not_last_msdu> There are more MSDUs linked to 353 this MSDU that belongs to this MPDU 354 355 <enum 1 Last_msdu> this MSDU is the last one in the 356 MPDU. This setting is only allowed in combination with 357 'Msdu_continuation' set to 0. This implies that when an msdu 358 is spread out over multiple buffers and thus 359 msdu_continuation is set, only for the very last buffer of 360 the msdu, can the 'last_msdu_in_mpdu_flag' be set. 361 362 363 364 When both first_msdu_in_mpdu_flag and 365 last_msdu_in_mpdu_flag are set, the MPDU that this MSDU 366 belongs to only contains a single MSDU. 367 368 369 370 371 372 <legal all> 373 */ 374 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 375 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB 1 376 #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 377 378 /* Description RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION 379 380 When set, this MSDU buffer was not able to hold the 381 entire MSDU. The next buffer will therefor contain 382 additional information related to this MSDU. 383 384 385 386 <legal all> 387 */ 388 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET 0x00000000 389 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB 2 390 #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK 0x00000004 391 392 /* Description RX_MSDU_DESC_INFO_0_MSDU_LENGTH 393 394 Parsed from RX_MSDU_START TLV . In the case MSDU spans 395 over multiple buffers, this field will be valid in the First 396 buffer used by MSDU. 397 398 399 400 Full MSDU length in bytes after decapsulation. 401 402 403 404 This field is still valid for MPDU frames without 405 A-MSDU. It still represents MSDU length after decapsulation 406 407 408 409 Or in case of RAW MPDUs, it indicates the length of the 410 entire MPDU (without FCS field) 411 412 <legal all> 413 */ 414 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET 0x00000000 415 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB 3 416 #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK 0x0001fff8 417 418 /* Description RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION 419 420 Parsed from RX_MSDU_END TLV . In the case MSDU spans 421 over multiple buffers, this field will be valid in the Last 422 buffer used by the MSDU 423 424 425 426 The ID of the REO exit ring where the MSDU frame shall 427 push after (MPDU level) reordering has finished. 428 429 430 431 <enum 0 reo_destination_tcl> Reo will push the frame 432 into the REO2TCL ring 433 434 <enum 1 reo_destination_sw1> Reo will push the frame 435 into the REO2SW1 ring 436 437 <enum 2 reo_destination_sw2> Reo will push the frame 438 into the REO2SW2 ring 439 440 <enum 3 reo_destination_sw3> Reo will push the frame 441 into the REO2SW3 ring 442 443 <enum 4 reo_destination_sw4> Reo will push the frame 444 into the REO2SW4 ring 445 446 <enum 5 reo_destination_release> Reo will push the frame 447 into the REO_release ring 448 449 <enum 6 reo_destination_fw> Reo will push the frame into 450 the REO2FW ring 451 452 <enum 7 reo_destination_sw5> Reo will push the frame 453 into the REO2SW5 ring 454 455 <enum 8 reo_destination_sw6> Reo will push the frame 456 into the REO2SW6 ring 457 458 <enum 9 reo_destination_9> REO remaps this <enum 10 459 reo_destination_10> REO remaps this 460 461 <enum 11 reo_destination_11> REO remaps this 462 463 <enum 12 reo_destination_12> REO remaps this <enum 13 464 reo_destination_13> REO remaps this 465 466 <enum 14 reo_destination_14> REO remaps this 467 468 <enum 15 reo_destination_15> REO remaps this 469 470 <enum 16 reo_destination_16> REO remaps this 471 472 <enum 17 reo_destination_17> REO remaps this 473 474 <enum 18 reo_destination_18> REO remaps this 475 476 <enum 19 reo_destination_19> REO remaps this 477 478 <enum 20 reo_destination_20> REO remaps this 479 480 <enum 21 reo_destination_21> REO remaps this 481 482 <enum 22 reo_destination_22> REO remaps this 483 484 <enum 23 reo_destination_23> REO remaps this 485 486 <enum 24 reo_destination_24> REO remaps this 487 488 <enum 25 reo_destination_25> REO remaps this 489 490 <enum 26 reo_destination_26> REO remaps this 491 492 <enum 27 reo_destination_27> REO remaps this 493 494 <enum 28 reo_destination_28> REO remaps this 495 496 <enum 29 reo_destination_29> REO remaps this 497 498 <enum 30 reo_destination_30> REO remaps this 499 500 <enum 31 reo_destination_31> REO remaps this 501 502 503 504 <legal all> 505 */ 506 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000 507 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB 17 508 #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK 0x003e0000 509 510 /* Description RX_MSDU_DESC_INFO_0_MSDU_DROP 511 512 Parsed from RX_MSDU_END TLV . In the case MSDU spans 513 over multiple buffers, this field will be valid in the Last 514 buffer used by the MSDU 515 516 517 518 When set, REO shall drop this MSDU and not forward it to 519 any other ring... 520 521 <legal all> 522 */ 523 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_OFFSET 0x00000000 524 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_LSB 22 525 #define RX_MSDU_DESC_INFO_0_MSDU_DROP_MASK 0x00400000 526 527 /* Description RX_MSDU_DESC_INFO_0_SA_IS_VALID 528 529 Parsed from RX_MSDU_END TLV . In the case MSDU spans 530 over multiple buffers, this field will be valid in the Last 531 buffer used by the MSDU 532 533 534 535 Indicates that OLE found a valid SA entry for this MSDU 536 537 <legal all> 538 */ 539 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET 0x00000000 540 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_LSB 23 541 #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK 0x00800000 542 543 /* Description RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT 544 545 Parsed from RX_MSDU_END TLV . In the case MSDU spans 546 over multiple buffers, this field will be valid in the Last 547 buffer used by the MSDU 548 549 550 551 Indicates an unsuccessful MAC source address search due 552 to the expiring of the search timer for this MSDU 553 554 <legal all> 555 */ 556 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET 0x00000000 557 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_LSB 24 558 #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK 0x01000000 559 560 /* Description RX_MSDU_DESC_INFO_0_DA_IS_VALID 561 562 Parsed from RX_MSDU_END TLV . In the case MSDU spans 563 over multiple buffers, this field will be valid in the Last 564 buffer used by the MSDU 565 566 567 568 Indicates that OLE found a valid DA entry for this MSDU 569 570 <legal all> 571 */ 572 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET 0x00000000 573 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_LSB 25 574 #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK 0x02000000 575 576 /* Description RX_MSDU_DESC_INFO_0_DA_IS_MCBC 577 578 Field Only valid if da_is_valid is set 579 580 581 582 Indicates the DA address was a Multicast of Broadcast 583 address for this MSDU 584 585 <legal all> 586 */ 587 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET 0x00000000 588 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_LSB 26 589 #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK 0x04000000 590 591 /* Description RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT 592 593 Parsed from RX_MSDU_END TLV . In the case MSDU spans 594 over multiple buffers, this field will be valid in the Last 595 buffer used by the MSDU 596 597 598 599 Indicates an unsuccessful MAC destination address search 600 due to the expiring of the search timer for this MSDU 601 602 <legal all> 603 */ 604 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET 0x00000000 605 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_LSB 27 606 #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK 0x08000000 607 608 /* Description RX_MSDU_DESC_INFO_0_RESERVED_0A 609 610 <legal 0> 611 */ 612 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_OFFSET 0x00000000 613 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_LSB 28 614 #define RX_MSDU_DESC_INFO_0_RESERVED_0A_MASK 0xf0000000 615 616 /* Description RX_MSDU_DESC_INFO_1_RESERVED_1A 617 618 <legal 0> 619 */ 620 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_OFFSET 0x00000004 621 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_LSB 0 622 #define RX_MSDU_DESC_INFO_1_RESERVED_1A_MASK 0xffffffff 623 624 625 #endif // _RX_MSDU_DESC_INFO_H_ 626