xref: /wlan-driver/fw-api/hw/qca6490/v1/rx_msdu_start.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _RX_MSDU_START_H_
25 #define _RX_MSDU_START_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16]
34 //	1	msdu_length[13:0], reserved_1a[14], ipsec_esp[15], l3_offset[22:16], ipsec_ah[23], l4_offset[31:24]
35 //	2	msdu_number[7:0], decap_format[9:8], ipv4_proto[10], ipv6_proto[11], tcp_proto[12], udp_proto[13], ip_frag[14], tcp_only_ack[15], da_is_bcast_mcast[16], toeplitz_hash_sel[18:17], ip_fixed_header_valid[19], ip_extn_header_valid[20], tcp_udp_header_valid[21], mesh_control_present[22], ldpc[23], ip4_protocol_ip6_next_header[31:24]
36 //	3	toeplitz_hash_2_or_4[31:0]
37 //	4	flow_id_toeplitz[31:0]
38 //	5	user_rssi[7:0], pkt_type[11:8], stbc[12], sgi[14:13], rate_mcs[18:15], receive_bandwidth[20:19], reception_type[23:21], mimo_ss_bitmap[31:24]
39 //	6	ppdu_start_timestamp[31:0]
40 //	7	sw_phy_meta_data[31:0]
41 //	8	vlan_ctag_ci[15:0], vlan_stag_ci[31:16]
42 //
43 // ################ END SUMMARY #################
44 
45 #define NUM_OF_DWORDS_RX_MSDU_START 9
46 
47 struct rx_msdu_start {
48              uint32_t rxpcu_mpdu_filter_in_category   :  2, //[1:0]
49                       sw_frame_group_id               :  7, //[8:2]
50                       reserved_0                      :  7, //[15:9]
51                       phy_ppdu_id                     : 16; //[31:16]
52              uint32_t msdu_length                     : 14, //[13:0]
53                       reserved_1a                     :  1, //[14]
54                       ipsec_esp                       :  1, //[15]
55                       l3_offset                       :  7, //[22:16]
56                       ipsec_ah                        :  1, //[23]
57                       l4_offset                       :  8; //[31:24]
58              uint32_t msdu_number                     :  8, //[7:0]
59                       decap_format                    :  2, //[9:8]
60                       ipv4_proto                      :  1, //[10]
61                       ipv6_proto                      :  1, //[11]
62                       tcp_proto                       :  1, //[12]
63                       udp_proto                       :  1, //[13]
64                       ip_frag                         :  1, //[14]
65                       tcp_only_ack                    :  1, //[15]
66                       da_is_bcast_mcast               :  1, //[16]
67                       toeplitz_hash_sel               :  2, //[18:17]
68                       ip_fixed_header_valid           :  1, //[19]
69                       ip_extn_header_valid            :  1, //[20]
70                       tcp_udp_header_valid            :  1, //[21]
71                       mesh_control_present            :  1, //[22]
72                       ldpc                            :  1, //[23]
73                       ip4_protocol_ip6_next_header    :  8; //[31:24]
74              uint32_t toeplitz_hash_2_or_4            : 32; //[31:0]
75              uint32_t flow_id_toeplitz                : 32; //[31:0]
76              uint32_t user_rssi                       :  8, //[7:0]
77                       pkt_type                        :  4, //[11:8]
78                       stbc                            :  1, //[12]
79                       sgi                             :  2, //[14:13]
80                       rate_mcs                        :  4, //[18:15]
81                       receive_bandwidth               :  2, //[20:19]
82                       reception_type                  :  3, //[23:21]
83                       mimo_ss_bitmap                  :  8; //[31:24]
84              uint32_t ppdu_start_timestamp            : 32; //[31:0]
85              uint32_t sw_phy_meta_data                : 32; //[31:0]
86              uint32_t vlan_ctag_ci                    : 16, //[15:0]
87                       vlan_stag_ci                    : 16; //[31:16]
88 };
89 
90 /*
91 
92 rxpcu_mpdu_filter_in_category
93 
94 			Field indicates what the reason was that this MPDU frame
95 			was allowed to come into the receive path by RXPCU
96 
97 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
98 			frame filter programming of rxpcu
99 
100 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
101 			regular frame filter and would have been dropped, were it
102 			not for the frame fitting into the 'monitor_client'
103 			category.
104 
105 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
106 			regular frame filter and also did not pass the
107 			rxpcu_monitor_client filter. It would have been dropped
108 			accept that it did pass the 'monitor_other' category.
109 
110 			<legal 0-2>
111 
112 sw_frame_group_id
113 
114 			SW processes frames based on certain classifications.
115 			This field indicates to what sw classification this MPDU is
116 			mapped.
117 
118 			The classification is given in priority order
119 
120 
121 
122 			<enum 0 sw_frame_group_NDP_frame>
123 
124 
125 
126 			<enum 1 sw_frame_group_Multicast_data>
127 
128 			<enum 2 sw_frame_group_Unicast_data>
129 
130 			<enum 3 sw_frame_group_Null_data > This includes mpdus
131 			of type Data Null as well as QoS Data Null
132 
133 
134 
135 			<enum 4 sw_frame_group_mgmt_0000 >
136 
137 			<enum 5 sw_frame_group_mgmt_0001 >
138 
139 			<enum 6 sw_frame_group_mgmt_0010 >
140 
141 			<enum 7 sw_frame_group_mgmt_0011 >
142 
143 			<enum 8 sw_frame_group_mgmt_0100 >
144 
145 			<enum 9 sw_frame_group_mgmt_0101 >
146 
147 			<enum 10 sw_frame_group_mgmt_0110 >
148 
149 			<enum 11 sw_frame_group_mgmt_0111 >
150 
151 			<enum 12 sw_frame_group_mgmt_1000 >
152 
153 			<enum 13 sw_frame_group_mgmt_1001 >
154 
155 			<enum 14 sw_frame_group_mgmt_1010 >
156 
157 			<enum 15 sw_frame_group_mgmt_1011 >
158 
159 			<enum 16 sw_frame_group_mgmt_1100 >
160 
161 			<enum 17 sw_frame_group_mgmt_1101 >
162 
163 			<enum 18 sw_frame_group_mgmt_1110 >
164 
165 			<enum 19 sw_frame_group_mgmt_1111 >
166 
167 
168 
169 			<enum 20 sw_frame_group_ctrl_0000 >
170 
171 			<enum 21 sw_frame_group_ctrl_0001 >
172 
173 			<enum 22 sw_frame_group_ctrl_0010 >
174 
175 			<enum 23 sw_frame_group_ctrl_0011 >
176 
177 			<enum 24 sw_frame_group_ctrl_0100 >
178 
179 			<enum 25 sw_frame_group_ctrl_0101 >
180 
181 			<enum 26 sw_frame_group_ctrl_0110 >
182 
183 			<enum 27 sw_frame_group_ctrl_0111 >
184 
185 			<enum 28 sw_frame_group_ctrl_1000 >
186 
187 			<enum 29 sw_frame_group_ctrl_1001 >
188 
189 			<enum 30 sw_frame_group_ctrl_1010 >
190 
191 			<enum 31 sw_frame_group_ctrl_1011 >
192 
193 			<enum 32 sw_frame_group_ctrl_1100 >
194 
195 			<enum 33 sw_frame_group_ctrl_1101 >
196 
197 			<enum 34 sw_frame_group_ctrl_1110 >
198 
199 			<enum 35 sw_frame_group_ctrl_1111 >
200 
201 
202 
203 			<enum 36 sw_frame_group_unsupported> This covers type 3
204 			and protocol version != 0
205 
206 
207 
208 
209 
210 
211 			<legal 0-37>
212 
213 reserved_0
214 
215 			<legal 0>
216 
217 phy_ppdu_id
218 
219 			A ppdu counter value that PHY increments for every PPDU
220 			received. The counter value wraps around
221 
222 			<legal all>
223 
224 msdu_length
225 
226 			MSDU length in bytes after decapsulation.
227 
228 
229 
230 			This field is still valid for MPDU frames without
231 
232 reserved_1a
233 
234 			<legal 0>
235 
236 ipsec_esp
237 
238 			Set if IPv4/v6 packet is using IPsec ESP
239 
240 l3_offset
241 
242 			Depending upon mode bit, this field either indicates the
243 			L3 offset in bytes from the start of the RX_HEADER or the IP
244 			offset in bytes from the start of the packet after
245 			decapsulation.  The latter is only valid if ipv4_proto or
246 			ipv6_proto is set.
247 
248 ipsec_ah
249 
250 			Set if IPv4/v6 packet is using IPsec AH
251 
252 l4_offset
253 
254 			Depending upon mode bit, this field either indicates the
255 			L4 offset nin bytes from the start of RX_HEADER(only valid
256 			if either ipv4_proto or ipv6_proto is set to 1) or indicates
257 			the offset in bytes to the start of TCP or UDP header from
258 			the start of the IP header after decapsulation(Only valid if
259 			tcp_proto or udp_proto is set).  The value 0 indicates that
260 			the offset is longer than 127 bytes.
261 
262 msdu_number
263 
264 			Indicates the MSDU number within a MPDU.  This value is
265 			reset to zero at the start of each MPDU.  If the number of
266 			MSDU exceeds 255 this number will wrap using modulo 256.
267 
268 decap_format
269 
270 			Indicates the format after decapsulation:
271 
272 
273 
274 			<enum 0 RAW> No encapsulation
275 
276 			<enum 1 Native_WiFi>
277 
278 			<enum 2 Ethernet> Ethernet 2 (DIX)  or 802.3 (uses
279 			SNAP/LLC)
280 
281 			<enum 3 802_3> Indicate Ethernet
282 
283 
284 
285 			<legal all>
286 
287 ipv4_proto
288 
289 			Set if L2 layer indicates IPv4 protocol.
290 
291 ipv6_proto
292 
293 			Set if L2 layer indicates IPv6 protocol.
294 
295 tcp_proto
296 
297 			Set if the ipv4_proto or ipv6_proto are set and the IP
298 			protocol indicates TCP.
299 
300 udp_proto
301 
302 			Set if the ipv4_proto or ipv6_proto are set and the IP
303 			protocol indicates UDP.
304 
305 ip_frag
306 
307 			Indicates that either the IP More frag bit is set or IP
308 			frag number is non-zero.  If set indicates that this is a
309 			fragmented IP packet.
310 
311 tcp_only_ack
312 
313 			Set if only the TCP Ack bit is set in the TCP flags and
314 			if the TCP payload is 0.
315 
316 da_is_bcast_mcast
317 
318 			The destination address is broadcast or multicast.
319 
320 toeplitz_hash_sel
321 
322 			Actual choosen Hash.
323 
324 
325 
326 			0 -> Toeplitz hash of 2-tuple (IP source address, IP
327 			destination address)1 -> Toeplitz hash of 4-tuple (IP source
328 			address, IP destination address, L4 (TCP/UDP) source port,
329 			L4 (TCP/UDP) destination port)
330 
331 			2 -> Toeplitz of flow_id
332 
333 			3 -> Zero is used
334 
335 			<legal all>
336 
337 ip_fixed_header_valid
338 
339 			Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
340 			fully within first 256 bytes of the packet
341 
342 ip_extn_header_valid
343 
344 			IPv6/IPv6 header, including IPv4 options and
345 			recognizable extension headers parsed fully within first 256
346 			bytes of the packet
347 
348 tcp_udp_header_valid
349 
350 			Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
351 			header parsed fully within first 256 bytes of the packet
352 
353 mesh_control_present
354 
355 			When set, this MSDU includes the 'Mesh Control' field
356 
357 			<legal all>
358 
359 ldpc
360 
361 			When set, indicates that LDPC coding was used.
362 
363 			<legal all>
364 
365 ip4_protocol_ip6_next_header
366 
367 			For IPv4 this is the 8 bit protocol field (when
368 			ipv4_proto is set).  For IPv6 this is the 8 bit next_header
369 			field (when ipv6_proto is set).
370 
371 toeplitz_hash_2_or_4
372 
373 			Controlled by RxOLE register - If register bit set to 0,
374 			Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
375 			addresses; otherwise, toeplitz hash is computed over 4-tuple
376 			IPv4 or IPv6 src/dest addresses and src/dest ports
377 
378 flow_id_toeplitz
379 
380 			Toeplitz hash of 5-tuple
381 
382 			{IP source address, IP destination address, IP source
383 			port, IP destination port, L4 protocol}  in case of
384 			non-IPSec.
385 
386 			In case of IPSec - Toeplitz hash of 4-tuple
387 
388 			{IP source address, IP destination address, SPI, L4
389 			protocol}
390 
391 
392 
393 			The relevant Toeplitz key registers are provided in
394 			RxOLE's instance of common parser module. These registers
395 			are separate from the Toeplitz keys used by ASE/FSE modules
396 			inside RxOLE.The actual value will be passed on from common
397 			parser module to RxOLE in one of the WHO_* TLVs.
398 
399 			<legal all>
400 
401 user_rssi
402 
403 			RSSI for this user
404 
405 			<legal all>
406 
407 pkt_type
408 
409 			Packet type:
410 
411 			<enum 0 dot11a>802.11a PPDU type
412 
413 			<enum 1 dot11b>802.11b PPDU type
414 
415 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
416 
417 			<enum 3 dot11ac>802.11ac PPDU type
418 
419 			<enum 4 dot11ax>802.11ax PPDU type
420 
421 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
422 
423 stbc
424 
425 			When set, use STBC transmission rates
426 
427 sgi
428 
429 			Field only valid when pkt type is HT, VHT or HE.
430 
431 
432 
433 			<enum 0     0_8_us_sgi > Legacy normal GI. Can also be
434 			used for HE
435 
436 			<enum 1     0_4_us_sgi > Legacy short GI. Can also be
437 			used for HE
438 
439 			<enum 2     1_6_us_sgi > HE related GI
440 
441 			<enum 3     3_2_us_sgi > HE related GI
442 
443 			<legal 0 - 3>
444 
445 rate_mcs
446 
447 			For details, refer to  MCS_TYPE description
448 
449 			Note: This is rate in case of 11a/11b
450 
451 
452 
453 			<legal all>
454 
455 receive_bandwidth
456 
457 			Full receive Bandwidth
458 
459 
460 
461 			<enum 0     full_rx_bw_20_mhz>
462 
463 			<enum 1      full_rx_bw_40_mhz>
464 
465 			<enum 2      full_rx_bw_80_mhz>
466 
467 			<enum 3      full_rx_bw_160_mhz>
468 
469 
470 
471 			<legal 0-3>
472 
473 reception_type
474 
475 			Indicates what type of reception this is.
476 
477 			<enum 0     reception_type_SU > Basic SU reception (not
478 			part of OFDMA or MIMO)
479 
480 			<enum 1     reception_type_MU_MIMO > This is related to
481 			DL type of reception
482 
483 			<enum 2     reception_type_MU_OFDMA >  This is related
484 			to DL type of reception
485 
486 			<enum 3     reception_type_MU_OFDMA_MIMO >  This is
487 			related to DL type of reception
488 
489 			<enum 4     reception_type_UL_MU_MIMO > This is related
490 			to UL type of reception
491 
492 			<enum 5     reception_type_UL_MU_OFDMA >  This is
493 			related to UL type of reception
494 
495 			<enum 6     reception_type_UL_MU_OFDMA_MIMO >  This is
496 			related to UL type of reception
497 
498 
499 
500 			<legal 0-6>
501 
502 mimo_ss_bitmap
503 
504 			Field only valid when Reception_type for the MPDU from
505 			this STA is some form of MIMO reception
506 
507 
508 
509 			Bitmap, with each bit indicating if the related spatial
510 			stream is used for this STA
511 
512 			LSB related to SS 0
513 
514 
515 
516 			0: spatial stream not used for this reception
517 
518 			1: spatial stream used for this reception
519 
520 
521 
522 			<legal all>
523 
524 ppdu_start_timestamp
525 
526 			Timestamp that indicates when the PPDU that contained
527 			this MPDU started on the medium.
528 
529 			<legal all>
530 
531 sw_phy_meta_data
532 
533 			SW programmed Meta data provided by the PHY.
534 
535 
536 
537 			Can be used for SW to indicate the channel the device is
538 			on.
539 
540 			<legal all>
541 
542 vlan_ctag_ci
543 
544 			2 bytes of C-VLAN Tag Control Information from
545 			WHO_L2_LLC
546 
547 vlan_stag_ci
548 
549 			2 bytes of S-VLAN Tag Control Information from
550 			WHO_L2_LLC in case of double VLAN
551 */
552 
553 
554 /* Description		RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY
555 
556 			Field indicates what the reason was that this MPDU frame
557 			was allowed to come into the receive path by RXPCU
558 
559 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
560 			frame filter programming of rxpcu
561 
562 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
563 			regular frame filter and would have been dropped, were it
564 			not for the frame fitting into the 'monitor_client'
565 			category.
566 
567 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
568 			regular frame filter and also did not pass the
569 			rxpcu_monitor_client filter. It would have been dropped
570 			accept that it did pass the 'monitor_other' category.
571 
572 			<legal 0-2>
573 */
574 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET         0x00000000
575 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB            0
576 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK           0x00000003
577 
578 /* Description		RX_MSDU_START_0_SW_FRAME_GROUP_ID
579 
580 			SW processes frames based on certain classifications.
581 			This field indicates to what sw classification this MPDU is
582 			mapped.
583 
584 			The classification is given in priority order
585 
586 
587 
588 			<enum 0 sw_frame_group_NDP_frame>
589 
590 
591 
592 			<enum 1 sw_frame_group_Multicast_data>
593 
594 			<enum 2 sw_frame_group_Unicast_data>
595 
596 			<enum 3 sw_frame_group_Null_data > This includes mpdus
597 			of type Data Null as well as QoS Data Null
598 
599 
600 
601 			<enum 4 sw_frame_group_mgmt_0000 >
602 
603 			<enum 5 sw_frame_group_mgmt_0001 >
604 
605 			<enum 6 sw_frame_group_mgmt_0010 >
606 
607 			<enum 7 sw_frame_group_mgmt_0011 >
608 
609 			<enum 8 sw_frame_group_mgmt_0100 >
610 
611 			<enum 9 sw_frame_group_mgmt_0101 >
612 
613 			<enum 10 sw_frame_group_mgmt_0110 >
614 
615 			<enum 11 sw_frame_group_mgmt_0111 >
616 
617 			<enum 12 sw_frame_group_mgmt_1000 >
618 
619 			<enum 13 sw_frame_group_mgmt_1001 >
620 
621 			<enum 14 sw_frame_group_mgmt_1010 >
622 
623 			<enum 15 sw_frame_group_mgmt_1011 >
624 
625 			<enum 16 sw_frame_group_mgmt_1100 >
626 
627 			<enum 17 sw_frame_group_mgmt_1101 >
628 
629 			<enum 18 sw_frame_group_mgmt_1110 >
630 
631 			<enum 19 sw_frame_group_mgmt_1111 >
632 
633 
634 
635 			<enum 20 sw_frame_group_ctrl_0000 >
636 
637 			<enum 21 sw_frame_group_ctrl_0001 >
638 
639 			<enum 22 sw_frame_group_ctrl_0010 >
640 
641 			<enum 23 sw_frame_group_ctrl_0011 >
642 
643 			<enum 24 sw_frame_group_ctrl_0100 >
644 
645 			<enum 25 sw_frame_group_ctrl_0101 >
646 
647 			<enum 26 sw_frame_group_ctrl_0110 >
648 
649 			<enum 27 sw_frame_group_ctrl_0111 >
650 
651 			<enum 28 sw_frame_group_ctrl_1000 >
652 
653 			<enum 29 sw_frame_group_ctrl_1001 >
654 
655 			<enum 30 sw_frame_group_ctrl_1010 >
656 
657 			<enum 31 sw_frame_group_ctrl_1011 >
658 
659 			<enum 32 sw_frame_group_ctrl_1100 >
660 
661 			<enum 33 sw_frame_group_ctrl_1101 >
662 
663 			<enum 34 sw_frame_group_ctrl_1110 >
664 
665 			<enum 35 sw_frame_group_ctrl_1111 >
666 
667 
668 
669 			<enum 36 sw_frame_group_unsupported> This covers type 3
670 			and protocol version != 0
671 
672 
673 
674 
675 
676 
677 			<legal 0-37>
678 */
679 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_OFFSET                     0x00000000
680 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_LSB                        2
681 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_MASK                       0x000001fc
682 
683 /* Description		RX_MSDU_START_0_RESERVED_0
684 
685 			<legal 0>
686 */
687 #define RX_MSDU_START_0_RESERVED_0_OFFSET                            0x00000000
688 #define RX_MSDU_START_0_RESERVED_0_LSB                               9
689 #define RX_MSDU_START_0_RESERVED_0_MASK                              0x0000fe00
690 
691 /* Description		RX_MSDU_START_0_PHY_PPDU_ID
692 
693 			A ppdu counter value that PHY increments for every PPDU
694 			received. The counter value wraps around
695 
696 			<legal all>
697 */
698 #define RX_MSDU_START_0_PHY_PPDU_ID_OFFSET                           0x00000000
699 #define RX_MSDU_START_0_PHY_PPDU_ID_LSB                              16
700 #define RX_MSDU_START_0_PHY_PPDU_ID_MASK                             0xffff0000
701 
702 /* Description		RX_MSDU_START_1_MSDU_LENGTH
703 
704 			MSDU length in bytes after decapsulation.
705 
706 
707 
708 			This field is still valid for MPDU frames without
709 */
710 #define RX_MSDU_START_1_MSDU_LENGTH_OFFSET                           0x00000004
711 #define RX_MSDU_START_1_MSDU_LENGTH_LSB                              0
712 #define RX_MSDU_START_1_MSDU_LENGTH_MASK                             0x00003fff
713 
714 /* Description		RX_MSDU_START_1_RESERVED_1A
715 
716 			<legal 0>
717 */
718 #define RX_MSDU_START_1_RESERVED_1A_OFFSET                           0x00000004
719 #define RX_MSDU_START_1_RESERVED_1A_LSB                              14
720 #define RX_MSDU_START_1_RESERVED_1A_MASK                             0x00004000
721 
722 /* Description		RX_MSDU_START_1_IPSEC_ESP
723 
724 			Set if IPv4/v6 packet is using IPsec ESP
725 */
726 #define RX_MSDU_START_1_IPSEC_ESP_OFFSET                             0x00000004
727 #define RX_MSDU_START_1_IPSEC_ESP_LSB                                15
728 #define RX_MSDU_START_1_IPSEC_ESP_MASK                               0x00008000
729 
730 /* Description		RX_MSDU_START_1_L3_OFFSET
731 
732 			Depending upon mode bit, this field either indicates the
733 			L3 offset in bytes from the start of the RX_HEADER or the IP
734 			offset in bytes from the start of the packet after
735 			decapsulation.  The latter is only valid if ipv4_proto or
736 			ipv6_proto is set.
737 */
738 #define RX_MSDU_START_1_L3_OFFSET_OFFSET                             0x00000004
739 #define RX_MSDU_START_1_L3_OFFSET_LSB                                16
740 #define RX_MSDU_START_1_L3_OFFSET_MASK                               0x007f0000
741 
742 /* Description		RX_MSDU_START_1_IPSEC_AH
743 
744 			Set if IPv4/v6 packet is using IPsec AH
745 */
746 #define RX_MSDU_START_1_IPSEC_AH_OFFSET                              0x00000004
747 #define RX_MSDU_START_1_IPSEC_AH_LSB                                 23
748 #define RX_MSDU_START_1_IPSEC_AH_MASK                                0x00800000
749 
750 /* Description		RX_MSDU_START_1_L4_OFFSET
751 
752 			Depending upon mode bit, this field either indicates the
753 			L4 offset nin bytes from the start of RX_HEADER(only valid
754 			if either ipv4_proto or ipv6_proto is set to 1) or indicates
755 			the offset in bytes to the start of TCP or UDP header from
756 			the start of the IP header after decapsulation(Only valid if
757 			tcp_proto or udp_proto is set).  The value 0 indicates that
758 			the offset is longer than 127 bytes.
759 */
760 #define RX_MSDU_START_1_L4_OFFSET_OFFSET                             0x00000004
761 #define RX_MSDU_START_1_L4_OFFSET_LSB                                24
762 #define RX_MSDU_START_1_L4_OFFSET_MASK                               0xff000000
763 
764 /* Description		RX_MSDU_START_2_MSDU_NUMBER
765 
766 			Indicates the MSDU number within a MPDU.  This value is
767 			reset to zero at the start of each MPDU.  If the number of
768 			MSDU exceeds 255 this number will wrap using modulo 256.
769 */
770 #define RX_MSDU_START_2_MSDU_NUMBER_OFFSET                           0x00000008
771 #define RX_MSDU_START_2_MSDU_NUMBER_LSB                              0
772 #define RX_MSDU_START_2_MSDU_NUMBER_MASK                             0x000000ff
773 
774 /* Description		RX_MSDU_START_2_DECAP_FORMAT
775 
776 			Indicates the format after decapsulation:
777 
778 
779 
780 			<enum 0 RAW> No encapsulation
781 
782 			<enum 1 Native_WiFi>
783 
784 			<enum 2 Ethernet> Ethernet 2 (DIX)  or 802.3 (uses
785 			SNAP/LLC)
786 
787 			<enum 3 802_3> Indicate Ethernet
788 
789 
790 
791 			<legal all>
792 */
793 #define RX_MSDU_START_2_DECAP_FORMAT_OFFSET                          0x00000008
794 #define RX_MSDU_START_2_DECAP_FORMAT_LSB                             8
795 #define RX_MSDU_START_2_DECAP_FORMAT_MASK                            0x00000300
796 
797 /* Description		RX_MSDU_START_2_IPV4_PROTO
798 
799 			Set if L2 layer indicates IPv4 protocol.
800 */
801 #define RX_MSDU_START_2_IPV4_PROTO_OFFSET                            0x00000008
802 #define RX_MSDU_START_2_IPV4_PROTO_LSB                               10
803 #define RX_MSDU_START_2_IPV4_PROTO_MASK                              0x00000400
804 
805 /* Description		RX_MSDU_START_2_IPV6_PROTO
806 
807 			Set if L2 layer indicates IPv6 protocol.
808 */
809 #define RX_MSDU_START_2_IPV6_PROTO_OFFSET                            0x00000008
810 #define RX_MSDU_START_2_IPV6_PROTO_LSB                               11
811 #define RX_MSDU_START_2_IPV6_PROTO_MASK                              0x00000800
812 
813 /* Description		RX_MSDU_START_2_TCP_PROTO
814 
815 			Set if the ipv4_proto or ipv6_proto are set and the IP
816 			protocol indicates TCP.
817 */
818 #define RX_MSDU_START_2_TCP_PROTO_OFFSET                             0x00000008
819 #define RX_MSDU_START_2_TCP_PROTO_LSB                                12
820 #define RX_MSDU_START_2_TCP_PROTO_MASK                               0x00001000
821 
822 /* Description		RX_MSDU_START_2_UDP_PROTO
823 
824 			Set if the ipv4_proto or ipv6_proto are set and the IP
825 			protocol indicates UDP.
826 */
827 #define RX_MSDU_START_2_UDP_PROTO_OFFSET                             0x00000008
828 #define RX_MSDU_START_2_UDP_PROTO_LSB                                13
829 #define RX_MSDU_START_2_UDP_PROTO_MASK                               0x00002000
830 
831 /* Description		RX_MSDU_START_2_IP_FRAG
832 
833 			Indicates that either the IP More frag bit is set or IP
834 			frag number is non-zero.  If set indicates that this is a
835 			fragmented IP packet.
836 */
837 #define RX_MSDU_START_2_IP_FRAG_OFFSET                               0x00000008
838 #define RX_MSDU_START_2_IP_FRAG_LSB                                  14
839 #define RX_MSDU_START_2_IP_FRAG_MASK                                 0x00004000
840 
841 /* Description		RX_MSDU_START_2_TCP_ONLY_ACK
842 
843 			Set if only the TCP Ack bit is set in the TCP flags and
844 			if the TCP payload is 0.
845 */
846 #define RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET                          0x00000008
847 #define RX_MSDU_START_2_TCP_ONLY_ACK_LSB                             15
848 #define RX_MSDU_START_2_TCP_ONLY_ACK_MASK                            0x00008000
849 
850 /* Description		RX_MSDU_START_2_DA_IS_BCAST_MCAST
851 
852 			The destination address is broadcast or multicast.
853 */
854 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_OFFSET                     0x00000008
855 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_LSB                        16
856 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_MASK                       0x00010000
857 
858 /* Description		RX_MSDU_START_2_TOEPLITZ_HASH_SEL
859 
860 			Actual choosen Hash.
861 
862 
863 
864 			0 -> Toeplitz hash of 2-tuple (IP source address, IP
865 			destination address)1 -> Toeplitz hash of 4-tuple (IP source
866 			address, IP destination address, L4 (TCP/UDP) source port,
867 			L4 (TCP/UDP) destination port)
868 
869 			2 -> Toeplitz of flow_id
870 
871 			3 -> Zero is used
872 
873 			<legal all>
874 */
875 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_OFFSET                     0x00000008
876 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_LSB                        17
877 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_MASK                       0x00060000
878 
879 /* Description		RX_MSDU_START_2_IP_FIXED_HEADER_VALID
880 
881 			Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
882 			fully within first 256 bytes of the packet
883 */
884 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_OFFSET                 0x00000008
885 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_LSB                    19
886 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_MASK                   0x00080000
887 
888 /* Description		RX_MSDU_START_2_IP_EXTN_HEADER_VALID
889 
890 			IPv6/IPv6 header, including IPv4 options and
891 			recognizable extension headers parsed fully within first 256
892 			bytes of the packet
893 */
894 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_OFFSET                  0x00000008
895 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_LSB                     20
896 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_MASK                    0x00100000
897 
898 /* Description		RX_MSDU_START_2_TCP_UDP_HEADER_VALID
899 
900 			Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
901 			header parsed fully within first 256 bytes of the packet
902 */
903 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_OFFSET                  0x00000008
904 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_LSB                     21
905 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_MASK                    0x00200000
906 
907 /* Description		RX_MSDU_START_2_MESH_CONTROL_PRESENT
908 
909 			When set, this MSDU includes the 'Mesh Control' field
910 
911 			<legal all>
912 */
913 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_OFFSET                  0x00000008
914 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_LSB                     22
915 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_MASK                    0x00400000
916 
917 /* Description		RX_MSDU_START_2_LDPC
918 
919 			When set, indicates that LDPC coding was used.
920 
921 			<legal all>
922 */
923 #define RX_MSDU_START_2_LDPC_OFFSET                                  0x00000008
924 #define RX_MSDU_START_2_LDPC_LSB                                     23
925 #define RX_MSDU_START_2_LDPC_MASK                                    0x00800000
926 
927 /* Description		RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER
928 
929 			For IPv4 this is the 8 bit protocol field (when
930 			ipv4_proto is set).  For IPv6 this is the 8 bit next_header
931 			field (when ipv6_proto is set).
932 */
933 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET          0x00000008
934 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB             24
935 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK            0xff000000
936 
937 /* Description		RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4
938 
939 			Controlled by RxOLE register - If register bit set to 0,
940 			Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
941 			addresses; otherwise, toeplitz hash is computed over 4-tuple
942 			IPv4 or IPv6 src/dest addresses and src/dest ports
943 */
944 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_OFFSET                  0x0000000c
945 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_LSB                     0
946 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_MASK                    0xffffffff
947 
948 /* Description		RX_MSDU_START_4_FLOW_ID_TOEPLITZ
949 
950 			Toeplitz hash of 5-tuple
951 
952 			{IP source address, IP destination address, IP source
953 			port, IP destination port, L4 protocol}  in case of
954 			non-IPSec.
955 
956 			In case of IPSec - Toeplitz hash of 4-tuple
957 
958 			{IP source address, IP destination address, SPI, L4
959 			protocol}
960 
961 
962 
963 			The relevant Toeplitz key registers are provided in
964 			RxOLE's instance of common parser module. These registers
965 			are separate from the Toeplitz keys used by ASE/FSE modules
966 			inside RxOLE.The actual value will be passed on from common
967 			parser module to RxOLE in one of the WHO_* TLVs.
968 
969 			<legal all>
970 */
971 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET                      0x00000010
972 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB                         0
973 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK                        0xffffffff
974 
975 /* Description		RX_MSDU_START_5_USER_RSSI
976 
977 			RSSI for this user
978 
979 			<legal all>
980 */
981 #define RX_MSDU_START_5_USER_RSSI_OFFSET                             0x00000014
982 #define RX_MSDU_START_5_USER_RSSI_LSB                                0
983 #define RX_MSDU_START_5_USER_RSSI_MASK                               0x000000ff
984 
985 /* Description		RX_MSDU_START_5_PKT_TYPE
986 
987 			Packet type:
988 
989 			<enum 0 dot11a>802.11a PPDU type
990 
991 			<enum 1 dot11b>802.11b PPDU type
992 
993 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
994 
995 			<enum 3 dot11ac>802.11ac PPDU type
996 
997 			<enum 4 dot11ax>802.11ax PPDU type
998 
999 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
1000 */
1001 #define RX_MSDU_START_5_PKT_TYPE_OFFSET                              0x00000014
1002 #define RX_MSDU_START_5_PKT_TYPE_LSB                                 8
1003 #define RX_MSDU_START_5_PKT_TYPE_MASK                                0x00000f00
1004 
1005 /* Description		RX_MSDU_START_5_STBC
1006 
1007 			When set, use STBC transmission rates
1008 */
1009 #define RX_MSDU_START_5_STBC_OFFSET                                  0x00000014
1010 #define RX_MSDU_START_5_STBC_LSB                                     12
1011 #define RX_MSDU_START_5_STBC_MASK                                    0x00001000
1012 
1013 /* Description		RX_MSDU_START_5_SGI
1014 
1015 			Field only valid when pkt type is HT, VHT or HE.
1016 
1017 
1018 
1019 			<enum 0     0_8_us_sgi > Legacy normal GI. Can also be
1020 			used for HE
1021 
1022 			<enum 1     0_4_us_sgi > Legacy short GI. Can also be
1023 			used for HE
1024 
1025 			<enum 2     1_6_us_sgi > HE related GI
1026 
1027 			<enum 3     3_2_us_sgi > HE related GI
1028 
1029 			<legal 0 - 3>
1030 */
1031 #define RX_MSDU_START_5_SGI_OFFSET                                   0x00000014
1032 #define RX_MSDU_START_5_SGI_LSB                                      13
1033 #define RX_MSDU_START_5_SGI_MASK                                     0x00006000
1034 
1035 /* Description		RX_MSDU_START_5_RATE_MCS
1036 
1037 			For details, refer to  MCS_TYPE description
1038 
1039 			Note: This is rate in case of 11a/11b
1040 
1041 
1042 
1043 			<legal all>
1044 */
1045 #define RX_MSDU_START_5_RATE_MCS_OFFSET                              0x00000014
1046 #define RX_MSDU_START_5_RATE_MCS_LSB                                 15
1047 #define RX_MSDU_START_5_RATE_MCS_MASK                                0x00078000
1048 
1049 /* Description		RX_MSDU_START_5_RECEIVE_BANDWIDTH
1050 
1051 			Full receive Bandwidth
1052 
1053 
1054 
1055 			<enum 0     full_rx_bw_20_mhz>
1056 
1057 			<enum 1      full_rx_bw_40_mhz>
1058 
1059 			<enum 2      full_rx_bw_80_mhz>
1060 
1061 			<enum 3      full_rx_bw_160_mhz>
1062 
1063 
1064 
1065 			<legal 0-3>
1066 */
1067 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET                     0x00000014
1068 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB                        19
1069 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK                       0x00180000
1070 
1071 /* Description		RX_MSDU_START_5_RECEPTION_TYPE
1072 
1073 			Indicates what type of reception this is.
1074 
1075 			<enum 0     reception_type_SU > Basic SU reception (not
1076 			part of OFDMA or MIMO)
1077 
1078 			<enum 1     reception_type_MU_MIMO > This is related to
1079 			DL type of reception
1080 
1081 			<enum 2     reception_type_MU_OFDMA >  This is related
1082 			to DL type of reception
1083 
1084 			<enum 3     reception_type_MU_OFDMA_MIMO >  This is
1085 			related to DL type of reception
1086 
1087 			<enum 4     reception_type_UL_MU_MIMO > This is related
1088 			to UL type of reception
1089 
1090 			<enum 5     reception_type_UL_MU_OFDMA >  This is
1091 			related to UL type of reception
1092 
1093 			<enum 6     reception_type_UL_MU_OFDMA_MIMO >  This is
1094 			related to UL type of reception
1095 
1096 
1097 
1098 			<legal 0-6>
1099 */
1100 #define RX_MSDU_START_5_RECEPTION_TYPE_OFFSET                        0x00000014
1101 #define RX_MSDU_START_5_RECEPTION_TYPE_LSB                           21
1102 #define RX_MSDU_START_5_RECEPTION_TYPE_MASK                          0x00e00000
1103 
1104 /* Description		RX_MSDU_START_5_MIMO_SS_BITMAP
1105 
1106 			Field only valid when Reception_type for the MPDU from
1107 			this STA is some form of MIMO reception
1108 
1109 
1110 
1111 			Bitmap, with each bit indicating if the related spatial
1112 			stream is used for this STA
1113 
1114 			LSB related to SS 0
1115 
1116 
1117 
1118 			0: spatial stream not used for this reception
1119 
1120 			1: spatial stream used for this reception
1121 
1122 
1123 
1124 			<legal all>
1125 */
1126 #define RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET                        0x00000014
1127 #define RX_MSDU_START_5_MIMO_SS_BITMAP_LSB                           24
1128 #define RX_MSDU_START_5_MIMO_SS_BITMAP_MASK                          0xff000000
1129 
1130 /* Description		RX_MSDU_START_6_PPDU_START_TIMESTAMP
1131 
1132 			Timestamp that indicates when the PPDU that contained
1133 			this MPDU started on the medium.
1134 
1135 			<legal all>
1136 */
1137 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_OFFSET                  0x00000018
1138 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_LSB                     0
1139 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_MASK                    0xffffffff
1140 
1141 /* Description		RX_MSDU_START_7_SW_PHY_META_DATA
1142 
1143 			SW programmed Meta data provided by the PHY.
1144 
1145 
1146 
1147 			Can be used for SW to indicate the channel the device is
1148 			on.
1149 
1150 			<legal all>
1151 */
1152 #define RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET                      0x0000001c
1153 #define RX_MSDU_START_7_SW_PHY_META_DATA_LSB                         0
1154 #define RX_MSDU_START_7_SW_PHY_META_DATA_MASK                        0xffffffff
1155 
1156 /* Description		RX_MSDU_START_8_VLAN_CTAG_CI
1157 
1158 			2 bytes of C-VLAN Tag Control Information from
1159 			WHO_L2_LLC
1160 */
1161 #define RX_MSDU_START_8_VLAN_CTAG_CI_OFFSET                          0x00000020
1162 #define RX_MSDU_START_8_VLAN_CTAG_CI_LSB                             0
1163 #define RX_MSDU_START_8_VLAN_CTAG_CI_MASK                            0x0000ffff
1164 
1165 /* Description		RX_MSDU_START_8_VLAN_STAG_CI
1166 
1167 			2 bytes of S-VLAN Tag Control Information from
1168 			WHO_L2_LLC in case of double VLAN
1169 */
1170 #define RX_MSDU_START_8_VLAN_STAG_CI_OFFSET                          0x00000020
1171 #define RX_MSDU_START_8_VLAN_STAG_CI_LSB                             16
1172 #define RX_MSDU_START_8_VLAN_STAG_CI_MASK                            0xffff0000
1173 
1174 
1175 #endif // _RX_MSDU_START_H_
1176