1 /* 2 * Copyright (c) 2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_PPDU_END_USER_STATS_H_ 25 #define _RX_PPDU_END_USER_STATS_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "rx_rxpcu_classification_overview.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 35 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], ofdma_info_valid[20], dl_ofdma_ru_start_index[27:21], reserved_1a[31:28] 36 // 2 dl_ofdma_ru_width[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 37 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], ht_control_info_null_valid[13], reserved_3a[15:14], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 38 // 4 ast_index[15:0], frame_control_field[31:16] 39 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 40 // 6 ht_control_field[31:0] 41 // 7 fcs_ok_bitmap_31_0[31:0] 42 // 8 fcs_ok_bitmap_63_32[31:0] 43 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 44 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 45 // 11 sw_response_reference_ptr[31:0] 46 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 47 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 48 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 49 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 50 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 51 // 17 mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25] 52 // 18 ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25] 53 // 19 mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25] 54 // 20 non_consecutive_delimiter_err[15:0], reserved_20a[31:16] 55 // 21 ht_control_null_field[31:0] 56 // 22 sw_response_reference_ptr_ext[31:0] 57 // 58 // ################ END SUMMARY ################# 59 60 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 23 61 62 struct rx_ppdu_end_user_stats { 63 struct rx_rxpcu_classification_overview rxpcu_classification_details; 64 uint32_t sta_full_aid : 13, //[12:0] 65 mcs : 4, //[16:13] 66 nss : 3, //[19:17] 67 ofdma_info_valid : 1, //[20] 68 dl_ofdma_ru_start_index : 7, //[27:21] 69 reserved_1a : 4; //[31:28] 70 uint32_t dl_ofdma_ru_width : 7, //[6:0] 71 reserved_2a : 1, //[7] 72 user_receive_quality : 8, //[15:8] 73 mpdu_cnt_fcs_err : 10, //[25:16] 74 wbm2rxdma_buf_source_used : 1, //[26] 75 fw2rxdma_buf_source_used : 1, //[27] 76 sw2rxdma_buf_source_used : 1, //[28] 77 reserved_2b : 3; //[31:29] 78 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 79 frame_control_info_valid : 1, //[9] 80 qos_control_info_valid : 1, //[10] 81 ht_control_info_valid : 1, //[11] 82 data_sequence_control_info_valid: 1, //[12] 83 ht_control_info_null_valid : 1, //[13] 84 reserved_3a : 2, //[15:14] 85 rxdma2reo_ring_used : 1, //[16] 86 rxdma2fw_ring_used : 1, //[17] 87 rxdma2sw_ring_used : 1, //[18] 88 rxdma_release_ring_used : 1, //[19] 89 ht_control_field_pkt_type : 4, //[23:20] 90 reserved_3b : 8; //[31:24] 91 uint32_t ast_index : 16, //[15:0] 92 frame_control_field : 16; //[31:16] 93 uint32_t first_data_seq_ctrl : 16, //[15:0] 94 qos_control_field : 16; //[31:16] 95 uint32_t ht_control_field : 32; //[31:0] 96 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 97 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 98 uint32_t udp_msdu_count : 16, //[15:0] 99 tcp_msdu_count : 16; //[31:16] 100 uint32_t other_msdu_count : 16, //[15:0] 101 tcp_ack_msdu_count : 16; //[31:16] 102 uint32_t sw_response_reference_ptr : 32; //[31:0] 103 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 104 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 105 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 106 qosctrl_15_8_tid1 : 8, //[15:8] 107 qosctrl_15_8_tid2 : 8, //[23:16] 108 qosctrl_15_8_tid3 : 8; //[31:24] 109 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 110 qosctrl_15_8_tid5 : 8, //[15:8] 111 qosctrl_15_8_tid6 : 8, //[23:16] 112 qosctrl_15_8_tid7 : 8; //[31:24] 113 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 114 qosctrl_15_8_tid9 : 8, //[15:8] 115 qosctrl_15_8_tid10 : 8, //[23:16] 116 qosctrl_15_8_tid11 : 8; //[31:24] 117 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 118 qosctrl_15_8_tid13 : 8, //[15:8] 119 qosctrl_15_8_tid14 : 8, //[23:16] 120 qosctrl_15_8_tid15 : 8; //[31:24] 121 uint32_t mpdu_ok_byte_count : 25, //[24:0] 122 ampdu_delim_ok_count_6_0 : 7; //[31:25] 123 uint32_t ampdu_delim_err_count : 25, //[24:0] 124 ampdu_delim_ok_count_13_7 : 7; //[31:25] 125 uint32_t mpdu_err_byte_count : 25, //[24:0] 126 ampdu_delim_ok_count_20_14 : 7; //[31:25] 127 uint32_t non_consecutive_delimiter_err : 16, //[15:0] 128 reserved_20a : 16; //[31:16] 129 uint32_t ht_control_null_field : 32; //[31:0] 130 uint32_t sw_response_reference_ptr_ext : 32; //[31:0] 131 }; 132 133 /* 134 135 struct rx_rxpcu_classification_overview rxpcu_classification_details 136 137 Details related to what RXPCU classification types of 138 MPDUs have been received 139 140 sta_full_aid 141 142 Consumer: FW 143 144 Producer: RXPCU 145 146 147 148 The full AID of this station. 149 150 151 152 <legal all> 153 154 mcs 155 156 MCS of the received frame 157 158 159 160 For details, refer to MCS_TYPE description 161 162 Note: This is rate in case of 11a/11b 163 164 165 166 <legal all> 167 168 nss 169 170 Number of spatial streams. 171 172 173 174 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 175 176 177 178 <enum 0 1_spatial_stream>Single spatial stream 179 180 <enum 1 2_spatial_streams>2 spatial streams 181 182 <enum 2 3_spatial_streams>3 spatial streams 183 184 <enum 3 4_spatial_streams>4 spatial streams 185 186 <enum 4 5_spatial_streams>5 spatial streams 187 188 <enum 5 6_spatial_streams>6 spatial streams 189 190 <enum 6 7_spatial_streams>7 spatial streams 191 192 <enum 7 8_spatial_streams>8 spatial streams 193 194 ofdma_info_valid 195 196 When set, ofdma RU related info in the following fields 197 is valid 198 199 <legal all> 200 201 dl_ofdma_ru_start_index 202 203 Field only valid when Ofdma_info_valid is set 204 205 206 207 RU index number to which User is assigned 208 209 RU numbering is over the entire BW, starting from 0 210 211 <legal 0-73> 212 213 reserved_1a 214 215 <legal 0> 216 217 dl_ofdma_ru_width 218 219 The size of the RU for this user. 220 221 In units of 1 (26 tone) RU 222 223 <legal 1-74> 224 225 reserved_2a 226 227 <legal 0> 228 229 user_receive_quality 230 231 DO NOT USE 232 233 234 235 Field not populated by MAC HW 236 237 <legal all> 238 239 mpdu_cnt_fcs_err 240 241 The number of MPDUs received from this STA in this PPDU 242 with FCS errors 243 244 <legal all> 245 246 wbm2rxdma_buf_source_used 247 248 Field filled in by RXDMA 249 250 251 252 When set, RXDMA has used the wbm2rxdma_buf ring as 253 source for at least one of the frames in this PPDU. 254 255 fw2rxdma_buf_source_used 256 257 Field filled in by RXDMA 258 259 260 261 When set, RXDMA has used the fw2rxdma_buf ring as source 262 for at least one of the frames in this PPDU. 263 264 sw2rxdma_buf_source_used 265 266 Field filled in by RXDMA 267 268 269 270 When set, RXDMA has used the sw2rxdma_buf ring as source 271 for at least one of the frames in this PPDU. 272 273 reserved_2b 274 275 <legal 0> 276 277 mpdu_cnt_fcs_ok 278 279 The number of MPDUs received from this STA in this PPDU 280 with correct FCS 281 282 <legal all> 283 284 frame_control_info_valid 285 286 When set, the frame_control_info field contains valid 287 information 288 289 <legal all> 290 291 qos_control_info_valid 292 293 When set, the QoS_control_info field contains valid 294 information 295 296 <legal all> 297 298 ht_control_info_valid 299 300 When set, the HT_control_field contains valid 301 information 302 303 <legal all> 304 305 data_sequence_control_info_valid 306 307 When set, the First_data_seq_ctrl field contains valid 308 information 309 310 <legal all> 311 312 ht_control_info_null_valid 313 314 When set, the HT_control_NULL_field contains valid 315 information 316 317 <legal all> 318 319 reserved_3a 320 321 <legal 0> 322 323 rxdma2reo_ring_used 324 325 Field filled in by RXDMA 326 327 328 329 Set when at least one frame during this PPDU got pushed 330 to this ring by RXDMA 331 332 rxdma2fw_ring_used 333 334 Field filled in by RXDMA 335 336 337 338 Set when at least one frame during this PPDU got pushed 339 to this ring by RXDMA 340 341 rxdma2sw_ring_used 342 343 Field filled in by RXDMA 344 345 346 347 Set when at least one frame during this PPDU got pushed 348 to this ring by RXDMA 349 350 rxdma_release_ring_used 351 352 Field filled in by RXDMA 353 354 355 356 Set when at least one frame during this PPDU got pushed 357 to this ring by RXDMA 358 359 ht_control_field_pkt_type 360 361 Field only valid when HT_control_info_valid or 362 HT_control_info_NULL_valid is set. 363 364 365 366 Indicates what the PHY receive type was for receiving 367 this frame. Can help determine if the HT_CONTROL field shall 368 be interpreted as HT/VHT or HE. 369 370 371 372 NOTE: later on in the 11ax IEEE spec a bit within the HT 373 control field was introduced that explicitly indicated how 374 to interpret the HT control field.... As HT, VHT, or HE. 375 376 377 378 <enum 0 dot11a>802.11a PPDU type 379 380 <enum 1 dot11b>802.11b PPDU type 381 382 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 383 384 <enum 3 dot11ac>802.11ac PPDU type 385 386 <enum 4 dot11ax>802.11ax PPDU type 387 388 <enum 5 dot11ba>802.11ba (WUR) PPDU type 389 390 reserved_3b 391 392 <legal 0> 393 394 ast_index 395 396 This field indicates the index of the AST entry 397 corresponding to this MPDU. It is provided by the GSE module 398 instantiated in RXPCU. 399 400 A value of 0xFFFF indicates an invalid AST index, 401 meaning that No AST entry was found or NO AST search was 402 performed 403 404 <legal all> 405 406 frame_control_field 407 408 Field only valid when Frame_control_info_valid is set. 409 410 411 412 Last successfully received Frame_control field of data 413 frame (excluding Data NULL/ QoS Null) for this user 414 415 Mainly used to track the PM state of the transmitted 416 device 417 418 419 420 NOTE: only data frame info is needed, as control and 421 management frames are already routed to the FW. 422 423 <legal all> 424 425 first_data_seq_ctrl 426 427 Field only valid when Data_sequence_control_info_valid 428 is set. 429 430 431 432 Sequence control field of the first data frame 433 (excluding Data NULL or QoS Data null) received for this 434 user with correct FCS 435 436 437 438 NOTE: only data frame info is needed, as control and 439 management frames are already routed to the FW. 440 441 <legal all> 442 443 qos_control_field 444 445 Field only valid when QoS_control_info_valid is set. 446 447 448 449 Last successfully received QoS_control field of data 450 frame (excluding Data NULL/ QoS Null) for this user 451 452 453 454 Note that in case of multi TID, this field can only 455 reflect the last properly received MPDU, and thus can not 456 indicate all potentially different TIDs that had been 457 received earlier. 458 459 460 461 There are however per TID fields, that will contain 462 among other things all buffer status info: See 463 464 QoSCtrl_15_8_tid??? 465 466 <legal all> 467 468 ht_control_field 469 470 Field only valid when HT_control_info_valid is set. 471 472 473 474 Last successfully received 475 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 476 excluding QoS Null frames for this user. 477 478 479 480 NOTE: HT control fields from QoS Null frames are 481 captured in field HT_control_NULL_field 482 483 <legal all> 484 485 fcs_ok_bitmap_31_0 486 487 Bitmap indicates in order of received MPDUs, which MPDUs 488 had an passing FCS or had an error. 489 490 1: FCS OK 491 492 0: FCS error 493 494 <legal all> 495 496 fcs_ok_bitmap_63_32 497 498 Bitmap indicates in order of received MPDUs, which MPDUs 499 had an passing FCS or had an error. 500 501 1: FCS OK 502 503 0: FCS error 504 505 506 507 NOTE: for users 0, 1, 2 and 3, additional bitmap info 508 (up to 256 bitmap window) is provided in 509 RX_PPDU_END_USER_STATS_EXT TLV 510 511 <legal all> 512 513 udp_msdu_count 514 515 Field filled in by RX OLE 516 517 Set to 0 by RXPCU 518 519 520 521 The number of MSDUs that are part of MPDUs without FCS 522 error, that contain UDP frames. 523 524 <legal all> 525 526 tcp_msdu_count 527 528 Field filled in by RX OLE 529 530 Set to 0 by RXPCU 531 532 533 534 The number of MSDUs that are part of MPDUs without FCS 535 error, that contain TCP frames. 536 537 538 539 (Note: This does NOT include TCP-ACK) 540 541 <legal all> 542 543 other_msdu_count 544 545 Field filled in by RX OLE 546 547 Set to 0 by RXPCU 548 549 550 551 The number of MSDUs that are part of MPDUs without FCS 552 error, that contain neither UDP or TCP frames. 553 554 555 556 Includes Management and control frames. 557 558 559 560 <legal all> 561 562 tcp_ack_msdu_count 563 564 Field filled in by RX OLE 565 566 Set to 0 by RXPCU 567 568 569 570 The number of MSDUs that are part of MPDUs without FCS 571 error, that contain TCP ack frames. 572 573 <legal all> 574 575 sw_response_reference_ptr 576 577 Pointer that SW uses to refer back to an expected 578 response reception. Used for Rate adaptation purposes. 579 580 When a reception occurs that is not tied to an expected 581 response, this field is set to 0x0. 582 583 584 585 Note: further on in this TLV there is also the field: 586 Sw_response_reference_ptr_ext. 587 588 <legal all> 589 590 received_qos_data_tid_bitmap 591 592 Whenever a frame is received that contains a QoS control 593 field (that includes QoS Data and/or QoS Null), the bit in 594 this field that corresponds to the received TID shall be 595 set. 596 597 ...Bitmap[0] = TID0 598 599 ...Bitmap[1] = TID1 600 601 Etc. 602 603 <legal all> 604 605 received_qos_data_tid_eosp_bitmap 606 607 Field initialized to 0 608 609 For every QoS Data frame that is correctly received, the 610 EOSP bit of that frame is copied over into the corresponding 611 TID related field. 612 613 Note that this implies that the bits here represent the 614 EOSP bit status for each TID of the last MPDU received for 615 that TID. 616 617 618 619 received TID shall be set. 620 621 ...eosp_bitmap[0] = eosp of TID0 622 623 ...eosp_bitmap[1] = eosp of TID1 624 625 Etc. 626 627 <legal all> 628 629 qosctrl_15_8_tid0 630 631 Field only valid when Received_qos_data_tid_bitmap[0] is 632 set 633 634 635 636 QoS control field bits 15-8 of the last properly 637 received MPDU with a QoS control field embedded, with TID 638 == 0 639 640 qosctrl_15_8_tid1 641 642 Field only valid when Received_qos_data_tid_bitmap[1] is 643 set 644 645 646 647 QoS control field bits 15-8 of the last properly 648 received MPDU with a QoS control field embedded, with TID 649 == 1 650 651 qosctrl_15_8_tid2 652 653 Field only valid when Received_qos_data_tid_bitmap[2] is 654 set 655 656 657 658 QoS control field bits 15-8 of the last properly 659 received MPDU with a QoS control field embedded, with TID 660 == 2 661 662 qosctrl_15_8_tid3 663 664 Field only valid when Received_qos_data_tid_bitmap[3] is 665 set 666 667 668 669 QoS control field bits 15-8 of the last properly 670 received MPDU with a QoS control field embedded, with TID 671 == 3 672 673 qosctrl_15_8_tid4 674 675 Field only valid when Received_qos_data_tid_bitmap[4] is 676 set 677 678 679 680 QoS control field bits 15-8 of the last properly 681 received MPDU with a QoS control field embedded, with TID 682 == 4 683 684 qosctrl_15_8_tid5 685 686 Field only valid when Received_qos_data_tid_bitmap[5] is 687 set 688 689 690 691 QoS control field bits 15-8 of the last properly 692 received MPDU with a QoS control field embedded, with TID 693 == 5 694 695 qosctrl_15_8_tid6 696 697 Field only valid when Received_qos_data_tid_bitmap[6] is 698 set 699 700 701 702 QoS control field bits 15-8 of the last properly 703 received MPDU with a QoS control field embedded, with TID 704 == 6 705 706 qosctrl_15_8_tid7 707 708 Field only valid when Received_qos_data_tid_bitmap[7] is 709 set 710 711 712 713 QoS control field bits 15-8 of the last properly 714 received MPDU with a QoS control field embedded, with TID 715 == 7 716 717 qosctrl_15_8_tid8 718 719 Field only valid when Received_qos_data_tid_bitmap[8] is 720 set 721 722 723 724 QoS control field bits 15-8 of the last properly 725 received MPDU with a QoS control field embedded, with TID 726 == 8 727 728 qosctrl_15_8_tid9 729 730 Field only valid when Received_qos_data_tid_bitmap[9] is 731 set 732 733 734 735 QoS control field bits 15-8 of the last properly 736 received MPDU with a QoS control field embedded, with TID 737 == 9 738 739 qosctrl_15_8_tid10 740 741 Field only valid when Received_qos_data_tid_bitmap[10] 742 is set 743 744 745 746 QoS control field bits 15-8 of the last properly 747 received MPDU with a QoS control field embedded, with TID 748 == 10 749 750 qosctrl_15_8_tid11 751 752 Field only valid when Received_qos_data_tid_bitmap[11] 753 is set 754 755 756 757 QoS control field bits 15-8 of the last properly 758 received MPDU with a QoS control field embedded, with TID 759 == 11 760 761 qosctrl_15_8_tid12 762 763 Field only valid when Received_qos_data_tid_bitmap[12] 764 is set 765 766 767 768 QoS control field bits 15-8 of the last properly 769 received MPDU with a QoS control field embedded, with TID 770 == 12 771 772 qosctrl_15_8_tid13 773 774 Field only valid when Received_qos_data_tid_bitmap[13] 775 is set 776 777 778 779 QoS control field bits 15-8 of the last properly 780 received MPDU with a QoS control field embedded, with TID 781 == 13 782 783 qosctrl_15_8_tid14 784 785 Field only valid when Received_qos_data_tid_bitmap[14] 786 is set 787 788 789 790 QoS control field bits 15-8 of the last properly 791 received MPDU with a QoS control field embedded, with TID 792 == 14 793 794 qosctrl_15_8_tid15 795 796 Field only valid when Received_qos_data_tid_bitmap[15] 797 is set 798 799 800 801 QoS control field bits 15-8 of the last properly 802 received MPDU with a QoS control field embedded, with TID 803 == 15 804 805 mpdu_ok_byte_count 806 807 The number of bytes received within an MPDU for this 808 user with correct FCS. This includes the FCS field 809 810 811 812 NOTE: 813 814 The sum of the four fields..... 815 816 Mpdu_ok_byte_count + 817 818 mpdu_err_byte_count + 819 820 821 .....is the total number of bytes that were received for 822 this user from the PHY. 823 824 825 826 <legal all> 827 828 ampdu_delim_ok_count_6_0 829 830 Number of AMPDU delimiter received with correct 831 structure 832 833 LSB 7 bits from this counter 834 835 836 837 Note that this is a delimiter count and not byte count. 838 To get to the number of bytes occupied by these delimiters, 839 multiply this number by 4 840 841 842 843 <legal all> 844 845 ampdu_delim_err_count 846 847 The number of MPDU delimiter errors counted for this 848 user. 849 850 851 852 Note that this is a delimiter count and not byte count. 853 To get to the number of bytes occupied by these delimiters, 854 multiply this number by 4 855 856 <legal all> 857 858 ampdu_delim_ok_count_13_7 859 860 Number of AMPDU delimiters received with correct 861 structure 862 863 Bits 13-7 from this counter 864 865 866 867 Note that this is a delimiter count and not byte count. 868 To get to the number of bytes occupied by these delimiters, 869 multiply this number by 4 870 871 <legal all> 872 873 mpdu_err_byte_count 874 875 The number of bytes belonging to MPDUs with an FCS 876 error. This includes the FCS field. 877 878 879 880 <legal all> 881 882 ampdu_delim_ok_count_20_14 883 884 Number of AMPDU delimiters received with correct 885 structure 886 887 Bits 20-14 from this counter 888 889 890 891 Note that this is a delimiter count and not byte count. 892 To get to the number of bytes occupied by these delimiters, 893 multiply this number by 4 894 895 896 897 <legal all> 898 899 non_consecutive_delimiter_err 900 901 The number of times an MPDU delimiter error is detected 902 that is not immediately preceded by another MPDU delimiter 903 also with FCS error. 904 905 906 907 The counter saturates at 0xFFFF 908 909 910 911 <legal all> 912 913 reserved_20a 914 915 <legal 0> 916 917 ht_control_null_field 918 919 920 921 922 Last successfully received 923 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 924 for this user. 925 926 <legal all> 927 928 sw_response_reference_ptr_ext 929 930 Extended Pointer info that SW uses to refer back to an 931 expected response transmission. Used for Rate adaptation 932 purposes. 933 934 When a reception occurs that is not tied to an expected 935 response, this field is set to 0x0. 936 937 938 939 Note: earlier on in this TLV there is also the field: 940 Sw_response_reference_ptr. 941 942 <legal all> 943 */ 944 945 946 /* EXTERNAL REFERENCE : struct rx_rxpcu_classification_overview rxpcu_classification_details */ 947 948 949 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS 950 951 When set, at least one Filter Pass MPDU has been 952 received. FCS might or might not have been passing. 953 954 955 956 For MU UL, in TLVs RX_PPDU_END and 957 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 958 users. 959 960 <legal all> 961 */ 962 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_OFFSET 0x00000000 963 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_LSB 0 964 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MASK 0x00000001 965 966 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK 967 968 When set, at least one Filter Pass MPDU has been 969 received that has a correct FCS. 970 971 972 973 For MU UL, in TLVs RX_PPDU_END and 974 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 975 users. 976 977 978 979 <legal all> 980 */ 981 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 982 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_LSB 1 983 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 984 985 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS 986 987 When set, at least one Monitor Direct MPDU has been 988 received. FCS might or might not have been passing 989 990 991 992 For MU UL, in TLVs RX_PPDU_END and 993 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 994 users. 995 996 <legal all> 997 */ 998 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 999 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_LSB 2 1000 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MASK 0x00000004 1001 1002 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK 1003 1004 When set, at least one Monitor Direct MPDU has been 1005 received that has a correct FCS. 1006 1007 1008 1009 For MU UL, in TLVs RX_PPDU_END and 1010 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1011 users. 1012 1013 1014 1015 <legal all> 1016 */ 1017 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 1018 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 1019 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 1020 1021 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS 1022 1023 When set, at least one Monitor Direct MPDU has been 1024 received. FCS might or might not have been passing. 1025 1026 1027 1028 For MU UL, in TLVs RX_PPDU_END and 1029 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1030 users. 1031 1032 <legal all> 1033 */ 1034 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 1035 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_LSB 4 1036 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MASK 0x00000010 1037 1038 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK 1039 1040 When set, at least one Monitor Direct MPDU has been 1041 received that has a correct FCS. 1042 1043 1044 1045 For MU UL, in TLVs RX_PPDU_END and 1046 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1047 users. 1048 1049 <legal all> 1050 */ 1051 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 1052 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 1053 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 1054 1055 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED 1056 1057 When set, PPDU reception was aborted by the PHY 1058 1059 <legal all> 1060 */ 1061 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000 1062 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_LSB 6 1063 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MASK 0x00000040 1064 1065 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0 1066 1067 <legal 0> 1068 */ 1069 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_OFFSET 0x00000000 1070 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_LSB 7 1071 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MASK 0x0000ff80 1072 1073 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID 1074 1075 A ppdu counter value that PHY increments for every PPDU 1076 received. The counter value wraps around 1077 1078 <legal all> 1079 */ 1080 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_OFFSET 0x00000000 1081 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_LSB 16 1082 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MASK 0xffff0000 1083 1084 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 1085 1086 Consumer: FW 1087 1088 Producer: RXPCU 1089 1090 1091 1092 The full AID of this station. 1093 1094 1095 1096 <legal all> 1097 */ 1098 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 1099 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 1100 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 1101 1102 /* Description RX_PPDU_END_USER_STATS_1_MCS 1103 1104 MCS of the received frame 1105 1106 1107 1108 For details, refer to MCS_TYPE description 1109 1110 Note: This is rate in case of 11a/11b 1111 1112 1113 1114 <legal all> 1115 */ 1116 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 1117 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 1118 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 1119 1120 /* Description RX_PPDU_END_USER_STATS_1_NSS 1121 1122 Number of spatial streams. 1123 1124 1125 1126 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 1127 1128 1129 1130 <enum 0 1_spatial_stream>Single spatial stream 1131 1132 <enum 1 2_spatial_streams>2 spatial streams 1133 1134 <enum 2 3_spatial_streams>3 spatial streams 1135 1136 <enum 3 4_spatial_streams>4 spatial streams 1137 1138 <enum 4 5_spatial_streams>5 spatial streams 1139 1140 <enum 5 6_spatial_streams>6 spatial streams 1141 1142 <enum 6 7_spatial_streams>7 spatial streams 1143 1144 <enum 7 8_spatial_streams>8 spatial streams 1145 */ 1146 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 1147 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 1148 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 1149 1150 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID 1151 1152 When set, ofdma RU related info in the following fields 1153 is valid 1154 1155 <legal all> 1156 */ 1157 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_OFFSET 0x00000004 1158 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_LSB 20 1159 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_MASK 0x00100000 1160 1161 /* Description RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX 1162 1163 Field only valid when Ofdma_info_valid is set 1164 1165 1166 1167 RU index number to which User is assigned 1168 1169 RU numbering is over the entire BW, starting from 0 1170 1171 <legal 0-73> 1172 */ 1173 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_OFFSET 0x00000004 1174 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_LSB 21 1175 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_MASK 0x0fe00000 1176 1177 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 1178 1179 <legal 0> 1180 */ 1181 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 1182 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 1183 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 1184 1185 /* Description RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH 1186 1187 The size of the RU for this user. 1188 1189 In units of 1 (26 tone) RU 1190 1191 <legal 1-74> 1192 */ 1193 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_OFFSET 0x00000008 1194 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_LSB 0 1195 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_MASK 0x0000007f 1196 1197 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 1198 1199 <legal 0> 1200 */ 1201 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 1202 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 1203 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 1204 1205 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 1206 1207 DO NOT USE 1208 1209 1210 1211 Field not populated by MAC HW 1212 1213 <legal all> 1214 */ 1215 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 1216 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 1217 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 1218 1219 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 1220 1221 The number of MPDUs received from this STA in this PPDU 1222 with FCS errors 1223 1224 <legal all> 1225 */ 1226 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 1227 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 1228 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 1229 1230 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 1231 1232 Field filled in by RXDMA 1233 1234 1235 1236 When set, RXDMA has used the wbm2rxdma_buf ring as 1237 source for at least one of the frames in this PPDU. 1238 */ 1239 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1240 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 1241 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 1242 1243 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 1244 1245 Field filled in by RXDMA 1246 1247 1248 1249 When set, RXDMA has used the fw2rxdma_buf ring as source 1250 for at least one of the frames in this PPDU. 1251 */ 1252 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1253 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 1254 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 1255 1256 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 1257 1258 Field filled in by RXDMA 1259 1260 1261 1262 When set, RXDMA has used the sw2rxdma_buf ring as source 1263 for at least one of the frames in this PPDU. 1264 */ 1265 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1266 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 1267 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 1268 1269 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 1270 1271 <legal 0> 1272 */ 1273 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 1274 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 1275 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 1276 1277 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 1278 1279 The number of MPDUs received from this STA in this PPDU 1280 with correct FCS 1281 1282 <legal all> 1283 */ 1284 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 1285 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 1286 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 1287 1288 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 1289 1290 When set, the frame_control_info field contains valid 1291 information 1292 1293 <legal all> 1294 */ 1295 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 1296 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 1297 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 1298 1299 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 1300 1301 When set, the QoS_control_info field contains valid 1302 information 1303 1304 <legal all> 1305 */ 1306 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 1307 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 1308 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 1309 1310 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 1311 1312 When set, the HT_control_field contains valid 1313 information 1314 1315 <legal all> 1316 */ 1317 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 1318 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 1319 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 1320 1321 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 1322 1323 When set, the First_data_seq_ctrl field contains valid 1324 information 1325 1326 <legal all> 1327 */ 1328 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 1329 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 1330 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 1331 1332 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID 1333 1334 When set, the HT_control_NULL_field contains valid 1335 information 1336 1337 <legal all> 1338 */ 1339 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_OFFSET 0x0000000c 1340 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_LSB 13 1341 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_MASK 0x00002000 1342 1343 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 1344 1345 <legal 0> 1346 */ 1347 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 1348 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 14 1349 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000c000 1350 1351 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 1352 1353 Field filled in by RXDMA 1354 1355 1356 1357 Set when at least one frame during this PPDU got pushed 1358 to this ring by RXDMA 1359 */ 1360 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 1361 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 1362 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 1363 1364 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 1365 1366 Field filled in by RXDMA 1367 1368 1369 1370 Set when at least one frame during this PPDU got pushed 1371 to this ring by RXDMA 1372 */ 1373 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1374 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1375 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1376 1377 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1378 1379 Field filled in by RXDMA 1380 1381 1382 1383 Set when at least one frame during this PPDU got pushed 1384 to this ring by RXDMA 1385 */ 1386 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1387 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1388 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1389 1390 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1391 1392 Field filled in by RXDMA 1393 1394 1395 1396 Set when at least one frame during this PPDU got pushed 1397 to this ring by RXDMA 1398 */ 1399 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1400 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1401 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1402 1403 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1404 1405 Field only valid when HT_control_info_valid or 1406 HT_control_info_NULL_valid is set. 1407 1408 1409 1410 Indicates what the PHY receive type was for receiving 1411 this frame. Can help determine if the HT_CONTROL field shall 1412 be interpreted as HT/VHT or HE. 1413 1414 1415 1416 NOTE: later on in the 11ax IEEE spec a bit within the HT 1417 control field was introduced that explicitly indicated how 1418 to interpret the HT control field.... As HT, VHT, or HE. 1419 1420 1421 1422 <enum 0 dot11a>802.11a PPDU type 1423 1424 <enum 1 dot11b>802.11b PPDU type 1425 1426 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1427 1428 <enum 3 dot11ac>802.11ac PPDU type 1429 1430 <enum 4 dot11ax>802.11ax PPDU type 1431 1432 <enum 5 dot11ba>802.11ba (WUR) PPDU type 1433 */ 1434 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1435 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1436 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1437 1438 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1439 1440 <legal 0> 1441 */ 1442 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1443 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1444 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1445 1446 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1447 1448 This field indicates the index of the AST entry 1449 corresponding to this MPDU. It is provided by the GSE module 1450 instantiated in RXPCU. 1451 1452 A value of 0xFFFF indicates an invalid AST index, 1453 meaning that No AST entry was found or NO AST search was 1454 performed 1455 1456 <legal all> 1457 */ 1458 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1459 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1460 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1461 1462 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1463 1464 Field only valid when Frame_control_info_valid is set. 1465 1466 1467 1468 Last successfully received Frame_control field of data 1469 frame (excluding Data NULL/ QoS Null) for this user 1470 1471 Mainly used to track the PM state of the transmitted 1472 device 1473 1474 1475 1476 NOTE: only data frame info is needed, as control and 1477 management frames are already routed to the FW. 1478 1479 <legal all> 1480 */ 1481 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1482 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1483 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1484 1485 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1486 1487 Field only valid when Data_sequence_control_info_valid 1488 is set. 1489 1490 1491 1492 Sequence control field of the first data frame 1493 (excluding Data NULL or QoS Data null) received for this 1494 user with correct FCS 1495 1496 1497 1498 NOTE: only data frame info is needed, as control and 1499 management frames are already routed to the FW. 1500 1501 <legal all> 1502 */ 1503 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1504 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1505 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1506 1507 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1508 1509 Field only valid when QoS_control_info_valid is set. 1510 1511 1512 1513 Last successfully received QoS_control field of data 1514 frame (excluding Data NULL/ QoS Null) for this user 1515 1516 1517 1518 Note that in case of multi TID, this field can only 1519 reflect the last properly received MPDU, and thus can not 1520 indicate all potentially different TIDs that had been 1521 received earlier. 1522 1523 1524 1525 There are however per TID fields, that will contain 1526 among other things all buffer status info: See 1527 1528 QoSCtrl_15_8_tid??? 1529 1530 <legal all> 1531 */ 1532 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1533 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1534 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1535 1536 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1537 1538 Field only valid when HT_control_info_valid is set. 1539 1540 1541 1542 Last successfully received 1543 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1544 excluding QoS Null frames for this user. 1545 1546 1547 1548 NOTE: HT control fields from QoS Null frames are 1549 captured in field HT_control_NULL_field 1550 1551 <legal all> 1552 */ 1553 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1554 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1555 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1556 1557 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1558 1559 Bitmap indicates in order of received MPDUs, which MPDUs 1560 had an passing FCS or had an error. 1561 1562 1: FCS OK 1563 1564 0: FCS error 1565 1566 <legal all> 1567 */ 1568 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1569 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1570 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1571 1572 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1573 1574 Bitmap indicates in order of received MPDUs, which MPDUs 1575 had an passing FCS or had an error. 1576 1577 1: FCS OK 1578 1579 0: FCS error 1580 1581 1582 1583 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1584 (up to 256 bitmap window) is provided in 1585 RX_PPDU_END_USER_STATS_EXT TLV 1586 1587 <legal all> 1588 */ 1589 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1590 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1591 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1592 1593 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1594 1595 Field filled in by RX OLE 1596 1597 Set to 0 by RXPCU 1598 1599 1600 1601 The number of MSDUs that are part of MPDUs without FCS 1602 error, that contain UDP frames. 1603 1604 <legal all> 1605 */ 1606 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1607 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1608 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1609 1610 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1611 1612 Field filled in by RX OLE 1613 1614 Set to 0 by RXPCU 1615 1616 1617 1618 The number of MSDUs that are part of MPDUs without FCS 1619 error, that contain TCP frames. 1620 1621 1622 1623 (Note: This does NOT include TCP-ACK) 1624 1625 <legal all> 1626 */ 1627 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1628 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1629 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1630 1631 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1632 1633 Field filled in by RX OLE 1634 1635 Set to 0 by RXPCU 1636 1637 1638 1639 The number of MSDUs that are part of MPDUs without FCS 1640 error, that contain neither UDP or TCP frames. 1641 1642 1643 1644 Includes Management and control frames. 1645 1646 1647 1648 <legal all> 1649 */ 1650 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1651 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1652 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1653 1654 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1655 1656 Field filled in by RX OLE 1657 1658 Set to 0 by RXPCU 1659 1660 1661 1662 The number of MSDUs that are part of MPDUs without FCS 1663 error, that contain TCP ack frames. 1664 1665 <legal all> 1666 */ 1667 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1668 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1669 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1670 1671 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1672 1673 Pointer that SW uses to refer back to an expected 1674 response reception. Used for Rate adaptation purposes. 1675 1676 When a reception occurs that is not tied to an expected 1677 response, this field is set to 0x0. 1678 1679 1680 1681 Note: further on in this TLV there is also the field: 1682 Sw_response_reference_ptr_ext. 1683 1684 <legal all> 1685 */ 1686 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1687 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1688 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1689 1690 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1691 1692 Whenever a frame is received that contains a QoS control 1693 field (that includes QoS Data and/or QoS Null), the bit in 1694 this field that corresponds to the received TID shall be 1695 set. 1696 1697 ...Bitmap[0] = TID0 1698 1699 ...Bitmap[1] = TID1 1700 1701 Etc. 1702 1703 <legal all> 1704 */ 1705 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1706 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1707 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1708 1709 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1710 1711 Field initialized to 0 1712 1713 For every QoS Data frame that is correctly received, the 1714 EOSP bit of that frame is copied over into the corresponding 1715 TID related field. 1716 1717 Note that this implies that the bits here represent the 1718 EOSP bit status for each TID of the last MPDU received for 1719 that TID. 1720 1721 1722 1723 received TID shall be set. 1724 1725 ...eosp_bitmap[0] = eosp of TID0 1726 1727 ...eosp_bitmap[1] = eosp of TID1 1728 1729 Etc. 1730 1731 <legal all> 1732 */ 1733 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1734 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1735 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1736 1737 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1738 1739 Field only valid when Received_qos_data_tid_bitmap[0] is 1740 set 1741 1742 1743 1744 QoS control field bits 15-8 of the last properly 1745 received MPDU with a QoS control field embedded, with TID 1746 == 0 1747 */ 1748 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1749 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1750 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1751 1752 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1753 1754 Field only valid when Received_qos_data_tid_bitmap[1] is 1755 set 1756 1757 1758 1759 QoS control field bits 15-8 of the last properly 1760 received MPDU with a QoS control field embedded, with TID 1761 == 1 1762 */ 1763 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1764 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1765 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1766 1767 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1768 1769 Field only valid when Received_qos_data_tid_bitmap[2] is 1770 set 1771 1772 1773 1774 QoS control field bits 15-8 of the last properly 1775 received MPDU with a QoS control field embedded, with TID 1776 == 2 1777 */ 1778 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1779 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1780 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1781 1782 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1783 1784 Field only valid when Received_qos_data_tid_bitmap[3] is 1785 set 1786 1787 1788 1789 QoS control field bits 15-8 of the last properly 1790 received MPDU with a QoS control field embedded, with TID 1791 == 3 1792 */ 1793 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1794 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1795 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1796 1797 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1798 1799 Field only valid when Received_qos_data_tid_bitmap[4] is 1800 set 1801 1802 1803 1804 QoS control field bits 15-8 of the last properly 1805 received MPDU with a QoS control field embedded, with TID 1806 == 4 1807 */ 1808 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1809 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1810 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1811 1812 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1813 1814 Field only valid when Received_qos_data_tid_bitmap[5] is 1815 set 1816 1817 1818 1819 QoS control field bits 15-8 of the last properly 1820 received MPDU with a QoS control field embedded, with TID 1821 == 5 1822 */ 1823 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1824 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1825 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1826 1827 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1828 1829 Field only valid when Received_qos_data_tid_bitmap[6] is 1830 set 1831 1832 1833 1834 QoS control field bits 15-8 of the last properly 1835 received MPDU with a QoS control field embedded, with TID 1836 == 6 1837 */ 1838 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1839 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1840 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1841 1842 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1843 1844 Field only valid when Received_qos_data_tid_bitmap[7] is 1845 set 1846 1847 1848 1849 QoS control field bits 15-8 of the last properly 1850 received MPDU with a QoS control field embedded, with TID 1851 == 7 1852 */ 1853 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1854 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1855 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1856 1857 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1858 1859 Field only valid when Received_qos_data_tid_bitmap[8] is 1860 set 1861 1862 1863 1864 QoS control field bits 15-8 of the last properly 1865 received MPDU with a QoS control field embedded, with TID 1866 == 8 1867 */ 1868 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1869 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1870 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1871 1872 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1873 1874 Field only valid when Received_qos_data_tid_bitmap[9] is 1875 set 1876 1877 1878 1879 QoS control field bits 15-8 of the last properly 1880 received MPDU with a QoS control field embedded, with TID 1881 == 9 1882 */ 1883 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1884 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1885 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1886 1887 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1888 1889 Field only valid when Received_qos_data_tid_bitmap[10] 1890 is set 1891 1892 1893 1894 QoS control field bits 15-8 of the last properly 1895 received MPDU with a QoS control field embedded, with TID 1896 == 10 1897 */ 1898 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1899 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1900 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1901 1902 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1903 1904 Field only valid when Received_qos_data_tid_bitmap[11] 1905 is set 1906 1907 1908 1909 QoS control field bits 15-8 of the last properly 1910 received MPDU with a QoS control field embedded, with TID 1911 == 11 1912 */ 1913 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1914 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1915 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1916 1917 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1918 1919 Field only valid when Received_qos_data_tid_bitmap[12] 1920 is set 1921 1922 1923 1924 QoS control field bits 15-8 of the last properly 1925 received MPDU with a QoS control field embedded, with TID 1926 == 12 1927 */ 1928 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1929 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1930 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1931 1932 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1933 1934 Field only valid when Received_qos_data_tid_bitmap[13] 1935 is set 1936 1937 1938 1939 QoS control field bits 15-8 of the last properly 1940 received MPDU with a QoS control field embedded, with TID 1941 == 13 1942 */ 1943 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1944 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1945 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1946 1947 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1948 1949 Field only valid when Received_qos_data_tid_bitmap[14] 1950 is set 1951 1952 1953 1954 QoS control field bits 15-8 of the last properly 1955 received MPDU with a QoS control field embedded, with TID 1956 == 14 1957 */ 1958 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1959 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1960 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1961 1962 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1963 1964 Field only valid when Received_qos_data_tid_bitmap[15] 1965 is set 1966 1967 1968 1969 QoS control field bits 15-8 of the last properly 1970 received MPDU with a QoS control field embedded, with TID 1971 == 15 1972 */ 1973 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1974 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1975 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1976 1977 /* Description RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT 1978 1979 The number of bytes received within an MPDU for this 1980 user with correct FCS. This includes the FCS field 1981 1982 1983 1984 NOTE: 1985 1986 The sum of the four fields..... 1987 1988 Mpdu_ok_byte_count + 1989 1990 mpdu_err_byte_count + 1991 1992 1993 .....is the total number of bytes that were received for 1994 this user from the PHY. 1995 1996 1997 1998 <legal all> 1999 */ 2000 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET 0x00000044 2001 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB 0 2002 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK 0x01ffffff 2003 2004 /* Description RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0 2005 2006 Number of AMPDU delimiter received with correct 2007 structure 2008 2009 LSB 7 bits from this counter 2010 2011 2012 2013 Note that this is a delimiter count and not byte count. 2014 To get to the number of bytes occupied by these delimiters, 2015 multiply this number by 4 2016 2017 2018 2019 <legal all> 2020 */ 2021 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET 0x00000044 2022 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB 25 2023 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK 0xfe000000 2024 2025 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT 2026 2027 The number of MPDU delimiter errors counted for this 2028 user. 2029 2030 2031 2032 Note that this is a delimiter count and not byte count. 2033 To get to the number of bytes occupied by these delimiters, 2034 multiply this number by 4 2035 2036 <legal all> 2037 */ 2038 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET 0x00000048 2039 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB 0 2040 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK 0x01ffffff 2041 2042 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7 2043 2044 Number of AMPDU delimiters received with correct 2045 structure 2046 2047 Bits 13-7 from this counter 2048 2049 2050 2051 Note that this is a delimiter count and not byte count. 2052 To get to the number of bytes occupied by these delimiters, 2053 multiply this number by 4 2054 2055 <legal all> 2056 */ 2057 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET 0x00000048 2058 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB 25 2059 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK 0xfe000000 2060 2061 /* Description RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT 2062 2063 The number of bytes belonging to MPDUs with an FCS 2064 error. This includes the FCS field. 2065 2066 2067 2068 <legal all> 2069 */ 2070 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET 0x0000004c 2071 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB 0 2072 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK 0x01ffffff 2073 2074 /* Description RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14 2075 2076 Number of AMPDU delimiters received with correct 2077 structure 2078 2079 Bits 20-14 from this counter 2080 2081 2082 2083 Note that this is a delimiter count and not byte count. 2084 To get to the number of bytes occupied by these delimiters, 2085 multiply this number by 4 2086 2087 2088 2089 <legal all> 2090 */ 2091 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET 0x0000004c 2092 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB 25 2093 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK 0xfe000000 2094 2095 /* Description RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR 2096 2097 The number of times an MPDU delimiter error is detected 2098 that is not immediately preceded by another MPDU delimiter 2099 also with FCS error. 2100 2101 2102 2103 The counter saturates at 0xFFFF 2104 2105 2106 2107 <legal all> 2108 */ 2109 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_OFFSET 0x00000050 2110 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_LSB 0 2111 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_MASK 0x0000ffff 2112 2113 /* Description RX_PPDU_END_USER_STATS_20_RESERVED_20A 2114 2115 <legal 0> 2116 */ 2117 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_OFFSET 0x00000050 2118 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_LSB 16 2119 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_MASK 0xffff0000 2120 2121 /* Description RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD 2122 2123 2124 2125 2126 Last successfully received 2127 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 2128 for this user. 2129 2130 <legal all> 2131 */ 2132 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_OFFSET 0x00000054 2133 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_LSB 0 2134 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_MASK 0xffffffff 2135 2136 /* Description RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT 2137 2138 Extended Pointer info that SW uses to refer back to an 2139 expected response transmission. Used for Rate adaptation 2140 purposes. 2141 2142 When a reception occurs that is not tied to an expected 2143 response, this field is set to 0x0. 2144 2145 2146 2147 Note: earlier on in this TLV there is also the field: 2148 Sw_response_reference_ptr. 2149 2150 <legal all> 2151 */ 2152 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_OFFSET 0x00000058 2153 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_LSB 0 2154 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_MASK 0xffffffff 2155 2156 2157 #endif // _RX_PPDU_END_USER_STATS_H_ 2158