xref: /wlan-driver/fw-api/hw/qca6490/v1/rx_rxpcu_classification_overview.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
25 #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], phyrx_abort_received[6], reserved_0[15:7], phy_ppdu_id[31:16]
34 //
35 // ################ END SUMMARY #################
36 
37 #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1
38 
39 struct rx_rxpcu_classification_overview {
40              uint32_t filter_pass_mpdus               :  1, //[0]
41                       filter_pass_mpdus_fcs_ok        :  1, //[1]
42                       monitor_direct_mpdus            :  1, //[2]
43                       monitor_direct_mpdus_fcs_ok     :  1, //[3]
44                       monitor_other_mpdus             :  1, //[4]
45                       monitor_other_mpdus_fcs_ok      :  1, //[5]
46                       phyrx_abort_received            :  1, //[6]
47                       reserved_0                      :  9, //[15:7]
48                       phy_ppdu_id                     : 16; //[31:16]
49 };
50 
51 /*
52 
53 filter_pass_mpdus
54 
55 			When set, at least one Filter Pass MPDU has been
56 			received. FCS might or might not have been passing.
57 
58 
59 
60 			For MU UL, in  TLVs RX_PPDU_END and
61 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
62 			users.
63 
64 			<legal all>
65 
66 filter_pass_mpdus_fcs_ok
67 
68 			When set, at least one Filter Pass MPDU has been
69 			received that has a correct FCS.
70 
71 
72 
73 			For MU UL, in  TLVs RX_PPDU_END and
74 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
75 			users.
76 
77 
78 
79 			<legal all>
80 
81 monitor_direct_mpdus
82 
83 			When set, at least one Monitor Direct MPDU has been
84 			received. FCS might or might not have been passing
85 
86 
87 
88 			For MU UL, in  TLVs RX_PPDU_END and
89 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
90 			users.
91 
92 			<legal all>
93 
94 monitor_direct_mpdus_fcs_ok
95 
96 			When set, at least one Monitor Direct MPDU has been
97 			received that has a correct FCS.
98 
99 
100 
101 			For MU UL, in  TLVs RX_PPDU_END and
102 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
103 			users.
104 
105 
106 
107 			<legal all>
108 
109 monitor_other_mpdus
110 
111 			When set, at least one Monitor Direct MPDU has been
112 			received. FCS might or might not have been passing.
113 
114 
115 
116 			For MU UL, in  TLVs RX_PPDU_END and
117 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
118 			users.
119 
120 			<legal all>
121 
122 monitor_other_mpdus_fcs_ok
123 
124 			When set, at least one Monitor Direct MPDU has been
125 			received that has a correct FCS.
126 
127 
128 
129 			For MU UL, in  TLVs RX_PPDU_END and
130 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
131 			users.
132 
133 			<legal all>
134 
135 phyrx_abort_received
136 
137 			When set, PPDU reception was aborted by the PHY
138 
139 			<legal all>
140 
141 reserved_0
142 
143 			<legal 0>
144 
145 phy_ppdu_id
146 
147 			A ppdu counter value that PHY increments for every PPDU
148 			received. The counter value wraps around
149 
150 			<legal all>
151 */
152 
153 
154 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS
155 
156 			When set, at least one Filter Pass MPDU has been
157 			received. FCS might or might not have been passing.
158 
159 
160 
161 			For MU UL, in  TLVs RX_PPDU_END and
162 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
163 			users.
164 
165 			<legal all>
166 */
167 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET  0x00000000
168 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB     0
169 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK    0x00000001
170 
171 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK
172 
173 			When set, at least one Filter Pass MPDU has been
174 			received that has a correct FCS.
175 
176 
177 
178 			For MU UL, in  TLVs RX_PPDU_END and
179 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
180 			users.
181 
182 
183 
184 			<legal all>
185 */
186 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000
187 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1
188 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002
189 
190 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS
191 
192 			When set, at least one Monitor Direct MPDU has been
193 			received. FCS might or might not have been passing
194 
195 
196 
197 			For MU UL, in  TLVs RX_PPDU_END and
198 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
199 			users.
200 
201 			<legal all>
202 */
203 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000
204 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB  2
205 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004
206 
207 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK
208 
209 			When set, at least one Monitor Direct MPDU has been
210 			received that has a correct FCS.
211 
212 
213 
214 			For MU UL, in  TLVs RX_PPDU_END and
215 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
216 			users.
217 
218 
219 
220 			<legal all>
221 */
222 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000
223 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
224 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008
225 
226 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS
227 
228 			When set, at least one Monitor Direct MPDU has been
229 			received. FCS might or might not have been passing.
230 
231 
232 
233 			For MU UL, in  TLVs RX_PPDU_END and
234 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
235 			users.
236 
237 			<legal all>
238 */
239 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000
240 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB   4
241 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK  0x00000010
242 
243 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK
244 
245 			When set, at least one Monitor Direct MPDU has been
246 			received that has a correct FCS.
247 
248 
249 
250 			For MU UL, in  TLVs RX_PPDU_END and
251 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
252 			users.
253 
254 			<legal all>
255 */
256 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000
257 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
258 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020
259 
260 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED
261 
262 			When set, PPDU reception was aborted by the PHY
263 
264 			<legal all>
265 */
266 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000
267 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_LSB  6
268 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHYRX_ABORT_RECEIVED_MASK 0x00000040
269 
270 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0
271 
272 			<legal 0>
273 */
274 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET         0x00000000
275 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB            7
276 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK           0x0000ff80
277 
278 /* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID
279 
280 			A ppdu counter value that PHY increments for every PPDU
281 			received. The counter value wraps around
282 
283 			<legal all>
284 */
285 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET        0x00000000
286 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB           16
287 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK          0xffff0000
288 
289 
290 #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
291