1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2019 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.8 3/26/2019 22*5113495bSYour Name // User Name:c_landav 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 29*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 30*5113495bSYour Name 31*5113495bSYour Name #ifdef SCALE_INCLUDES 32*5113495bSYour Name #include "HALhwio.h" 33*5113495bSYour Name #else 34*5113495bSYour Name #include "msmhwio.h" 35*5113495bSYour Name #endif 36*5113495bSYour Name 37*5113495bSYour Name #ifndef SOC_WCSS_BASE_ADDR 38*5113495bSYour Name #if defined(WCSS_BASE) 39*5113495bSYour Name #if ( WCSS_BASE != 0xC000000 ) 40*5113495bSYour Name #error WCSS_BASE incorrectly redefined! 41*5113495bSYour Name #endif 42*5113495bSYour Name #endif 43*5113495bSYour Name #define SOC_WCSS_BASE_ADDR 0x000000 44*5113495bSYour Name #else 45*5113495bSYour Name #endif 46*5113495bSYour Name 47*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 48*5113495bSYour Name // Instance Relative Offsets from Block wcss 49*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 50*5113495bSYour Name 51*5113495bSYour Name #define SEQ_WCSS_ECAHB_OFFSET 0x00008400 52*5113495bSYour Name #define SEQ_WCSS_ECAHB_TSLV_OFFSET 0x00009000 53*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 54*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00300000 55*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00300000 56*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00380000 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00380400 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00380800 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00380c00 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00381000 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00381400 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00381800 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00381c00 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00382c00 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00383000 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00388000 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00390000 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x003a0000 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x003b0000 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXBF_REG_MAP_OFFSET 0x003c0000 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00400000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x00480000 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x004b0000 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00500000 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x005c0000 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x005cf000 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x005cf400 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x005cf800 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x005cfc00 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x005c0000 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x005c0200 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x005c5000 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x005d1000 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x005c7000 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x005c9b00 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x005c7000 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x005cb000 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 91*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x005d4240 92*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x005d42c0 93*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300 94*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x005d4400 95*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x005d4480 96*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800 97*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x005d4c00 98*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x005d5000 99*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x005d5400 100*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 101*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 102*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6100 103*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d6140 104*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6180 105*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d61c0 106*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x005d6280 107*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x005d6800 108*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x005d6840 109*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x005d6900 110*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x005d6940 111*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6980 112*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d69c0 113*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a80 114*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x005d7000 115*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x005d7040 116*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x005d7100 117*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x005d7140 118*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x005d7180 119*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x005d71c0 120*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x005d7280 121*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x005d7c00 122*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x005da000 123*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x005dc000 124*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x005dc000 125*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x005de800 126*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x005de980 127*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x005de9c0 128*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x005deac0 129*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x005dec00 130*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x005df000 131*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x005df200 132*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x005dfc00 133*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x005dfc40 134*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x005dfc80 135*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x005dfcc0 136*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 137*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x005e0000 138*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x005e0400 139*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x005e0800 140*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x005e1000 141*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x005e1300 142*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x005e2000 143*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x005e2400 144*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x005e2580 145*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x005e25c0 146*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x005e26c0 147*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x005e2734 148*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x005e2740 149*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x005e2800 150*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x005e2840 151*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x005e2880 152*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x005e28c0 153*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x005e2900 154*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x005e299c 155*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x005e4000 156*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x005e8000 157*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x005e8400 158*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x005e8800 159*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x005e9000 160*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x005e9300 161*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x005ea000 162*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x005ea400 163*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x005ea580 164*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x005ea5c0 165*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x005ea6c0 166*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x005ea734 167*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x005ea740 168*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x005ea800 169*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x005ea840 170*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x005ea880 171*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x005ea8c0 172*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x005ea900 173*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x005ea99c 174*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x005ec000 175*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x005f0000 176*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x005f0400 177*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x005f0800 178*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x005f1000 179*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x005f1300 180*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x005f2000 181*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x005f2400 182*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x005f2580 183*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x005f25c0 184*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x005f26c0 185*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x005f2734 186*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x005f2740 187*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x005f2800 188*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x005f2840 189*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x005f2880 190*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x005f28c0 191*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x005f2900 192*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x005f299c 193*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x005f4000 194*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x005f8000 195*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x005f8400 196*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x005f8800 197*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x005f9000 198*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x005f9300 199*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x005fa000 200*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x005fa400 201*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x005fa580 202*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x005fa5c0 203*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x005fa6c0 204*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x005fa734 205*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x005fa740 206*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x005fa800 207*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x005fa840 208*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x005fa880 209*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x005fa8c0 210*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x005fa900 211*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x005fa99c 212*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x005fc000 213*5113495bSYour Name #define SEQ_WCSS_PHYB_OFFSET 0x00600000 214*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00600000 215*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_B_REG_MAP_OFFSET 0x00680000 216*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00680400 217*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00680800 218*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00680c00 219*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00681000 220*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00681400 221*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00681800 222*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00681c00 223*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_XDMAC5_B_REG_MAP_OFFSET 0x00682c00 224*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PCSS_XDMAC6_B_REG_MAP_OFFSET 0x00683000 225*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_NOC_B_REG_MAP_OFFSET 0x00688000 226*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXFD_B_REG_MAP_OFFSET 0x00690000 227*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_RXTD_B_REG_MAP_OFFSET 0x006a0000 228*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXTD_B_REG_MAP_OFFSET 0x006b0000 229*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_TXBF_B_REG_MAP_OFFSET 0x006c0000 230*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00700000 231*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_PHYRF_B_REG_MAP_OFFSET 0x00780000 232*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_ROBE_B_REG_MAP_OFFSET 0x007b0000 233*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_OFFSET 0x007c0000 234*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x007c0000 235*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x007cf000 236*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x007cf400 237*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x007cf800 238*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x007cfc00 239*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x007c0000 240*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x007c0200 241*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x007c5000 242*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x007d1000 243*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x007c7000 244*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x007c9b00 245*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x007c7000 246*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x007cb000 247*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x007d4000 248*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x007d4000 249*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x007d4240 250*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x007d42c0 251*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x007d4300 252*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x007d4400 253*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x007d4480 254*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4800 255*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x007d4c00 256*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x007d5000 257*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x007d5400 258*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000 259*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040 260*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d6100 261*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x007d6140 262*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x007d6180 263*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x007d61c0 264*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x007d6280 265*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x007d6800 266*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x007d6840 267*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x007d6900 268*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x007d6940 269*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6980 270*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d69c0 271*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x007d6a80 272*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x007d7000 273*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x007d7040 274*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x007d7100 275*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x007d7140 276*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x007d7180 277*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x007d71c0 278*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x007d7280 279*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x007d7c00 280*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x007da000 281*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x007dc000 282*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x007dc000 283*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x007de800 284*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x007de980 285*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x007de9c0 286*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x007deac0 287*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x007dec00 288*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x007df000 289*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x007df200 290*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x007dfc00 291*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x007dfc40 292*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x007dfc80 293*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x007dfcc0 294*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x007e0000 295*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x007e0000 296*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x007e0400 297*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x007e0800 298*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x007e1000 299*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x007e1300 300*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x007e2000 301*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x007e2400 302*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x007e2580 303*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x007e25c0 304*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x007e26c0 305*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x007e2734 306*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x007e2740 307*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x007e2800 308*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x007e2840 309*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x007e2880 310*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x007e28c0 311*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x007e2900 312*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x007e299c 313*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x007e4000 314*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x007e8000 315*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x007e8400 316*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x007e8800 317*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x007e9000 318*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x007e9300 319*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x007ea000 320*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x007ea400 321*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x007ea580 322*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x007ea5c0 323*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x007ea6c0 324*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x007ea734 325*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x007ea740 326*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x007ea800 327*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x007ea840 328*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x007ea880 329*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x007ea8c0 330*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x007ea900 331*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x007ea99c 332*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x007ec000 333*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x007f0000 334*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x007f0400 335*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x007f0800 336*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x007f1000 337*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x007f1300 338*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x007f2000 339*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x007f2400 340*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x007f2580 341*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x007f25c0 342*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x007f26c0 343*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x007f2734 344*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x007f2740 345*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x007f2800 346*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x007f2840 347*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x007f2880 348*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x007f28c0 349*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x007f2900 350*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x007f299c 351*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x007f4000 352*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x007f8000 353*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x007f8400 354*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x007f8800 355*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x007f9000 356*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x007f9300 357*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x007fa000 358*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x007fa400 359*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x007fa580 360*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x007fa5c0 361*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x007fa6c0 362*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x007fa734 363*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x007fa740 364*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x007fa800 365*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x007fa840 366*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x007fa880 367*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x007fa8c0 368*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x007fa900 369*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x007fa99c 370*5113495bSYour Name #define SEQ_WCSS_PHYB_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x007fc000 371*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 372*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 373*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 374*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 375*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 376*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 377*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 378*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 379*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 380*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 381*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 382*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 383*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 384*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 385*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_CE_REG_OFFSET 0x00a47000 386*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 387*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 388*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 389*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 390*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 391*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 392*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 393*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 394*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 395*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 396*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 397*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 398*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 399*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 400*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 401*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 402*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 403*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 404*5113495bSYour Name #define SEQ_WCSS_WMAC1_OFFSET 0x00b00000 405*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_PDG_REG_OFFSET 0x00b00000 406*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXDMA_REG_OFFSET 0x00b03000 407*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXDMA_REG_OFFSET 0x00b06000 408*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MCMN_REG_OFFSET 0x00b09000 409*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXPCU_REG_OFFSET 0x00b0c000 410*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXPCU_REG_OFFSET 0x00b0f000 411*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_AMPI_REG_OFFSET 0x00b12000 412*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_REG_OFFSET 0x00b15000 413*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RXOLE_PARSER_REG_OFFSET 0x00b18000 414*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CCE_REG_OFFSET 0x00b1b000 415*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_REG_OFFSET 0x00b1e000 416*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_TXOLE_PARSER_REG_OFFSET 0x00b21000 417*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_RRI_REG_OFFSET 0x00b24000 418*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_CRYPTO_REG_OFFSET 0x00b27000 419*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_HWSCH_REG_OFFSET 0x00b2a000 420*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_MXI_REG_OFFSET 0x00b30000 421*5113495bSYour Name #define SEQ_WCSS_WMAC1_MAC_SFM_REG_OFFSET 0x00b33000 422*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 423*5113495bSYour Name #define SEQ_WCSS_TOP_CMN_OFFSET 0x00b50000 424*5113495bSYour Name #define SEQ_WCSS_WCMN_CORE_OFFSET 0x00b58000 425*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 426*5113495bSYour Name #define SEQ_WCSS_PMM_TOP_OFFSET 0x00b70000 427*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 428*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_DAPROM_OFFSET 0x00b90000 429*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 430*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 431*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00b94000 432*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 433*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 434*5113495bSYour Name #define SEQ_WCSS_DBG_EVENT_MACEVENT_OFFSET 0x00bb0000 435*5113495bSYour Name #define SEQ_WCSS_DBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb1000 436*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_MACTLV_OFFSET 0x00bb2000 437*5113495bSYour Name #define SEQ_WCSS_DBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb3000 438*5113495bSYour Name #define SEQ_WCSS_DBG_TBUS_MACTBUS_OFFSET 0x00bb4000 439*5113495bSYour Name #define SEQ_WCSS_DBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb5000 440*5113495bSYour Name #define SEQ_WCSS_DBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00bb6000 441*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00bb8000 442*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_OFFSET 0x00bb9000 443*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00bb9280 444*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00bb9000 445*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_OFFSET 0x00bba000 446*5113495bSYour Name #define SEQ_WCSS_DBG_CXATBFUNNEL_128W8SP_OFFSET 0x00bbb000 447*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W32K_OFFSET 0x00bbc000 448*5113495bSYour Name #define SEQ_WCSS_DBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbe000 449*5113495bSYour Name #define SEQ_WCSS_DBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbf000 450*5113495bSYour Name #define SEQ_WCSS_DBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00bc0000 451*5113495bSYour Name #define SEQ_WCSS_DBG_TRCCNTRS_OFFSET 0x00bc1000 452*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00bc2000 453*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc2280 454*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc2000 455*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00bc3000 456*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc3280 457*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc3000 458*5113495bSYour Name #define SEQ_WCSS_DBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00bc4000 459*5113495bSYour Name #define SEQ_WCSS_DBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00bc5000 460*5113495bSYour Name #define SEQ_WCSS_DBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00bc6000 461*5113495bSYour Name #define SEQ_WCSS_DBG_PHYBDMUX_ATB_DEMUX_OFFSET 0x00bc7000 462*5113495bSYour Name #define SEQ_WCSS_DBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc8000 463*5113495bSYour Name #define SEQ_WCSS_DBG_UNOC_UMAC_NOC_OFFSET 0x00bd0000 464*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_OFFSET 0x00be0000 465*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00be0000 466*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00be4000 467*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00be5000 468*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00be6000 469*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00be8000 470*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00be9000 471*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FPB_OFFSET 0x00bea000 472*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_SCS_OFFSET 0x00beb000 473*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x00bec000 474*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bed000 475*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bee000 476*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_OFFSET 0x00bf0000 477*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_PHYB_NOC_OFFSET 0x00bf0000 478*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bf4000 479*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00bf5000 480*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00bf6000 481*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_ITM_OFFSET 0x00bf8000 482*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_DWT_OFFSET 0x00bf9000 483*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_FPB_OFFSET 0x00bfa000 484*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_SCS_OFFSET 0x00bfb000 485*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_ETM_OFFSET 0x00bfc000 486*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bfd000 487*5113495bSYour Name #define SEQ_WCSS_DBG_PHYB_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bfe000 488*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00c31000 489*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c90000 490*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00ca0000 491*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00cb0000 492*5113495bSYour Name #define SEQ_WCSS_UMAC_ACMT_OFFSET 0x00cc0000 493*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_OFFSET 0x00d00000 494*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_OFFSET 0x00d00000 495*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00d00000 496*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00d00000 497*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00d80000 498*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00d80000 499*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00d90000 500*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00da0000 501*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x00da1000 502*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x00da2000 503*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x00da3000 504*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x00db0000 505*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x00db0000 506*5113495bSYour Name 507*5113495bSYour Name 508*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 509*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 510*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 511*5113495bSYour Name 512*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 513*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 514*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 515*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 516*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 517*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 518*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 519*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 520*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 521*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00082c00 522*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00083000 523*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00088000 524*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00090000 525*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x000a0000 526*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x000b0000 527*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXBF_REG_MAP_OFFSET 0x000c0000 528*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00100000 529*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x00180000 530*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x001b0000 531*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00200000 532*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x002c0000 533*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x002c0000 534*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x002cf000 535*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x002cf400 536*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x002cf800 537*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x002cfc00 538*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x002c0000 539*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x002c0200 540*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x002c5000 541*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x002d1000 542*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x002c7000 543*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x002c9b00 544*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x002c7000 545*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x002cb000 546*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x002d4000 547*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x002d4000 548*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x002d4240 549*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x002d42c0 550*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x002d4300 551*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x002d4400 552*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x002d4480 553*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x002d4800 554*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x002d4c00 555*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x002d5000 556*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x002d5400 557*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x002d6000 558*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x002d6040 559*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x002d6100 560*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x002d6140 561*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x002d6180 562*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x002d61c0 563*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x002d6280 564*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x002d6800 565*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x002d6840 566*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x002d6900 567*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x002d6940 568*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x002d6980 569*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x002d69c0 570*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x002d6a80 571*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x002d7000 572*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x002d7040 573*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x002d7100 574*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x002d7140 575*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x002d7180 576*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x002d71c0 577*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x002d7280 578*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x002d7c00 579*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x002da000 580*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x002dc000 581*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x002dc000 582*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x002de800 583*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x002de980 584*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x002de9c0 585*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x002deac0 586*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x002dec00 587*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x002df000 588*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x002df200 589*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x002dfc00 590*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x002dfc40 591*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x002dfc80 592*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x002dfcc0 593*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x002e0000 594*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x002e0000 595*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x002e0400 596*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x002e0800 597*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x002e1000 598*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x002e1300 599*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x002e2000 600*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x002e2400 601*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x002e2580 602*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x002e25c0 603*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x002e26c0 604*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x002e2734 605*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x002e2740 606*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x002e2800 607*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x002e2840 608*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x002e2880 609*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x002e28c0 610*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x002e2900 611*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x002e299c 612*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x002e4000 613*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x002e8000 614*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x002e8400 615*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x002e8800 616*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x002e9000 617*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x002e9300 618*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x002ea000 619*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x002ea400 620*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x002ea580 621*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x002ea5c0 622*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x002ea6c0 623*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x002ea734 624*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x002ea740 625*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x002ea800 626*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x002ea840 627*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x002ea880 628*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x002ea8c0 629*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x002ea900 630*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x002ea99c 631*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x002ec000 632*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x002f0000 633*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x002f0400 634*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x002f0800 635*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x002f1000 636*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x002f1300 637*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x002f2000 638*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x002f2400 639*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x002f2580 640*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x002f25c0 641*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x002f26c0 642*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x002f2734 643*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x002f2740 644*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x002f2800 645*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x002f2840 646*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x002f2880 647*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x002f28c0 648*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x002f2900 649*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x002f299c 650*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x002f4000 651*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x002f8000 652*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x002f8400 653*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x002f8800 654*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x002f9000 655*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x002f9300 656*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x002fa000 657*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x002fa400 658*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x002fa580 659*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x002fa5c0 660*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x002fa6c0 661*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x002fa734 662*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x002fa740 663*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x002fa800 664*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x002fa840 665*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x002fa880 666*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x002fa8c0 667*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x002fa900 668*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x002fa99c 669*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x002fc000 670*5113495bSYour Name 671*5113495bSYour Name 672*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 673*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 674*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 675*5113495bSYour Name 676*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_OFFSET 0x00000000 677*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_SYSCTRL_OFFSET 0x0000f000 678*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_TLMM_OFFSET 0x0000f400 679*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x0000f800 680*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AON_1P8_REG_OFFSET 0x0000fc00 681*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_TLMM_OFFSET 0x00000000 682*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_TRC_OFFSET 0x00000200 683*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x00005000 684*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_PMU_OFFSET 0x00011000 685*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x00007000 686*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x00009b00 687*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x00007000 688*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x0000b000 689*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 690*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 691*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET 0x00014240 692*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET 0x000142c0 693*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 694*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00014400 695*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_OTP_OFFSET 0x00014480 696*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 697*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BTFMPLL_OFFSET 0x00014c00 698*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_OFFSET 0x00015000 699*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00015400 700*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 701*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 702*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016100 703*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016140 704*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016180 705*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000161c0 706*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016280 707*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00016800 708*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00016840 709*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00016900 710*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00016940 711*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016980 712*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000169c0 713*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00016a80 714*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00017000 715*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00017040 716*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00017100 717*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00017140 718*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00017180 719*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000171c0 720*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00017280 721*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00017c00 722*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_PMU_TEST_OFFSET 0x0001a000 723*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET 0x0001c000 724*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TOP_OFFSET 0x0001c000 725*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x0001e800 726*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_OFFSET 0x0001e980 727*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x0001e9c0 728*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_MISC_OFFSET 0x0001eac0 729*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TX_OFFSET 0x0001ec00 730*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RX_CH0_OFFSET 0x0001f000 731*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RX_CH1_OFFSET 0x0001f200 732*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BS_OFFSET 0x0001fc00 733*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BIST_OFFSET 0x0001fc40 734*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_PC_OFFSET 0x0001fc80 735*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_AC_OFFSET 0x0001fcc0 736*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 737*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00020000 738*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00020400 739*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00020800 740*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00021000 741*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00021300 742*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00022000 743*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00022400 744*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00022580 745*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x000225c0 746*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x000226c0 747*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x00022734 748*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00022740 749*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x00022800 750*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x00022840 751*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x00022880 752*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x000228c0 753*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x00022900 754*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x0002299c 755*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00024000 756*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00028000 757*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00028400 758*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00028800 759*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00029000 760*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00029300 761*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0002a000 762*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0002a400 763*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0002a580 764*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x0002a5c0 765*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x0002a6c0 766*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x0002a734 767*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0002a740 768*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x0002a800 769*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x0002a840 770*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x0002a880 771*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x0002a8c0 772*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x0002a900 773*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x0002a99c 774*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0002c000 775*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00030000 776*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00030400 777*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00030800 778*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00031000 779*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00031300 780*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00032000 781*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00032400 782*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00032580 783*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x000325c0 784*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x000326c0 785*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x00032734 786*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00032740 787*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x00032800 788*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x00032840 789*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x00032880 790*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x000328c0 791*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x00032900 792*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x0003299c 793*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00034000 794*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00038000 795*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00038400 796*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00038800 797*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00039000 798*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00039300 799*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0003a000 800*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0003a400 801*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0003a580 802*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x0003a5c0 803*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x0003a6c0 804*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x0003a734 805*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0003a740 806*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x0003a800 807*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x0003a840 808*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x0003a880 809*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x0003a8c0 810*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x0003a900 811*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x0003a99c 812*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0003c000 813*5113495bSYour Name 814*5113495bSYour Name 815*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 816*5113495bSYour Name // Instance Relative Offsets from Block rfa_soc 817*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 818*5113495bSYour Name 819*5113495bSYour Name #define SEQ_RFA_SOC_AO_SYSCTRL_OFFSET 0x0000f000 820*5113495bSYour Name #define SEQ_RFA_SOC_AO_TLMM_OFFSET 0x0000f400 821*5113495bSYour Name #define SEQ_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x0000f800 822*5113495bSYour Name #define SEQ_RFA_SOC_AON_1P8_REG_OFFSET 0x0000fc00 823*5113495bSYour Name #define SEQ_RFA_SOC_HZ_TLMM_OFFSET 0x00000000 824*5113495bSYour Name #define SEQ_RFA_SOC_HZ_TRC_OFFSET 0x00000200 825*5113495bSYour Name #define SEQ_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x00005000 826*5113495bSYour Name #define SEQ_RFA_SOC_PMU_OFFSET 0x00011000 827*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x00007000 828*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x00009b00 829*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x00007000 830*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x0000b000 831*5113495bSYour Name 832*5113495bSYour Name 833*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 834*5113495bSYour Name // Instance Relative Offsets from Block security_control_bt 835*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 836*5113495bSYour Name 837*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_SECURITY_CONTROL_CORE_OFFSET 0x00002b00 838*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_RAW_FUSE_OFFSET 0x00000000 839*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_CORR_FUSE_OFFSET 0x00004000 840*5113495bSYour Name 841*5113495bSYour Name 842*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 843*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 844*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 845*5113495bSYour Name 846*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 847*5113495bSYour Name #define SEQ_RFA_CMN_AON_XFEM_OFFSET 0x00000240 848*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_OFFSET 0x000002c0 849*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 850*5113495bSYour Name #define SEQ_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00000400 851*5113495bSYour Name #define SEQ_RFA_CMN_RFA_OTP_OFFSET 0x00000480 852*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 853*5113495bSYour Name #define SEQ_RFA_CMN_BTFMPLL_OFFSET 0x00000c00 854*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_OFFSET 0x00001000 855*5113495bSYour Name #define SEQ_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00001400 856*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 857*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 858*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002100 859*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002140 860*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002180 861*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000021c0 862*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002280 863*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00002800 864*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00002840 865*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00002900 866*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00002940 867*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002980 868*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000029c0 869*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00002a80 870*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00003000 871*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00003040 872*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00003100 873*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00003140 874*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00003180 875*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000031c0 876*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00003280 877*5113495bSYour Name #define SEQ_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00003c00 878*5113495bSYour Name #define SEQ_RFA_CMN_PMU_TEST_OFFSET 0x00006000 879*5113495bSYour Name 880*5113495bSYour Name 881*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 882*5113495bSYour Name // Instance Relative Offsets from Block rfa_bt 883*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 884*5113495bSYour Name 885*5113495bSYour Name #define SEQ_RFA_BT_BT_TOP_OFFSET 0x00000000 886*5113495bSYour Name #define SEQ_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x00002800 887*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_OFFSET 0x00002980 888*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x000029c0 889*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_MISC_OFFSET 0x00002ac0 890*5113495bSYour Name #define SEQ_RFA_BT_BT_TX_OFFSET 0x00002c00 891*5113495bSYour Name #define SEQ_RFA_BT_BT_RX_CH0_OFFSET 0x00003000 892*5113495bSYour Name #define SEQ_RFA_BT_BT_RX_CH1_OFFSET 0x00003200 893*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BS_OFFSET 0x00003c00 894*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BIST_OFFSET 0x00003c40 895*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_PC_OFFSET 0x00003c80 896*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_AC_OFFSET 0x00003cc0 897*5113495bSYour Name 898*5113495bSYour Name 899*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 900*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 901*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 902*5113495bSYour Name 903*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00000000 904*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x00000400 905*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x00000800 906*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00001000 907*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00001300 908*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00002000 909*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x00002400 910*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x00002580 911*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x000025c0 912*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x000026c0 913*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x00002734 914*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x00002740 915*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x00002800 916*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x00002840 917*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x00002880 918*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x000028c0 919*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x00002900 920*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x0000299c 921*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00004000 922*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00008000 923*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x00008400 924*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x00008800 925*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00009000 926*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00009300 927*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0000a000 928*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x0000a400 929*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x0000a580 930*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x0000a5c0 931*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x0000a6c0 932*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x0000a734 933*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x0000a740 934*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x0000a800 935*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x0000a840 936*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x0000a880 937*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x0000a8c0 938*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x0000a900 939*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x0000a99c 940*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0000c000 941*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00010000 942*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x00010400 943*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x00010800 944*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00011000 945*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00011300 946*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00012000 947*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x00012400 948*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x00012580 949*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x000125c0 950*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x000126c0 951*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x00012734 952*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x00012740 953*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x00012800 954*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x00012840 955*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x00012880 956*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x000128c0 957*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x00012900 958*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x0001299c 959*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00014000 960*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00018000 961*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x00018400 962*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x00018800 963*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00019000 964*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00019300 965*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0001a000 966*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x0001a400 967*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x0001a580 968*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x0001a5c0 969*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x0001a6c0 970*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x0001a734 971*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x0001a740 972*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x0001a800 973*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x0001a840 974*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x0001a880 975*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x0001a8c0 976*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x0001a900 977*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x0001a99c 978*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0001c000 979*5113495bSYour Name 980*5113495bSYour Name 981*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 982*5113495bSYour Name // Instance Relative Offsets from Block wfax_top_b 983*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 984*5113495bSYour Name 985*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_PDMEM_B_REG_MAP_OFFSET 0x00000000 986*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_B_REG_MAP_OFFSET 0x00080000 987*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC0_B_REG_MAP_OFFSET 0x00080400 988*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC1_B_REG_MAP_OFFSET 0x00080800 989*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC2_B_REG_MAP_OFFSET 0x00080c00 990*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC3_B_REG_MAP_OFFSET 0x00081000 991*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DMAC4_B_REG_MAP_OFFSET 0x00081400 992*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_DUAL_TIMER_B_REG_MAP_OFFSET 0x00081800 993*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_WATCHDOG_B_REG_MAP_OFFSET 0x00081c00 994*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_XDMAC5_B_REG_MAP_OFFSET 0x00082c00 995*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PCSS_XDMAC6_B_REG_MAP_OFFSET 0x00083000 996*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_NOC_B_REG_MAP_OFFSET 0x00088000 997*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXFD_B_REG_MAP_OFFSET 0x00090000 998*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_RXTD_B_REG_MAP_OFFSET 0x000a0000 999*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXTD_B_REG_MAP_OFFSET 0x000b0000 1000*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_TXBF_B_REG_MAP_OFFSET 0x000c0000 1001*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_DEMFRONT_NPRB_B_REG_MAP_OFFSET 0x00100000 1002*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_PHYRF_B_REG_MAP_OFFSET 0x00180000 1003*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_ROBE_B_REG_MAP_OFFSET 0x001b0000 1004*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_OFFSET 0x001c0000 1005*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x001c0000 1006*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x001cf000 1007*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x001cf400 1008*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x001cf800 1009*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x001cfc00 1010*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x001c0000 1011*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x001c0200 1012*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x001c5000 1013*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x001d1000 1014*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x001c7000 1015*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x001c9b00 1016*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x001c7000 1017*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x001cb000 1018*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x001d4000 1019*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000 1020*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x001d4240 1021*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x001d42c0 1022*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300 1023*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x001d4400 1024*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x001d4480 1025*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800 1026*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x001d4c00 1027*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x001d5000 1028*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x001d5400 1029*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000 1030*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040 1031*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6100 1032*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x001d6140 1033*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x001d6180 1034*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x001d61c0 1035*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x001d6280 1036*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x001d6800 1037*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x001d6840 1038*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x001d6900 1039*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x001d6940 1040*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6980 1041*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d69c0 1042*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a80 1043*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x001d7000 1044*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x001d7040 1045*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x001d7100 1046*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x001d7140 1047*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x001d7180 1048*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x001d71c0 1049*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x001d7280 1050*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x001d7c00 1051*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x001da000 1052*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x001dc000 1053*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TOP_OFFSET 0x001dc000 1054*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x001de800 1055*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x001de980 1056*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x001de9c0 1057*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x001deac0 1058*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TX_OFFSET 0x001dec00 1059*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH0_OFFSET 0x001df000 1060*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RX_CH1_OFFSET 0x001df200 1061*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x001dfc00 1062*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x001dfc40 1063*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x001dfc80 1064*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x001dfcc0 1065*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x001e0000 1066*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x001e0000 1067*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH0_OFFSET 0x001e0400 1068*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH0_OFFSET 0x001e0800 1069*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x001e1000 1070*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x001e1300 1071*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x001e2000 1072*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH0_OFFSET 0x001e2400 1073*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH0_OFFSET 0x001e2580 1074*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH0_OFFSET 0x001e25c0 1075*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH0_OFFSET 0x001e26c0 1076*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH0_OFFSET 0x001e2734 1077*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH0_OFFSET 0x001e2740 1078*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH0_OFFSET 0x001e2800 1079*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH0_OFFSET 0x001e2840 1080*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH0_OFFSET 0x001e2880 1081*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH0_OFFSET 0x001e28c0 1082*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH0_OFFSET 0x001e2900 1083*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH0_OFFSET 0x001e299c 1084*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x001e4000 1085*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x001e8000 1086*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH0_OFFSET 0x001e8400 1087*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH0_OFFSET 0x001e8800 1088*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x001e9000 1089*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x001e9300 1090*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x001ea000 1091*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH0_OFFSET 0x001ea400 1092*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH0_OFFSET 0x001ea580 1093*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH0_OFFSET 0x001ea5c0 1094*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH0_OFFSET 0x001ea6c0 1095*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH0_OFFSET 0x001ea734 1096*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH0_OFFSET 0x001ea740 1097*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH0_OFFSET 0x001ea800 1098*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH0_OFFSET 0x001ea840 1099*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH0_OFFSET 0x001ea880 1100*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH0_OFFSET 0x001ea8c0 1101*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH0_OFFSET 0x001ea900 1102*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH0_OFFSET 0x001ea99c 1103*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x001ec000 1104*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x001f0000 1105*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_2G_CH1_OFFSET 0x001f0400 1106*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_2G_CH1_OFFSET 0x001f0800 1107*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x001f1000 1108*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x001f1300 1109*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x001f2000 1110*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_2G_CH1_OFFSET 0x001f2400 1111*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_2G_CH1_OFFSET 0x001f2580 1112*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_2G_CH1_OFFSET 0x001f25c0 1113*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_2G_CH1_OFFSET 0x001f26c0 1114*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_2G_CH1_OFFSET 0x001f2734 1115*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_2G_CH1_OFFSET 0x001f2740 1116*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_2G_CH1_OFFSET 0x001f2800 1117*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_2G_CH1_OFFSET 0x001f2840 1118*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_2G_CH1_OFFSET 0x001f2880 1119*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_2G_CH1_OFFSET 0x001f28c0 1120*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_2G_CH1_OFFSET 0x001f2900 1121*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_2G_CH1_OFFSET 0x001f299c 1122*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x001f4000 1123*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x001f8000 1124*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_5G_CH1_OFFSET 0x001f8400 1125*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_5G_CH1_OFFSET 0x001f8800 1126*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x001f9000 1127*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x001f9300 1128*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x001fa000 1129*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_5G_CH1_OFFSET 0x001fa400 1130*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_5G_CH1_OFFSET 0x001fa580 1131*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_5G_CH1_OFFSET 0x001fa5c0 1132*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_5G_CH1_OFFSET 0x001fa6c0 1133*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_5G_CH1_OFFSET 0x001fa734 1134*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_5G_CH1_OFFSET 0x001fa740 1135*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_5G_CH1_OFFSET 0x001fa800 1136*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_5G_CH1_OFFSET 0x001fa840 1137*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_5G_CH1_OFFSET 0x001fa880 1138*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_5G_CH1_OFFSET 0x001fa8c0 1139*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_5G_CH1_OFFSET 0x001fa900 1140*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_5G_CH1_OFFSET 0x001fa99c 1141*5113495bSYour Name #define SEQ_WFAX_TOP_B_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x001fc000 1142*5113495bSYour Name 1143*5113495bSYour Name 1144*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1145*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 1146*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1147*5113495bSYour Name 1148*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 1149*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 1150*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 1151*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 1152*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 1153*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 1154*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 1155*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 1156*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 1157*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 1158*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 1159*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 1160*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 1161*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_CE_REG_OFFSET 0x00047000 1162*5113495bSYour Name 1163*5113495bSYour Name 1164*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1165*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 1166*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1167*5113495bSYour Name 1168*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 1169*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 1170*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 1171*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 1172*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 1173*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 1174*5113495bSYour Name 1175*5113495bSYour Name 1176*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1177*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 1178*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1179*5113495bSYour Name 1180*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 1181*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 1182*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 1183*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 1184*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 1185*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 1186*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 1187*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 1188*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 1189*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 1190*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 1191*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 1192*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 1193*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 1194*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 1195*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 1196*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 1197*5113495bSYour Name 1198*5113495bSYour Name 1199*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1200*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg 1201*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1202*5113495bSYour Name 1203*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_DAPROM_OFFSET 0x00000000 1204*5113495bSYour Name #define SEQ_WCSSDBG_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 1205*5113495bSYour Name #define SEQ_WCSSDBG_TSGEN_CXTSGEN_OFFSET 0x00002000 1206*5113495bSYour Name #define SEQ_WCSSDBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00004000 1207*5113495bSYour Name #define SEQ_WCSSDBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 1208*5113495bSYour Name #define SEQ_WCSSDBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 1209*5113495bSYour Name #define SEQ_WCSSDBG_EVENT_MACEVENT_OFFSET 0x00020000 1210*5113495bSYour Name #define SEQ_WCSSDBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00021000 1211*5113495bSYour Name #define SEQ_WCSSDBG_TLV_MACTLV_OFFSET 0x00022000 1212*5113495bSYour Name #define SEQ_WCSSDBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00023000 1213*5113495bSYour Name #define SEQ_WCSSDBG_TBUS_MACTBUS_OFFSET 0x00024000 1214*5113495bSYour Name #define SEQ_WCSSDBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00025000 1215*5113495bSYour Name #define SEQ_WCSSDBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00026000 1216*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00028000 1217*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_OFFSET 0x00029000 1218*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00029280 1219*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00029000 1220*5113495bSYour Name #define SEQ_WCSSDBG_TPDA_OFFSET 0x0002a000 1221*5113495bSYour Name #define SEQ_WCSSDBG_CXATBFUNNEL_128W8SP_OFFSET 0x0002b000 1222*5113495bSYour Name #define SEQ_WCSSDBG_TMC_CXTMC_F128W32K_OFFSET 0x0002c000 1223*5113495bSYour Name #define SEQ_WCSSDBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002e000 1224*5113495bSYour Name #define SEQ_WCSSDBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002f000 1225*5113495bSYour Name #define SEQ_WCSSDBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00030000 1226*5113495bSYour Name #define SEQ_WCSSDBG_TRCCNTRS_OFFSET 0x00031000 1227*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00032000 1228*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00032280 1229*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00032000 1230*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00033000 1231*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00033280 1232*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00033000 1233*5113495bSYour Name #define SEQ_WCSSDBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00034000 1234*5113495bSYour Name #define SEQ_WCSSDBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00035000 1235*5113495bSYour Name #define SEQ_WCSSDBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00036000 1236*5113495bSYour Name #define SEQ_WCSSDBG_PHYBDMUX_ATB_DEMUX_OFFSET 0x00037000 1237*5113495bSYour Name #define SEQ_WCSSDBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00038000 1238*5113495bSYour Name #define SEQ_WCSSDBG_UNOC_UMAC_NOC_OFFSET 0x00040000 1239*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_OFFSET 0x00050000 1240*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00050000 1241*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00054000 1242*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00055000 1243*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00056000 1244*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00058000 1245*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00059000 1246*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FPB_OFFSET 0x0005a000 1247*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_SCS_OFFSET 0x0005b000 1248*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x0005c000 1249*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0005d000 1250*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0005e000 1251*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_OFFSET 0x00060000 1252*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_PHYB_NOC_OFFSET 0x00060000 1253*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00064000 1254*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00065000 1255*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00066000 1256*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_ITM_OFFSET 0x00068000 1257*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_DWT_OFFSET 0x00069000 1258*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_FPB_OFFSET 0x0006a000 1259*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_SCS_OFFSET 0x0006b000 1260*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_ETM_OFFSET 0x0006c000 1261*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0006d000 1262*5113495bSYour Name #define SEQ_WCSSDBG_PHYB_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0006e000 1263*5113495bSYour Name #define SEQ_WCSSDBG_BUS_TIMEOUT_OFFSET 0x000a1000 1264*5113495bSYour Name 1265*5113495bSYour Name 1266*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1267*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 1268*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1269*5113495bSYour Name 1270*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 1271*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 1272*5113495bSYour Name 1273*5113495bSYour Name 1274*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1275*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb128_cmb64 1276*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1277*5113495bSYour Name 1278*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00000280 1279*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00000000 1280*5113495bSYour Name 1281*5113495bSYour Name 1282*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1283*5113495bSYour Name // Instance Relative Offsets from Block phya_dbg 1284*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1285*5113495bSYour Name 1286*5113495bSYour Name #define SEQ_PHYA_DBG_PHYA_NOC_OFFSET 0x00000000 1287*5113495bSYour Name #define SEQ_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 1288*5113495bSYour Name #define SEQ_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 1289*5113495bSYour Name #define SEQ_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 1290*5113495bSYour Name #define SEQ_PHYA_DBG_ITM_OFFSET 0x00008000 1291*5113495bSYour Name #define SEQ_PHYA_DBG_DWT_OFFSET 0x00009000 1292*5113495bSYour Name #define SEQ_PHYA_DBG_FPB_OFFSET 0x0000a000 1293*5113495bSYour Name #define SEQ_PHYA_DBG_SCS_OFFSET 0x0000b000 1294*5113495bSYour Name #define SEQ_PHYA_DBG_M3_ETM_OFFSET 0x0000c000 1295*5113495bSYour Name #define SEQ_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 1296*5113495bSYour Name #define SEQ_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 1297*5113495bSYour Name 1298*5113495bSYour Name 1299*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1300*5113495bSYour Name // Instance Relative Offsets from Block phyb_dbg 1301*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1302*5113495bSYour Name 1303*5113495bSYour Name #define SEQ_PHYB_DBG_PHYB_NOC_OFFSET 0x00000000 1304*5113495bSYour Name #define SEQ_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 1305*5113495bSYour Name #define SEQ_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 1306*5113495bSYour Name #define SEQ_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 1307*5113495bSYour Name #define SEQ_PHYB_DBG_ITM_OFFSET 0x00008000 1308*5113495bSYour Name #define SEQ_PHYB_DBG_DWT_OFFSET 0x00009000 1309*5113495bSYour Name #define SEQ_PHYB_DBG_FPB_OFFSET 0x0000a000 1310*5113495bSYour Name #define SEQ_PHYB_DBG_SCS_OFFSET 0x0000b000 1311*5113495bSYour Name #define SEQ_PHYB_DBG_ETM_OFFSET 0x0000c000 1312*5113495bSYour Name #define SEQ_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 1313*5113495bSYour Name #define SEQ_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 1314*5113495bSYour Name 1315*5113495bSYour Name 1316*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1317*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_wlan 1318*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1319*5113495bSYour Name 1320*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_OFFSET 0x00000000 1321*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00000000 1322*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 1323*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00080000 1324*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00080000 1325*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00090000 1326*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x000a0000 1327*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x000a1000 1328*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x000a2000 1329*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x000a3000 1330*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x000b0000 1331*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x000b0000 1332*5113495bSYour Name 1333*5113495bSYour Name 1334*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1335*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss 1336*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1337*5113495bSYour Name 1338*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00000000 1339*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 1340*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00080000 1341*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00080000 1342*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00090000 1343*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x000a0000 1344*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x000a1000 1345*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x000a2000 1346*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x000a3000 1347*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x000b0000 1348*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x000b0000 1349*5113495bSYour Name 1350*5113495bSYour Name 1351*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1352*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_public 1353*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1354*5113495bSYour Name 1355*5113495bSYour Name #define SEQ_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 1356*5113495bSYour Name 1357*5113495bSYour Name 1358*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1359*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_private 1360*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1361*5113495bSYour Name 1362*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00000000 1363*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00010000 1364*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00020000 1365*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x00021000 1366*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x00022000 1367*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x00023000 1368*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x00030000 1369*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x00030000 1370*5113495bSYour Name 1371*5113495bSYour Name 1372*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1373*5113495bSYour Name // Instance Relative Offsets from Block q6ss_rscc 1374*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 1375*5113495bSYour Name 1376*5113495bSYour Name #define SEQ_Q6SS_RSCC_RSCC_RSC_OFFSET 0x00000000 1377*5113495bSYour Name 1378*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET 0x1B80000 1379*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET 0x1B81000 1380*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET 0x1B82000 1381*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET 0x1B83000 1382*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET 0x1B84000 1383*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET 0x1B85000 1384*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET 0x1B86000 1385*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET 0x1B87000 1386*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET 0x1B88000 1387*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET 0x1B89000 1388*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET 0x1B8A000 1389*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET 0x1B8B000 1390*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET 0x1B8C000 1391*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET 0x1B8D000 1392*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET 0x1B8E000 1393*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET 0x1B8F000 1394*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET 0x1B90000 1395*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET 0x1B91000 1396*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET 0x1B92000 1397*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET 0x1B93000 1398*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET 0x1B94000 1399*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET 0x1B95000 1400*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET 0x1B96000 1401*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET 0x1B97000 1402*5113495bSYour Name #define SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_COMMON_REG_OFFSET 0x1B98000 1403*5113495bSYour Name 1404*5113495bSYour Name #endif 1405*5113495bSYour Name 1406