1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // mac_tcl_reg_seq_hwioreg.h : automatically generated by Autoseq 3.8 11/12/2019 22*5113495bSYour Name // User Name:pparekh 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __MAC_TCL_REG_SEQ_REG_H__ 29*5113495bSYour Name #define __MAC_TCL_REG_SEQ_REG_H__ 30*5113495bSYour Name 31*5113495bSYour Name #include "seq_hwio.h" 32*5113495bSYour Name #include "mac_tcl_reg_seq_hwiobase.h" 33*5113495bSYour Name #ifdef SCALE_INCLUDES 34*5113495bSYour Name #include "HALhwio.h" 35*5113495bSYour Name #else 36*5113495bSYour Name #include "msmhwio.h" 37*5113495bSYour Name #endif 38*5113495bSYour Name 39*5113495bSYour Name 40*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 41*5113495bSYour Name // Register Data for Block MAC_TCL_REG 42*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 43*5113495bSYour Name 44*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CTRL //// 45*5113495bSYour Name 46*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x) (x+0x00000000) 47*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_PHYS(x) (x+0x00000000) 48*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK 0x0003ffe0 49*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_SHFT 5 50*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x) \ 51*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK) 52*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ 53*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask) 54*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUT(x, val) \ 55*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), val) 56*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 57*5113495bSYour Name do {\ 58*5113495bSYour Name HWIO_INTLOCK(); \ 59*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x)); \ 60*5113495bSYour Name HWIO_INTFREE();\ 61*5113495bSYour Name } while (0) 62*5113495bSYour Name 63*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 64*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 65*5113495bSYour Name 66*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 67*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 68*5113495bSYour Name 69*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CTRL //// 70*5113495bSYour Name 71*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x) (x+0x00000004) 72*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_PHYS(x) (x+0x00000004) 73*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK 0x0003ffe0 74*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_SHFT 5 75*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x) \ 76*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK) 77*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ 78*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask) 79*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUT(x, val) \ 80*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), val) 81*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ 82*5113495bSYour Name do {\ 83*5113495bSYour Name HWIO_INTLOCK(); \ 84*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x)); \ 85*5113495bSYour Name HWIO_INTFREE();\ 86*5113495bSYour Name } while (0) 87*5113495bSYour Name 88*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 89*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 90*5113495bSYour Name 91*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_BMSK 0x00000020 92*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_SHFT 0x5 93*5113495bSYour Name 94*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CTRL //// 95*5113495bSYour Name 96*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x) (x+0x00000008) 97*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_PHYS(x) (x+0x00000008) 98*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK 0x0003ffe0 99*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_SHFT 5 100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x) \ 101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK) 102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ 103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask) 104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUT(x, val) \ 105*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), val) 106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUTM(x, mask, val) \ 107*5113495bSYour Name do {\ 108*5113495bSYour Name HWIO_INTLOCK(); \ 109*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x)); \ 110*5113495bSYour Name HWIO_INTFREE();\ 111*5113495bSYour Name } while (0) 112*5113495bSYour Name 113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 114*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 115*5113495bSYour Name 116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_BMSK 0x00000020 117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_SHFT 0x5 118*5113495bSYour Name 119*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CTRL //// 120*5113495bSYour Name 121*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x) (x+0x0000000c) 122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_PHYS(x) (x+0x0000000c) 123*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK 0x0003ffe0 124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_SHFT 5 125*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x) \ 126*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK) 127*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_INM(x, mask) \ 128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask) 129*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUT(x, val) \ 130*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), val) 131*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 132*5113495bSYour Name do {\ 133*5113495bSYour Name HWIO_INTLOCK(); \ 134*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x)); \ 135*5113495bSYour Name HWIO_INTFREE();\ 136*5113495bSYour Name } while (0) 137*5113495bSYour Name 138*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 139*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 140*5113495bSYour Name 141*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 142*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 143*5113495bSYour Name 144*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CTRL //// 145*5113495bSYour Name 146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x) (x+0x00000010) 147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_PHYS(x) (x+0x00000010) 148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK 0x0003ffe0 149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_SHFT 5 150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x) \ 151*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK) 152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_INM(x, mask) \ 153*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask) 154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUT(x, val) \ 155*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), val) 156*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUTM(x, mask, val) \ 157*5113495bSYour Name do {\ 158*5113495bSYour Name HWIO_INTLOCK(); \ 159*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x)); \ 160*5113495bSYour Name HWIO_INTFREE();\ 161*5113495bSYour Name } while (0) 162*5113495bSYour Name 163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 165*5113495bSYour Name 166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_BMSK 0x00000020 167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_SHFT 0x5 168*5113495bSYour Name 169*5113495bSYour Name //// Register TCL_R0_CONS_RING_CMN_CTRL_REG //// 170*5113495bSYour Name 171*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x) (x+0x00000014) 172*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_PHYS(x) (x+0x00000014) 173*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK 0x001fffff 174*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SHFT 0 175*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x) \ 176*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK) 177*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INM(x, mask) \ 178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask) 179*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUT(x, val) \ 180*5113495bSYour Name out_dword( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), val) 181*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUTM(x, mask, val) \ 182*5113495bSYour Name do {\ 183*5113495bSYour Name HWIO_INTLOCK(); \ 184*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask, val, HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x)); \ 185*5113495bSYour Name HWIO_INTFREE();\ 186*5113495bSYour Name } while (0) 187*5113495bSYour Name 188*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_BMSK 0x00100000 189*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_SHFT 0x14 190*5113495bSYour Name 191*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_BMSK 0x00080000 192*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_SHFT 0x13 193*5113495bSYour Name 194*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_BMSK 0x00040000 195*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_SHFT 0x12 196*5113495bSYour Name 197*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK 0x00020000 198*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT 0x11 199*5113495bSYour Name 200*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_BMSK 0x0001c000 201*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_SHFT 0xe 202*5113495bSYour Name 203*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_BMSK 0x00002000 204*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_SHFT 0xd 205*5113495bSYour Name 206*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_BMSK 0x00001000 207*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_SHFT 0xc 208*5113495bSYour Name 209*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_BMSK 0x00000800 210*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_SHFT 0xb 211*5113495bSYour Name 212*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_BMSK 0x00000400 213*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_SHFT 0xa 214*5113495bSYour Name 215*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_BMSK 0x00000200 216*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_SHFT 0x9 217*5113495bSYour Name 218*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_BMSK 0x00000100 219*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_SHFT 0x8 220*5113495bSYour Name 221*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_BMSK 0x00000080 222*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_SHFT 0x7 223*5113495bSYour Name 224*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_BMSK 0x00000040 225*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_SHFT 0x6 226*5113495bSYour Name 227*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_BMSK 0x00000020 228*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_SHFT 0x5 229*5113495bSYour Name 230*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_BMSK 0x00000010 231*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_SHFT 0x4 232*5113495bSYour Name 233*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_BMSK 0x00000008 234*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_SHFT 0x3 235*5113495bSYour Name 236*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_BMSK 0x00000004 237*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_SHFT 0x2 238*5113495bSYour Name 239*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_BMSK 0x00000002 240*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_SHFT 0x1 241*5113495bSYour Name 242*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_BMSK 0x00000001 243*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_SHFT 0x0 244*5113495bSYour Name 245*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_CTRL //// 246*5113495bSYour Name 247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x) (x+0x00000018) 248*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_PHYS(x) (x+0x00000018) 249*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK 0x0000ffff 250*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_SHFT 0 251*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x) \ 252*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK) 253*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_INM(x, mask) \ 254*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask) 255*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUT(x, val) \ 256*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), val) 257*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUTM(x, mask, val) \ 258*5113495bSYour Name do {\ 259*5113495bSYour Name HWIO_INTLOCK(); \ 260*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x)); \ 261*5113495bSYour Name HWIO_INTFREE();\ 262*5113495bSYour Name } while (0) 263*5113495bSYour Name 264*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_BMSK 0x0000c000 265*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_SHFT 0xe 266*5113495bSYour Name 267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_BMSK 0x00002000 268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_SHFT 0xd 269*5113495bSYour Name 270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_BMSK 0x00001000 271*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_SHFT 0xc 272*5113495bSYour Name 273*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 274*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 275*5113495bSYour Name 276*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_CTRL //// 277*5113495bSYour Name 278*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x) (x+0x0000001c) 279*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_PHYS(x) (x+0x0000001c) 280*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK 0x00000fff 281*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_SHFT 0 282*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x) \ 283*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK) 284*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_INM(x, mask) \ 285*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask) 286*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUT(x, val) \ 287*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), val) 288*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUTM(x, mask, val) \ 289*5113495bSYour Name do {\ 290*5113495bSYour Name HWIO_INTLOCK(); \ 291*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x)); \ 292*5113495bSYour Name HWIO_INTFREE();\ 293*5113495bSYour Name } while (0) 294*5113495bSYour Name 295*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 296*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 297*5113495bSYour Name 298*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_CTRL //// 299*5113495bSYour Name 300*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x) (x+0x00000020) 301*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_PHYS(x) (x+0x00000020) 302*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK 0x00000fff 303*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_SHFT 0 304*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x) \ 305*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK) 306*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_INM(x, mask) \ 307*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask) 308*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUT(x, val) \ 309*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), val) 310*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUTM(x, mask, val) \ 311*5113495bSYour Name do {\ 312*5113495bSYour Name HWIO_INTLOCK(); \ 313*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x)); \ 314*5113495bSYour Name HWIO_INTFREE();\ 315*5113495bSYour Name } while (0) 316*5113495bSYour Name 317*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 318*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 319*5113495bSYour Name 320*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_CTRL //// 321*5113495bSYour Name 322*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x) (x+0x00000024) 323*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_PHYS(x) (x+0x00000024) 324*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK 0x00000fff 325*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_SHFT 0 326*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x) \ 327*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK) 328*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_INM(x, mask) \ 329*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask) 330*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUT(x, val) \ 331*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), val) 332*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUTM(x, mask, val) \ 333*5113495bSYour Name do {\ 334*5113495bSYour Name HWIO_INTLOCK(); \ 335*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x)); \ 336*5113495bSYour Name HWIO_INTFREE();\ 337*5113495bSYour Name } while (0) 338*5113495bSYour Name 339*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 340*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 341*5113495bSYour Name 342*5113495bSYour Name //// Register TCL_R0_GEN_CTRL //// 343*5113495bSYour Name 344*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDR(x) (x+0x00000028) 345*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PHYS(x) (x+0x00000028) 346*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_RMSK 0xfffff1fb 347*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_SHFT 0 348*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_IN(x) \ 349*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), HWIO_TCL_R0_GEN_CTRL_RMSK) 350*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_INM(x, mask) \ 351*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask) 352*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUT(x, val) \ 353*5113495bSYour Name out_dword( HWIO_TCL_R0_GEN_CTRL_ADDR(x), val) 354*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUTM(x, mask, val) \ 355*5113495bSYour Name do {\ 356*5113495bSYour Name HWIO_INTLOCK(); \ 357*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GEN_CTRL_IN(x)); \ 358*5113495bSYour Name HWIO_INTFREE();\ 359*5113495bSYour Name } while (0) 360*5113495bSYour Name 361*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_BMSK 0xffff0000 362*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_SHFT 0x10 363*5113495bSYour Name 364*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_BMSK 0x00008000 365*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_SHFT 0xf 366*5113495bSYour Name 367*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_BMSK 0x00004000 368*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_SHFT 0xe 369*5113495bSYour Name 370*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_BMSK 0x00002000 371*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_SHFT 0xd 372*5113495bSYour Name 373*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_BMSK 0x00001000 374*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_SHFT 0xc 375*5113495bSYour Name 376*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_BMSK 0x00000100 377*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_SHFT 0x8 378*5113495bSYour Name 379*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_BMSK 0x00000080 380*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_SHFT 0x7 381*5113495bSYour Name 382*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_BMSK 0x00000040 383*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_SHFT 0x6 384*5113495bSYour Name 385*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_BMSK 0x00000020 386*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_SHFT 0x5 387*5113495bSYour Name 388*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_BMSK 0x00000010 389*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_SHFT 0x4 390*5113495bSYour Name 391*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_BMSK 0x00000008 392*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_SHFT 0x3 393*5113495bSYour Name 394*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_BMSK 0x00000002 395*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_SHFT 0x1 396*5113495bSYour Name 397*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_BMSK 0x00000001 398*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_SHFT 0x0 399*5113495bSYour Name 400*5113495bSYour Name //// Register TCL_R0_DSCP_TID_MAP_n //// 401*5113495bSYour Name 402*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n) (base+0x2C+0x4*n) 403*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_PHYS(base, n) (base+0x2C+0x4*n) 404*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK 0xffffffff 405*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_SHFT 0 406*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_MAXn 287 407*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n) \ 408*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK) 409*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INMI(base, n, mask) \ 410*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask) 411*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTI(base, n, val) \ 412*5113495bSYour Name out_dword( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), val) 413*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTMI(base, n, mask, val) \ 414*5113495bSYour Name do {\ 415*5113495bSYour Name HWIO_INTLOCK(); \ 416*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask, val, HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n)); \ 417*5113495bSYour Name HWIO_INTFREE();\ 418*5113495bSYour Name } while (0) 419*5113495bSYour Name 420*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_BMSK 0xffffffff 421*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_SHFT 0x0 422*5113495bSYour Name 423*5113495bSYour Name //// Register TCL_R0_PCP_TID_MAP //// 424*5113495bSYour Name 425*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_ADDR(x) (x+0x000004ac) 426*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PHYS(x) (x+0x000004ac) 427*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_RMSK 0x00ffffff 428*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_SHFT 0 429*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_IN(x) \ 430*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), HWIO_TCL_R0_PCP_TID_MAP_RMSK) 431*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_INM(x, mask) \ 432*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask) 433*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUT(x, val) \ 434*5113495bSYour Name out_dword( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), val) 435*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUTM(x, mask, val) \ 436*5113495bSYour Name do {\ 437*5113495bSYour Name HWIO_INTLOCK(); \ 438*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask, val, HWIO_TCL_R0_PCP_TID_MAP_IN(x)); \ 439*5113495bSYour Name HWIO_INTFREE();\ 440*5113495bSYour Name } while (0) 441*5113495bSYour Name 442*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_BMSK 0x00e00000 443*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT 0x15 444*5113495bSYour Name 445*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_BMSK 0x001c0000 446*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT 0x12 447*5113495bSYour Name 448*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_BMSK 0x00038000 449*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT 0xf 450*5113495bSYour Name 451*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_BMSK 0x00007000 452*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT 0xc 453*5113495bSYour Name 454*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_BMSK 0x00000e00 455*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT 0x9 456*5113495bSYour Name 457*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_BMSK 0x000001c0 458*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT 0x6 459*5113495bSYour Name 460*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_BMSK 0x00000038 461*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT 0x3 462*5113495bSYour Name 463*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_BMSK 0x00000007 464*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_SHFT 0x0 465*5113495bSYour Name 466*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_31_0 //// 467*5113495bSYour Name 468*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x) (x+0x000004b0) 469*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_PHYS(x) (x+0x000004b0) 470*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK 0xffffffff 471*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_SHFT 0 472*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x) \ 473*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK) 474*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_INM(x, mask) \ 475*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask) 476*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUT(x, val) \ 477*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), val) 478*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUTM(x, mask, val) \ 479*5113495bSYour Name do {\ 480*5113495bSYour Name HWIO_INTLOCK(); \ 481*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x)); \ 482*5113495bSYour Name HWIO_INTFREE();\ 483*5113495bSYour Name } while (0) 484*5113495bSYour Name 485*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_BMSK 0xffffffff 486*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_SHFT 0x0 487*5113495bSYour Name 488*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_63_32 //// 489*5113495bSYour Name 490*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x) (x+0x000004b4) 491*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_PHYS(x) (x+0x000004b4) 492*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK 0xffffffff 493*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_SHFT 0 494*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x) \ 495*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK) 496*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_INM(x, mask) \ 497*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask) 498*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUT(x, val) \ 499*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), val) 500*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUTM(x, mask, val) \ 501*5113495bSYour Name do {\ 502*5113495bSYour Name HWIO_INTLOCK(); \ 503*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x)); \ 504*5113495bSYour Name HWIO_INTFREE();\ 505*5113495bSYour Name } while (0) 506*5113495bSYour Name 507*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_BMSK 0xffffffff 508*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_SHFT 0x0 509*5113495bSYour Name 510*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_64 //// 511*5113495bSYour Name 512*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x) (x+0x000004b8) 513*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_PHYS(x) (x+0x000004b8) 514*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK 0x00000001 515*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_SHFT 0 516*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x) \ 517*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK) 518*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_INM(x, mask) \ 519*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask) 520*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUT(x, val) \ 521*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), val) 522*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUTM(x, mask, val) \ 523*5113495bSYour Name do {\ 524*5113495bSYour Name HWIO_INTLOCK(); \ 525*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x)); \ 526*5113495bSYour Name HWIO_INTFREE();\ 527*5113495bSYour Name } while (0) 528*5113495bSYour Name 529*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_BMSK 0x00000001 530*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_SHFT 0x0 531*5113495bSYour Name 532*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_QUEUE //// 533*5113495bSYour Name 534*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x) (x+0x000004bc) 535*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PHYS(x) (x+0x000004bc) 536*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK 0x00fffdfc 537*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_SHFT 2 538*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x) \ 539*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK) 540*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_INM(x, mask) \ 541*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask) 542*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUT(x, val) \ 543*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), val) 544*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUTM(x, mask, val) \ 545*5113495bSYour Name do {\ 546*5113495bSYour Name HWIO_INTLOCK(); \ 547*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x)); \ 548*5113495bSYour Name HWIO_INTFREE();\ 549*5113495bSYour Name } while (0) 550*5113495bSYour Name 551*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_BMSK 0x00800000 552*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_SHFT 0x17 553*5113495bSYour Name 554*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_BMSK 0x00700000 555*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_SHFT 0x14 556*5113495bSYour Name 557*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_BMSK 0x000e0000 558*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_SHFT 0x11 559*5113495bSYour Name 560*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_BMSK 0x0001c000 561*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_SHFT 0xe 562*5113495bSYour Name 563*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_BMSK 0x00002000 564*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_SHFT 0xd 565*5113495bSYour Name 566*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_BMSK 0x00001000 567*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_SHFT 0xc 568*5113495bSYour Name 569*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_BMSK 0x00000800 570*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_SHFT 0xb 571*5113495bSYour Name 572*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_BMSK 0x00000400 573*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_SHFT 0xa 574*5113495bSYour Name 575*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_BMSK 0x000001c0 576*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_SHFT 0x6 577*5113495bSYour Name 578*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_BMSK 0x00000030 579*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_SHFT 0x4 580*5113495bSYour Name 581*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_BMSK 0x0000000c 582*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_SHFT 0x2 583*5113495bSYour Name 584*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_LOW //// 585*5113495bSYour Name 586*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c0) 587*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c0) 588*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 589*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_SHFT 0 590*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x) \ 591*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK) 592*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 593*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 594*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 595*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 596*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 597*5113495bSYour Name do {\ 598*5113495bSYour Name HWIO_INTLOCK(); \ 599*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 600*5113495bSYour Name HWIO_INTFREE();\ 601*5113495bSYour Name } while (0) 602*5113495bSYour Name 603*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 604*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 605*5113495bSYour Name 606*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH //// 607*5113495bSYour Name 608*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004c4) 609*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004c4) 610*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 611*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_SHFT 0 612*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 613*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK) 614*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 615*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 616*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 617*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 618*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 619*5113495bSYour Name do {\ 620*5113495bSYour Name HWIO_INTLOCK(); \ 621*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 622*5113495bSYour Name HWIO_INTFREE();\ 623*5113495bSYour Name } while (0) 624*5113495bSYour Name 625*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 626*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 627*5113495bSYour Name 628*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_LOW //// 629*5113495bSYour Name 630*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c8) 631*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c8) 632*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 633*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_SHFT 0 634*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x) \ 635*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK) 636*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 637*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 638*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 639*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 640*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 641*5113495bSYour Name do {\ 642*5113495bSYour Name HWIO_INTLOCK(); \ 643*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 644*5113495bSYour Name HWIO_INTFREE();\ 645*5113495bSYour Name } while (0) 646*5113495bSYour Name 647*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 648*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 649*5113495bSYour Name 650*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH //// 651*5113495bSYour Name 652*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004cc) 653*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004cc) 654*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 655*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_SHFT 0 656*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 657*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK) 658*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 659*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 660*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 661*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 662*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 663*5113495bSYour Name do {\ 664*5113495bSYour Name HWIO_INTLOCK(); \ 665*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 666*5113495bSYour Name HWIO_INTFREE();\ 667*5113495bSYour Name } while (0) 668*5113495bSYour Name 669*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 670*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 671*5113495bSYour Name 672*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_METADATA //// 673*5113495bSYour Name 674*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x) (x+0x000004d0) 675*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_PHYS(x) (x+0x000004d0) 676*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK 0xffffffff 677*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_SHFT 0 678*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x) \ 679*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK) 680*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_INM(x, mask) \ 681*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask) 682*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUT(x, val) \ 683*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), val) 684*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUTM(x, mask, val) \ 685*5113495bSYour Name do {\ 686*5113495bSYour Name HWIO_INTLOCK(); \ 687*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x)); \ 688*5113495bSYour Name HWIO_INTFREE();\ 689*5113495bSYour Name } while (0) 690*5113495bSYour Name 691*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_BMSK 0xffff0000 692*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_SHFT 0x10 693*5113495bSYour Name 694*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_BMSK 0x0000ffff 695*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_SHFT 0x0 696*5113495bSYour Name 697*5113495bSYour Name //// Register TCL_R0_TID_MAP_PRTY //// 698*5113495bSYour Name 699*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x) (x+0x000004d4) 700*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_PHYS(x) (x+0x000004d4) 701*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_RMSK 0x000000ef 702*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_SHFT 0 703*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_IN(x) \ 704*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), HWIO_TCL_R0_TID_MAP_PRTY_RMSK) 705*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_INM(x, mask) \ 706*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask) 707*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUT(x, val) \ 708*5113495bSYour Name out_dword( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), val) 709*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUTM(x, mask, val) \ 710*5113495bSYour Name do {\ 711*5113495bSYour Name HWIO_INTLOCK(); \ 712*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask, val, HWIO_TCL_R0_TID_MAP_PRTY_IN(x)); \ 713*5113495bSYour Name HWIO_INTFREE();\ 714*5113495bSYour Name } while (0) 715*5113495bSYour Name 716*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_BMSK 0x000000e0 717*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_SHFT 0x5 718*5113495bSYour Name 719*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_BMSK 0x0000000f 720*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_SHFT 0x0 721*5113495bSYour Name 722*5113495bSYour Name //// Register TCL_R0_INVALID_APB_ACC_ADDR //// 723*5113495bSYour Name 724*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x) (x+0x000004d8) 725*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_PHYS(x) (x+0x000004d8) 726*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK 0xffffffff 727*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_SHFT 0 728*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x) \ 729*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK) 730*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_INM(x, mask) \ 731*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask) 732*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUT(x, val) \ 733*5113495bSYour Name out_dword( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), val) 734*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUTM(x, mask, val) \ 735*5113495bSYour Name do {\ 736*5113495bSYour Name HWIO_INTLOCK(); \ 737*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask, val, HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x)); \ 738*5113495bSYour Name HWIO_INTFREE();\ 739*5113495bSYour Name } while (0) 740*5113495bSYour Name 741*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_BMSK 0xffffffff 742*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_SHFT 0x0 743*5113495bSYour Name 744*5113495bSYour Name //// Register TCL_R0_WATCHDOG //// 745*5113495bSYour Name 746*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_ADDR(x) (x+0x000004dc) 747*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_PHYS(x) (x+0x000004dc) 748*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_RMSK 0xffffffff 749*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_SHFT 0 750*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_IN(x) \ 751*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), HWIO_TCL_R0_WATCHDOG_RMSK) 752*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_INM(x, mask) \ 753*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), mask) 754*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUT(x, val) \ 755*5113495bSYour Name out_dword( HWIO_TCL_R0_WATCHDOG_ADDR(x), val) 756*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUTM(x, mask, val) \ 757*5113495bSYour Name do {\ 758*5113495bSYour Name HWIO_INTLOCK(); \ 759*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_WATCHDOG_IN(x)); \ 760*5113495bSYour Name HWIO_INTFREE();\ 761*5113495bSYour Name } while (0) 762*5113495bSYour Name 763*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_BMSK 0xffff0000 764*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_SHFT 0x10 765*5113495bSYour Name 766*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_BMSK 0x0000ffff 767*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_SHFT 0x0 768*5113495bSYour Name 769*5113495bSYour Name //// Register TCL_R0_LCE_RULE_n //// 770*5113495bSYour Name 771*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n) (base+0x4E0+0x4*n) 772*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_PHYS(base, n) (base+0x4E0+0x4*n) 773*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_RMSK 0x007fffff 774*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_SHFT 0 775*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MAXn 25 776*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INI(base, n) \ 777*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), HWIO_TCL_R0_LCE_RULE_n_RMSK) 778*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INMI(base, n, mask) \ 779*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask) 780*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTI(base, n, val) \ 781*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), val) 782*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTMI(base, n, mask, val) \ 783*5113495bSYour Name do {\ 784*5113495bSYour Name HWIO_INTLOCK(); \ 785*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_RULE_n_INI(base, n)); \ 786*5113495bSYour Name HWIO_INTFREE();\ 787*5113495bSYour Name } while (0) 788*5113495bSYour Name 789*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_BMSK 0x00400000 790*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_SHFT 0x16 791*5113495bSYour Name 792*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_BMSK 0x00200000 793*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_SHFT 0x15 794*5113495bSYour Name 795*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_BMSK 0x00180000 796*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_SHFT 0x13 797*5113495bSYour Name 798*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_BMSK 0x00040000 799*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_SHFT 0x12 800*5113495bSYour Name 801*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_BMSK 0x00020000 802*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_SHFT 0x11 803*5113495bSYour Name 804*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_BMSK 0x00010000 805*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_SHFT 0x10 806*5113495bSYour Name 807*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_BMSK 0x0000ffff 808*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_SHFT 0x0 809*5113495bSYour Name 810*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n //// 811*5113495bSYour Name 812*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n) (base+0x548+0x4*n) 813*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_PHYS(base, n) (base+0x548+0x4*n) 814*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK 0xffffffff 815*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_SHFT 0 816*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_MAXn 25 817*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n) \ 818*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK) 819*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INMI(base, n, mask) \ 820*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask) 821*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTI(base, n, val) \ 822*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), val) 823*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTMI(base, n, mask, val) \ 824*5113495bSYour Name do {\ 825*5113495bSYour Name HWIO_INTLOCK(); \ 826*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n)); \ 827*5113495bSYour Name HWIO_INTFREE();\ 828*5113495bSYour Name } while (0) 829*5113495bSYour Name 830*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_BMSK 0xffffffff 831*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_SHFT 0x0 832*5113495bSYour Name 833*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n //// 834*5113495bSYour Name 835*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n) (base+0x5B0+0x4*n) 836*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_PHYS(base, n) (base+0x5B0+0x4*n) 837*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK 0x000000ff 838*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_SHFT 0 839*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_MAXn 25 840*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n) \ 841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK) 842*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INMI(base, n, mask) \ 843*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask) 844*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTI(base, n, val) \ 845*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), val) 846*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTMI(base, n, mask, val) \ 847*5113495bSYour Name do {\ 848*5113495bSYour Name HWIO_INTLOCK(); \ 849*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n)); \ 850*5113495bSYour Name HWIO_INTFREE();\ 851*5113495bSYour Name } while (0) 852*5113495bSYour Name 853*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_BMSK 0x000000ff 854*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_SHFT 0x0 855*5113495bSYour Name 856*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_HANDLER_n //// 857*5113495bSYour Name 858*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n) (base+0x618+0x4*n) 859*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_PHYS(base, n) (base+0x618+0x4*n) 860*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK 0x003fffff 861*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_SHFT 0 862*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MAXn 25 863*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n) \ 864*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK) 865*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INMI(base, n, mask) \ 866*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask) 867*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTI(base, n, val) \ 868*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), val) 869*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTMI(base, n, mask, val) \ 870*5113495bSYour Name do {\ 871*5113495bSYour Name HWIO_INTLOCK(); \ 872*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n)); \ 873*5113495bSYour Name HWIO_INTFREE();\ 874*5113495bSYour Name } while (0) 875*5113495bSYour Name 876*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_BMSK 0x00200000 877*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_SHFT 0x15 878*5113495bSYour Name 879*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_BMSK 0x001fffe0 880*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_SHFT 0x5 881*5113495bSYour Name 882*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_BMSK 0x00000010 883*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_SHFT 0x4 884*5113495bSYour Name 885*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_BMSK 0x00000008 886*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_SHFT 0x3 887*5113495bSYour Name 888*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_BMSK 0x00000004 889*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_SHFT 0x2 890*5113495bSYour Name 891*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_BMSK 0x00000003 892*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_SHFT 0x0 893*5113495bSYour Name 894*5113495bSYour Name //// Register TCL_R0_CLKGATE_DISABLE //// 895*5113495bSYour Name 896*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x) (x+0x00000680) 897*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PHYS(x) (x+0x00000680) 898*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_RMSK 0xffffffff 899*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SHFT 0 900*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_IN(x) \ 901*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_CLKGATE_DISABLE_RMSK) 902*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_INM(x, mask) \ 903*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask) 904*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUT(x, val) \ 905*5113495bSYour Name out_dword( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), val) 906*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUTM(x, mask, val) \ 907*5113495bSYour Name do {\ 908*5113495bSYour Name HWIO_INTLOCK(); \ 909*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_CLKGATE_DISABLE_IN(x)); \ 910*5113495bSYour Name HWIO_INTFREE();\ 911*5113495bSYour Name } while (0) 912*5113495bSYour Name 913*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_BMSK 0x80000000 914*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_SHFT 0x1f 915*5113495bSYour Name 916*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 917*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 918*5113495bSYour Name 919*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_BMSK 0x20000000 920*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_SHFT 0x1d 921*5113495bSYour Name 922*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_BMSK 0x10000000 923*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_SHFT 0x1c 924*5113495bSYour Name 925*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_BMSK 0x08000000 926*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_SHFT 0x1b 927*5113495bSYour Name 928*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_BMSK 0x04000000 929*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_SHFT 0x1a 930*5113495bSYour Name 931*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_BMSK 0x02000000 932*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_SHFT 0x19 933*5113495bSYour Name 934*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_BMSK 0x01000000 935*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_SHFT 0x18 936*5113495bSYour Name 937*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_BMSK 0x00800000 938*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_SHFT 0x17 939*5113495bSYour Name 940*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_BMSK 0x00400000 941*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_SHFT 0x16 942*5113495bSYour Name 943*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_BMSK 0x00200000 944*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_SHFT 0x15 945*5113495bSYour Name 946*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_BMSK 0x00100000 947*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_SHFT 0x14 948*5113495bSYour Name 949*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_BMSK 0x00080000 950*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_SHFT 0x13 951*5113495bSYour Name 952*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_BMSK 0x00040000 953*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_SHFT 0x12 954*5113495bSYour Name 955*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_BMSK 0x00020000 956*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_SHFT 0x11 957*5113495bSYour Name 958*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_BMSK 0x00010000 959*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_SHFT 0x10 960*5113495bSYour Name 961*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_BMSK 0x00008000 962*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_SHFT 0xf 963*5113495bSYour Name 964*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_BMSK 0x00004000 965*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_SHFT 0xe 966*5113495bSYour Name 967*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_BMSK 0x00002000 968*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_SHFT 0xd 969*5113495bSYour Name 970*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_BMSK 0x00001000 971*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_SHFT 0xc 972*5113495bSYour Name 973*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_BMSK 0x00000800 974*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_SHFT 0xb 975*5113495bSYour Name 976*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_BMSK 0x00000400 977*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_SHFT 0xa 978*5113495bSYour Name 979*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_BMSK 0x00000200 980*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_SHFT 0x9 981*5113495bSYour Name 982*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_BMSK 0x00000100 983*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_SHFT 0x8 984*5113495bSYour Name 985*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_BMSK 0x00000080 986*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_SHFT 0x7 987*5113495bSYour Name 988*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_BMSK 0x00000040 989*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_SHFT 0x6 990*5113495bSYour Name 991*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_BMSK 0x00000020 992*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_SHFT 0x5 993*5113495bSYour Name 994*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_BMSK 0x00000010 995*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_SHFT 0x4 996*5113495bSYour Name 997*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_BMSK 0x00000008 998*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_SHFT 0x3 999*5113495bSYour Name 1000*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_BMSK 0x00000004 1001*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_SHFT 0x2 1002*5113495bSYour Name 1003*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_CCE_BMSK 0x00000002 1004*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_CCE_SHFT 0x1 1005*5113495bSYour Name 1006*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_BMSK 0x00000001 1007*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_SHFT 0x0 1008*5113495bSYour Name 1009*5113495bSYour Name //// Register TCL_R0_CREDIT_COUNT //// 1010*5113495bSYour Name 1011*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ADDR(x) (x+0x00000684) 1012*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_PHYS(x) (x+0x00000684) 1013*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_RMSK 0x0001ffff 1014*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_SHFT 0 1015*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_IN(x) \ 1016*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CREDIT_COUNT_RMSK) 1017*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_INM(x, mask) \ 1018*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask) 1019*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUT(x, val) \ 1020*5113495bSYour Name out_dword( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), val) 1021*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUTM(x, mask, val) \ 1022*5113495bSYour Name do {\ 1023*5113495bSYour Name HWIO_INTLOCK(); \ 1024*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CREDIT_COUNT_IN(x)); \ 1025*5113495bSYour Name HWIO_INTFREE();\ 1026*5113495bSYour Name } while (0) 1027*5113495bSYour Name 1028*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_BMSK 0x00010000 1029*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_SHFT 0x10 1030*5113495bSYour Name 1031*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1032*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_SHFT 0x0 1033*5113495bSYour Name 1034*5113495bSYour Name //// Register TCL_R0_CURRENT_CREDIT_COUNT //// 1035*5113495bSYour Name 1036*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x) (x+0x00000688) 1037*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_PHYS(x) (x+0x00000688) 1038*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK 0x0000ffff 1039*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_SHFT 0 1040*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x) \ 1041*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK) 1042*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_INM(x, mask) \ 1043*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask) 1044*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUT(x, val) \ 1045*5113495bSYour Name out_dword( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), val) 1046*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUTM(x, mask, val) \ 1047*5113495bSYour Name do {\ 1048*5113495bSYour Name HWIO_INTLOCK(); \ 1049*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x)); \ 1050*5113495bSYour Name HWIO_INTFREE();\ 1051*5113495bSYour Name } while (0) 1052*5113495bSYour Name 1053*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1054*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_SHFT 0x0 1055*5113495bSYour Name 1056*5113495bSYour Name //// Register TCL_R0_S_PARE_REGISTER //// 1057*5113495bSYour Name 1058*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x) (x+0x0000068c) 1059*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_PHYS(x) (x+0x0000068c) 1060*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_RMSK 0xffffffff 1061*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_SHFT 0 1062*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_IN(x) \ 1063*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), HWIO_TCL_R0_S_PARE_REGISTER_RMSK) 1064*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_INM(x, mask) \ 1065*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask) 1066*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUT(x, val) \ 1067*5113495bSYour Name out_dword( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), val) 1068*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUTM(x, mask, val) \ 1069*5113495bSYour Name do {\ 1070*5113495bSYour Name HWIO_INTLOCK(); \ 1071*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R0_S_PARE_REGISTER_IN(x)); \ 1072*5113495bSYour Name HWIO_INTFREE();\ 1073*5113495bSYour Name } while (0) 1074*5113495bSYour Name 1075*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_BMSK 0xffffffff 1076*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_SHFT 0x0 1077*5113495bSYour Name 1078*5113495bSYour Name //// Register TCL_R0_MISC_CTRL //// 1079*5113495bSYour Name 1080*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_ADDR(x) (x+0x00000690) 1081*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_PHYS(x) (x+0x00000690) 1082*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_RMSK 0x00000003 1083*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_SHFT 0 1084*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_IN(x) \ 1085*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_MISC_CTRL_ADDR(x), HWIO_TCL_R0_MISC_CTRL_RMSK) 1086*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_INM(x, mask) \ 1087*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_MISC_CTRL_ADDR(x), mask) 1088*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_OUT(x, val) \ 1089*5113495bSYour Name out_dword( HWIO_TCL_R0_MISC_CTRL_ADDR(x), val) 1090*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_OUTM(x, mask, val) \ 1091*5113495bSYour Name do {\ 1092*5113495bSYour Name HWIO_INTLOCK(); \ 1093*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_MISC_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_MISC_CTRL_IN(x)); \ 1094*5113495bSYour Name HWIO_INTFREE();\ 1095*5113495bSYour Name } while (0) 1096*5113495bSYour Name 1097*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_DATA_CORRUPT_FIX_DISABLE_CHK_BIT_BMSK 0x00000002 1098*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_DATA_CORRUPT_FIX_DISABLE_CHK_BIT_SHFT 0x1 1099*5113495bSYour Name 1100*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_MSI_DISABLE_CHK_BIT_BMSK 0x00000001 1101*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_MSI_DISABLE_CHK_BIT_SHFT 0x0 1102*5113495bSYour Name 1103*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_LSB //// 1104*5113495bSYour Name 1105*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x00000694) 1106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x00000694) 1107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 1108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_SHFT 0 1109*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x) \ 1110*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK) 1111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_INM(x, mask) \ 1112*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask) 1113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUT(x, val) \ 1114*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), val) 1115*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 1116*5113495bSYour Name do {\ 1117*5113495bSYour Name HWIO_INTLOCK(); \ 1118*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x)); \ 1119*5113495bSYour Name HWIO_INTFREE();\ 1120*5113495bSYour Name } while (0) 1121*5113495bSYour Name 1122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1124*5113495bSYour Name 1125*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_MSB //// 1126*5113495bSYour Name 1127*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x00000698) 1128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x00000698) 1129*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK 0x0fffffff 1130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_SHFT 0 1131*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x) \ 1132*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK) 1133*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_INM(x, mask) \ 1134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask) 1135*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUT(x, val) \ 1136*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), val) 1137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 1138*5113495bSYour Name do {\ 1139*5113495bSYour Name HWIO_INTLOCK(); \ 1140*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x)); \ 1141*5113495bSYour Name HWIO_INTFREE();\ 1142*5113495bSYour Name } while (0) 1143*5113495bSYour Name 1144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1146*5113495bSYour Name 1147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1149*5113495bSYour Name 1150*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_ID //// 1151*5113495bSYour Name 1152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x) (x+0x0000069c) 1153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_PHYS(x) (x+0x0000069c) 1154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK 0x000000ff 1155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_SHFT 0 1156*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x) \ 1157*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK) 1158*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_INM(x, mask) \ 1159*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask) 1160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUT(x, val) \ 1161*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), val) 1162*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUTM(x, mask, val) \ 1163*5113495bSYour Name do {\ 1164*5113495bSYour Name HWIO_INTLOCK(); \ 1165*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x)); \ 1166*5113495bSYour Name HWIO_INTFREE();\ 1167*5113495bSYour Name } while (0) 1168*5113495bSYour Name 1169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 1171*5113495bSYour Name 1172*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_STATUS //// 1173*5113495bSYour Name 1174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x) (x+0x000006a0) 1175*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_PHYS(x) (x+0x000006a0) 1176*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK 0xffffffff 1177*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_SHFT 0 1178*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x) \ 1179*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK) 1180*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_INM(x, mask) \ 1181*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask) 1182*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUT(x, val) \ 1183*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), val) 1184*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 1185*5113495bSYour Name do {\ 1186*5113495bSYour Name HWIO_INTLOCK(); \ 1187*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x)); \ 1188*5113495bSYour Name HWIO_INTFREE();\ 1189*5113495bSYour Name } while (0) 1190*5113495bSYour Name 1191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1193*5113495bSYour Name 1194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1195*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1196*5113495bSYour Name 1197*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MISC //// 1198*5113495bSYour Name 1199*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x) (x+0x000006a4) 1200*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_PHYS(x) (x+0x000006a4) 1201*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK 0x003fffff 1202*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SHFT 0 1203*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x) \ 1204*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK) 1205*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_INM(x, mask) \ 1206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask) 1207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUT(x, val) \ 1208*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), val) 1209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUTM(x, mask, val) \ 1210*5113495bSYour Name do {\ 1211*5113495bSYour Name HWIO_INTLOCK(); \ 1212*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x)); \ 1213*5113495bSYour Name HWIO_INTFREE();\ 1214*5113495bSYour Name } while (0) 1215*5113495bSYour Name 1216*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1217*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 1218*5113495bSYour Name 1219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1221*5113495bSYour Name 1222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1223*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1224*5113495bSYour Name 1225*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1227*5113495bSYour Name 1228*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 1230*5113495bSYour Name 1231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1233*5113495bSYour Name 1234*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1235*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1236*5113495bSYour Name 1237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1238*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1239*5113495bSYour Name 1240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1241*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 1242*5113495bSYour Name 1243*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1245*5113495bSYour Name 1246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1247*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1248*5113495bSYour Name 1249*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_LSB //// 1250*5113495bSYour Name 1251*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000006b0) 1252*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000006b0) 1253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 1254*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_SHFT 0 1255*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 1256*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK) 1257*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 1258*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 1259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 1260*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 1261*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1262*5113495bSYour Name do {\ 1263*5113495bSYour Name HWIO_INTLOCK(); \ 1264*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 1265*5113495bSYour Name HWIO_INTFREE();\ 1266*5113495bSYour Name } while (0) 1267*5113495bSYour Name 1268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1269*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1270*5113495bSYour Name 1271*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_MSB //// 1272*5113495bSYour Name 1273*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000006b4) 1274*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000006b4) 1275*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 1276*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_SHFT 0 1277*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 1278*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK) 1279*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 1280*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 1281*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 1282*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 1283*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1284*5113495bSYour Name do {\ 1285*5113495bSYour Name HWIO_INTLOCK(); \ 1286*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 1287*5113495bSYour Name HWIO_INTFREE();\ 1288*5113495bSYour Name } while (0) 1289*5113495bSYour Name 1290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1292*5113495bSYour Name 1293*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 1294*5113495bSYour Name 1295*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000006c4) 1296*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000006c4) 1297*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1298*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1299*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1300*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1301*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1302*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1303*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1304*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1306*5113495bSYour Name do {\ 1307*5113495bSYour Name HWIO_INTLOCK(); \ 1308*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1309*5113495bSYour Name HWIO_INTFREE();\ 1310*5113495bSYour Name } while (0) 1311*5113495bSYour Name 1312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1314*5113495bSYour Name 1315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1316*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1317*5113495bSYour Name 1318*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1320*5113495bSYour Name 1321*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 1322*5113495bSYour Name 1323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000006c8) 1324*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000006c8) 1325*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1326*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1327*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1328*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1330*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1331*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1332*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1333*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1334*5113495bSYour Name do {\ 1335*5113495bSYour Name HWIO_INTLOCK(); \ 1336*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1337*5113495bSYour Name HWIO_INTFREE();\ 1338*5113495bSYour Name } while (0) 1339*5113495bSYour Name 1340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1341*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1342*5113495bSYour Name 1343*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS //// 1344*5113495bSYour Name 1345*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000006cc) 1346*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000006cc) 1347*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1348*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 1349*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 1350*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 1351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1352*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1354*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1356*5113495bSYour Name do {\ 1357*5113495bSYour Name HWIO_INTLOCK(); \ 1358*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 1359*5113495bSYour Name HWIO_INTFREE();\ 1360*5113495bSYour Name } while (0) 1361*5113495bSYour Name 1362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1364*5113495bSYour Name 1365*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1367*5113495bSYour Name 1368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1370*5113495bSYour Name 1371*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 1372*5113495bSYour Name 1373*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000006d0) 1374*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000006d0) 1375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1376*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1377*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1378*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1379*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1380*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1381*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1382*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1383*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1384*5113495bSYour Name do {\ 1385*5113495bSYour Name HWIO_INTLOCK(); \ 1386*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1387*5113495bSYour Name HWIO_INTFREE();\ 1388*5113495bSYour Name } while (0) 1389*5113495bSYour Name 1390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1391*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1392*5113495bSYour Name 1393*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 1394*5113495bSYour Name 1395*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000006d4) 1396*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000006d4) 1397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1398*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1399*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1400*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1401*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1402*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1404*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1405*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1406*5113495bSYour Name do {\ 1407*5113495bSYour Name HWIO_INTLOCK(); \ 1408*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1409*5113495bSYour Name HWIO_INTFREE();\ 1410*5113495bSYour Name } while (0) 1411*5113495bSYour Name 1412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1413*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1414*5113495bSYour Name 1415*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 1416*5113495bSYour Name 1417*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000006d8) 1418*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000006d8) 1419*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1420*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1421*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1422*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1423*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1424*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1425*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1426*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1428*5113495bSYour Name do {\ 1429*5113495bSYour Name HWIO_INTLOCK(); \ 1430*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1431*5113495bSYour Name HWIO_INTFREE();\ 1432*5113495bSYour Name } while (0) 1433*5113495bSYour Name 1434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1435*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1436*5113495bSYour Name 1437*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1438*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1439*5113495bSYour Name 1440*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB //// 1441*5113495bSYour Name 1442*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000006dc) 1443*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000006dc) 1444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1445*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 1446*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 1447*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK) 1448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 1449*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 1450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 1451*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 1452*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1453*5113495bSYour Name do {\ 1454*5113495bSYour Name HWIO_INTLOCK(); \ 1455*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 1456*5113495bSYour Name HWIO_INTFREE();\ 1457*5113495bSYour Name } while (0) 1458*5113495bSYour Name 1459*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1460*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1461*5113495bSYour Name 1462*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB //// 1463*5113495bSYour Name 1464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000006e0) 1465*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000006e0) 1466*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1467*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 1468*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 1469*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK) 1470*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 1471*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 1472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 1473*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 1474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1475*5113495bSYour Name do {\ 1476*5113495bSYour Name HWIO_INTLOCK(); \ 1477*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 1478*5113495bSYour Name HWIO_INTFREE();\ 1479*5113495bSYour Name } while (0) 1480*5113495bSYour Name 1481*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1483*5113495bSYour Name 1484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1485*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1486*5113495bSYour Name 1487*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_DATA //// 1488*5113495bSYour Name 1489*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x000006e4) 1490*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x000006e4) 1491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 1492*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_SHFT 0 1493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x) \ 1494*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK) 1495*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 1496*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 1497*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 1498*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), val) 1499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 1500*5113495bSYour Name do {\ 1501*5113495bSYour Name HWIO_INTLOCK(); \ 1502*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x)); \ 1503*5113495bSYour Name HWIO_INTFREE();\ 1504*5113495bSYour Name } while (0) 1505*5113495bSYour Name 1506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 1508*5113495bSYour Name 1509*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET //// 1510*5113495bSYour Name 1511*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006e8) 1512*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006e8) 1513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1514*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 1515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 1516*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 1517*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1518*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1519*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1520*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1522*5113495bSYour Name do {\ 1523*5113495bSYour Name HWIO_INTLOCK(); \ 1524*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 1525*5113495bSYour Name HWIO_INTFREE();\ 1526*5113495bSYour Name } while (0) 1527*5113495bSYour Name 1528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1529*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1530*5113495bSYour Name 1531*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_LSB //// 1532*5113495bSYour Name 1533*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x) (x+0x000006ec) 1534*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_PHYS(x) (x+0x000006ec) 1535*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK 0xffffffff 1536*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_SHFT 0 1537*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x) \ 1538*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK) 1539*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_INM(x, mask) \ 1540*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask) 1541*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUT(x, val) \ 1542*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), val) 1543*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUTM(x, mask, val) \ 1544*5113495bSYour Name do {\ 1545*5113495bSYour Name HWIO_INTLOCK(); \ 1546*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x)); \ 1547*5113495bSYour Name HWIO_INTFREE();\ 1548*5113495bSYour Name } while (0) 1549*5113495bSYour Name 1550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1552*5113495bSYour Name 1553*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_MSB //// 1554*5113495bSYour Name 1555*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x) (x+0x000006f0) 1556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_PHYS(x) (x+0x000006f0) 1557*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK 0x0fffffff 1558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_SHFT 0 1559*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x) \ 1560*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK) 1561*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_INM(x, mask) \ 1562*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask) 1563*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUT(x, val) \ 1564*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), val) 1565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUTM(x, mask, val) \ 1566*5113495bSYour Name do {\ 1567*5113495bSYour Name HWIO_INTLOCK(); \ 1568*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x)); \ 1569*5113495bSYour Name HWIO_INTFREE();\ 1570*5113495bSYour Name } while (0) 1571*5113495bSYour Name 1572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1574*5113495bSYour Name 1575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1577*5113495bSYour Name 1578*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_ID //// 1579*5113495bSYour Name 1580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x) (x+0x000006f4) 1581*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_PHYS(x) (x+0x000006f4) 1582*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK 0x000000ff 1583*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_SHFT 0 1584*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x) \ 1585*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK) 1586*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_INM(x, mask) \ 1587*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask) 1588*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUT(x, val) \ 1589*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), val) 1590*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUTM(x, mask, val) \ 1591*5113495bSYour Name do {\ 1592*5113495bSYour Name HWIO_INTLOCK(); \ 1593*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x)); \ 1594*5113495bSYour Name HWIO_INTFREE();\ 1595*5113495bSYour Name } while (0) 1596*5113495bSYour Name 1597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_SHFT 0x0 1599*5113495bSYour Name 1600*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_STATUS //// 1601*5113495bSYour Name 1602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x) (x+0x000006f8) 1603*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_PHYS(x) (x+0x000006f8) 1604*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK 0xffffffff 1605*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_SHFT 0 1606*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x) \ 1607*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK) 1608*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_INM(x, mask) \ 1609*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask) 1610*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUT(x, val) \ 1611*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), val) 1612*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUTM(x, mask, val) \ 1613*5113495bSYour Name do {\ 1614*5113495bSYour Name HWIO_INTLOCK(); \ 1615*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x)); \ 1616*5113495bSYour Name HWIO_INTFREE();\ 1617*5113495bSYour Name } while (0) 1618*5113495bSYour Name 1619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1621*5113495bSYour Name 1622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1623*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1624*5113495bSYour Name 1625*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MISC //// 1626*5113495bSYour Name 1627*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x) (x+0x000006fc) 1628*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_PHYS(x) (x+0x000006fc) 1629*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK 0x003fffff 1630*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SHFT 0 1631*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x) \ 1632*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK) 1633*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_INM(x, mask) \ 1634*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask) 1635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUT(x, val) \ 1636*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), val) 1637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUTM(x, mask, val) \ 1638*5113495bSYour Name do {\ 1639*5113495bSYour Name HWIO_INTLOCK(); \ 1640*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x)); \ 1641*5113495bSYour Name HWIO_INTFREE();\ 1642*5113495bSYour Name } while (0) 1643*5113495bSYour Name 1644*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1645*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_SHFT 0xe 1646*5113495bSYour Name 1647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1649*5113495bSYour Name 1650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1651*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1652*5113495bSYour Name 1653*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1655*5113495bSYour Name 1656*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_SHFT 0x6 1658*5113495bSYour Name 1659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1661*5113495bSYour Name 1662*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1663*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1664*5113495bSYour Name 1665*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1666*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1667*5113495bSYour Name 1668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1669*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_SHFT 0x2 1670*5113495bSYour Name 1671*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1673*5113495bSYour Name 1674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1675*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1676*5113495bSYour Name 1677*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_LSB //// 1678*5113495bSYour Name 1679*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000708) 1680*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000708) 1681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK 0xffffffff 1682*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_SHFT 0 1683*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x) \ 1684*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK) 1685*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_INM(x, mask) \ 1686*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask) 1687*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUT(x, val) \ 1688*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), val) 1689*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1690*5113495bSYour Name do {\ 1691*5113495bSYour Name HWIO_INTLOCK(); \ 1692*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x)); \ 1693*5113495bSYour Name HWIO_INTFREE();\ 1694*5113495bSYour Name } while (0) 1695*5113495bSYour Name 1696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1697*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1698*5113495bSYour Name 1699*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_MSB //// 1700*5113495bSYour Name 1701*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000070c) 1702*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000070c) 1703*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK 0x000000ff 1704*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_SHFT 0 1705*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x) \ 1706*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK) 1707*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_INM(x, mask) \ 1708*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask) 1709*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUT(x, val) \ 1710*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), val) 1711*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1712*5113495bSYour Name do {\ 1713*5113495bSYour Name HWIO_INTLOCK(); \ 1714*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x)); \ 1715*5113495bSYour Name HWIO_INTFREE();\ 1716*5113495bSYour Name } while (0) 1717*5113495bSYour Name 1718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1719*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1720*5113495bSYour Name 1721*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0 //// 1722*5113495bSYour Name 1723*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000071c) 1724*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000071c) 1725*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1726*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1727*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1728*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1729*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1730*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1731*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1732*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1733*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1734*5113495bSYour Name do {\ 1735*5113495bSYour Name HWIO_INTLOCK(); \ 1736*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1737*5113495bSYour Name HWIO_INTFREE();\ 1738*5113495bSYour Name } while (0) 1739*5113495bSYour Name 1740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1742*5113495bSYour Name 1743*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1744*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1745*5113495bSYour Name 1746*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1747*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1748*5113495bSYour Name 1749*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1 //// 1750*5113495bSYour Name 1751*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000720) 1752*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000720) 1753*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1754*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1755*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1756*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1757*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1758*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1759*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1760*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1761*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1762*5113495bSYour Name do {\ 1763*5113495bSYour Name HWIO_INTLOCK(); \ 1764*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1765*5113495bSYour Name HWIO_INTFREE();\ 1766*5113495bSYour Name } while (0) 1767*5113495bSYour Name 1768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1769*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1770*5113495bSYour Name 1771*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS //// 1772*5113495bSYour Name 1773*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000724) 1774*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000724) 1775*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1776*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_SHFT 0 1777*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x) \ 1778*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK) 1779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1781*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1782*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1783*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1784*5113495bSYour Name do {\ 1785*5113495bSYour Name HWIO_INTLOCK(); \ 1786*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x)); \ 1787*5113495bSYour Name HWIO_INTFREE();\ 1788*5113495bSYour Name } while (0) 1789*5113495bSYour Name 1790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1791*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1792*5113495bSYour Name 1793*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1794*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1795*5113495bSYour Name 1796*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1797*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1798*5113495bSYour Name 1799*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER //// 1800*5113495bSYour Name 1801*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000728) 1802*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000728) 1803*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1804*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1805*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1806*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1807*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1808*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1809*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1810*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1811*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1812*5113495bSYour Name do {\ 1813*5113495bSYour Name HWIO_INTLOCK(); \ 1814*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1815*5113495bSYour Name HWIO_INTFREE();\ 1816*5113495bSYour Name } while (0) 1817*5113495bSYour Name 1818*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1819*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1820*5113495bSYour Name 1821*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER //// 1822*5113495bSYour Name 1823*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000072c) 1824*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000072c) 1825*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1826*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1827*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1828*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1829*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1830*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1831*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1832*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1833*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1834*5113495bSYour Name do {\ 1835*5113495bSYour Name HWIO_INTLOCK(); \ 1836*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1837*5113495bSYour Name HWIO_INTFREE();\ 1838*5113495bSYour Name } while (0) 1839*5113495bSYour Name 1840*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1841*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1842*5113495bSYour Name 1843*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS //// 1844*5113495bSYour Name 1845*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000730) 1846*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000730) 1847*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1848*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1849*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1850*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1851*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1852*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1853*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1854*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1855*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1856*5113495bSYour Name do {\ 1857*5113495bSYour Name HWIO_INTLOCK(); \ 1858*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1859*5113495bSYour Name HWIO_INTFREE();\ 1860*5113495bSYour Name } while (0) 1861*5113495bSYour Name 1862*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1863*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1864*5113495bSYour Name 1865*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1866*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1867*5113495bSYour Name 1868*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB //// 1869*5113495bSYour Name 1870*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000734) 1871*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000734) 1872*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1873*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_SHFT 0 1874*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x) \ 1875*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK) 1876*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_INM(x, mask) \ 1877*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask) 1878*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUT(x, val) \ 1879*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), val) 1880*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1881*5113495bSYour Name do {\ 1882*5113495bSYour Name HWIO_INTLOCK(); \ 1883*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x)); \ 1884*5113495bSYour Name HWIO_INTFREE();\ 1885*5113495bSYour Name } while (0) 1886*5113495bSYour Name 1887*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1888*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1889*5113495bSYour Name 1890*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB //// 1891*5113495bSYour Name 1892*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000738) 1893*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000738) 1894*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1895*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_SHFT 0 1896*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x) \ 1897*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK) 1898*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_INM(x, mask) \ 1899*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask) 1900*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUT(x, val) \ 1901*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), val) 1902*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1903*5113495bSYour Name do {\ 1904*5113495bSYour Name HWIO_INTLOCK(); \ 1905*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x)); \ 1906*5113495bSYour Name HWIO_INTFREE();\ 1907*5113495bSYour Name } while (0) 1908*5113495bSYour Name 1909*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1910*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1911*5113495bSYour Name 1912*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1913*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1914*5113495bSYour Name 1915*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_DATA //// 1916*5113495bSYour Name 1917*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x) (x+0x0000073c) 1918*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_PHYS(x) (x+0x0000073c) 1919*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK 0xffffffff 1920*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_SHFT 0 1921*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x) \ 1922*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK) 1923*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_INM(x, mask) \ 1924*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask) 1925*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUT(x, val) \ 1926*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), val) 1927*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUTM(x, mask, val) \ 1928*5113495bSYour Name do {\ 1929*5113495bSYour Name HWIO_INTLOCK(); \ 1930*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x)); \ 1931*5113495bSYour Name HWIO_INTFREE();\ 1932*5113495bSYour Name } while (0) 1933*5113495bSYour Name 1934*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1935*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_SHFT 0x0 1936*5113495bSYour Name 1937*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET //// 1938*5113495bSYour Name 1939*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000740) 1940*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000740) 1941*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1942*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_SHFT 0 1943*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x) \ 1944*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK) 1945*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1946*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1947*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1948*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1949*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1950*5113495bSYour Name do {\ 1951*5113495bSYour Name HWIO_INTLOCK(); \ 1952*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x)); \ 1953*5113495bSYour Name HWIO_INTFREE();\ 1954*5113495bSYour Name } while (0) 1955*5113495bSYour Name 1956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1957*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1958*5113495bSYour Name 1959*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_LSB //// 1960*5113495bSYour Name 1961*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x) (x+0x00000744) 1962*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_PHYS(x) (x+0x00000744) 1963*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK 0xffffffff 1964*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_SHFT 0 1965*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x) \ 1966*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK) 1967*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_INM(x, mask) \ 1968*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask) 1969*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUT(x, val) \ 1970*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), val) 1971*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUTM(x, mask, val) \ 1972*5113495bSYour Name do {\ 1973*5113495bSYour Name HWIO_INTLOCK(); \ 1974*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x)); \ 1975*5113495bSYour Name HWIO_INTFREE();\ 1976*5113495bSYour Name } while (0) 1977*5113495bSYour Name 1978*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1979*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1980*5113495bSYour Name 1981*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_MSB //// 1982*5113495bSYour Name 1983*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x) (x+0x00000748) 1984*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_PHYS(x) (x+0x00000748) 1985*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK 0x0fffffff 1986*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_SHFT 0 1987*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x) \ 1988*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK) 1989*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_INM(x, mask) \ 1990*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask) 1991*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUT(x, val) \ 1992*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), val) 1993*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUTM(x, mask, val) \ 1994*5113495bSYour Name do {\ 1995*5113495bSYour Name HWIO_INTLOCK(); \ 1996*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x)); \ 1997*5113495bSYour Name HWIO_INTFREE();\ 1998*5113495bSYour Name } while (0) 1999*5113495bSYour Name 2000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2001*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2002*5113495bSYour Name 2003*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2004*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2005*5113495bSYour Name 2006*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_ID //// 2007*5113495bSYour Name 2008*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x) (x+0x0000074c) 2009*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_PHYS(x) (x+0x0000074c) 2010*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK 0x000000ff 2011*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_SHFT 0 2012*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x) \ 2013*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK) 2014*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_INM(x, mask) \ 2015*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask) 2016*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUT(x, val) \ 2017*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), val) 2018*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUTM(x, mask, val) \ 2019*5113495bSYour Name do {\ 2020*5113495bSYour Name HWIO_INTLOCK(); \ 2021*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x)); \ 2022*5113495bSYour Name HWIO_INTFREE();\ 2023*5113495bSYour Name } while (0) 2024*5113495bSYour Name 2025*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2026*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_SHFT 0x0 2027*5113495bSYour Name 2028*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_STATUS //// 2029*5113495bSYour Name 2030*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x) (x+0x00000750) 2031*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_PHYS(x) (x+0x00000750) 2032*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK 0xffffffff 2033*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_SHFT 0 2034*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x) \ 2035*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK) 2036*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_INM(x, mask) \ 2037*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask) 2038*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUT(x, val) \ 2039*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), val) 2040*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUTM(x, mask, val) \ 2041*5113495bSYour Name do {\ 2042*5113495bSYour Name HWIO_INTLOCK(); \ 2043*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x)); \ 2044*5113495bSYour Name HWIO_INTFREE();\ 2045*5113495bSYour Name } while (0) 2046*5113495bSYour Name 2047*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2049*5113495bSYour Name 2050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2051*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2052*5113495bSYour Name 2053*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MISC //// 2054*5113495bSYour Name 2055*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x) (x+0x00000754) 2056*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_PHYS(x) (x+0x00000754) 2057*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK 0x003fffff 2058*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SHFT 0 2059*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x) \ 2060*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK) 2061*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_INM(x, mask) \ 2062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask) 2063*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUT(x, val) \ 2064*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), val) 2065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUTM(x, mask, val) \ 2066*5113495bSYour Name do {\ 2067*5113495bSYour Name HWIO_INTLOCK(); \ 2068*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x)); \ 2069*5113495bSYour Name HWIO_INTFREE();\ 2070*5113495bSYour Name } while (0) 2071*5113495bSYour Name 2072*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2073*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_SHFT 0xe 2074*5113495bSYour Name 2075*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2076*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2077*5113495bSYour Name 2078*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2080*5113495bSYour Name 2081*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2083*5113495bSYour Name 2084*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_SHFT 0x6 2086*5113495bSYour Name 2087*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2088*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2089*5113495bSYour Name 2090*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2091*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2092*5113495bSYour Name 2093*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2095*5113495bSYour Name 2096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2097*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_SHFT 0x2 2098*5113495bSYour Name 2099*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2101*5113495bSYour Name 2102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2103*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2104*5113495bSYour Name 2105*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_LSB //// 2106*5113495bSYour Name 2107*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000760) 2108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000760) 2109*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK 0xffffffff 2110*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_SHFT 0 2111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x) \ 2112*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK) 2113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_INM(x, mask) \ 2114*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask) 2115*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUT(x, val) \ 2116*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), val) 2117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2118*5113495bSYour Name do {\ 2119*5113495bSYour Name HWIO_INTLOCK(); \ 2120*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x)); \ 2121*5113495bSYour Name HWIO_INTFREE();\ 2122*5113495bSYour Name } while (0) 2123*5113495bSYour Name 2124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2125*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2126*5113495bSYour Name 2127*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_MSB //// 2128*5113495bSYour Name 2129*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000764) 2130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000764) 2131*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK 0x000000ff 2132*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_SHFT 0 2133*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x) \ 2134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK) 2135*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_INM(x, mask) \ 2136*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask) 2137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUT(x, val) \ 2138*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), val) 2139*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2140*5113495bSYour Name do {\ 2141*5113495bSYour Name HWIO_INTLOCK(); \ 2142*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x)); \ 2143*5113495bSYour Name HWIO_INTFREE();\ 2144*5113495bSYour Name } while (0) 2145*5113495bSYour Name 2146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2148*5113495bSYour Name 2149*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0 //// 2150*5113495bSYour Name 2151*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000774) 2152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000774) 2153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2154*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2156*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2157*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2158*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2160*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2161*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2162*5113495bSYour Name do {\ 2163*5113495bSYour Name HWIO_INTLOCK(); \ 2164*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2165*5113495bSYour Name HWIO_INTFREE();\ 2166*5113495bSYour Name } while (0) 2167*5113495bSYour Name 2168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2170*5113495bSYour Name 2171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2173*5113495bSYour Name 2174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2175*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2176*5113495bSYour Name 2177*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1 //// 2178*5113495bSYour Name 2179*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000778) 2180*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000778) 2181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2182*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2183*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2184*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2185*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2186*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2187*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2188*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2189*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2190*5113495bSYour Name do {\ 2191*5113495bSYour Name HWIO_INTLOCK(); \ 2192*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2193*5113495bSYour Name HWIO_INTFREE();\ 2194*5113495bSYour Name } while (0) 2195*5113495bSYour Name 2196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2197*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2198*5113495bSYour Name 2199*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS //// 2200*5113495bSYour Name 2201*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000077c) 2202*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000077c) 2203*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2204*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_SHFT 0 2205*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x) \ 2206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK) 2207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2208*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2210*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2211*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2212*5113495bSYour Name do {\ 2213*5113495bSYour Name HWIO_INTLOCK(); \ 2214*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x)); \ 2215*5113495bSYour Name HWIO_INTFREE();\ 2216*5113495bSYour Name } while (0) 2217*5113495bSYour Name 2218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2220*5113495bSYour Name 2221*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2223*5113495bSYour Name 2224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2225*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2226*5113495bSYour Name 2227*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER //// 2228*5113495bSYour Name 2229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000780) 2230*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000780) 2231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2233*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2234*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2235*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2236*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2238*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2239*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2240*5113495bSYour Name do {\ 2241*5113495bSYour Name HWIO_INTLOCK(); \ 2242*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2243*5113495bSYour Name HWIO_INTFREE();\ 2244*5113495bSYour Name } while (0) 2245*5113495bSYour Name 2246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2247*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2248*5113495bSYour Name 2249*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER //// 2250*5113495bSYour Name 2251*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000784) 2252*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000784) 2253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2254*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2255*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2256*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2257*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2258*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2260*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2261*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2262*5113495bSYour Name do {\ 2263*5113495bSYour Name HWIO_INTLOCK(); \ 2264*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2265*5113495bSYour Name HWIO_INTFREE();\ 2266*5113495bSYour Name } while (0) 2267*5113495bSYour Name 2268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2269*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2270*5113495bSYour Name 2271*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS //// 2272*5113495bSYour Name 2273*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000788) 2274*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000788) 2275*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2276*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2277*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2278*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2279*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2280*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2281*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2282*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2283*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2284*5113495bSYour Name do {\ 2285*5113495bSYour Name HWIO_INTLOCK(); \ 2286*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2287*5113495bSYour Name HWIO_INTFREE();\ 2288*5113495bSYour Name } while (0) 2289*5113495bSYour Name 2290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2292*5113495bSYour Name 2293*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2294*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2295*5113495bSYour Name 2296*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB //// 2297*5113495bSYour Name 2298*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000078c) 2299*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000078c) 2300*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2301*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_SHFT 0 2302*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x) \ 2303*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK) 2304*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_INM(x, mask) \ 2305*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask) 2306*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUT(x, val) \ 2307*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), val) 2308*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2309*5113495bSYour Name do {\ 2310*5113495bSYour Name HWIO_INTLOCK(); \ 2311*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x)); \ 2312*5113495bSYour Name HWIO_INTFREE();\ 2313*5113495bSYour Name } while (0) 2314*5113495bSYour Name 2315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2316*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2317*5113495bSYour Name 2318*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB //// 2319*5113495bSYour Name 2320*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000790) 2321*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000790) 2322*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_SHFT 0 2324*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x) \ 2325*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK) 2326*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_INM(x, mask) \ 2327*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask) 2328*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUT(x, val) \ 2329*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), val) 2330*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2331*5113495bSYour Name do {\ 2332*5113495bSYour Name HWIO_INTLOCK(); \ 2333*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x)); \ 2334*5113495bSYour Name HWIO_INTFREE();\ 2335*5113495bSYour Name } while (0) 2336*5113495bSYour Name 2337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2339*5113495bSYour Name 2340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2341*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2342*5113495bSYour Name 2343*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_DATA //// 2344*5113495bSYour Name 2345*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x) (x+0x00000794) 2346*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_PHYS(x) (x+0x00000794) 2347*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK 0xffffffff 2348*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_SHFT 0 2349*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x) \ 2350*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK) 2351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_INM(x, mask) \ 2352*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask) 2353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUT(x, val) \ 2354*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), val) 2355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUTM(x, mask, val) \ 2356*5113495bSYour Name do {\ 2357*5113495bSYour Name HWIO_INTLOCK(); \ 2358*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x)); \ 2359*5113495bSYour Name HWIO_INTFREE();\ 2360*5113495bSYour Name } while (0) 2361*5113495bSYour Name 2362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_SHFT 0x0 2364*5113495bSYour Name 2365*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET //// 2366*5113495bSYour Name 2367*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000798) 2368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000798) 2369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2370*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_SHFT 0 2371*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x) \ 2372*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK) 2373*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2374*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2376*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2377*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2378*5113495bSYour Name do {\ 2379*5113495bSYour Name HWIO_INTLOCK(); \ 2380*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x)); \ 2381*5113495bSYour Name HWIO_INTFREE();\ 2382*5113495bSYour Name } while (0) 2383*5113495bSYour Name 2384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2385*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2386*5113495bSYour Name 2387*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB //// 2388*5113495bSYour Name 2389*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x) (x+0x0000079c) 2390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_PHYS(x) (x+0x0000079c) 2391*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK 0xffffffff 2392*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_SHFT 0 2393*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x) \ 2394*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK) 2395*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_INM(x, mask) \ 2396*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask) 2397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUT(x, val) \ 2398*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), val) 2399*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUTM(x, mask, val) \ 2400*5113495bSYour Name do {\ 2401*5113495bSYour Name HWIO_INTLOCK(); \ 2402*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x)); \ 2403*5113495bSYour Name HWIO_INTFREE();\ 2404*5113495bSYour Name } while (0) 2405*5113495bSYour Name 2406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2407*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2408*5113495bSYour Name 2409*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB //// 2410*5113495bSYour Name 2411*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x) (x+0x000007a0) 2412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_PHYS(x) (x+0x000007a0) 2413*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK 0x0fffffff 2414*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_SHFT 0 2415*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x) \ 2416*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK) 2417*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_INM(x, mask) \ 2418*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask) 2419*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUT(x, val) \ 2420*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), val) 2421*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUTM(x, mask, val) \ 2422*5113495bSYour Name do {\ 2423*5113495bSYour Name HWIO_INTLOCK(); \ 2424*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x)); \ 2425*5113495bSYour Name HWIO_INTFREE();\ 2426*5113495bSYour Name } while (0) 2427*5113495bSYour Name 2428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2429*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2430*5113495bSYour Name 2431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2433*5113495bSYour Name 2434*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_ID //// 2435*5113495bSYour Name 2436*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x) (x+0x000007a4) 2437*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_PHYS(x) (x+0x000007a4) 2438*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK 0x000000ff 2439*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_SHFT 0 2440*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x) \ 2441*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK) 2442*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_INM(x, mask) \ 2443*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask) 2444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUT(x, val) \ 2445*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), val) 2446*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUTM(x, mask, val) \ 2447*5113495bSYour Name do {\ 2448*5113495bSYour Name HWIO_INTLOCK(); \ 2449*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x)); \ 2450*5113495bSYour Name HWIO_INTFREE();\ 2451*5113495bSYour Name } while (0) 2452*5113495bSYour Name 2453*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_SHFT 0x0 2455*5113495bSYour Name 2456*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_STATUS //// 2457*5113495bSYour Name 2458*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x) (x+0x000007a8) 2459*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_PHYS(x) (x+0x000007a8) 2460*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK 0xffffffff 2461*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_SHFT 0 2462*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x) \ 2463*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK) 2464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_INM(x, mask) \ 2465*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask) 2466*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUT(x, val) \ 2467*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), val) 2468*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUTM(x, mask, val) \ 2469*5113495bSYour Name do {\ 2470*5113495bSYour Name HWIO_INTLOCK(); \ 2471*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x)); \ 2472*5113495bSYour Name HWIO_INTFREE();\ 2473*5113495bSYour Name } while (0) 2474*5113495bSYour Name 2475*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2477*5113495bSYour Name 2478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2480*5113495bSYour Name 2481*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MISC //// 2482*5113495bSYour Name 2483*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x) (x+0x000007ac) 2484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_PHYS(x) (x+0x000007ac) 2485*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK 0x003fffff 2486*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SHFT 0 2487*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x) \ 2488*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK) 2489*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_INM(x, mask) \ 2490*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask) 2491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUT(x, val) \ 2492*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), val) 2493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUTM(x, mask, val) \ 2494*5113495bSYour Name do {\ 2495*5113495bSYour Name HWIO_INTLOCK(); \ 2496*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x)); \ 2497*5113495bSYour Name HWIO_INTFREE();\ 2498*5113495bSYour Name } while (0) 2499*5113495bSYour Name 2500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_SHFT 0xe 2502*5113495bSYour Name 2503*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2505*5113495bSYour Name 2506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2508*5113495bSYour Name 2509*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2511*5113495bSYour Name 2512*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_SHFT 0x6 2514*5113495bSYour Name 2515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2516*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2517*5113495bSYour Name 2518*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2519*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2520*5113495bSYour Name 2521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2523*5113495bSYour Name 2524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2525*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_SHFT 0x2 2526*5113495bSYour Name 2527*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2529*5113495bSYour Name 2530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2531*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2532*5113495bSYour Name 2533*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB //// 2534*5113495bSYour Name 2535*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x) (x+0x000007b8) 2536*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_PHYS(x) (x+0x000007b8) 2537*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK 0xffffffff 2538*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_SHFT 0 2539*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x) \ 2540*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK) 2541*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_INM(x, mask) \ 2542*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask) 2543*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUT(x, val) \ 2544*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), val) 2545*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2546*5113495bSYour Name do {\ 2547*5113495bSYour Name HWIO_INTLOCK(); \ 2548*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x)); \ 2549*5113495bSYour Name HWIO_INTFREE();\ 2550*5113495bSYour Name } while (0) 2551*5113495bSYour Name 2552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2553*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2554*5113495bSYour Name 2555*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB //// 2556*5113495bSYour Name 2557*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x) (x+0x000007bc) 2558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_PHYS(x) (x+0x000007bc) 2559*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK 0x000000ff 2560*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_SHFT 0 2561*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x) \ 2562*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK) 2563*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_INM(x, mask) \ 2564*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask) 2565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUT(x, val) \ 2566*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), val) 2567*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2568*5113495bSYour Name do {\ 2569*5113495bSYour Name HWIO_INTLOCK(); \ 2570*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x)); \ 2571*5113495bSYour Name HWIO_INTFREE();\ 2572*5113495bSYour Name } while (0) 2573*5113495bSYour Name 2574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2576*5113495bSYour Name 2577*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0 //// 2578*5113495bSYour Name 2579*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000007cc) 2580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000007cc) 2581*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2582*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2583*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2584*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2585*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2586*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2588*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2589*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2590*5113495bSYour Name do {\ 2591*5113495bSYour Name HWIO_INTLOCK(); \ 2592*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2593*5113495bSYour Name HWIO_INTFREE();\ 2594*5113495bSYour Name } while (0) 2595*5113495bSYour Name 2596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2598*5113495bSYour Name 2599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2601*5113495bSYour Name 2602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2603*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2604*5113495bSYour Name 2605*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1 //// 2606*5113495bSYour Name 2607*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000007d0) 2608*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000007d0) 2609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2610*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2611*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2612*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2613*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2614*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2615*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2616*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2617*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2618*5113495bSYour Name do {\ 2619*5113495bSYour Name HWIO_INTLOCK(); \ 2620*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2621*5113495bSYour Name HWIO_INTFREE();\ 2622*5113495bSYour Name } while (0) 2623*5113495bSYour Name 2624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2625*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2626*5113495bSYour Name 2627*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS //// 2628*5113495bSYour Name 2629*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000007d4) 2630*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000007d4) 2631*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2632*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_SHFT 0 2633*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x) \ 2634*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK) 2635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2636*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2638*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2639*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2640*5113495bSYour Name do {\ 2641*5113495bSYour Name HWIO_INTLOCK(); \ 2642*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x)); \ 2643*5113495bSYour Name HWIO_INTFREE();\ 2644*5113495bSYour Name } while (0) 2645*5113495bSYour Name 2646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2648*5113495bSYour Name 2649*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2651*5113495bSYour Name 2652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2653*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2654*5113495bSYour Name 2655*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER //// 2656*5113495bSYour Name 2657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000007d8) 2658*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000007d8) 2659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2661*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2662*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2663*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2664*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2665*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2666*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2667*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2668*5113495bSYour Name do {\ 2669*5113495bSYour Name HWIO_INTLOCK(); \ 2670*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2671*5113495bSYour Name HWIO_INTFREE();\ 2672*5113495bSYour Name } while (0) 2673*5113495bSYour Name 2674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2675*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2676*5113495bSYour Name 2677*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER //// 2678*5113495bSYour Name 2679*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000007dc) 2680*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000007dc) 2681*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2682*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2683*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2684*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2685*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2686*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2687*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2688*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2689*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2690*5113495bSYour Name do {\ 2691*5113495bSYour Name HWIO_INTLOCK(); \ 2692*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2693*5113495bSYour Name HWIO_INTFREE();\ 2694*5113495bSYour Name } while (0) 2695*5113495bSYour Name 2696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2697*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2698*5113495bSYour Name 2699*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS //// 2700*5113495bSYour Name 2701*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000007e0) 2702*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000007e0) 2703*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2704*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2705*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2706*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2707*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2708*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2709*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2710*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2711*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2712*5113495bSYour Name do {\ 2713*5113495bSYour Name HWIO_INTLOCK(); \ 2714*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2715*5113495bSYour Name HWIO_INTFREE();\ 2716*5113495bSYour Name } while (0) 2717*5113495bSYour Name 2718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2719*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2720*5113495bSYour Name 2721*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2722*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2723*5113495bSYour Name 2724*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB //// 2725*5113495bSYour Name 2726*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000007e4) 2727*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000007e4) 2728*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2729*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_SHFT 0 2730*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x) \ 2731*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK) 2732*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_INM(x, mask) \ 2733*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask) 2734*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUT(x, val) \ 2735*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), val) 2736*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2737*5113495bSYour Name do {\ 2738*5113495bSYour Name HWIO_INTLOCK(); \ 2739*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x)); \ 2740*5113495bSYour Name HWIO_INTFREE();\ 2741*5113495bSYour Name } while (0) 2742*5113495bSYour Name 2743*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2744*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2745*5113495bSYour Name 2746*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB //// 2747*5113495bSYour Name 2748*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000007e8) 2749*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000007e8) 2750*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2751*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_SHFT 0 2752*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x) \ 2753*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK) 2754*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_INM(x, mask) \ 2755*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask) 2756*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUT(x, val) \ 2757*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), val) 2758*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2759*5113495bSYour Name do {\ 2760*5113495bSYour Name HWIO_INTLOCK(); \ 2761*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x)); \ 2762*5113495bSYour Name HWIO_INTFREE();\ 2763*5113495bSYour Name } while (0) 2764*5113495bSYour Name 2765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2766*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2767*5113495bSYour Name 2768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2769*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2770*5113495bSYour Name 2771*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA //// 2772*5113495bSYour Name 2773*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x) (x+0x000007ec) 2774*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_PHYS(x) (x+0x000007ec) 2775*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK 0xffffffff 2776*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_SHFT 0 2777*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x) \ 2778*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK) 2779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_INM(x, mask) \ 2780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask) 2781*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUT(x, val) \ 2782*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), val) 2783*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUTM(x, mask, val) \ 2784*5113495bSYour Name do {\ 2785*5113495bSYour Name HWIO_INTLOCK(); \ 2786*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x)); \ 2787*5113495bSYour Name HWIO_INTFREE();\ 2788*5113495bSYour Name } while (0) 2789*5113495bSYour Name 2790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2791*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_SHFT 0x0 2792*5113495bSYour Name 2793*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET //// 2794*5113495bSYour Name 2795*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000007f0) 2796*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000007f0) 2797*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2798*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_SHFT 0 2799*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x) \ 2800*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK) 2801*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2802*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2803*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2804*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2805*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2806*5113495bSYour Name do {\ 2807*5113495bSYour Name HWIO_INTLOCK(); \ 2808*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x)); \ 2809*5113495bSYour Name HWIO_INTFREE();\ 2810*5113495bSYour Name } while (0) 2811*5113495bSYour Name 2812*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2813*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2814*5113495bSYour Name 2815*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_LSB //// 2816*5113495bSYour Name 2817*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x000007f4) 2818*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x000007f4) 2819*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 2820*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_SHFT 0 2821*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x) \ 2822*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK) 2823*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_INM(x, mask) \ 2824*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask) 2825*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUT(x, val) \ 2826*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), val) 2827*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 2828*5113495bSYour Name do {\ 2829*5113495bSYour Name HWIO_INTLOCK(); \ 2830*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x)); \ 2831*5113495bSYour Name HWIO_INTFREE();\ 2832*5113495bSYour Name } while (0) 2833*5113495bSYour Name 2834*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2835*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2836*5113495bSYour Name 2837*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_MSB //// 2838*5113495bSYour Name 2839*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x000007f8) 2840*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x000007f8) 2841*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK 0x00ffffff 2842*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_SHFT 0 2843*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x) \ 2844*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK) 2845*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_INM(x, mask) \ 2846*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask) 2847*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUT(x, val) \ 2848*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), val) 2849*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 2850*5113495bSYour Name do {\ 2851*5113495bSYour Name HWIO_INTLOCK(); \ 2852*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x)); \ 2853*5113495bSYour Name HWIO_INTFREE();\ 2854*5113495bSYour Name } while (0) 2855*5113495bSYour Name 2856*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 2857*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2858*5113495bSYour Name 2859*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2860*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2861*5113495bSYour Name 2862*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_ID //// 2863*5113495bSYour Name 2864*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x) (x+0x000007fc) 2865*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_PHYS(x) (x+0x000007fc) 2866*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK 0x000000ff 2867*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_SHFT 0 2868*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x) \ 2869*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK) 2870*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_INM(x, mask) \ 2871*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask) 2872*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUT(x, val) \ 2873*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), val) 2874*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUTM(x, mask, val) \ 2875*5113495bSYour Name do {\ 2876*5113495bSYour Name HWIO_INTLOCK(); \ 2877*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x)); \ 2878*5113495bSYour Name HWIO_INTFREE();\ 2879*5113495bSYour Name } while (0) 2880*5113495bSYour Name 2881*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2882*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 2883*5113495bSYour Name 2884*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_STATUS //// 2885*5113495bSYour Name 2886*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x) (x+0x00000800) 2887*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_PHYS(x) (x+0x00000800) 2888*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK 0xffffffff 2889*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_SHFT 0 2890*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x) \ 2891*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK) 2892*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_INM(x, mask) \ 2893*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask) 2894*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUT(x, val) \ 2895*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), val) 2896*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 2897*5113495bSYour Name do {\ 2898*5113495bSYour Name HWIO_INTLOCK(); \ 2899*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x)); \ 2900*5113495bSYour Name HWIO_INTFREE();\ 2901*5113495bSYour Name } while (0) 2902*5113495bSYour Name 2903*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2904*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2905*5113495bSYour Name 2906*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2907*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2908*5113495bSYour Name 2909*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MISC //// 2910*5113495bSYour Name 2911*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x) (x+0x00000804) 2912*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_PHYS(x) (x+0x00000804) 2913*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK 0x003fffff 2914*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SHFT 0 2915*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x) \ 2916*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK) 2917*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_INM(x, mask) \ 2918*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask) 2919*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUT(x, val) \ 2920*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), val) 2921*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUTM(x, mask, val) \ 2922*5113495bSYour Name do {\ 2923*5113495bSYour Name HWIO_INTLOCK(); \ 2924*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x)); \ 2925*5113495bSYour Name HWIO_INTFREE();\ 2926*5113495bSYour Name } while (0) 2927*5113495bSYour Name 2928*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2929*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 2930*5113495bSYour Name 2931*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2932*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2933*5113495bSYour Name 2934*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2935*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2936*5113495bSYour Name 2937*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2938*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2939*5113495bSYour Name 2940*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2941*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 2942*5113495bSYour Name 2943*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2944*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2945*5113495bSYour Name 2946*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2947*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2948*5113495bSYour Name 2949*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2950*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2951*5113495bSYour Name 2952*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2953*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 2954*5113495bSYour Name 2955*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2956*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2957*5113495bSYour Name 2958*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2959*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2960*5113495bSYour Name 2961*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_LSB //// 2962*5113495bSYour Name 2963*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000810) 2964*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000810) 2965*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 2966*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_SHFT 0 2967*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 2968*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK) 2969*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 2970*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 2971*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 2972*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 2973*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2974*5113495bSYour Name do {\ 2975*5113495bSYour Name HWIO_INTLOCK(); \ 2976*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 2977*5113495bSYour Name HWIO_INTFREE();\ 2978*5113495bSYour Name } while (0) 2979*5113495bSYour Name 2980*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2981*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2982*5113495bSYour Name 2983*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_MSB //// 2984*5113495bSYour Name 2985*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000814) 2986*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000814) 2987*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 2988*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_SHFT 0 2989*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 2990*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK) 2991*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 2992*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 2993*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 2994*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 2995*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2996*5113495bSYour Name do {\ 2997*5113495bSYour Name HWIO_INTLOCK(); \ 2998*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 2999*5113495bSYour Name HWIO_INTFREE();\ 3000*5113495bSYour Name } while (0) 3001*5113495bSYour Name 3002*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 3003*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 3004*5113495bSYour Name 3005*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 3006*5113495bSYour Name 3007*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000824) 3008*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000824) 3009*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 3010*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 3011*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 3012*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 3013*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 3014*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 3015*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 3016*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 3017*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 3018*5113495bSYour Name do {\ 3019*5113495bSYour Name HWIO_INTLOCK(); \ 3020*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 3021*5113495bSYour Name HWIO_INTFREE();\ 3022*5113495bSYour Name } while (0) 3023*5113495bSYour Name 3024*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3025*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3026*5113495bSYour Name 3027*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 3028*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 3029*5113495bSYour Name 3030*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3031*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3032*5113495bSYour Name 3033*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 3034*5113495bSYour Name 3035*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000828) 3036*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000828) 3037*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 3038*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 3039*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 3040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 3041*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 3042*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 3043*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 3044*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 3045*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 3046*5113495bSYour Name do {\ 3047*5113495bSYour Name HWIO_INTLOCK(); \ 3048*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 3049*5113495bSYour Name HWIO_INTFREE();\ 3050*5113495bSYour Name } while (0) 3051*5113495bSYour Name 3052*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 3053*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 3054*5113495bSYour Name 3055*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS //// 3056*5113495bSYour Name 3057*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000082c) 3058*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000082c) 3059*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 3060*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 3061*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 3062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 3063*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 3064*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 3065*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 3066*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 3067*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 3068*5113495bSYour Name do {\ 3069*5113495bSYour Name HWIO_INTLOCK(); \ 3070*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 3071*5113495bSYour Name HWIO_INTFREE();\ 3072*5113495bSYour Name } while (0) 3073*5113495bSYour Name 3074*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3075*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3076*5113495bSYour Name 3077*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 3078*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 3079*5113495bSYour Name 3080*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3081*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3082*5113495bSYour Name 3083*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 3084*5113495bSYour Name 3085*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000830) 3086*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000830) 3087*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 3088*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 3089*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 3090*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 3091*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 3092*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 3093*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 3094*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 3095*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 3096*5113495bSYour Name do {\ 3097*5113495bSYour Name HWIO_INTLOCK(); \ 3098*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 3099*5113495bSYour Name HWIO_INTFREE();\ 3100*5113495bSYour Name } while (0) 3101*5113495bSYour Name 3102*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 3103*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 3104*5113495bSYour Name 3105*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 3106*5113495bSYour Name 3107*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000834) 3108*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000834) 3109*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 3110*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 3111*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 3112*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 3113*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 3114*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 3115*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 3116*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 3117*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 3118*5113495bSYour Name do {\ 3119*5113495bSYour Name HWIO_INTLOCK(); \ 3120*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 3121*5113495bSYour Name HWIO_INTFREE();\ 3122*5113495bSYour Name } while (0) 3123*5113495bSYour Name 3124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 3125*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 3126*5113495bSYour Name 3127*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 3128*5113495bSYour Name 3129*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000838) 3130*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000838) 3131*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x00ffffff 3132*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 3133*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 3134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 3135*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 3136*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 3137*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 3138*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 3139*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 3140*5113495bSYour Name do {\ 3141*5113495bSYour Name HWIO_INTLOCK(); \ 3142*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 3143*5113495bSYour Name HWIO_INTFREE();\ 3144*5113495bSYour Name } while (0) 3145*5113495bSYour Name 3146*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x00ff0000 3147*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10 3148*5113495bSYour Name 3149*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x0000ffff 3150*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 3151*5113495bSYour Name 3152*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB //// 3153*5113495bSYour Name 3154*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000083c) 3155*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000083c) 3156*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3157*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 3158*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 3159*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK) 3160*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3161*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3162*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3163*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 3164*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3165*5113495bSYour Name do {\ 3166*5113495bSYour Name HWIO_INTLOCK(); \ 3167*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 3168*5113495bSYour Name HWIO_INTFREE();\ 3169*5113495bSYour Name } while (0) 3170*5113495bSYour Name 3171*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3172*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3173*5113495bSYour Name 3174*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB //// 3175*5113495bSYour Name 3176*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000840) 3177*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000840) 3178*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3179*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 3180*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 3181*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK) 3182*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3183*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3184*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3185*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 3186*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3187*5113495bSYour Name do {\ 3188*5113495bSYour Name HWIO_INTLOCK(); \ 3189*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 3190*5113495bSYour Name HWIO_INTFREE();\ 3191*5113495bSYour Name } while (0) 3192*5113495bSYour Name 3193*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3194*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3195*5113495bSYour Name 3196*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3197*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3198*5113495bSYour Name 3199*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_DATA //// 3200*5113495bSYour Name 3201*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x00000844) 3202*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x00000844) 3203*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 3204*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_SHFT 0 3205*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x) \ 3206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK) 3207*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 3208*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 3209*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 3210*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), val) 3211*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3212*5113495bSYour Name do {\ 3213*5113495bSYour Name HWIO_INTLOCK(); \ 3214*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x)); \ 3215*5113495bSYour Name HWIO_INTFREE();\ 3216*5113495bSYour Name } while (0) 3217*5113495bSYour Name 3218*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3219*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 3220*5113495bSYour Name 3221*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET //// 3222*5113495bSYour Name 3223*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000848) 3224*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000848) 3225*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3226*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 3227*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 3228*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 3229*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3230*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3231*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3232*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3233*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3234*5113495bSYour Name do {\ 3235*5113495bSYour Name HWIO_INTLOCK(); \ 3236*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3237*5113495bSYour Name HWIO_INTFREE();\ 3238*5113495bSYour Name } while (0) 3239*5113495bSYour Name 3240*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3241*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3242*5113495bSYour Name 3243*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_LSB //// 3244*5113495bSYour Name 3245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x) (x+0x0000084c) 3246*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_PHYS(x) (x+0x0000084c) 3247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK 0xffffffff 3248*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_SHFT 0 3249*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x) \ 3250*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK) 3251*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_INM(x, mask) \ 3252*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask) 3253*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUT(x, val) \ 3254*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), val) 3255*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUTM(x, mask, val) \ 3256*5113495bSYour Name do {\ 3257*5113495bSYour Name HWIO_INTLOCK(); \ 3258*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x)); \ 3259*5113495bSYour Name HWIO_INTFREE();\ 3260*5113495bSYour Name } while (0) 3261*5113495bSYour Name 3262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3263*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3264*5113495bSYour Name 3265*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_MSB //// 3266*5113495bSYour Name 3267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x) (x+0x00000850) 3268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_PHYS(x) (x+0x00000850) 3269*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK 0x00ffffff 3270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_SHFT 0 3271*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x) \ 3272*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK) 3273*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_INM(x, mask) \ 3274*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask) 3275*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUT(x, val) \ 3276*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), val) 3277*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUTM(x, mask, val) \ 3278*5113495bSYour Name do {\ 3279*5113495bSYour Name HWIO_INTLOCK(); \ 3280*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x)); \ 3281*5113495bSYour Name HWIO_INTFREE();\ 3282*5113495bSYour Name } while (0) 3283*5113495bSYour Name 3284*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3285*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3286*5113495bSYour Name 3287*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3288*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3289*5113495bSYour Name 3290*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_ID //// 3291*5113495bSYour Name 3292*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x) (x+0x00000854) 3293*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_PHYS(x) (x+0x00000854) 3294*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK 0x0000ffff 3295*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_SHFT 0 3296*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x) \ 3297*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK) 3298*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_INM(x, mask) \ 3299*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask) 3300*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUT(x, val) \ 3301*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), val) 3302*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUTM(x, mask, val) \ 3303*5113495bSYour Name do {\ 3304*5113495bSYour Name HWIO_INTLOCK(); \ 3305*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x)); \ 3306*5113495bSYour Name HWIO_INTFREE();\ 3307*5113495bSYour Name } while (0) 3308*5113495bSYour Name 3309*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_BMSK 0x0000ff00 3310*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_SHFT 0x8 3311*5113495bSYour Name 3312*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3313*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_SHFT 0x0 3314*5113495bSYour Name 3315*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_STATUS //// 3316*5113495bSYour Name 3317*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x) (x+0x00000858) 3318*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_PHYS(x) (x+0x00000858) 3319*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK 0xffffffff 3320*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_SHFT 0 3321*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x) \ 3322*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK) 3323*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_INM(x, mask) \ 3324*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask) 3325*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUT(x, val) \ 3326*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), val) 3327*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUTM(x, mask, val) \ 3328*5113495bSYour Name do {\ 3329*5113495bSYour Name HWIO_INTLOCK(); \ 3330*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x)); \ 3331*5113495bSYour Name HWIO_INTFREE();\ 3332*5113495bSYour Name } while (0) 3333*5113495bSYour Name 3334*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3335*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3336*5113495bSYour Name 3337*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3338*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3339*5113495bSYour Name 3340*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MISC //// 3341*5113495bSYour Name 3342*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x) (x+0x0000085c) 3343*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_PHYS(x) (x+0x0000085c) 3344*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK 0x03ffffff 3345*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SHFT 0 3346*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x) \ 3347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK) 3348*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_INM(x, mask) \ 3349*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask) 3350*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUT(x, val) \ 3351*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), val) 3352*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUTM(x, mask, val) \ 3353*5113495bSYour Name do {\ 3354*5113495bSYour Name HWIO_INTLOCK(); \ 3355*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x)); \ 3356*5113495bSYour Name HWIO_INTFREE();\ 3357*5113495bSYour Name } while (0) 3358*5113495bSYour Name 3359*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3360*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_SHFT 0x16 3361*5113495bSYour Name 3362*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3363*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_SHFT 0xe 3364*5113495bSYour Name 3365*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3366*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3367*5113495bSYour Name 3368*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3369*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3370*5113495bSYour Name 3371*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3372*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3373*5113495bSYour Name 3374*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3375*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_SHFT 0x6 3376*5113495bSYour Name 3377*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3378*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3379*5113495bSYour Name 3380*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3381*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3382*5113495bSYour Name 3383*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3384*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3385*5113495bSYour Name 3386*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3387*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_SHFT 0x2 3388*5113495bSYour Name 3389*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3390*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3391*5113495bSYour Name 3392*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3393*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3394*5113495bSYour Name 3395*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_LSB //// 3396*5113495bSYour Name 3397*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000860) 3398*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000860) 3399*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK 0xffffffff 3400*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_SHFT 0 3401*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x) \ 3402*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK) 3403*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_INM(x, mask) \ 3404*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask) 3405*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUT(x, val) \ 3406*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), val) 3407*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3408*5113495bSYour Name do {\ 3409*5113495bSYour Name HWIO_INTLOCK(); \ 3410*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x)); \ 3411*5113495bSYour Name HWIO_INTFREE();\ 3412*5113495bSYour Name } while (0) 3413*5113495bSYour Name 3414*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3415*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3416*5113495bSYour Name 3417*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_MSB //// 3418*5113495bSYour Name 3419*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000864) 3420*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000864) 3421*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK 0x000000ff 3422*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_SHFT 0 3423*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x) \ 3424*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK) 3425*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_INM(x, mask) \ 3426*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask) 3427*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUT(x, val) \ 3428*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), val) 3429*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3430*5113495bSYour Name do {\ 3431*5113495bSYour Name HWIO_INTLOCK(); \ 3432*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x)); \ 3433*5113495bSYour Name HWIO_INTFREE();\ 3434*5113495bSYour Name } while (0) 3435*5113495bSYour Name 3436*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3437*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3438*5113495bSYour Name 3439*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP //// 3440*5113495bSYour Name 3441*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000870) 3442*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000870) 3443*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3444*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SHFT 0 3445*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x) \ 3446*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK) 3447*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3448*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3449*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3450*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3451*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3452*5113495bSYour Name do {\ 3453*5113495bSYour Name HWIO_INTLOCK(); \ 3454*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x)); \ 3455*5113495bSYour Name HWIO_INTFREE();\ 3456*5113495bSYour Name } while (0) 3457*5113495bSYour Name 3458*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3459*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3460*5113495bSYour Name 3461*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3462*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3463*5113495bSYour Name 3464*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3465*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3466*5113495bSYour Name 3467*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS //// 3468*5113495bSYour Name 3469*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000874) 3470*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000874) 3471*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3472*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_SHFT 0 3473*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x) \ 3474*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK) 3475*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3476*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3477*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3478*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3479*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3480*5113495bSYour Name do {\ 3481*5113495bSYour Name HWIO_INTLOCK(); \ 3482*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x)); \ 3483*5113495bSYour Name HWIO_INTFREE();\ 3484*5113495bSYour Name } while (0) 3485*5113495bSYour Name 3486*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3487*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3488*5113495bSYour Name 3489*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3490*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3491*5113495bSYour Name 3492*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3493*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3494*5113495bSYour Name 3495*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER //// 3496*5113495bSYour Name 3497*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000878) 3498*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000878) 3499*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3500*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_SHFT 0 3501*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3502*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK) 3503*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3504*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3505*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3506*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3507*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3508*5113495bSYour Name do {\ 3509*5113495bSYour Name HWIO_INTLOCK(); \ 3510*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3511*5113495bSYour Name HWIO_INTFREE();\ 3512*5113495bSYour Name } while (0) 3513*5113495bSYour Name 3514*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3515*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3516*5113495bSYour Name 3517*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB //// 3518*5113495bSYour Name 3519*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000894) 3520*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000894) 3521*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3522*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_SHFT 0 3523*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_IN(x) \ 3524*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_RMSK) 3525*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_INM(x, mask) \ 3526*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), mask) 3527*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_OUT(x, val) \ 3528*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), val) 3529*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3530*5113495bSYour Name do {\ 3531*5113495bSYour Name HWIO_INTLOCK(); \ 3532*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_IN(x)); \ 3533*5113495bSYour Name HWIO_INTFREE();\ 3534*5113495bSYour Name } while (0) 3535*5113495bSYour Name 3536*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3537*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3538*5113495bSYour Name 3539*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB //// 3540*5113495bSYour Name 3541*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000898) 3542*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000898) 3543*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3544*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_SHFT 0 3545*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_IN(x) \ 3546*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_RMSK) 3547*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_INM(x, mask) \ 3548*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), mask) 3549*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_OUT(x, val) \ 3550*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), val) 3551*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3552*5113495bSYour Name do {\ 3553*5113495bSYour Name HWIO_INTLOCK(); \ 3554*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_IN(x)); \ 3555*5113495bSYour Name HWIO_INTFREE();\ 3556*5113495bSYour Name } while (0) 3557*5113495bSYour Name 3558*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3559*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3560*5113495bSYour Name 3561*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3562*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3563*5113495bSYour Name 3564*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_DATA //// 3565*5113495bSYour Name 3566*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x) (x+0x0000089c) 3567*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_PHYS(x) (x+0x0000089c) 3568*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_RMSK 0xffffffff 3569*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_SHFT 0 3570*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_IN(x) \ 3571*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_RMSK) 3572*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_INM(x, mask) \ 3573*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), mask) 3574*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_OUT(x, val) \ 3575*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), val) 3576*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_OUTM(x, mask, val) \ 3577*5113495bSYour Name do {\ 3578*5113495bSYour Name HWIO_INTLOCK(); \ 3579*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_IN(x)); \ 3580*5113495bSYour Name HWIO_INTFREE();\ 3581*5113495bSYour Name } while (0) 3582*5113495bSYour Name 3583*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3584*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_VALUE_SHFT 0x0 3585*5113495bSYour Name 3586*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET //// 3587*5113495bSYour Name 3588*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008a0) 3589*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008a0) 3590*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3591*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_SHFT 0 3592*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x) \ 3593*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK) 3594*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3595*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3596*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3597*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3598*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3599*5113495bSYour Name do {\ 3600*5113495bSYour Name HWIO_INTLOCK(); \ 3601*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x)); \ 3602*5113495bSYour Name HWIO_INTFREE();\ 3603*5113495bSYour Name } while (0) 3604*5113495bSYour Name 3605*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3606*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3607*5113495bSYour Name 3608*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_LSB //// 3609*5113495bSYour Name 3610*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x) (x+0x000008a4) 3611*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_PHYS(x) (x+0x000008a4) 3612*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK 0xffffffff 3613*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_SHFT 0 3614*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x) \ 3615*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK) 3616*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_INM(x, mask) \ 3617*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask) 3618*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUT(x, val) \ 3619*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), val) 3620*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUTM(x, mask, val) \ 3621*5113495bSYour Name do {\ 3622*5113495bSYour Name HWIO_INTLOCK(); \ 3623*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x)); \ 3624*5113495bSYour Name HWIO_INTFREE();\ 3625*5113495bSYour Name } while (0) 3626*5113495bSYour Name 3627*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3628*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3629*5113495bSYour Name 3630*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_MSB //// 3631*5113495bSYour Name 3632*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x) (x+0x000008a8) 3633*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_PHYS(x) (x+0x000008a8) 3634*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK 0x00ffffff 3635*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_SHFT 0 3636*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x) \ 3637*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK) 3638*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_INM(x, mask) \ 3639*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask) 3640*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUT(x, val) \ 3641*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), val) 3642*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUTM(x, mask, val) \ 3643*5113495bSYour Name do {\ 3644*5113495bSYour Name HWIO_INTLOCK(); \ 3645*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x)); \ 3646*5113495bSYour Name HWIO_INTFREE();\ 3647*5113495bSYour Name } while (0) 3648*5113495bSYour Name 3649*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3650*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3651*5113495bSYour Name 3652*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3653*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3654*5113495bSYour Name 3655*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_ID //// 3656*5113495bSYour Name 3657*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x) (x+0x000008ac) 3658*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_PHYS(x) (x+0x000008ac) 3659*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK 0x0000ffff 3660*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_SHFT 0 3661*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x) \ 3662*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK) 3663*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_INM(x, mask) \ 3664*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask) 3665*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUT(x, val) \ 3666*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), val) 3667*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUTM(x, mask, val) \ 3668*5113495bSYour Name do {\ 3669*5113495bSYour Name HWIO_INTLOCK(); \ 3670*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x)); \ 3671*5113495bSYour Name HWIO_INTFREE();\ 3672*5113495bSYour Name } while (0) 3673*5113495bSYour Name 3674*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_BMSK 0x0000ff00 3675*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_SHFT 0x8 3676*5113495bSYour Name 3677*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3678*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_SHFT 0x0 3679*5113495bSYour Name 3680*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_STATUS //// 3681*5113495bSYour Name 3682*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x) (x+0x000008b0) 3683*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_PHYS(x) (x+0x000008b0) 3684*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK 0xffffffff 3685*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_SHFT 0 3686*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x) \ 3687*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK) 3688*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_INM(x, mask) \ 3689*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask) 3690*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUT(x, val) \ 3691*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), val) 3692*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUTM(x, mask, val) \ 3693*5113495bSYour Name do {\ 3694*5113495bSYour Name HWIO_INTLOCK(); \ 3695*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x)); \ 3696*5113495bSYour Name HWIO_INTFREE();\ 3697*5113495bSYour Name } while (0) 3698*5113495bSYour Name 3699*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3700*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3701*5113495bSYour Name 3702*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3703*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3704*5113495bSYour Name 3705*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MISC //// 3706*5113495bSYour Name 3707*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x) (x+0x000008b4) 3708*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_PHYS(x) (x+0x000008b4) 3709*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK 0x03ffffff 3710*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SHFT 0 3711*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x) \ 3712*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK) 3713*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_INM(x, mask) \ 3714*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask) 3715*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUT(x, val) \ 3716*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), val) 3717*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUTM(x, mask, val) \ 3718*5113495bSYour Name do {\ 3719*5113495bSYour Name HWIO_INTLOCK(); \ 3720*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x)); \ 3721*5113495bSYour Name HWIO_INTFREE();\ 3722*5113495bSYour Name } while (0) 3723*5113495bSYour Name 3724*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3725*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_SHFT 0x16 3726*5113495bSYour Name 3727*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3728*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_SHFT 0xe 3729*5113495bSYour Name 3730*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3731*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3732*5113495bSYour Name 3733*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3734*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3735*5113495bSYour Name 3736*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3737*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3738*5113495bSYour Name 3739*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3740*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_SHFT 0x6 3741*5113495bSYour Name 3742*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3743*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3744*5113495bSYour Name 3745*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3746*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3747*5113495bSYour Name 3748*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3749*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3750*5113495bSYour Name 3751*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3752*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_SHFT 0x2 3753*5113495bSYour Name 3754*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3755*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3756*5113495bSYour Name 3757*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3758*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3759*5113495bSYour Name 3760*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB //// 3761*5113495bSYour Name 3762*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x) (x+0x000008b8) 3763*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_PHYS(x) (x+0x000008b8) 3764*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK 0xffffffff 3765*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_SHFT 0 3766*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x) \ 3767*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK) 3768*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_INM(x, mask) \ 3769*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask) 3770*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUT(x, val) \ 3771*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), val) 3772*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3773*5113495bSYour Name do {\ 3774*5113495bSYour Name HWIO_INTLOCK(); \ 3775*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x)); \ 3776*5113495bSYour Name HWIO_INTFREE();\ 3777*5113495bSYour Name } while (0) 3778*5113495bSYour Name 3779*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3780*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3781*5113495bSYour Name 3782*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB //// 3783*5113495bSYour Name 3784*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x) (x+0x000008bc) 3785*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_PHYS(x) (x+0x000008bc) 3786*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK 0x000000ff 3787*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_SHFT 0 3788*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x) \ 3789*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK) 3790*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_INM(x, mask) \ 3791*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask) 3792*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUT(x, val) \ 3793*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), val) 3794*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3795*5113495bSYour Name do {\ 3796*5113495bSYour Name HWIO_INTLOCK(); \ 3797*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x)); \ 3798*5113495bSYour Name HWIO_INTFREE();\ 3799*5113495bSYour Name } while (0) 3800*5113495bSYour Name 3801*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3802*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3803*5113495bSYour Name 3804*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP //// 3805*5113495bSYour Name 3806*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000008c8) 3807*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000008c8) 3808*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3809*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SHFT 0 3810*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x) \ 3811*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK) 3812*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3813*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3814*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3815*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3816*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3817*5113495bSYour Name do {\ 3818*5113495bSYour Name HWIO_INTLOCK(); \ 3819*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x)); \ 3820*5113495bSYour Name HWIO_INTFREE();\ 3821*5113495bSYour Name } while (0) 3822*5113495bSYour Name 3823*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3824*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3825*5113495bSYour Name 3826*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3827*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3828*5113495bSYour Name 3829*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3830*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3831*5113495bSYour Name 3832*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS //// 3833*5113495bSYour Name 3834*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000008cc) 3835*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000008cc) 3836*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3837*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_SHFT 0 3838*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x) \ 3839*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK) 3840*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3842*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3843*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3844*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3845*5113495bSYour Name do {\ 3846*5113495bSYour Name HWIO_INTLOCK(); \ 3847*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x)); \ 3848*5113495bSYour Name HWIO_INTFREE();\ 3849*5113495bSYour Name } while (0) 3850*5113495bSYour Name 3851*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3852*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3853*5113495bSYour Name 3854*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3855*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3856*5113495bSYour Name 3857*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3858*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3859*5113495bSYour Name 3860*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER //// 3861*5113495bSYour Name 3862*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000008d0) 3863*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000008d0) 3864*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3865*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_SHFT 0 3866*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3867*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK) 3868*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3869*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3870*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3871*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3872*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3873*5113495bSYour Name do {\ 3874*5113495bSYour Name HWIO_INTLOCK(); \ 3875*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3876*5113495bSYour Name HWIO_INTFREE();\ 3877*5113495bSYour Name } while (0) 3878*5113495bSYour Name 3879*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3880*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3881*5113495bSYour Name 3882*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB //// 3883*5113495bSYour Name 3884*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000008ec) 3885*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000008ec) 3886*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3887*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_SHFT 0 3888*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x) \ 3889*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK) 3890*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3891*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3892*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3893*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), val) 3894*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3895*5113495bSYour Name do {\ 3896*5113495bSYour Name HWIO_INTLOCK(); \ 3897*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x)); \ 3898*5113495bSYour Name HWIO_INTFREE();\ 3899*5113495bSYour Name } while (0) 3900*5113495bSYour Name 3901*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3902*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3903*5113495bSYour Name 3904*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB //// 3905*5113495bSYour Name 3906*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000008f0) 3907*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000008f0) 3908*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3909*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_SHFT 0 3910*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x) \ 3911*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK) 3912*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3914*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3915*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), val) 3916*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3917*5113495bSYour Name do {\ 3918*5113495bSYour Name HWIO_INTLOCK(); \ 3919*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x)); \ 3920*5113495bSYour Name HWIO_INTFREE();\ 3921*5113495bSYour Name } while (0) 3922*5113495bSYour Name 3923*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3924*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3925*5113495bSYour Name 3926*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3927*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3928*5113495bSYour Name 3929*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_DATA //// 3930*5113495bSYour Name 3931*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x) (x+0x000008f4) 3932*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_PHYS(x) (x+0x000008f4) 3933*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK 0xffffffff 3934*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_SHFT 0 3935*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x) \ 3936*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK) 3937*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_INM(x, mask) \ 3938*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask) 3939*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUT(x, val) \ 3940*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), val) 3941*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3942*5113495bSYour Name do {\ 3943*5113495bSYour Name HWIO_INTLOCK(); \ 3944*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x)); \ 3945*5113495bSYour Name HWIO_INTFREE();\ 3946*5113495bSYour Name } while (0) 3947*5113495bSYour Name 3948*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3949*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_SHFT 0x0 3950*5113495bSYour Name 3951*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET //// 3952*5113495bSYour Name 3953*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008f8) 3954*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008f8) 3955*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3956*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_SHFT 0 3957*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x) \ 3958*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK) 3959*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3960*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3961*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3962*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3963*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3964*5113495bSYour Name do {\ 3965*5113495bSYour Name HWIO_INTLOCK(); \ 3966*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3967*5113495bSYour Name HWIO_INTFREE();\ 3968*5113495bSYour Name } while (0) 3969*5113495bSYour Name 3970*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3971*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3972*5113495bSYour Name 3973*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_LSB //// 3974*5113495bSYour Name 3975*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x) (x+0x000008fc) 3976*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_PHYS(x) (x+0x000008fc) 3977*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK 0xffffffff 3978*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_SHFT 0 3979*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x) \ 3980*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK) 3981*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_INM(x, mask) \ 3982*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask) 3983*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUT(x, val) \ 3984*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), val) 3985*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUTM(x, mask, val) \ 3986*5113495bSYour Name do {\ 3987*5113495bSYour Name HWIO_INTLOCK(); \ 3988*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x)); \ 3989*5113495bSYour Name HWIO_INTFREE();\ 3990*5113495bSYour Name } while (0) 3991*5113495bSYour Name 3992*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3993*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3994*5113495bSYour Name 3995*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_MSB //// 3996*5113495bSYour Name 3997*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x) (x+0x00000900) 3998*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_PHYS(x) (x+0x00000900) 3999*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK 0x00ffffff 4000*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_SHFT 0 4001*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x) \ 4002*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK) 4003*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_INM(x, mask) \ 4004*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask) 4005*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUT(x, val) \ 4006*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), val) 4007*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUTM(x, mask, val) \ 4008*5113495bSYour Name do {\ 4009*5113495bSYour Name HWIO_INTLOCK(); \ 4010*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x)); \ 4011*5113495bSYour Name HWIO_INTFREE();\ 4012*5113495bSYour Name } while (0) 4013*5113495bSYour Name 4014*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4015*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4016*5113495bSYour Name 4017*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4018*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4019*5113495bSYour Name 4020*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_ID //// 4021*5113495bSYour Name 4022*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x) (x+0x00000904) 4023*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_PHYS(x) (x+0x00000904) 4024*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK 0x0000ffff 4025*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_SHFT 0 4026*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x) \ 4027*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK) 4028*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_INM(x, mask) \ 4029*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask) 4030*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUT(x, val) \ 4031*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), val) 4032*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUTM(x, mask, val) \ 4033*5113495bSYour Name do {\ 4034*5113495bSYour Name HWIO_INTLOCK(); \ 4035*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x)); \ 4036*5113495bSYour Name HWIO_INTFREE();\ 4037*5113495bSYour Name } while (0) 4038*5113495bSYour Name 4039*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_BMSK 0x0000ff00 4040*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_SHFT 0x8 4041*5113495bSYour Name 4042*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4043*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_SHFT 0x0 4044*5113495bSYour Name 4045*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_STATUS //// 4046*5113495bSYour Name 4047*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x) (x+0x00000908) 4048*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_PHYS(x) (x+0x00000908) 4049*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK 0xffffffff 4050*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_SHFT 0 4051*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x) \ 4052*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK) 4053*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_INM(x, mask) \ 4054*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask) 4055*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUT(x, val) \ 4056*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), val) 4057*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUTM(x, mask, val) \ 4058*5113495bSYour Name do {\ 4059*5113495bSYour Name HWIO_INTLOCK(); \ 4060*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x)); \ 4061*5113495bSYour Name HWIO_INTFREE();\ 4062*5113495bSYour Name } while (0) 4063*5113495bSYour Name 4064*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4065*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4066*5113495bSYour Name 4067*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4068*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4069*5113495bSYour Name 4070*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MISC //// 4071*5113495bSYour Name 4072*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x) (x+0x0000090c) 4073*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_PHYS(x) (x+0x0000090c) 4074*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK 0x03ffffff 4075*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SHFT 0 4076*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x) \ 4077*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK) 4078*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_INM(x, mask) \ 4079*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask) 4080*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUT(x, val) \ 4081*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), val) 4082*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUTM(x, mask, val) \ 4083*5113495bSYour Name do {\ 4084*5113495bSYour Name HWIO_INTLOCK(); \ 4085*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x)); \ 4086*5113495bSYour Name HWIO_INTFREE();\ 4087*5113495bSYour Name } while (0) 4088*5113495bSYour Name 4089*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4090*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_SHFT 0x16 4091*5113495bSYour Name 4092*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4093*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_SHFT 0xe 4094*5113495bSYour Name 4095*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4096*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4097*5113495bSYour Name 4098*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4099*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4100*5113495bSYour Name 4101*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4102*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4103*5113495bSYour Name 4104*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4105*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_SHFT 0x6 4106*5113495bSYour Name 4107*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4108*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4109*5113495bSYour Name 4110*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4111*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4112*5113495bSYour Name 4113*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4114*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4115*5113495bSYour Name 4116*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4117*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_SHFT 0x2 4118*5113495bSYour Name 4119*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4120*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4121*5113495bSYour Name 4122*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4123*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4124*5113495bSYour Name 4125*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB //// 4126*5113495bSYour Name 4127*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000910) 4128*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000910) 4129*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK 0xffffffff 4130*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_SHFT 0 4131*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x) \ 4132*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK) 4133*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_INM(x, mask) \ 4134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask) 4135*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUT(x, val) \ 4136*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), val) 4137*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4138*5113495bSYour Name do {\ 4139*5113495bSYour Name HWIO_INTLOCK(); \ 4140*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x)); \ 4141*5113495bSYour Name HWIO_INTFREE();\ 4142*5113495bSYour Name } while (0) 4143*5113495bSYour Name 4144*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4145*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4146*5113495bSYour Name 4147*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB //// 4148*5113495bSYour Name 4149*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000914) 4150*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000914) 4151*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK 0x000000ff 4152*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_SHFT 0 4153*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x) \ 4154*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK) 4155*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_INM(x, mask) \ 4156*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask) 4157*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUT(x, val) \ 4158*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), val) 4159*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4160*5113495bSYour Name do {\ 4161*5113495bSYour Name HWIO_INTLOCK(); \ 4162*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x)); \ 4163*5113495bSYour Name HWIO_INTFREE();\ 4164*5113495bSYour Name } while (0) 4165*5113495bSYour Name 4166*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4167*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4168*5113495bSYour Name 4169*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP //// 4170*5113495bSYour Name 4171*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000920) 4172*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000920) 4173*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4174*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SHFT 0 4175*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x) \ 4176*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK) 4177*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4178*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4179*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4180*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4181*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4182*5113495bSYour Name do {\ 4183*5113495bSYour Name HWIO_INTLOCK(); \ 4184*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x)); \ 4185*5113495bSYour Name HWIO_INTFREE();\ 4186*5113495bSYour Name } while (0) 4187*5113495bSYour Name 4188*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4189*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4190*5113495bSYour Name 4191*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4192*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4193*5113495bSYour Name 4194*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4195*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4196*5113495bSYour Name 4197*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS //// 4198*5113495bSYour Name 4199*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000924) 4200*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000924) 4201*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4202*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_SHFT 0 4203*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x) \ 4204*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK) 4205*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4207*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4208*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4209*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4210*5113495bSYour Name do {\ 4211*5113495bSYour Name HWIO_INTLOCK(); \ 4212*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x)); \ 4213*5113495bSYour Name HWIO_INTFREE();\ 4214*5113495bSYour Name } while (0) 4215*5113495bSYour Name 4216*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4217*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4218*5113495bSYour Name 4219*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4220*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4221*5113495bSYour Name 4222*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4223*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4224*5113495bSYour Name 4225*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER //// 4226*5113495bSYour Name 4227*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000928) 4228*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000928) 4229*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4230*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_SHFT 0 4231*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4232*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK) 4233*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4234*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4235*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4236*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4237*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4238*5113495bSYour Name do {\ 4239*5113495bSYour Name HWIO_INTLOCK(); \ 4240*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4241*5113495bSYour Name HWIO_INTFREE();\ 4242*5113495bSYour Name } while (0) 4243*5113495bSYour Name 4244*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4245*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4246*5113495bSYour Name 4247*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB //// 4248*5113495bSYour Name 4249*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000944) 4250*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000944) 4251*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4252*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_SHFT 0 4253*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x) \ 4254*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK) 4255*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_INM(x, mask) \ 4256*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask) 4257*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUT(x, val) \ 4258*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), val) 4259*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4260*5113495bSYour Name do {\ 4261*5113495bSYour Name HWIO_INTLOCK(); \ 4262*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x)); \ 4263*5113495bSYour Name HWIO_INTFREE();\ 4264*5113495bSYour Name } while (0) 4265*5113495bSYour Name 4266*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4267*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4268*5113495bSYour Name 4269*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB //// 4270*5113495bSYour Name 4271*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000948) 4272*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000948) 4273*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4274*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_SHFT 0 4275*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x) \ 4276*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK) 4277*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_INM(x, mask) \ 4278*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask) 4279*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUT(x, val) \ 4280*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), val) 4281*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4282*5113495bSYour Name do {\ 4283*5113495bSYour Name HWIO_INTLOCK(); \ 4284*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x)); \ 4285*5113495bSYour Name HWIO_INTFREE();\ 4286*5113495bSYour Name } while (0) 4287*5113495bSYour Name 4288*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4289*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4290*5113495bSYour Name 4291*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4292*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4293*5113495bSYour Name 4294*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_DATA //// 4295*5113495bSYour Name 4296*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x) (x+0x0000094c) 4297*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_PHYS(x) (x+0x0000094c) 4298*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK 0xffffffff 4299*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_SHFT 0 4300*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x) \ 4301*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK) 4302*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_INM(x, mask) \ 4303*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask) 4304*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUT(x, val) \ 4305*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), val) 4306*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUTM(x, mask, val) \ 4307*5113495bSYour Name do {\ 4308*5113495bSYour Name HWIO_INTLOCK(); \ 4309*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x)); \ 4310*5113495bSYour Name HWIO_INTFREE();\ 4311*5113495bSYour Name } while (0) 4312*5113495bSYour Name 4313*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4314*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_SHFT 0x0 4315*5113495bSYour Name 4316*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET //// 4317*5113495bSYour Name 4318*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000950) 4319*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000950) 4320*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4321*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_SHFT 0 4322*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x) \ 4323*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK) 4324*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4325*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4326*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4327*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4328*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4329*5113495bSYour Name do {\ 4330*5113495bSYour Name HWIO_INTLOCK(); \ 4331*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x)); \ 4332*5113495bSYour Name HWIO_INTFREE();\ 4333*5113495bSYour Name } while (0) 4334*5113495bSYour Name 4335*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4336*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4337*5113495bSYour Name 4338*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_LSB //// 4339*5113495bSYour Name 4340*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x) (x+0x00000954) 4341*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_PHYS(x) (x+0x00000954) 4342*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK 0xffffffff 4343*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_SHFT 0 4344*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x) \ 4345*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK) 4346*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_INM(x, mask) \ 4347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask) 4348*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUT(x, val) \ 4349*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), val) 4350*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUTM(x, mask, val) \ 4351*5113495bSYour Name do {\ 4352*5113495bSYour Name HWIO_INTLOCK(); \ 4353*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x)); \ 4354*5113495bSYour Name HWIO_INTFREE();\ 4355*5113495bSYour Name } while (0) 4356*5113495bSYour Name 4357*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 4358*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 4359*5113495bSYour Name 4360*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_MSB //// 4361*5113495bSYour Name 4362*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x) (x+0x00000958) 4363*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_PHYS(x) (x+0x00000958) 4364*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK 0x00ffffff 4365*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_SHFT 0 4366*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x) \ 4367*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK) 4368*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_INM(x, mask) \ 4369*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask) 4370*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUT(x, val) \ 4371*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), val) 4372*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUTM(x, mask, val) \ 4373*5113495bSYour Name do {\ 4374*5113495bSYour Name HWIO_INTLOCK(); \ 4375*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x)); \ 4376*5113495bSYour Name HWIO_INTFREE();\ 4377*5113495bSYour Name } while (0) 4378*5113495bSYour Name 4379*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4380*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4381*5113495bSYour Name 4382*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4383*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4384*5113495bSYour Name 4385*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_ID //// 4386*5113495bSYour Name 4387*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x) (x+0x0000095c) 4388*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_PHYS(x) (x+0x0000095c) 4389*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RMSK 0x0000ffff 4390*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_SHFT 0 4391*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_IN(x) \ 4392*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_ID_RMSK) 4393*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_INM(x, mask) \ 4394*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask) 4395*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUT(x, val) \ 4396*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), val) 4397*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUTM(x, mask, val) \ 4398*5113495bSYour Name do {\ 4399*5113495bSYour Name HWIO_INTLOCK(); \ 4400*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_ID_IN(x)); \ 4401*5113495bSYour Name HWIO_INTFREE();\ 4402*5113495bSYour Name } while (0) 4403*5113495bSYour Name 4404*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_BMSK 0x0000ff00 4405*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_SHFT 0x8 4406*5113495bSYour Name 4407*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4408*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_SHFT 0x0 4409*5113495bSYour Name 4410*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_STATUS //// 4411*5113495bSYour Name 4412*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x) (x+0x00000960) 4413*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_PHYS(x) (x+0x00000960) 4414*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK 0xffffffff 4415*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_SHFT 0 4416*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x) \ 4417*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK) 4418*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_INM(x, mask) \ 4419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask) 4420*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUT(x, val) \ 4421*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), val) 4422*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUTM(x, mask, val) \ 4423*5113495bSYour Name do {\ 4424*5113495bSYour Name HWIO_INTLOCK(); \ 4425*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x)); \ 4426*5113495bSYour Name HWIO_INTFREE();\ 4427*5113495bSYour Name } while (0) 4428*5113495bSYour Name 4429*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4430*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4431*5113495bSYour Name 4432*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4433*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4434*5113495bSYour Name 4435*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MISC //// 4436*5113495bSYour Name 4437*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x) (x+0x00000964) 4438*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_PHYS(x) (x+0x00000964) 4439*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK 0x03ffffff 4440*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SHFT 0 4441*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x) \ 4442*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK) 4443*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_INM(x, mask) \ 4444*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask) 4445*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUT(x, val) \ 4446*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), val) 4447*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUTM(x, mask, val) \ 4448*5113495bSYour Name do {\ 4449*5113495bSYour Name HWIO_INTLOCK(); \ 4450*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x)); \ 4451*5113495bSYour Name HWIO_INTFREE();\ 4452*5113495bSYour Name } while (0) 4453*5113495bSYour Name 4454*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4455*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_SHFT 0x16 4456*5113495bSYour Name 4457*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4458*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_SHFT 0xe 4459*5113495bSYour Name 4460*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4461*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4462*5113495bSYour Name 4463*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4464*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4465*5113495bSYour Name 4466*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4467*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4468*5113495bSYour Name 4469*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4470*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_SHFT 0x6 4471*5113495bSYour Name 4472*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4473*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4474*5113495bSYour Name 4475*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4476*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4477*5113495bSYour Name 4478*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4479*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4480*5113495bSYour Name 4481*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4482*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_SHFT 0x2 4483*5113495bSYour Name 4484*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4485*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4486*5113495bSYour Name 4487*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4488*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4489*5113495bSYour Name 4490*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_LSB //// 4491*5113495bSYour Name 4492*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000968) 4493*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000968) 4494*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK 0xffffffff 4495*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_SHFT 0 4496*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x) \ 4497*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK) 4498*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_INM(x, mask) \ 4499*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 4500*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUT(x, val) \ 4501*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), val) 4502*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4503*5113495bSYour Name do {\ 4504*5113495bSYour Name HWIO_INTLOCK(); \ 4505*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x)); \ 4506*5113495bSYour Name HWIO_INTFREE();\ 4507*5113495bSYour Name } while (0) 4508*5113495bSYour Name 4509*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4510*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4511*5113495bSYour Name 4512*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_MSB //// 4513*5113495bSYour Name 4514*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000096c) 4515*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000096c) 4516*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK 0x000000ff 4517*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_SHFT 0 4518*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x) \ 4519*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK) 4520*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_INM(x, mask) \ 4521*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 4522*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUT(x, val) \ 4523*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), val) 4524*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4525*5113495bSYour Name do {\ 4526*5113495bSYour Name HWIO_INTLOCK(); \ 4527*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x)); \ 4528*5113495bSYour Name HWIO_INTFREE();\ 4529*5113495bSYour Name } while (0) 4530*5113495bSYour Name 4531*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4532*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4533*5113495bSYour Name 4534*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP //// 4535*5113495bSYour Name 4536*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000978) 4537*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000978) 4538*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4539*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SHFT 0 4540*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x) \ 4541*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK) 4542*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4543*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4544*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4545*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4546*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4547*5113495bSYour Name do {\ 4548*5113495bSYour Name HWIO_INTLOCK(); \ 4549*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x)); \ 4550*5113495bSYour Name HWIO_INTFREE();\ 4551*5113495bSYour Name } while (0) 4552*5113495bSYour Name 4553*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4554*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4555*5113495bSYour Name 4556*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4557*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4558*5113495bSYour Name 4559*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4560*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4561*5113495bSYour Name 4562*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS //// 4563*5113495bSYour Name 4564*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000097c) 4565*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000097c) 4566*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4567*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_SHFT 0 4568*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x) \ 4569*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK) 4570*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4571*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4572*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4573*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4574*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4575*5113495bSYour Name do {\ 4576*5113495bSYour Name HWIO_INTLOCK(); \ 4577*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x)); \ 4578*5113495bSYour Name HWIO_INTFREE();\ 4579*5113495bSYour Name } while (0) 4580*5113495bSYour Name 4581*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4582*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4583*5113495bSYour Name 4584*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4585*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4586*5113495bSYour Name 4587*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4588*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4589*5113495bSYour Name 4590*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER //// 4591*5113495bSYour Name 4592*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000980) 4593*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000980) 4594*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4595*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_SHFT 0 4596*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4597*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK) 4598*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4599*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4600*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4601*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4602*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4603*5113495bSYour Name do {\ 4604*5113495bSYour Name HWIO_INTLOCK(); \ 4605*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4606*5113495bSYour Name HWIO_INTFREE();\ 4607*5113495bSYour Name } while (0) 4608*5113495bSYour Name 4609*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4610*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4611*5113495bSYour Name 4612*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_BASE_LSB //// 4613*5113495bSYour Name 4614*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000099c) 4615*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000099c) 4616*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4617*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_SHFT 0 4618*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_IN(x) \ 4619*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_RMSK) 4620*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ 4621*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 4622*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ 4623*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), val) 4624*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4625*5113495bSYour Name do {\ 4626*5113495bSYour Name HWIO_INTLOCK(); \ 4627*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_IN(x)); \ 4628*5113495bSYour Name HWIO_INTFREE();\ 4629*5113495bSYour Name } while (0) 4630*5113495bSYour Name 4631*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4632*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4633*5113495bSYour Name 4634*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_BASE_MSB //// 4635*5113495bSYour Name 4636*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000009a0) 4637*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000009a0) 4638*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4639*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_SHFT 0 4640*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_IN(x) \ 4641*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_RMSK) 4642*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ 4643*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 4644*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ 4645*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), val) 4646*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4647*5113495bSYour Name do {\ 4648*5113495bSYour Name HWIO_INTLOCK(); \ 4649*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_IN(x)); \ 4650*5113495bSYour Name HWIO_INTFREE();\ 4651*5113495bSYour Name } while (0) 4652*5113495bSYour Name 4653*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4654*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4655*5113495bSYour Name 4656*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4657*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4658*5113495bSYour Name 4659*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_DATA //// 4660*5113495bSYour Name 4661*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x) (x+0x000009a4) 4662*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_PHYS(x) (x+0x000009a4) 4663*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_RMSK 0xffffffff 4664*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_SHFT 0 4665*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_IN(x) \ 4666*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_RMSK) 4667*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_INM(x, mask) \ 4668*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), mask) 4669*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_OUT(x, val) \ 4670*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), val) 4671*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ 4672*5113495bSYour Name do {\ 4673*5113495bSYour Name HWIO_INTLOCK(); \ 4674*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_IN(x)); \ 4675*5113495bSYour Name HWIO_INTFREE();\ 4676*5113495bSYour Name } while (0) 4677*5113495bSYour Name 4678*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4679*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_VALUE_SHFT 0x0 4680*5113495bSYour Name 4681*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET //// 4682*5113495bSYour Name 4683*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000009a8) 4684*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000009a8) 4685*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4686*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_SHFT 0 4687*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x) \ 4688*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK) 4689*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4690*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4691*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4692*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4693*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4694*5113495bSYour Name do {\ 4695*5113495bSYour Name HWIO_INTLOCK(); \ 4696*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x)); \ 4697*5113495bSYour Name HWIO_INTFREE();\ 4698*5113495bSYour Name } while (0) 4699*5113495bSYour Name 4700*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4701*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4702*5113495bSYour Name 4703*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_LOWER //// 4704*5113495bSYour Name 4705*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x000009ac) 4706*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x000009ac) 4707*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK 0xffffffff 4708*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_SHFT 0 4709*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x) \ 4710*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK) 4711*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ 4712*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 4713*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ 4714*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), val) 4715*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ 4716*5113495bSYour Name do {\ 4717*5113495bSYour Name HWIO_INTLOCK(); \ 4718*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x)); \ 4719*5113495bSYour Name HWIO_INTFREE();\ 4720*5113495bSYour Name } while (0) 4721*5113495bSYour Name 4722*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_BMSK 0xffffffff 4723*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_SHFT 0x0 4724*5113495bSYour Name 4725*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_UPPER //// 4726*5113495bSYour Name 4727*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000009b0) 4728*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000009b0) 4729*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK 0x000000ff 4730*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_SHFT 0 4731*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x) \ 4732*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK) 4733*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ 4734*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 4735*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ 4736*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), val) 4737*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ 4738*5113495bSYour Name do {\ 4739*5113495bSYour Name HWIO_INTLOCK(); \ 4740*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x)); \ 4741*5113495bSYour Name HWIO_INTFREE();\ 4742*5113495bSYour Name } while (0) 4743*5113495bSYour Name 4744*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_BMSK 0x000000ff 4745*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_SHFT 0x0 4746*5113495bSYour Name 4747*5113495bSYour Name //// Register TCL_R0_GXI_SM_STATES_IX_0 //// 4748*5113495bSYour Name 4749*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000009b4) 4750*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000009b4) 4751*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK 0x00000fff 4752*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SHFT 0 4753*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x) \ 4754*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK) 4755*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ 4756*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 4757*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ 4758*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), val) 4759*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ 4760*5113495bSYour Name do {\ 4761*5113495bSYour Name HWIO_INTLOCK(); \ 4762*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x)); \ 4763*5113495bSYour Name HWIO_INTFREE();\ 4764*5113495bSYour Name } while (0) 4765*5113495bSYour Name 4766*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0x00000e00 4767*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9 4768*5113495bSYour Name 4769*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x000001f0 4770*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4 4771*5113495bSYour Name 4772*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0x0000000f 4773*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0 4774*5113495bSYour Name 4775*5113495bSYour Name //// Register TCL_R0_GXI_END_OF_TEST_CHECK //// 4776*5113495bSYour Name 4777*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000009b8) 4778*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000009b8) 4779*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK 0x00000001 4780*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_SHFT 0 4781*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x) \ 4782*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK) 4783*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ 4784*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 4785*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ 4786*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val) 4787*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 4788*5113495bSYour Name do {\ 4789*5113495bSYour Name HWIO_INTLOCK(); \ 4790*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x)); \ 4791*5113495bSYour Name HWIO_INTFREE();\ 4792*5113495bSYour Name } while (0) 4793*5113495bSYour Name 4794*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 4795*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 4796*5113495bSYour Name 4797*5113495bSYour Name //// Register TCL_R0_GXI_CLOCK_GATE_DISABLE //// 4798*5113495bSYour Name 4799*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000009bc) 4800*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000009bc) 4801*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK 0x80000fff 4802*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SHFT 0 4803*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ 4804*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK) 4805*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ 4806*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 4807*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ 4808*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val) 4809*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ 4810*5113495bSYour Name do {\ 4811*5113495bSYour Name HWIO_INTLOCK(); \ 4812*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x)); \ 4813*5113495bSYour Name HWIO_INTFREE();\ 4814*5113495bSYour Name } while (0) 4815*5113495bSYour Name 4816*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000 4817*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f 4818*5113495bSYour Name 4819*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_BMSK 0x00000800 4820*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb 4821*5113495bSYour Name 4822*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x00000400 4823*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa 4824*5113495bSYour Name 4825*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x00000200 4826*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9 4827*5113495bSYour Name 4828*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x00000100 4829*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8 4830*5113495bSYour Name 4831*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x00000080 4832*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7 4833*5113495bSYour Name 4834*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x00000040 4835*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6 4836*5113495bSYour Name 4837*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x00000020 4838*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5 4839*5113495bSYour Name 4840*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x00000010 4841*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4 4842*5113495bSYour Name 4843*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x00000008 4844*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3 4845*5113495bSYour Name 4846*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x00000004 4847*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2 4848*5113495bSYour Name 4849*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x00000002 4850*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1 4851*5113495bSYour Name 4852*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_BMSK 0x00000001 4853*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_SHFT 0x0 4854*5113495bSYour Name 4855*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_INTS //// 4856*5113495bSYour Name 4857*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000009c0) 4858*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000009c0) 4859*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK 0x01010101 4860*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_SHFT 0 4861*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x) \ 4862*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK) 4863*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ 4864*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 4865*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ 4866*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), val) 4867*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ 4868*5113495bSYour Name do {\ 4869*5113495bSYour Name HWIO_INTLOCK(); \ 4870*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x)); \ 4871*5113495bSYour Name HWIO_INTFREE();\ 4872*5113495bSYour Name } while (0) 4873*5113495bSYour Name 4874*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x01000000 4875*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18 4876*5113495bSYour Name 4877*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x00010000 4878*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10 4879*5113495bSYour Name 4880*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x00000100 4881*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8 4882*5113495bSYour Name 4883*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x00000001 4884*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0 4885*5113495bSYour Name 4886*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_STATS //// 4887*5113495bSYour Name 4888*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000009c4) 4889*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000009c4) 4890*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK 0x003f3f3f 4891*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_SHFT 0 4892*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x) \ 4893*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK) 4894*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ 4895*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 4896*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ 4897*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), val) 4898*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ 4899*5113495bSYour Name do {\ 4900*5113495bSYour Name HWIO_INTLOCK(); \ 4901*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x)); \ 4902*5113495bSYour Name HWIO_INTFREE();\ 4903*5113495bSYour Name } while (0) 4904*5113495bSYour Name 4905*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x003f0000 4906*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10 4907*5113495bSYour Name 4908*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x00003f00 4909*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8 4910*5113495bSYour Name 4911*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x0000003f 4912*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0 4913*5113495bSYour Name 4914*5113495bSYour Name //// Register TCL_R0_GXI_GXI_DEFAULT_CONTROL //// 4915*5113495bSYour Name 4916*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000009c8) 4917*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000009c8) 4918*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f 4919*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_SHFT 0 4920*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ 4921*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK) 4922*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ 4923*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 4924*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ 4925*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val) 4926*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ 4927*5113495bSYour Name do {\ 4928*5113495bSYour Name HWIO_INTLOCK(); \ 4929*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)); \ 4930*5113495bSYour Name HWIO_INTFREE();\ 4931*5113495bSYour Name } while (0) 4932*5113495bSYour Name 4933*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000 4934*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18 4935*5113495bSYour Name 4936*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4937*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10 4938*5113495bSYour Name 4939*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x00003f00 4940*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8 4941*5113495bSYour Name 4942*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x0000003f 4943*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0 4944*5113495bSYour Name 4945*5113495bSYour Name //// Register TCL_R0_GXI_GXI_REDUCED_CONTROL //// 4946*5113495bSYour Name 4947*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000009cc) 4948*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000009cc) 4949*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f 4950*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_SHFT 0 4951*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ 4952*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK) 4953*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ 4954*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 4955*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ 4956*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val) 4957*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ 4958*5113495bSYour Name do {\ 4959*5113495bSYour Name HWIO_INTLOCK(); \ 4960*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x)); \ 4961*5113495bSYour Name HWIO_INTFREE();\ 4962*5113495bSYour Name } while (0) 4963*5113495bSYour Name 4964*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000 4965*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18 4966*5113495bSYour Name 4967*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4968*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10 4969*5113495bSYour Name 4970*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x00003f00 4971*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8 4972*5113495bSYour Name 4973*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x0000003f 4974*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0 4975*5113495bSYour Name 4976*5113495bSYour Name //// Register TCL_R0_GXI_GXI_MISC_CONTROL //// 4977*5113495bSYour Name 4978*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000009d0) 4979*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000009d0) 4980*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK 0x0fffffff 4981*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_SHFT 0 4982*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x) \ 4983*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK) 4984*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ 4985*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 4986*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ 4987*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val) 4988*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ 4989*5113495bSYour Name do {\ 4990*5113495bSYour Name HWIO_INTLOCK(); \ 4991*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x)); \ 4992*5113495bSYour Name HWIO_INTFREE();\ 4993*5113495bSYour Name } while (0) 4994*5113495bSYour Name 4995*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x08000000 4996*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b 4997*5113495bSYour Name 4998*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x04000000 4999*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a 5000*5113495bSYour Name 5001*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x02000000 5002*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19 5003*5113495bSYour Name 5004*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x01000000 5005*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18 5006*5113495bSYour Name 5007*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x00800000 5008*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17 5009*5113495bSYour Name 5010*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x00700000 5011*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14 5012*5113495bSYour Name 5013*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0x000e0000 5014*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11 5015*5113495bSYour Name 5016*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x0001fe00 5017*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9 5018*5113495bSYour Name 5019*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x000001fe 5020*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1 5021*5113495bSYour Name 5022*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x00000001 5023*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0 5024*5113495bSYour Name 5025*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_CONTROL //// 5026*5113495bSYour Name 5027*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x000009d4) 5028*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x000009d4) 5029*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK 0xffff0001 5030*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_SHFT 0 5031*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ 5032*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK) 5033*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ 5034*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 5035*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ 5036*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val) 5037*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ 5038*5113495bSYour Name do {\ 5039*5113495bSYour Name HWIO_INTLOCK(); \ 5040*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x)); \ 5041*5113495bSYour Name HWIO_INTFREE();\ 5042*5113495bSYour Name } while (0) 5043*5113495bSYour Name 5044*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000 5045*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10 5046*5113495bSYour Name 5047*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x00000001 5048*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0 5049*5113495bSYour Name 5050*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_STATUS //// 5051*5113495bSYour Name 5052*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x000009d8) 5053*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x000009d8) 5054*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK 0x0000ffff 5055*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_SHFT 0 5056*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x) \ 5057*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK) 5058*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ 5059*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 5060*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ 5061*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val) 5062*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ 5063*5113495bSYour Name do {\ 5064*5113495bSYour Name HWIO_INTLOCK(); \ 5065*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x)); \ 5066*5113495bSYour Name HWIO_INTFREE();\ 5067*5113495bSYour Name } while (0) 5068*5113495bSYour Name 5069*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0x0000ffff 5070*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0 5071*5113495bSYour Name 5072*5113495bSYour Name //// Register TCL_R0_GXI_GXI_IDLE_COUNTERS //// 5073*5113495bSYour Name 5074*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x000009dc) 5075*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x000009dc) 5076*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK 0xffffffff 5077*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_SHFT 0 5078*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ 5079*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK) 5080*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ 5081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 5082*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ 5083*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val) 5084*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ 5085*5113495bSYour Name do {\ 5086*5113495bSYour Name HWIO_INTLOCK(); \ 5087*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x)); \ 5088*5113495bSYour Name HWIO_INTFREE();\ 5089*5113495bSYour Name } while (0) 5090*5113495bSYour Name 5091*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000 5092*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10 5093*5113495bSYour Name 5094*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0x0000ffff 5095*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0 5096*5113495bSYour Name 5097*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_LATENCY_CTRL //// 5098*5113495bSYour Name 5099*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x000009e0) 5100*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x000009e0) 5101*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK 0x000fffff 5102*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_SHFT 0 5103*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ 5104*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK) 5105*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ 5106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 5107*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ 5108*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val) 5109*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ 5110*5113495bSYour Name do {\ 5111*5113495bSYour Name HWIO_INTLOCK(); \ 5112*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)); \ 5113*5113495bSYour Name HWIO_INTFREE();\ 5114*5113495bSYour Name } while (0) 5115*5113495bSYour Name 5116*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 5117*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 5118*5113495bSYour Name 5119*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 5120*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 5121*5113495bSYour Name 5122*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 5123*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 5124*5113495bSYour Name 5125*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_LATENCY_CTRL //// 5126*5113495bSYour Name 5127*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x000009e4) 5128*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x000009e4) 5129*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK 0x000fffff 5130*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_SHFT 0 5131*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ 5132*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK) 5133*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ 5134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 5135*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ 5136*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val) 5137*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ 5138*5113495bSYour Name do {\ 5139*5113495bSYour Name HWIO_INTLOCK(); \ 5140*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)); \ 5141*5113495bSYour Name HWIO_INTFREE();\ 5142*5113495bSYour Name } while (0) 5143*5113495bSYour Name 5144*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 5145*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 5146*5113495bSYour Name 5147*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 5148*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 5149*5113495bSYour Name 5150*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 5151*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 5152*5113495bSYour Name 5153*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0 //// 5154*5113495bSYour Name 5155*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009e8) 5156*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009e8) 5157*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 5158*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_SHFT 0 5159*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ 5160*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK) 5161*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 5162*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 5163*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 5164*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 5165*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5166*5113495bSYour Name do {\ 5167*5113495bSYour Name HWIO_INTLOCK(); \ 5168*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5169*5113495bSYour Name HWIO_INTFREE();\ 5170*5113495bSYour Name } while (0) 5171*5113495bSYour Name 5172*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5173*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5174*5113495bSYour Name 5175*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1 //// 5176*5113495bSYour Name 5177*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009ec) 5178*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009ec) 5179*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5180*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_SHFT 0 5181*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ 5182*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK) 5183*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5184*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5185*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5186*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5187*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5188*5113495bSYour Name do {\ 5189*5113495bSYour Name HWIO_INTLOCK(); \ 5190*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5191*5113495bSYour Name HWIO_INTFREE();\ 5192*5113495bSYour Name } while (0) 5193*5113495bSYour Name 5194*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5195*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5196*5113495bSYour Name 5197*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0 //// 5198*5113495bSYour Name 5199*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009f0) 5200*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009f0) 5201*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 5202*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_SHFT 0 5203*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ 5204*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK) 5205*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 5206*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 5207*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 5208*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 5209*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5210*5113495bSYour Name do {\ 5211*5113495bSYour Name HWIO_INTLOCK(); \ 5212*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5213*5113495bSYour Name HWIO_INTFREE();\ 5214*5113495bSYour Name } while (0) 5215*5113495bSYour Name 5216*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5217*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5218*5113495bSYour Name 5219*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1 //// 5220*5113495bSYour Name 5221*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009f4) 5222*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009f4) 5223*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5224*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_SHFT 0 5225*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ 5226*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK) 5227*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5228*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5229*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5230*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5231*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5232*5113495bSYour Name do {\ 5233*5113495bSYour Name HWIO_INTLOCK(); \ 5234*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5235*5113495bSYour Name HWIO_INTFREE();\ 5236*5113495bSYour Name } while (0) 5237*5113495bSYour Name 5238*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5239*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5240*5113495bSYour Name 5241*5113495bSYour Name //// Register TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL //// 5242*5113495bSYour Name 5243*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x) (x+0x000009f8) 5244*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x) (x+0x000009f8) 5245*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK 0x00009f9f 5246*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_SHFT 0 5247*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x) \ 5248*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK) 5249*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ 5250*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 5251*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ 5252*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val) 5253*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ 5254*5113495bSYour Name do {\ 5255*5113495bSYour Name HWIO_INTLOCK(); \ 5256*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)); \ 5257*5113495bSYour Name HWIO_INTFREE();\ 5258*5113495bSYour Name } while (0) 5259*5113495bSYour Name 5260*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_BMSK 0x00008000 5261*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_SHFT 0xf 5262*5113495bSYour Name 5263*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_BMSK 0x00001f00 5264*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_SHFT 0x8 5265*5113495bSYour Name 5266*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_BMSK 0x00000080 5267*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_SHFT 0x7 5268*5113495bSYour Name 5269*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_BMSK 0x0000001f 5270*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_SHFT 0x0 5271*5113495bSYour Name 5272*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_LOW //// 5273*5113495bSYour Name 5274*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x) (x+0x000009fc) 5275*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_PHYS(x) (x+0x000009fc) 5276*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK 0xffffffff 5277*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_SHFT 0 5278*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x) \ 5279*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK) 5280*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_INM(x, mask) \ 5281*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask) 5282*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUT(x, val) \ 5283*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), val) 5284*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUTM(x, mask, val) \ 5285*5113495bSYour Name do {\ 5286*5113495bSYour Name HWIO_INTLOCK(); \ 5287*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x)); \ 5288*5113495bSYour Name HWIO_INTFREE();\ 5289*5113495bSYour Name } while (0) 5290*5113495bSYour Name 5291*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_BMSK 0xffffffff 5292*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_SHFT 0x0 5293*5113495bSYour Name 5294*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_HIGH //// 5295*5113495bSYour Name 5296*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x) (x+0x00000a00) 5297*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_PHYS(x) (x+0x00000a00) 5298*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK 0x000000ff 5299*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_SHFT 0 5300*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x) \ 5301*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK) 5302*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_INM(x, mask) \ 5303*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask) 5304*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUT(x, val) \ 5305*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), val) 5306*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUTM(x, mask, val) \ 5307*5113495bSYour Name do {\ 5308*5113495bSYour Name HWIO_INTLOCK(); \ 5309*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x)); \ 5310*5113495bSYour Name HWIO_INTFREE();\ 5311*5113495bSYour Name } while (0) 5312*5113495bSYour Name 5313*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_BMSK 0x000000ff 5314*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_SHFT 0x0 5315*5113495bSYour Name 5316*5113495bSYour Name //// Register TCL_R0_ASE_GST_SIZE //// 5317*5113495bSYour Name 5318*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x) (x+0x00000a04) 5319*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_PHYS(x) (x+0x00000a04) 5320*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_RMSK 0x000fffff 5321*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_SHFT 0 5322*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_IN(x) \ 5323*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), HWIO_TCL_R0_ASE_GST_SIZE_RMSK) 5324*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_INM(x, mask) \ 5325*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask) 5326*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUT(x, val) \ 5327*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), val) 5328*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUTM(x, mask, val) \ 5329*5113495bSYour Name do {\ 5330*5113495bSYour Name HWIO_INTLOCK(); \ 5331*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_SIZE_IN(x)); \ 5332*5113495bSYour Name HWIO_INTFREE();\ 5333*5113495bSYour Name } while (0) 5334*5113495bSYour Name 5335*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_BMSK 0x000fffff 5336*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_SHFT 0x0 5337*5113495bSYour Name 5338*5113495bSYour Name //// Register TCL_R0_ASE_SEARCH_CTRL //// 5339*5113495bSYour Name 5340*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x) (x+0x00000a08) 5341*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_PHYS(x) (x+0x00000a08) 5342*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK 0xffff3fff 5343*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SHFT 0 5344*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x) \ 5345*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK) 5346*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_INM(x, mask) \ 5347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask) 5348*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUT(x, val) \ 5349*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), val) 5350*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUTM(x, mask, val) \ 5351*5113495bSYour Name do {\ 5352*5113495bSYour Name HWIO_INTLOCK(); \ 5353*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x)); \ 5354*5113495bSYour Name HWIO_INTFREE();\ 5355*5113495bSYour Name } while (0) 5356*5113495bSYour Name 5357*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_BMSK 0xffff0000 5358*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SHFT 0x10 5359*5113495bSYour Name 5360*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_BMSK 0x00002000 5361*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_SHFT 0xd 5362*5113495bSYour Name 5363*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_BMSK 0x00001000 5364*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_SHFT 0xc 5365*5113495bSYour Name 5366*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_BMSK 0x00000800 5367*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_SHFT 0xb 5368*5113495bSYour Name 5369*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_BMSK 0x00000400 5370*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_SHFT 0xa 5371*5113495bSYour Name 5372*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_BMSK 0x00000200 5373*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_SHFT 0x9 5374*5113495bSYour Name 5375*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_BMSK 0x00000100 5376*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_SHFT 0x8 5377*5113495bSYour Name 5378*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_BMSK 0x000000ff 5379*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_SHFT 0x0 5380*5113495bSYour Name 5381*5113495bSYour Name //// Register TCL_R0_ASE_WATCHDOG //// 5382*5113495bSYour Name 5383*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x) (x+0x00000a0c) 5384*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_PHYS(x) (x+0x00000a0c) 5385*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_RMSK 0xffffffff 5386*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_SHFT 0 5387*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_IN(x) \ 5388*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), HWIO_TCL_R0_ASE_WATCHDOG_RMSK) 5389*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_INM(x, mask) \ 5390*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask) 5391*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUT(x, val) \ 5392*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), val) 5393*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUTM(x, mask, val) \ 5394*5113495bSYour Name do {\ 5395*5113495bSYour Name HWIO_INTLOCK(); \ 5396*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WATCHDOG_IN(x)); \ 5397*5113495bSYour Name HWIO_INTFREE();\ 5398*5113495bSYour Name } while (0) 5399*5113495bSYour Name 5400*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_BMSK 0xffff0000 5401*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_SHFT 0x10 5402*5113495bSYour Name 5403*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_BMSK 0x0000ffff 5404*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_SHFT 0x0 5405*5113495bSYour Name 5406*5113495bSYour Name //// Register TCL_R0_ASE_CLKGATE_DISABLE //// 5407*5113495bSYour Name 5408*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x) (x+0x00000a10) 5409*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PHYS(x) (x+0x00000a10) 5410*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK 0xffffffff 5411*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SHFT 0 5412*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x) \ 5413*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK) 5414*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_INM(x, mask) \ 5415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask) 5416*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUT(x, val) \ 5417*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), val) 5418*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUTM(x, mask, val) \ 5419*5113495bSYour Name do {\ 5420*5113495bSYour Name HWIO_INTLOCK(); \ 5421*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x)); \ 5422*5113495bSYour Name HWIO_INTFREE();\ 5423*5113495bSYour Name } while (0) 5424*5113495bSYour Name 5425*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_BMSK 0x80000000 5426*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_SHFT 0x1f 5427*5113495bSYour Name 5428*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 5429*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 5430*5113495bSYour Name 5431*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_BMSK 0x3ffffe00 5432*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_SHFT 0x9 5433*5113495bSYour Name 5434*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_BMSK 0x00000100 5435*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_SHFT 0x8 5436*5113495bSYour Name 5437*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_BMSK 0x00000080 5438*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_SHFT 0x7 5439*5113495bSYour Name 5440*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_BMSK 0x00000040 5441*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_SHFT 0x6 5442*5113495bSYour Name 5443*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_BMSK 0x00000020 5444*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_SHFT 0x5 5445*5113495bSYour Name 5446*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_BMSK 0x00000010 5447*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_SHFT 0x4 5448*5113495bSYour Name 5449*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_BMSK 0x00000008 5450*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_SHFT 0x3 5451*5113495bSYour Name 5452*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_BMSK 0x00000004 5453*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_SHFT 0x2 5454*5113495bSYour Name 5455*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_BMSK 0x00000002 5456*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_SHFT 0x1 5457*5113495bSYour Name 5458*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_BMSK 0x00000001 5459*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_SHFT 0x0 5460*5113495bSYour Name 5461*5113495bSYour Name //// Register TCL_R0_ASE_WRITE_BACK_PENDING //// 5462*5113495bSYour Name 5463*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x) (x+0x00000a14) 5464*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_PHYS(x) (x+0x00000a14) 5465*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK 0x00000001 5466*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_SHFT 0 5467*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x) \ 5468*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK) 5469*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_INM(x, mask) \ 5470*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask) 5471*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUT(x, val) \ 5472*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), val) 5473*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUTM(x, mask, val) \ 5474*5113495bSYour Name do {\ 5475*5113495bSYour Name HWIO_INTLOCK(); \ 5476*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x)); \ 5477*5113495bSYour Name HWIO_INTFREE();\ 5478*5113495bSYour Name } while (0) 5479*5113495bSYour Name 5480*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_BMSK 0x00000001 5481*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_SHFT 0x0 5482*5113495bSYour Name 5483*5113495bSYour Name //// Register TCL_R1_CACHE_FLUSH //// 5484*5113495bSYour Name 5485*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ADDR(x) (x+0x00001000) 5486*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_PHYS(x) (x+0x00001000) 5487*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_RMSK 0x00000003 5488*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_SHFT 0 5489*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_IN(x) \ 5490*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), HWIO_TCL_R1_CACHE_FLUSH_RMSK) 5491*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_INM(x, mask) \ 5492*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask) 5493*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUT(x, val) \ 5494*5113495bSYour Name out_dword( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), val) 5495*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUTM(x, mask, val) \ 5496*5113495bSYour Name do {\ 5497*5113495bSYour Name HWIO_INTLOCK(); \ 5498*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask, val, HWIO_TCL_R1_CACHE_FLUSH_IN(x)); \ 5499*5113495bSYour Name HWIO_INTFREE();\ 5500*5113495bSYour Name } while (0) 5501*5113495bSYour Name 5502*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_BMSK 0x00000002 5503*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_SHFT 0x1 5504*5113495bSYour Name 5505*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_BMSK 0x00000001 5506*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_SHFT 0x0 5507*5113495bSYour Name 5508*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_0 //// 5509*5113495bSYour Name 5510*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x) (x+0x00001004) 5511*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_PHYS(x) (x+0x00001004) 5512*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_RMSK 0x3fffffff 5513*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SHFT 0 5514*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_IN(x) \ 5515*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_0_RMSK) 5516*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_INM(x, mask) \ 5517*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask) 5518*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUT(x, val) \ 5519*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), val) 5520*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ 5521*5113495bSYour Name do {\ 5522*5113495bSYour Name HWIO_INTLOCK(); \ 5523*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_0_IN(x)); \ 5524*5113495bSYour Name HWIO_INTFREE();\ 5525*5113495bSYour Name } while (0) 5526*5113495bSYour Name 5527*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_RES_WR_BMSK 0x30000000 5528*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_RES_WR_SHFT 0x1c 5529*5113495bSYour Name 5530*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_BMSK 0x0e000000 5531*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_SHFT 0x19 5532*5113495bSYour Name 5533*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_BMSK 0x01e00000 5534*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_SHFT 0x15 5535*5113495bSYour Name 5536*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_BMSK 0x001c0000 5537*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_SHFT 0x12 5538*5113495bSYour Name 5539*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_BMSK 0x00038000 5540*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_SHFT 0xf 5541*5113495bSYour Name 5542*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_BMSK 0x00007000 5543*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_SHFT 0xc 5544*5113495bSYour Name 5545*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_BMSK 0x00000e00 5546*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_SHFT 0x9 5547*5113495bSYour Name 5548*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_BMSK 0x000001c0 5549*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_SHFT 0x6 5550*5113495bSYour Name 5551*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_BMSK 0x00000038 5552*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_SHFT 0x3 5553*5113495bSYour Name 5554*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_BMSK 0x00000007 5555*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_SHFT 0x0 5556*5113495bSYour Name 5557*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_1 //// 5558*5113495bSYour Name 5559*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x) (x+0x00001008) 5560*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PHYS(x) (x+0x00001008) 5561*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_RMSK 0x001fffff 5562*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_SHFT 0 5563*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_IN(x) \ 5564*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_1_RMSK) 5565*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_INM(x, mask) \ 5566*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask) 5567*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUT(x, val) \ 5568*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), val) 5569*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ 5570*5113495bSYour Name do {\ 5571*5113495bSYour Name HWIO_INTLOCK(); \ 5572*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_1_IN(x)); \ 5573*5113495bSYour Name HWIO_INTFREE();\ 5574*5113495bSYour Name } while (0) 5575*5113495bSYour Name 5576*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_IDLE_SEQUENCE_BMSK 0x001c0000 5577*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_IDLE_SEQUENCE_SHFT 0x12 5578*5113495bSYour Name 5579*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_BMSK 0x00038000 5580*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_SHFT 0xf 5581*5113495bSYour Name 5582*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_BMSK 0x00007000 5583*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_SHFT 0xc 5584*5113495bSYour Name 5585*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_BMSK 0x00000e00 5586*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_SHFT 0x9 5587*5113495bSYour Name 5588*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_BMSK 0x000001c0 5589*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_SHFT 0x6 5590*5113495bSYour Name 5591*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_BMSK 0x00000038 5592*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_SHFT 0x3 5593*5113495bSYour Name 5594*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_BMSK 0x00000007 5595*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_SHFT 0x0 5596*5113495bSYour Name 5597*5113495bSYour Name //// Register TCL_R1_STATUS //// 5598*5113495bSYour Name 5599*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ADDR(x) (x+0x0000100c) 5600*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PHYS(x) (x+0x0000100c) 5601*5113495bSYour Name #define HWIO_TCL_R1_STATUS_RMSK 0x07ffffff 5602*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SHFT 0 5603*5113495bSYour Name #define HWIO_TCL_R1_STATUS_IN(x) \ 5604*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_STATUS_ADDR(x), HWIO_TCL_R1_STATUS_RMSK) 5605*5113495bSYour Name #define HWIO_TCL_R1_STATUS_INM(x, mask) \ 5606*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_STATUS_ADDR(x), mask) 5607*5113495bSYour Name #define HWIO_TCL_R1_STATUS_OUT(x, val) \ 5608*5113495bSYour Name out_dword( HWIO_TCL_R1_STATUS_ADDR(x), val) 5609*5113495bSYour Name #define HWIO_TCL_R1_STATUS_OUTM(x, mask, val) \ 5610*5113495bSYour Name do {\ 5611*5113495bSYour Name HWIO_INTLOCK(); \ 5612*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_STATUS_ADDR(x), mask, val, HWIO_TCL_R1_STATUS_IN(x)); \ 5613*5113495bSYour Name HWIO_INTFREE();\ 5614*5113495bSYour Name } while (0) 5615*5113495bSYour Name 5616*5113495bSYour Name #define HWIO_TCL_R1_STATUS_HDR_BUF_EMPTY_BMSK 0x04000000 5617*5113495bSYour Name #define HWIO_TCL_R1_STATUS_HDR_BUF_EMPTY_SHFT 0x1a 5618*5113495bSYour Name 5619*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_BUF_EMPTY_BMSK 0x02000000 5620*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_BUF_EMPTY_SHFT 0x19 5621*5113495bSYour Name 5622*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CCE_RES_IDLE_BMSK 0x01000000 5623*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CCE_RES_IDLE_SHFT 0x18 5624*5113495bSYour Name 5625*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_BUNC_FIFO_CTRL_IDLE_BMSK 0x00800000 5626*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_BUNC_FIFO_CTRL_IDLE_SHFT 0x17 5627*5113495bSYour Name 5628*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_CTRL_IDLE_BMSK 0x00400000 5629*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_CTRL_IDLE_SHFT 0x16 5630*5113495bSYour Name 5631*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_DECODER_IDLE_BMSK 0x00200000 5632*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_DECODER_IDLE_SHFT 0x15 5633*5113495bSYour Name 5634*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_GEN_IDLE_BMSK 0x00100000 5635*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_GEN_IDLE_SHFT 0x14 5636*5113495bSYour Name 5637*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CTRL_IDLE_BMSK 0x00080000 5638*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CTRL_IDLE_SHFT 0x13 5639*5113495bSYour Name 5640*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CLFY_WRAP_IDLE_BMSK 0x00040000 5641*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CLFY_WRAP_IDLE_SHFT 0x12 5642*5113495bSYour Name 5643*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CCE_OR_LCE_IDLE_BMSK 0x00020000 5644*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CCE_OR_LCE_IDLE_SHFT 0x11 5645*5113495bSYour Name 5646*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ASE_IDLE_BMSK 0x00010000 5647*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ASE_IDLE_SHFT 0x10 5648*5113495bSYour Name 5649*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PARSER_IDLE_BMSK 0x00008000 5650*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PARSER_IDLE_SHFT 0xf 5651*5113495bSYour Name 5652*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS2_PROD_IDLE_BMSK 0x00004000 5653*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS2_PROD_IDLE_SHFT 0xe 5654*5113495bSYour Name 5655*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS1_PROD_IDLE_BMSK 0x00002000 5656*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS1_PROD_IDLE_SHFT 0xd 5657*5113495bSYour Name 5658*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2FW_PROD_IDLE_BMSK 0x00001000 5659*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2FW_PROD_IDLE_SHFT 0xc 5660*5113495bSYour Name 5661*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2TQM_PROD_IDLE_BMSK 0x00000800 5662*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2TQM_PROD_IDLE_SHFT 0xb 5663*5113495bSYour Name 5664*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL_CREDIT_CONS_IDLE_BMSK 0x00000400 5665*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL_CREDIT_CONS_IDLE_SHFT 0xa 5666*5113495bSYour Name 5667*5113495bSYour Name #define HWIO_TCL_R1_STATUS_FW2TCL1_CONS_IDLE_BMSK 0x00000200 5668*5113495bSYour Name #define HWIO_TCL_R1_STATUS_FW2TCL1_CONS_IDLE_SHFT 0x9 5669*5113495bSYour Name 5670*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL3_CONS_IDLE_BMSK 0x00000100 5671*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL3_CONS_IDLE_SHFT 0x8 5672*5113495bSYour Name 5673*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL2_CONS_IDLE_BMSK 0x00000080 5674*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL2_CONS_IDLE_SHFT 0x7 5675*5113495bSYour Name 5676*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL1_CONS_IDLE_BMSK 0x00000040 5677*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL1_CONS_IDLE_SHFT 0x6 5678*5113495bSYour Name 5679*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GXI_IDLE_BMSK 0x00000020 5680*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GXI_IDLE_SHFT 0x5 5681*5113495bSYour Name 5682*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_RD_IDLE_BMSK 0x00000010 5683*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_RD_IDLE_SHFT 0x4 5684*5113495bSYour Name 5685*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SDU_HDR_FETCH_IDLE_BMSK 0x00000008 5686*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SDU_HDR_FETCH_IDLE_SHFT 0x3 5687*5113495bSYour Name 5688*5113495bSYour Name #define HWIO_TCL_R1_STATUS_LINK_DESC_FETCH_IDLE_BMSK 0x00000004 5689*5113495bSYour Name #define HWIO_TCL_R1_STATUS_LINK_DESC_FETCH_IDLE_SHFT 0x2 5690*5113495bSYour Name 5691*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DATA_FETCH_IDLE_BMSK 0x00000002 5692*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DATA_FETCH_IDLE_SHFT 0x1 5693*5113495bSYour Name 5694*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_INT_IDLE_BMSK 0x00000001 5695*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_INT_IDLE_SHFT 0x0 5696*5113495bSYour Name 5697*5113495bSYour Name //// Register TCL_R1_TESTBUS_CTRL_0 //// 5698*5113495bSYour Name 5699*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x) (x+0x00001010) 5700*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PHYS(x) (x+0x00001010) 5701*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK 0x3fffffff 5702*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_SHFT 0 5703*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x) \ 5704*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK) 5705*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_INM(x, mask) \ 5706*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask) 5707*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUT(x, val) \ 5708*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), val) 5709*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUTM(x, mask, val) \ 5710*5113495bSYour Name do {\ 5711*5113495bSYour Name HWIO_INTLOCK(); \ 5712*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x)); \ 5713*5113495bSYour Name HWIO_INTFREE();\ 5714*5113495bSYour Name } while (0) 5715*5113495bSYour Name 5716*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x20000000 5717*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x1d 5718*5113495bSYour Name 5719*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_BMSK 0x1f800000 5720*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_SHFT 0x17 5721*5113495bSYour Name 5722*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_BMSK 0x007c0000 5723*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_SHFT 0x12 5724*5113495bSYour Name 5725*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_BMSK 0x0003c000 5726*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_SHFT 0xe 5727*5113495bSYour Name 5728*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_BMSK 0x00003c00 5729*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_SHFT 0xa 5730*5113495bSYour Name 5731*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_BMSK 0x000003e0 5732*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_SHFT 0x5 5733*5113495bSYour Name 5734*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_BMSK 0x0000001f 5735*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_SHFT 0x0 5736*5113495bSYour Name 5737*5113495bSYour Name //// Register TCL_R1_TESTBUS_LOW //// 5738*5113495bSYour Name 5739*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_ADDR(x) (x+0x00001014) 5740*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_PHYS(x) (x+0x00001014) 5741*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_RMSK 0xffffffff 5742*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_SHFT 0 5743*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_IN(x) \ 5744*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), HWIO_TCL_R1_TESTBUS_LOW_RMSK) 5745*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_INM(x, mask) \ 5746*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask) 5747*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUT(x, val) \ 5748*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), val) 5749*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUTM(x, mask, val) \ 5750*5113495bSYour Name do {\ 5751*5113495bSYour Name HWIO_INTLOCK(); \ 5752*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_LOW_IN(x)); \ 5753*5113495bSYour Name HWIO_INTFREE();\ 5754*5113495bSYour Name } while (0) 5755*5113495bSYour Name 5756*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff 5757*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_SHFT 0x0 5758*5113495bSYour Name 5759*5113495bSYour Name //// Register TCL_R1_TESTBUS_HIGH //// 5760*5113495bSYour Name 5761*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x) (x+0x00001018) 5762*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_PHYS(x) (x+0x00001018) 5763*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_RMSK 0x000000ff 5764*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_SHFT 0 5765*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_IN(x) \ 5766*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), HWIO_TCL_R1_TESTBUS_HIGH_RMSK) 5767*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_INM(x, mask) \ 5768*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask) 5769*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUT(x, val) \ 5770*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), val) 5771*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUTM(x, mask, val) \ 5772*5113495bSYour Name do {\ 5773*5113495bSYour Name HWIO_INTLOCK(); \ 5774*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_HIGH_IN(x)); \ 5775*5113495bSYour Name HWIO_INTFREE();\ 5776*5113495bSYour Name } while (0) 5777*5113495bSYour Name 5778*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_BMSK 0x000000ff 5779*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_SHFT 0x0 5780*5113495bSYour Name 5781*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_0 //// 5782*5113495bSYour Name 5783*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x) (x+0x0000101c) 5784*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_PHYS(x) (x+0x0000101c) 5785*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_RMSK 0xffffffff 5786*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_SHFT 0 5787*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_IN(x) \ 5788*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_0_RMSK) 5789*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_INM(x, mask) \ 5790*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask) 5791*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUT(x, val) \ 5792*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), val) 5793*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUTM(x, mask, val) \ 5794*5113495bSYour Name do {\ 5795*5113495bSYour Name HWIO_INTLOCK(); \ 5796*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_0_IN(x)); \ 5797*5113495bSYour Name HWIO_INTFREE();\ 5798*5113495bSYour Name } while (0) 5799*5113495bSYour Name 5800*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_BMSK 0xffffffff 5801*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_SHFT 0x0 5802*5113495bSYour Name 5803*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_1 //// 5804*5113495bSYour Name 5805*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x) (x+0x00001020) 5806*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_PHYS(x) (x+0x00001020) 5807*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_RMSK 0xffffffff 5808*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_SHFT 0 5809*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_IN(x) \ 5810*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_1_RMSK) 5811*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_INM(x, mask) \ 5812*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask) 5813*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUT(x, val) \ 5814*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), val) 5815*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUTM(x, mask, val) \ 5816*5113495bSYour Name do {\ 5817*5113495bSYour Name HWIO_INTLOCK(); \ 5818*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_1_IN(x)); \ 5819*5113495bSYour Name HWIO_INTFREE();\ 5820*5113495bSYour Name } while (0) 5821*5113495bSYour Name 5822*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_BMSK 0xffffffff 5823*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_SHFT 0x0 5824*5113495bSYour Name 5825*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_2 //// 5826*5113495bSYour Name 5827*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x) (x+0x00001024) 5828*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_PHYS(x) (x+0x00001024) 5829*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_RMSK 0xffffffff 5830*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_SHFT 0 5831*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_IN(x) \ 5832*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_2_RMSK) 5833*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_INM(x, mask) \ 5834*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask) 5835*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUT(x, val) \ 5836*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), val) 5837*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUTM(x, mask, val) \ 5838*5113495bSYour Name do {\ 5839*5113495bSYour Name HWIO_INTLOCK(); \ 5840*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_2_IN(x)); \ 5841*5113495bSYour Name HWIO_INTFREE();\ 5842*5113495bSYour Name } while (0) 5843*5113495bSYour Name 5844*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_BMSK 0xffffffff 5845*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_SHFT 0x0 5846*5113495bSYour Name 5847*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_3 //// 5848*5113495bSYour Name 5849*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x) (x+0x00001028) 5850*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_PHYS(x) (x+0x00001028) 5851*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_RMSK 0xffffffff 5852*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_SHFT 0 5853*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_IN(x) \ 5854*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_3_RMSK) 5855*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_INM(x, mask) \ 5856*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask) 5857*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUT(x, val) \ 5858*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), val) 5859*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUTM(x, mask, val) \ 5860*5113495bSYour Name do {\ 5861*5113495bSYour Name HWIO_INTLOCK(); \ 5862*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_3_IN(x)); \ 5863*5113495bSYour Name HWIO_INTFREE();\ 5864*5113495bSYour Name } while (0) 5865*5113495bSYour Name 5866*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_BMSK 0xffffffff 5867*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_SHFT 0x0 5868*5113495bSYour Name 5869*5113495bSYour Name //// Register TCL_R1_REG_ACCESS_EVENT_GEN_CTRL //// 5870*5113495bSYour Name 5871*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x) (x+0x0000102c) 5872*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_PHYS(x) (x+0x0000102c) 5873*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff 5874*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_SHFT 0 5875*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x) \ 5876*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK) 5877*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(x, mask) \ 5878*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask) 5879*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(x, val) \ 5880*5113495bSYour Name out_dword( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), val) 5881*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(x, mask, val) \ 5882*5113495bSYour Name do {\ 5883*5113495bSYour Name HWIO_INTLOCK(); \ 5884*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x)); \ 5885*5113495bSYour Name HWIO_INTFREE();\ 5886*5113495bSYour Name } while (0) 5887*5113495bSYour Name 5888*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000 5889*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11 5890*5113495bSYour Name 5891*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x0001fffc 5892*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2 5893*5113495bSYour Name 5894*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x00000002 5895*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1 5896*5113495bSYour Name 5897*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x00000001 5898*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0 5899*5113495bSYour Name 5900*5113495bSYour Name //// Register TCL_R1_SPARE_REGISTER //// 5901*5113495bSYour Name 5902*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_ADDR(x) (x+0x00001030) 5903*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_PHYS(x) (x+0x00001030) 5904*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_RMSK 0xffffffff 5905*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_SHFT 0 5906*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_IN(x) \ 5907*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), HWIO_TCL_R1_SPARE_REGISTER_RMSK) 5908*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_INM(x, mask) \ 5909*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask) 5910*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUT(x, val) \ 5911*5113495bSYour Name out_dword( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), val) 5912*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUTM(x, mask, val) \ 5913*5113495bSYour Name do {\ 5914*5113495bSYour Name HWIO_INTLOCK(); \ 5915*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R1_SPARE_REGISTER_IN(x)); \ 5916*5113495bSYour Name HWIO_INTFREE();\ 5917*5113495bSYour Name } while (0) 5918*5113495bSYour Name 5919*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_BMSK 0xffffffff 5920*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_SHFT 0x0 5921*5113495bSYour Name 5922*5113495bSYour Name //// Register TCL_R1_END_OF_TEST_CHECK //// 5923*5113495bSYour Name 5924*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00001034) 5925*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00001034) 5926*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK 0x00000001 5927*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_SHFT 0 5928*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x) \ 5929*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK) 5930*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_INM(x, mask) \ 5931*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask) 5932*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUT(x, val) \ 5933*5113495bSYour Name out_dword( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), val) 5934*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5935*5113495bSYour Name do {\ 5936*5113495bSYour Name HWIO_INTLOCK(); \ 5937*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x)); \ 5938*5113495bSYour Name HWIO_INTFREE();\ 5939*5113495bSYour Name } while (0) 5940*5113495bSYour Name 5941*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5942*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5943*5113495bSYour Name 5944*5113495bSYour Name //// Register TCL_R1_ASE_END_OF_TEST_CHECK //// 5945*5113495bSYour Name 5946*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x) (x+0x00001038) 5947*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_PHYS(x) (x+0x00001038) 5948*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK 0x00000001 5949*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_SHFT 0 5950*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x) \ 5951*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK) 5952*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_INM(x, mask) \ 5953*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask) 5954*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUT(x, val) \ 5955*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), val) 5956*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5957*5113495bSYour Name do {\ 5958*5113495bSYour Name HWIO_INTLOCK(); \ 5959*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x)); \ 5960*5113495bSYour Name HWIO_INTFREE();\ 5961*5113495bSYour Name } while (0) 5962*5113495bSYour Name 5963*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5964*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5965*5113495bSYour Name 5966*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CLEAR_COUNTERS //// 5967*5113495bSYour Name 5968*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x) (x+0x0000103c) 5969*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_PHYS(x) (x+0x0000103c) 5970*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK 0x00000001 5971*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_SHFT 0 5972*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x) \ 5973*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK) 5974*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_INM(x, mask) \ 5975*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask) 5976*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUT(x, val) \ 5977*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), val) 5978*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUTM(x, mask, val) \ 5979*5113495bSYour Name do {\ 5980*5113495bSYour Name HWIO_INTLOCK(); \ 5981*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x)); \ 5982*5113495bSYour Name HWIO_INTFREE();\ 5983*5113495bSYour Name } while (0) 5984*5113495bSYour Name 5985*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_BMSK 0x00000001 5986*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_SHFT 0x0 5987*5113495bSYour Name 5988*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER //// 5989*5113495bSYour Name 5990*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x) (x+0x00001040) 5991*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_PHYS(x) (x+0x00001040) 5992*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK 0xffffffff 5993*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_SHFT 0 5994*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x) \ 5995*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK) 5996*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_INM(x, mask) \ 5997*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask) 5998*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUT(x, val) \ 5999*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), val) 6000*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUTM(x, mask, val) \ 6001*5113495bSYour Name do {\ 6002*5113495bSYour Name HWIO_INTLOCK(); \ 6003*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x)); \ 6004*5113495bSYour Name HWIO_INTFREE();\ 6005*5113495bSYour Name } while (0) 6006*5113495bSYour Name 6007*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_BMSK 0xffffffff 6008*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_SHFT 0x0 6009*5113495bSYour Name 6010*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER //// 6011*5113495bSYour Name 6012*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x) (x+0x00001044) 6013*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_PHYS(x) (x+0x00001044) 6014*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK 0xffffffff 6015*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_SHFT 0 6016*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x) \ 6017*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK) 6018*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_INM(x, mask) \ 6019*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask) 6020*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUT(x, val) \ 6021*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), val) 6022*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUTM(x, mask, val) \ 6023*5113495bSYour Name do {\ 6024*5113495bSYour Name HWIO_INTLOCK(); \ 6025*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x)); \ 6026*5113495bSYour Name HWIO_INTFREE();\ 6027*5113495bSYour Name } while (0) 6028*5113495bSYour Name 6029*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_BMSK 0xffffffff 6030*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_SHFT 0x0 6031*5113495bSYour Name 6032*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER //// 6033*5113495bSYour Name 6034*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x) (x+0x00001048) 6035*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PHYS(x) (x+0x00001048) 6036*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK 0x000fffff 6037*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_SHFT 0 6038*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x) \ 6039*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK) 6040*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_INM(x, mask) \ 6041*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask) 6042*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUT(x, val) \ 6043*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), val) 6044*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUTM(x, mask, val) \ 6045*5113495bSYour Name do {\ 6046*5113495bSYour Name HWIO_INTLOCK(); \ 6047*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x)); \ 6048*5113495bSYour Name HWIO_INTFREE();\ 6049*5113495bSYour Name } while (0) 6050*5113495bSYour Name 6051*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_BMSK 0x000ffc00 6052*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_SHFT 0xa 6053*5113495bSYour Name 6054*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_BMSK 0x000003ff 6055*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_SHFT 0x0 6056*5113495bSYour Name 6057*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER //// 6058*5113495bSYour Name 6059*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x) (x+0x0000104c) 6060*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PHYS(x) (x+0x0000104c) 6061*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK 0x03ffffff 6062*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SHFT 0 6063*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x) \ 6064*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK) 6065*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_INM(x, mask) \ 6066*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask) 6067*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUT(x, val) \ 6068*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), val) 6069*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUTM(x, mask, val) \ 6070*5113495bSYour Name do {\ 6071*5113495bSYour Name HWIO_INTLOCK(); \ 6072*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x)); \ 6073*5113495bSYour Name HWIO_INTFREE();\ 6074*5113495bSYour Name } while (0) 6075*5113495bSYour Name 6076*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_BMSK 0x03fffc00 6077*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_SHFT 0xa 6078*5113495bSYour Name 6079*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_BMSK 0x000003e0 6080*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_SHFT 0x5 6081*5113495bSYour Name 6082*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_BMSK 0x0000001f 6083*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_SHFT 0x0 6084*5113495bSYour Name 6085*5113495bSYour Name //// Register TCL_R1_ASE_SM_STATES //// 6086*5113495bSYour Name 6087*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_ADDR(x) (x+0x00001050) 6088*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PHYS(x) (x+0x00001050) 6089*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_RMSK 0x003fff0f 6090*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_SHFT 0 6091*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_IN(x) \ 6092*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), HWIO_TCL_R1_ASE_SM_STATES_RMSK) 6093*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_INM(x, mask) \ 6094*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask) 6095*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUT(x, val) \ 6096*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), val) 6097*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUTM(x, mask, val) \ 6098*5113495bSYour Name do {\ 6099*5113495bSYour Name HWIO_INTLOCK(); \ 6100*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask, val, HWIO_TCL_R1_ASE_SM_STATES_IN(x)); \ 6101*5113495bSYour Name HWIO_INTFREE();\ 6102*5113495bSYour Name } while (0) 6103*5113495bSYour Name 6104*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_BMSK 0x00300000 6105*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_SHFT 0x14 6106*5113495bSYour Name 6107*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_BMSK 0x000c0000 6108*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_SHFT 0x12 6109*5113495bSYour Name 6110*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_BMSK 0x00030000 6111*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_SHFT 0x10 6112*5113495bSYour Name 6113*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_BMSK 0x0000c000 6114*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_SHFT 0xe 6115*5113495bSYour Name 6116*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_BMSK 0x00003800 6117*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_SHFT 0xb 6118*5113495bSYour Name 6119*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_BMSK 0x00000700 6120*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_SHFT 0x8 6121*5113495bSYour Name 6122*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_BMSK 0x0000000f 6123*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_SHFT 0x0 6124*5113495bSYour Name 6125*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG //// 6126*5113495bSYour Name 6127*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x) (x+0x00001054) 6128*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_PHYS(x) (x+0x00001054) 6129*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK 0x000003ff 6130*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_SHFT 0 6131*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x) \ 6132*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK) 6133*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_INM(x, mask) \ 6134*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask) 6135*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUT(x, val) \ 6136*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), val) 6137*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUTM(x, mask, val) \ 6138*5113495bSYour Name do {\ 6139*5113495bSYour Name HWIO_INTLOCK(); \ 6140*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x)); \ 6141*5113495bSYour Name HWIO_INTFREE();\ 6142*5113495bSYour Name } while (0) 6143*5113495bSYour Name 6144*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_BMSK 0x000003ff 6145*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_SHFT 0x0 6146*5113495bSYour Name 6147*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS //// 6148*5113495bSYour Name 6149*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x) (x+0x00001058) 6150*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_PHYS(x) (x+0x00001058) 6151*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK 0x007fffff 6152*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_SHFT 0 6153*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x) \ 6154*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK) 6155*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_INM(x, mask) \ 6156*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask) 6157*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUT(x, val) \ 6158*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), val) 6159*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUTM(x, mask, val) \ 6160*5113495bSYour Name do {\ 6161*5113495bSYour Name HWIO_INTLOCK(); \ 6162*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x)); \ 6163*5113495bSYour Name HWIO_INTFREE();\ 6164*5113495bSYour Name } while (0) 6165*5113495bSYour Name 6166*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_BMSK 0x007ffff8 6167*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_SHFT 0x3 6168*5113495bSYour Name 6169*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_BMSK 0x00000004 6170*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_SHFT 0x2 6171*5113495bSYour Name 6172*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_BMSK 0x00000002 6173*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_SHFT 0x1 6174*5113495bSYour Name 6175*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_BMSK 0x00000001 6176*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_SHFT 0x0 6177*5113495bSYour Name 6178*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_n //// 6179*5113495bSYour Name 6180*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n) (base+0x105C+0x4*n) 6181*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_PHYS(base, n) (base+0x105C+0x4*n) 6182*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK 0xffffffff 6183*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_SHFT 0 6184*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_MAXn 31 6185*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n) \ 6186*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK) 6187*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INMI(base, n, mask) \ 6188*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask) 6189*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTI(base, n, val) \ 6190*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), val) 6191*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTMI(base, n, mask, val) \ 6192*5113495bSYour Name do {\ 6193*5113495bSYour Name HWIO_INTLOCK(); \ 6194*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n)); \ 6195*5113495bSYour Name HWIO_INTFREE();\ 6196*5113495bSYour Name } while (0) 6197*5113495bSYour Name 6198*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_BMSK 0xffffffff 6199*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_SHFT 0x0 6200*5113495bSYour Name 6201*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_HP //// 6202*5113495bSYour Name 6203*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x) (x+0x00002000) 6204*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_PHYS(x) (x+0x00002000) 6205*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK 0x000fffff 6206*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_SHFT 0 6207*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x) \ 6208*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK) 6209*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_INM(x, mask) \ 6210*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask) 6211*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUT(x, val) \ 6212*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), val) 6213*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUTM(x, mask, val) \ 6214*5113495bSYour Name do {\ 6215*5113495bSYour Name HWIO_INTLOCK(); \ 6216*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x)); \ 6217*5113495bSYour Name HWIO_INTFREE();\ 6218*5113495bSYour Name } while (0) 6219*5113495bSYour Name 6220*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_BMSK 0x000fffff 6221*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 6222*5113495bSYour Name 6223*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_TP //// 6224*5113495bSYour Name 6225*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x) (x+0x00002004) 6226*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_PHYS(x) (x+0x00002004) 6227*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK 0x000fffff 6228*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_SHFT 0 6229*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x) \ 6230*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK) 6231*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_INM(x, mask) \ 6232*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask) 6233*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUT(x, val) \ 6234*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), val) 6235*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUTM(x, mask, val) \ 6236*5113495bSYour Name do {\ 6237*5113495bSYour Name HWIO_INTLOCK(); \ 6238*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x)); \ 6239*5113495bSYour Name HWIO_INTFREE();\ 6240*5113495bSYour Name } while (0) 6241*5113495bSYour Name 6242*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_BMSK 0x000fffff 6243*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 6244*5113495bSYour Name 6245*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_HP //// 6246*5113495bSYour Name 6247*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x) (x+0x00002008) 6248*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_PHYS(x) (x+0x00002008) 6249*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK 0x000fffff 6250*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_SHFT 0 6251*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x) \ 6252*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK) 6253*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_INM(x, mask) \ 6254*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask) 6255*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUT(x, val) \ 6256*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), val) 6257*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUTM(x, mask, val) \ 6258*5113495bSYour Name do {\ 6259*5113495bSYour Name HWIO_INTLOCK(); \ 6260*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x)); \ 6261*5113495bSYour Name HWIO_INTFREE();\ 6262*5113495bSYour Name } while (0) 6263*5113495bSYour Name 6264*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_BMSK 0x000fffff 6265*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_SHFT 0x0 6266*5113495bSYour Name 6267*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_TP //// 6268*5113495bSYour Name 6269*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x) (x+0x0000200c) 6270*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_PHYS(x) (x+0x0000200c) 6271*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK 0x000fffff 6272*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_SHFT 0 6273*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x) \ 6274*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK) 6275*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_INM(x, mask) \ 6276*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask) 6277*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUT(x, val) \ 6278*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), val) 6279*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUTM(x, mask, val) \ 6280*5113495bSYour Name do {\ 6281*5113495bSYour Name HWIO_INTLOCK(); \ 6282*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x)); \ 6283*5113495bSYour Name HWIO_INTFREE();\ 6284*5113495bSYour Name } while (0) 6285*5113495bSYour Name 6286*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_BMSK 0x000fffff 6287*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_SHFT 0x0 6288*5113495bSYour Name 6289*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_HP //// 6290*5113495bSYour Name 6291*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x) (x+0x00002010) 6292*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_PHYS(x) (x+0x00002010) 6293*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK 0x000fffff 6294*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_SHFT 0 6295*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x) \ 6296*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK) 6297*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_INM(x, mask) \ 6298*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask) 6299*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUT(x, val) \ 6300*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), val) 6301*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUTM(x, mask, val) \ 6302*5113495bSYour Name do {\ 6303*5113495bSYour Name HWIO_INTLOCK(); \ 6304*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x)); \ 6305*5113495bSYour Name HWIO_INTFREE();\ 6306*5113495bSYour Name } while (0) 6307*5113495bSYour Name 6308*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_BMSK 0x000fffff 6309*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_SHFT 0x0 6310*5113495bSYour Name 6311*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_TP //// 6312*5113495bSYour Name 6313*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x) (x+0x00002014) 6314*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_PHYS(x) (x+0x00002014) 6315*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK 0x000fffff 6316*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_SHFT 0 6317*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x) \ 6318*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK) 6319*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_INM(x, mask) \ 6320*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask) 6321*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUT(x, val) \ 6322*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), val) 6323*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUTM(x, mask, val) \ 6324*5113495bSYour Name do {\ 6325*5113495bSYour Name HWIO_INTLOCK(); \ 6326*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x)); \ 6327*5113495bSYour Name HWIO_INTFREE();\ 6328*5113495bSYour Name } while (0) 6329*5113495bSYour Name 6330*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_BMSK 0x000fffff 6331*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_SHFT 0x0 6332*5113495bSYour Name 6333*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_HP //// 6334*5113495bSYour Name 6335*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x) (x+0x00002018) 6336*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_PHYS(x) (x+0x00002018) 6337*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK 0x000fffff 6338*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_SHFT 0 6339*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x) \ 6340*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK) 6341*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_INM(x, mask) \ 6342*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask) 6343*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUT(x, val) \ 6344*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), val) 6345*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUTM(x, mask, val) \ 6346*5113495bSYour Name do {\ 6347*5113495bSYour Name HWIO_INTLOCK(); \ 6348*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x)); \ 6349*5113495bSYour Name HWIO_INTFREE();\ 6350*5113495bSYour Name } while (0) 6351*5113495bSYour Name 6352*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_BMSK 0x000fffff 6353*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_SHFT 0x0 6354*5113495bSYour Name 6355*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_TP //// 6356*5113495bSYour Name 6357*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x) (x+0x0000201c) 6358*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_PHYS(x) (x+0x0000201c) 6359*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK 0x000fffff 6360*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_SHFT 0 6361*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x) \ 6362*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK) 6363*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_INM(x, mask) \ 6364*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask) 6365*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUT(x, val) \ 6366*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), val) 6367*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUTM(x, mask, val) \ 6368*5113495bSYour Name do {\ 6369*5113495bSYour Name HWIO_INTLOCK(); \ 6370*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x)); \ 6371*5113495bSYour Name HWIO_INTFREE();\ 6372*5113495bSYour Name } while (0) 6373*5113495bSYour Name 6374*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_BMSK 0x000fffff 6375*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_SHFT 0x0 6376*5113495bSYour Name 6377*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_HP //// 6378*5113495bSYour Name 6379*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x) (x+0x00002020) 6380*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_PHYS(x) (x+0x00002020) 6381*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK 0x0000ffff 6382*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_SHFT 0 6383*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x) \ 6384*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK) 6385*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_INM(x, mask) \ 6386*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask) 6387*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUT(x, val) \ 6388*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), val) 6389*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUTM(x, mask, val) \ 6390*5113495bSYour Name do {\ 6391*5113495bSYour Name HWIO_INTLOCK(); \ 6392*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x)); \ 6393*5113495bSYour Name HWIO_INTFREE();\ 6394*5113495bSYour Name } while (0) 6395*5113495bSYour Name 6396*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6397*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 6398*5113495bSYour Name 6399*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_TP //// 6400*5113495bSYour Name 6401*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x) (x+0x00002024) 6402*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_PHYS(x) (x+0x00002024) 6403*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK 0x0000ffff 6404*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_SHFT 0 6405*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x) \ 6406*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK) 6407*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_INM(x, mask) \ 6408*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask) 6409*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUT(x, val) \ 6410*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), val) 6411*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUTM(x, mask, val) \ 6412*5113495bSYour Name do {\ 6413*5113495bSYour Name HWIO_INTLOCK(); \ 6414*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x)); \ 6415*5113495bSYour Name HWIO_INTFREE();\ 6416*5113495bSYour Name } while (0) 6417*5113495bSYour Name 6418*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6419*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 6420*5113495bSYour Name 6421*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_HP //// 6422*5113495bSYour Name 6423*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x) (x+0x00002028) 6424*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_PHYS(x) (x+0x00002028) 6425*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK 0x0000ffff 6426*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_SHFT 0 6427*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x) \ 6428*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK) 6429*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_INM(x, mask) \ 6430*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask) 6431*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUT(x, val) \ 6432*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), val) 6433*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUTM(x, mask, val) \ 6434*5113495bSYour Name do {\ 6435*5113495bSYour Name HWIO_INTLOCK(); \ 6436*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x)); \ 6437*5113495bSYour Name HWIO_INTFREE();\ 6438*5113495bSYour Name } while (0) 6439*5113495bSYour Name 6440*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6441*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_SHFT 0x0 6442*5113495bSYour Name 6443*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_TP //// 6444*5113495bSYour Name 6445*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x) (x+0x0000202c) 6446*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_PHYS(x) (x+0x0000202c) 6447*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK 0x0000ffff 6448*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_SHFT 0 6449*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x) \ 6450*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK) 6451*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_INM(x, mask) \ 6452*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask) 6453*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUT(x, val) \ 6454*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), val) 6455*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUTM(x, mask, val) \ 6456*5113495bSYour Name do {\ 6457*5113495bSYour Name HWIO_INTLOCK(); \ 6458*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x)); \ 6459*5113495bSYour Name HWIO_INTFREE();\ 6460*5113495bSYour Name } while (0) 6461*5113495bSYour Name 6462*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6463*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_SHFT 0x0 6464*5113495bSYour Name 6465*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_HP //// 6466*5113495bSYour Name 6467*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x) (x+0x00002030) 6468*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_PHYS(x) (x+0x00002030) 6469*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK 0x0000ffff 6470*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_SHFT 0 6471*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x) \ 6472*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK) 6473*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_INM(x, mask) \ 6474*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask) 6475*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUT(x, val) \ 6476*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), val) 6477*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUTM(x, mask, val) \ 6478*5113495bSYour Name do {\ 6479*5113495bSYour Name HWIO_INTLOCK(); \ 6480*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x)); \ 6481*5113495bSYour Name HWIO_INTFREE();\ 6482*5113495bSYour Name } while (0) 6483*5113495bSYour Name 6484*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6485*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_SHFT 0x0 6486*5113495bSYour Name 6487*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_TP //// 6488*5113495bSYour Name 6489*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x) (x+0x00002034) 6490*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_PHYS(x) (x+0x00002034) 6491*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK 0x0000ffff 6492*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_SHFT 0 6493*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x) \ 6494*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK) 6495*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_INM(x, mask) \ 6496*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask) 6497*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUT(x, val) \ 6498*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), val) 6499*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUTM(x, mask, val) \ 6500*5113495bSYour Name do {\ 6501*5113495bSYour Name HWIO_INTLOCK(); \ 6502*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x)); \ 6503*5113495bSYour Name HWIO_INTFREE();\ 6504*5113495bSYour Name } while (0) 6505*5113495bSYour Name 6506*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6507*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_SHFT 0x0 6508*5113495bSYour Name 6509*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_HP //// 6510*5113495bSYour Name 6511*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x) (x+0x00002038) 6512*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_PHYS(x) (x+0x00002038) 6513*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK 0x0000ffff 6514*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_SHFT 0 6515*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x) \ 6516*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK) 6517*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_INM(x, mask) \ 6518*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask) 6519*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUT(x, val) \ 6520*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), val) 6521*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUTM(x, mask, val) \ 6522*5113495bSYour Name do {\ 6523*5113495bSYour Name HWIO_INTLOCK(); \ 6524*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x)); \ 6525*5113495bSYour Name HWIO_INTFREE();\ 6526*5113495bSYour Name } while (0) 6527*5113495bSYour Name 6528*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6529*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_SHFT 0x0 6530*5113495bSYour Name 6531*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_TP //// 6532*5113495bSYour Name 6533*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x) (x+0x0000203c) 6534*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_PHYS(x) (x+0x0000203c) 6535*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK 0x0000ffff 6536*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_SHFT 0 6537*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x) \ 6538*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK) 6539*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_INM(x, mask) \ 6540*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask) 6541*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUT(x, val) \ 6542*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), val) 6543*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUTM(x, mask, val) \ 6544*5113495bSYour Name do {\ 6545*5113495bSYour Name HWIO_INTLOCK(); \ 6546*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x)); \ 6547*5113495bSYour Name HWIO_INTFREE();\ 6548*5113495bSYour Name } while (0) 6549*5113495bSYour Name 6550*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6551*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_SHFT 0x0 6552*5113495bSYour Name 6553*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_HP //// 6554*5113495bSYour Name 6555*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x) (x+0x00002040) 6556*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_PHYS(x) (x+0x00002040) 6557*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_RMSK 0x0000ffff 6558*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_SHFT 0 6559*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_IN(x) \ 6560*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_HP_RMSK) 6561*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_INM(x, mask) \ 6562*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask) 6563*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUT(x, val) \ 6564*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), val) 6565*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUTM(x, mask, val) \ 6566*5113495bSYour Name do {\ 6567*5113495bSYour Name HWIO_INTLOCK(); \ 6568*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_HP_IN(x)); \ 6569*5113495bSYour Name HWIO_INTFREE();\ 6570*5113495bSYour Name } while (0) 6571*5113495bSYour Name 6572*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6573*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_SHFT 0x0 6574*5113495bSYour Name 6575*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_TP //// 6576*5113495bSYour Name 6577*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x) (x+0x00002044) 6578*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_PHYS(x) (x+0x00002044) 6579*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_RMSK 0x0000ffff 6580*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_SHFT 0 6581*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_IN(x) \ 6582*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_TP_RMSK) 6583*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_INM(x, mask) \ 6584*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask) 6585*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUT(x, val) \ 6586*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), val) 6587*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUTM(x, mask, val) \ 6588*5113495bSYour Name do {\ 6589*5113495bSYour Name HWIO_INTLOCK(); \ 6590*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_TP_IN(x)); \ 6591*5113495bSYour Name HWIO_INTFREE();\ 6592*5113495bSYour Name } while (0) 6593*5113495bSYour Name 6594*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6595*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_SHFT 0x0 6596*5113495bSYour Name 6597*5113495bSYour Name 6598*5113495bSYour Name #endif 6599*5113495bSYour Name 6600