1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _PHYRX_ABORT_REQUEST_INFO_H_ 25 #define _PHYRX_ABORT_REQUEST_INFO_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1 38 39 struct phyrx_abort_request_info { 40 uint32_t phyrx_abort_reason : 8, //[7:0] 41 phy_enters_nap_state : 1, //[8] 42 phy_enters_defer_state : 1, //[9] 43 reserved_0 : 6, //[15:10] 44 receive_duration : 16; //[31:16] 45 }; 46 47 /* 48 49 phyrx_abort_reason 50 51 <enum 0 phyrx_err_phy_off> Reception aborted due to 52 receiving a PHY_OFF TLV 53 54 <enum 1 phyrx_err_synth_off> 55 56 <enum 2 phyrx_err_ofdma_timing> 57 58 <enum 3 phyrx_err_ofdma_signal_parity> 59 60 <enum 4 phyrx_err_ofdma_rate_illegal> 61 62 <enum 5 phyrx_err_ofdma_length_illegal> 63 64 <enum 6 phyrx_err_ofdma_restart> 65 66 <enum 7 phyrx_err_ofdma_service> 67 68 <enum 8 phyrx_err_ppdu_ofdma_power_drop> 69 70 71 72 <enum 9 phyrx_err_cck_blokker> 73 74 <enum 10 phyrx_err_cck_timing> 75 76 <enum 11 phyrx_err_cck_header_crc> 77 78 <enum 12 phyrx_err_cck_rate_illegal> 79 80 <enum 13 phyrx_err_cck_length_illegal> 81 82 <enum 14 phyrx_err_cck_restart> 83 84 <enum 15 phyrx_err_cck_service> 85 86 <enum 16 phyrx_err_cck_power_drop> 87 88 89 90 <enum 17 phyrx_err_ht_crc_err> 91 92 <enum 18 phyrx_err_ht_length_illegal> 93 94 <enum 19 phyrx_err_ht_rate_illegal> 95 96 <enum 20 phyrx_err_ht_zlf> 97 98 <enum 21 phyrx_err_false_radar_ext> 99 100 101 102 <enum 22 phyrx_err_green_field> 103 104 105 106 <enum 23 phyrx_err_bw_gt_dyn_bw> 107 108 <enum 24 phyrx_err_leg_ht_mismatch> 109 110 <enum 25 phyrx_err_vht_crc_error> 111 112 <enum 26 phyrx_err_vht_siga_unsupported> 113 114 <enum 27 phyrx_err_vht_lsig_len_invalid> 115 116 <enum 28 phyrx_err_vht_ndp_or_zlf> 117 118 <enum 29 phyrx_err_vht_nsym_lt_zero> 119 120 <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 121 122 <enum 31 phyrx_err_vht_rx_skip_group_id0> 123 124 <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 125 126 <enum 33 phyrx_err_vht_rx_skip_group_id63> 127 128 <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 129 130 <enum 35 phyrx_err_defer_nap> 131 132 <enum 36 phyrx_err_fdomain_timeout> 133 134 <enum 37 phyrx_err_lsig_rel_check> 135 136 <enum 38 phyrx_err_bt_collision> 137 138 <enum 39 phyrx_err_unsupported_mu_feedback> 139 140 <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 141 142 <enum 41 phyrx_err_unsupported_cbf> 143 144 145 146 <enum 42 phyrx_err_other> Should not really be used. If 147 needed, ask for documentation update 148 149 150 151 <enum 43 phyrx_err_he_siga_unsupported > <enum 44 152 phyrx_err_he_crc_error > <enum 45 153 phyrx_err_he_sigb_unsupported > <enum 46 154 phyrx_err_he_mu_mode_unsupported > <enum 47 155 phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 156 > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 157 phyrx_err_he_num_users_unsupported ><enum 51 158 phyrx_err_he_sounding_params_unsupported > 159 160 161 162 <enum 52 phyrx_err_MU_UL_no_power_detected> 163 164 <enum 53 phyrx_err_MU_UL_not_for_me> 165 166 167 168 <legal 0 - 53> 169 170 phy_enters_nap_state 171 172 When set, PHY enters PHY NAP state after sending this 173 abort 174 175 176 177 Note that nap and defer state are mutually exclusive. 178 179 180 181 Field put pro-actively in place....usage still to be 182 agreed upon. 183 184 <legal all> 185 186 phy_enters_defer_state 187 188 When set, PHY enters PHY defer state after sending this 189 abort 190 191 192 193 Note that nap and defer state are mutually exclusive. 194 195 196 197 Field put pro-actively in place....usage still to be 198 agreed upon. 199 200 <legal all> 201 202 reserved_0 203 204 <legal 0> 205 206 receive_duration 207 208 The remaining receive duration of this PPDU in the 209 medium (in us). When PHY does not know this duration when 210 this TLV is generated, the field will be set to 0. 211 212 The timing reference point is the reception by the MAC 213 of this TLV. The value shall be accurate to within 2us. 214 215 216 217 In case Phy_enters_nap_state and/or 218 Phy_enters_defer_state is set, there is a possibility that 219 MAC PMM can also decide to go into a low(er) power state. 220 221 <legal all> 222 */ 223 224 225 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON 226 227 <enum 0 phyrx_err_phy_off> Reception aborted due to 228 receiving a PHY_OFF TLV 229 230 <enum 1 phyrx_err_synth_off> 231 232 <enum 2 phyrx_err_ofdma_timing> 233 234 <enum 3 phyrx_err_ofdma_signal_parity> 235 236 <enum 4 phyrx_err_ofdma_rate_illegal> 237 238 <enum 5 phyrx_err_ofdma_length_illegal> 239 240 <enum 6 phyrx_err_ofdma_restart> 241 242 <enum 7 phyrx_err_ofdma_service> 243 244 <enum 8 phyrx_err_ppdu_ofdma_power_drop> 245 246 247 248 <enum 9 phyrx_err_cck_blokker> 249 250 <enum 10 phyrx_err_cck_timing> 251 252 <enum 11 phyrx_err_cck_header_crc> 253 254 <enum 12 phyrx_err_cck_rate_illegal> 255 256 <enum 13 phyrx_err_cck_length_illegal> 257 258 <enum 14 phyrx_err_cck_restart> 259 260 <enum 15 phyrx_err_cck_service> 261 262 <enum 16 phyrx_err_cck_power_drop> 263 264 265 266 <enum 17 phyrx_err_ht_crc_err> 267 268 <enum 18 phyrx_err_ht_length_illegal> 269 270 <enum 19 phyrx_err_ht_rate_illegal> 271 272 <enum 20 phyrx_err_ht_zlf> 273 274 <enum 21 phyrx_err_false_radar_ext> 275 276 277 278 <enum 22 phyrx_err_green_field> 279 280 281 282 <enum 23 phyrx_err_bw_gt_dyn_bw> 283 284 <enum 24 phyrx_err_leg_ht_mismatch> 285 286 <enum 25 phyrx_err_vht_crc_error> 287 288 <enum 26 phyrx_err_vht_siga_unsupported> 289 290 <enum 27 phyrx_err_vht_lsig_len_invalid> 291 292 <enum 28 phyrx_err_vht_ndp_or_zlf> 293 294 <enum 29 phyrx_err_vht_nsym_lt_zero> 295 296 <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 297 298 <enum 31 phyrx_err_vht_rx_skip_group_id0> 299 300 <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 301 302 <enum 33 phyrx_err_vht_rx_skip_group_id63> 303 304 <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 305 306 <enum 35 phyrx_err_defer_nap> 307 308 <enum 36 phyrx_err_fdomain_timeout> 309 310 <enum 37 phyrx_err_lsig_rel_check> 311 312 <enum 38 phyrx_err_bt_collision> 313 314 <enum 39 phyrx_err_unsupported_mu_feedback> 315 316 <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 317 318 <enum 41 phyrx_err_unsupported_cbf> 319 320 321 322 <enum 42 phyrx_err_other> Should not really be used. If 323 needed, ask for documentation update 324 325 326 327 <enum 43 phyrx_err_he_siga_unsupported > <enum 44 328 phyrx_err_he_crc_error > <enum 45 329 phyrx_err_he_sigb_unsupported > <enum 46 330 phyrx_err_he_mu_mode_unsupported > <enum 47 331 phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 332 > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 333 phyrx_err_he_num_users_unsupported ><enum 51 334 phyrx_err_he_sounding_params_unsupported > 335 336 337 338 <enum 52 phyrx_err_MU_UL_no_power_detected> 339 340 <enum 53 phyrx_err_MU_UL_not_for_me> 341 342 343 344 <legal 0 - 53> 345 */ 346 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET 0x00000000 347 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB 0 348 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK 0x000000ff 349 350 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE 351 352 When set, PHY enters PHY NAP state after sending this 353 abort 354 355 356 357 Note that nap and defer state are mutually exclusive. 358 359 360 361 Field put pro-actively in place....usage still to be 362 agreed upon. 363 364 <legal all> 365 */ 366 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET 0x00000000 367 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB 8 368 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK 0x00000100 369 370 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE 371 372 When set, PHY enters PHY defer state after sending this 373 abort 374 375 376 377 Note that nap and defer state are mutually exclusive. 378 379 380 381 Field put pro-actively in place....usage still to be 382 agreed upon. 383 384 <legal all> 385 */ 386 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET 0x00000000 387 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB 9 388 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK 0x00000200 389 390 /* Description PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0 391 392 <legal 0> 393 */ 394 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET 0x00000000 395 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB 10 396 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK 0x0000fc00 397 398 /* Description PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION 399 400 The remaining receive duration of this PPDU in the 401 medium (in us). When PHY does not know this duration when 402 this TLV is generated, the field will be set to 0. 403 404 The timing reference point is the reception by the MAC 405 of this TLV. The value shall be accurate to within 2us. 406 407 408 409 In case Phy_enters_nap_state and/or 410 Phy_enters_defer_state is set, there is a possibility that 411 MAC PMM can also decide to go into a low(er) power state. 412 413 <legal all> 414 */ 415 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET 0x00000000 416 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB 16 417 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK 0xffff0000 418 419 420 #endif // _PHYRX_ABORT_REQUEST_INFO_H_ 421