xref: /wlan-driver/fw-api/hw/qca6750/v1/phyrx_he_sig_a_mu_dl.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _PHYRX_HE_SIG_A_MU_DL_H_
25 #define _PHYRX_HE_SIG_A_MU_DL_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "he_sig_a_mu_dl_info.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0-1	struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details;
35 //
36 // ################ END SUMMARY #################
37 
38 #define NUM_OF_DWORDS_PHYRX_HE_SIG_A_MU_DL 2
39 
40 struct phyrx_he_sig_a_mu_dl {
41     struct            he_sig_a_mu_dl_info                       phyrx_he_sig_a_mu_dl_info_details;
42 };
43 
44 /*
45 
46 struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details
47 
48 			See detailed description of the STRUCT
49 */
50 
51 
52  /* EXTERNAL REFERENCE : struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details */
53 
54 
55 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG
56 
57 			Differentiates between DL and UL transmission
58 
59 
60 
61 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
62 
63 			<enum 1 DL_UL_FLAG_IS_UL>
64 
65 			NOTE: This is unsupported for HE MU format (including
66 			MU_SU) Tx in Napier and Hastings80.
67 
68 			<legal all>
69 */
70 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x00000000
71 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_LSB 0
72 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MASK 0x00000001
73 
74 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B
75 
76 			Indicates the MCS of HE-SIG-B
77 
78 			<legal 0-5>
79 */
80 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_OFFSET 0x00000000
81 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_LSB 1
82 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MASK 0x0000000e
83 
84 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B
85 
86 			Indicates whether dual sub-carrier modulation is applied
87 			to HE-SIG-B
88 
89 
90 
91 			0: No DCM for HE_SIG_B
92 
93 			1: DCM for HE_SIG_B
94 
95 			<legal all>
96 */
97 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_OFFSET 0x00000000
98 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_LSB 4
99 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MASK 0x00000010
100 
101 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID
102 
103 			BSS color ID
104 
105 
106 
107 			Field Used by MAC HW
108 
109 			<legal all>
110 */
111 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x00000000
112 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_LSB 5
113 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MASK 0x000007e0
114 
115 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE
116 
117 			Spatial reuse
118 
119 
120 
121 			For 20MHz one SR field corresponding to entire 20MHz
122 			(other 3 fields indicate identical values)
123 
124 			For 40MHz two SR fields for each 20MHz (other 2 fields
125 			indicate identical values)
126 
127 			For 80MHz four SR fields for each 20MHz
128 
129 			For 160MHz four SR fields for each 40MHz
130 
131 			<legal all>
132 */
133 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x00000000
134 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_LSB 11
135 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MASK 0x00007800
136 
137 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW
138 
139 			Bandwidth of the PPDU.
140 
141 
142 
143 			<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
144 
145 			<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
146 
147 			<enum 2 HE_SIG_A_MU_DL_BW80> 80 MHz non-preamble
148 			puncturing mode
149 
150 			<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz and 80+80 MHz
151 			non-preamble puncturing mode
152 
153 			<enum 4 HE_SIG_A_MU_DL_BW80_SEC_20_PUNC> for preamble
154 			puncturing in 80 MHz, where in the preamble only the
155 			secondary 20 MHz is punctured
156 
157 			<enum 5 HE_SIG_A_MU_DL_BW80_20_PUNC_IN_SEC_40> for
158 			preamble puncturing in 80 MHz, where in the preamble only
159 			one of the two 20 MHz sub-channels in secondary 40 MHz is
160 			punctured.
161 
162 			<enum 6 HE_SIG_A_MU_DL_BW160_SEC_20_PUNC> for preamble
163 			puncturing in 160 MHz or 80+80 MHz, where in the primary 80
164 			MHz of the preamble only the secondary 20 MHz is punctured.
165 
166 			<enum 7 HE_SIG_A_MU_DL_BW160_SEC_40_80_PUNC> for
167 			preamble puncturing in 160 MHz or 80+80 MHz, where in the
168 			primary 80 MHz of the preamble the primary 40 MHz is
169 			present.
170 
171 
172 
173 			On RX side, Field Used by MAC HW
174 
175 			<legal 0-7>
176 */
177 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x00000000
178 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_LSB 15
179 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MASK 0x00038000
180 
181 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS
182 
183 			Number of symbols
184 
185 
186 
187 			For OFDMA, the actual number of symbols is 1 larger then
188 			indicated in this field.
189 
190 
191 
192 			For MU-MIMO this is equal to the number of users - 1:
193 			the following encoding is used:
194 
195 			1 => 2 users
196 
197 			2 => 3 users
198 
199 			Etc.
200 
201 
202 
203 			<legal all>
204 */
205 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_OFFSET 0x00000000
206 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_LSB 18
207 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MASK 0x003c0000
208 
209 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B
210 
211 			Indicates the compression mode of HE-SIG-B
212 
213 
214 
215 			0: Regular [uncomp mode]
216 
217 			1: compressed mode (full-BW MU-MIMO only)
218 
219 			<legal all>
220 */
221 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_OFFSET 0x00000000
222 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_LSB 22
223 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MASK 0x00400000
224 
225 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE
226 
227 			Indicates the CP and HE-LTF type
228 
229 
230 
231 			<enum 0 MU_FourX_LTF_0_8CP> 4xLTF + 0.8 us CP
232 
233 			<enum 1 MU_TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
234 
235 			<enum 2 MU_TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
236 
237 			<enum 3 MU_FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
238 
239 
240 
241 			NOTE: for MU no proprietary modes (for now)
242 
243 
244 
245 			<legal all>
246 */
247 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x00000000
248 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_LSB 23
249 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MASK 0x01800000
250 
251 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION
252 
253 			0: No Doppler support
254 
255 			1: Doppler support
256 
257 			<legal all>
258 */
259 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x00000000
260 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_LSB 25
261 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x02000000
262 
263 /* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A
264 
265 			<legal 0>
266 */
267 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000000
268 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_LSB 26
269 #define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MASK 0xfc000000
270 
271 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION
272 
273 			Indicates the remaining time in the current TXOP
274 
275 
276 
277 			Field Used by MAC HW
278 
279 			 <legal all>
280 */
281 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_OFFSET 0x00000004
282 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_LSB 0
283 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f
284 
285 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A
286 
287 			Note: spec indicates this shall be set to 1
288 
289 			<legal 1>
290 */
291 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004
292 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_LSB 7
293 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MASK 0x00000080
294 
295 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS
296 
297 			Indicates the number of HE-LTF symbols
298 
299 
300 
301 			0: 1 LTF
302 
303 			1: 2 LTFs
304 
305 			2: 4 LTFs
306 
307 			3: 6 LTFs
308 
309 			4: 8 LTFs
310 
311 
312 
313 			<legal all>
314 */
315 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_OFFSET 0x00000004
316 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_LSB 8
317 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MASK 0x00000700
318 
319 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL
320 
321 			If LDPC,
322 
323 			  0: LDPC extra symbol not present
324 
325 			  1: LDPC extra symbol present
326 
327 			Else
328 
329 			  Set to 1
330 
331 			<legal all>
332 */
333 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
334 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 11
335 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x00000800
336 
337 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC
338 
339 			Indicates whether STBC is applied
340 
341 			0: No STBC
342 
343 			1: STBC
344 
345 			<legal all>
346 */
347 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_OFFSET 0x00000004
348 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_LSB 12
349 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MASK 0x00001000
350 
351 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR
352 
353 			the packet extension duration of the trigger-based PPDU
354 			response with these two bits indicating the a-factor
355 
356 
357 
358 			<enum 0 a_factor_4>
359 
360 			<enum 1 a_factor_1>
361 
362 			<enum 2 a_factor_2>
363 
364 			<enum 3 a_factor_3>
365 
366 
367 
368 			<legal all>
369 */
370 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
371 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 13
372 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x00006000
373 
374 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY
375 
376 			the packet extension duration of the trigger-based PPDU
377 			response with this bit indicating the PE-Disambiguity
378 
379 			<legal all>
380 */
381 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
382 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 15
383 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00008000
384 
385 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC
386 
387 			CRC for HE-SIG-A contents.
388 
389 			<legal all>
390 */
391 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_OFFSET 0x00000004
392 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_LSB 16
393 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MASK 0x000f0000
394 
395 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL
396 
397 			<legal 0>
398 */
399 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_OFFSET 0x00000004
400 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_LSB 20
401 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MASK 0x03f00000
402 
403 /* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B
404 
405 			<legal 0>
406 */
407 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_OFFSET 0x00000004
408 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_LSB 26
409 #define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MASK 0xfc000000
410 
411 
412 #endif // _PHYRX_HE_SIG_A_MU_DL_H_
413