1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _PHYRX_RSSI_LEGACY_H_ 25 #define _PHYRX_RSSI_LEGACY_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 #include "receive_rssi_info.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 reception_type[3:0], rx_chain_mask_type[4], reserved_0[5], receive_bandwidth[7:6], rx_chain_mask[15:8], phy_ppdu_id[31:16] 35 // 1 sw_phy_meta_data[31:0] 36 // 2 ppdu_start_timestamp[31:0] 37 // 3-18 struct receive_rssi_info pre_rssi_info_details; 38 // 19-34 struct receive_rssi_info preamble_rssi_info_details; 39 // 35 pre_rssi_comb[7:0], rssi_comb[15:8], normalized_pre_rssi_comb[23:16], normalized_rssi_comb[31:24] 40 // 36 rssi_comb_ppdu[7:0], rssi_db_to_dbm_offset[15:8], rssi_for_spatial_reuse[23:16], rssi_for_trigger_resp[31:24] 41 // 42 // ################ END SUMMARY ################# 43 44 #define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 37 45 46 struct phyrx_rssi_legacy { 47 uint32_t reception_type : 4, //[3:0] 48 rx_chain_mask_type : 1, //[4] 49 reserved_0 : 1, //[5] 50 receive_bandwidth : 2, //[7:6] 51 rx_chain_mask : 8, //[15:8] 52 phy_ppdu_id : 16; //[31:16] 53 uint32_t sw_phy_meta_data : 32; //[31:0] 54 uint32_t ppdu_start_timestamp : 32; //[31:0] 55 struct receive_rssi_info pre_rssi_info_details; 56 struct receive_rssi_info preamble_rssi_info_details; 57 uint32_t pre_rssi_comb : 8, //[7:0] 58 rssi_comb : 8, //[15:8] 59 normalized_pre_rssi_comb : 8, //[23:16] 60 normalized_rssi_comb : 8; //[31:24] 61 uint32_t rssi_comb_ppdu : 8, //[7:0] 62 rssi_db_to_dbm_offset : 8, //[15:8] 63 rssi_for_spatial_reuse : 8, //[23:16] 64 rssi_for_trigger_resp : 8; //[31:24] 65 }; 66 67 /* 68 69 reception_type 70 71 This field helps MAC SW determine which field in this 72 (and following TLVs) will contain valid information. For 73 example some RSSI info not valid in case of uplink_ofdma.. 74 75 76 77 In case of UL MU OFDMA or UL MU-MIMO reception 78 pre-announced by MAC during trigger Tx, e-nums 0 or 1 should 79 be used. 80 81 82 83 In case of UL MU OFDMA+MIMO reception, or in case of UL 84 MU reception when PHY has not been pre-informed, e-num 2 85 should be used. 86 87 If this happens, the UL MU frame in the medium is by 88 definition not for this device. 89 90 As reference, see doc: 91 92 Lithium_mac_phy_interface_hld.docx 93 94 Chapter: 7.15.1: 11ax UL MU Reception TLV sequences when 95 this device is not targeted. 96 97 98 99 <enum 0 reception_is_uplink_ofdma> 100 101 <enum 1 reception_is_uplink_mimo> 102 103 <enum 2 reception_is_other> 104 105 <enum 3 reception_is_frameless> PHY RX has been 106 instructed in advance that the upcoming reception is 107 frameless. This implieas that in advance it is known that 108 all frames will collide in the medium, and nothing can be 109 properly decoded... This can happen during the CTS reception 110 in response to the triggered MU-RTS transmission. 111 112 MAC takes no action when seeing this e_num. For the 113 frameless reception the indication in pkt_end is the final 114 one evaluated by the MAC 115 116 117 118 For the relationship between pkt_type and this field, 119 see the table at the end of this TLV description. 120 121 <legal 0-3> 122 123 rx_chain_mask_type 124 125 Indicates if the field rx_chain_mask represents the mask 126 at start of reception (on which the Rssi_comb value is 127 based), or the setting used during the remainder of the 128 reception 129 130 131 132 1'b0: rxtd.listen_pri80_mask 133 134 1'b1: Final receive mask 135 136 137 138 <legal all> 139 140 reserved_0 141 142 <legal 0> 143 144 receive_bandwidth 145 146 Full receive Bandwidth 147 148 149 150 <enum 0 full_rx_bw_20_mhz> 151 152 <enum 1 full_rx_bw_40_mhz> 153 154 <enum 2 full_rx_bw_80_mhz> 155 156 <enum 3 full_rx_bw_160_mhz> 157 158 159 160 <legal 0-3> 161 162 rx_chain_mask 163 164 The chain mask at the start of the reception of this 165 frame. 166 167 168 169 each bit is one antenna 170 171 0: the chain is NOT used 172 173 1: the chain is used 174 175 176 177 Supports up to 8 chains 178 179 180 181 Used in 11ax TPC calculations for UL OFDMA/MIMO and has 182 to be in sync with the rssi_comb value as this is also used 183 by the MAC for the TPC calculations. 184 185 <legal all> 186 187 phy_ppdu_id 188 189 A ppdu counter value that PHY increments for every PPDU 190 received. The counter value wraps around 191 192 <legal all> 193 194 sw_phy_meta_data 195 196 32 bit Meta data that SW can program in a 32 bit PHY 197 register and PHY will insert the value in every 198 RX_RSSI_LEGACY TLV that it generates. 199 200 SW uses this field to embed among other things some SW 201 channel info. 202 203 ppdu_start_timestamp 204 205 Timestamp that indicates when the PPDU that contained 206 this MPDU started on the medium. 207 208 209 210 Note that PHY will detect the start later, and will have 211 to derive out of the preamble info when the frame actually 212 appeared on the medium 213 214 <legal 0- 10> 215 216 struct receive_rssi_info pre_rssi_info_details 217 218 This field is not valid when reception_is_uplink_ofdma 219 220 221 222 Overview of the pre-RSSI values. That is RSSI values 223 measured on the medium before this reception started. 224 225 struct receive_rssi_info preamble_rssi_info_details 226 227 This field is not valid when reception_is_uplink_ofdma 228 229 230 231 Overview of the RSSI values measured during the 232 pre-amble phase of this reception 233 234 pre_rssi_comb 235 236 Combined pre_rssi of all chains. Based on primary 237 channel RSSI. 238 239 240 241 RSSI is reported as 8b signed values. Nominally value is 242 in dB units above or below the noisefloor(minCCApwr). 243 244 245 246 The resolution can be: 247 248 1dB or 0.5dB. This is statically configured within the 249 PHY and MAC 250 251 252 253 In case of 1dB, the Range is: 254 255 -128dB to 127dB 256 257 258 259 In case of 0.5dB, the Range is: 260 261 -64dB to 63.5dB 262 263 264 265 <legal all> 266 267 rssi_comb 268 269 Combined rssi of all chains. Based on primary channel 270 RSSI. 271 272 273 274 RSSI is reported as 8b signed values. Nominally value is 275 in dB units above or below the noisefloor(minCCApwr). 276 277 278 279 The resolution can be: 280 281 1dB or 0.5dB. This is statically configured within the 282 PHY and MAC 283 284 285 286 In case of 1dB, the Range is: 287 288 -128dB to 127dB 289 290 291 292 In case of 0.5dB, the Range is: 293 294 -64dB to 63.5dB 295 296 297 298 <legal all> 299 300 normalized_pre_rssi_comb 301 302 Combined pre_rssi of all chains, but normalized back to 303 a single chain. This avoids PDG from having to evaluate this 304 in combination with receive chain mask and perform all kinds 305 of pre-processing algorithms. 306 307 308 309 Based on primary channel RSSI. 310 311 312 313 RSSI is reported as 8b signed values. Nominally value is 314 in dB units above or below the noisefloor(minCCApwr). 315 316 317 318 The resolution can be: 319 320 1dB or 0.5dB. This is statically configured within the 321 PHY and MAC 322 323 324 325 In case of 1dB, the Range is: 326 327 -128dB to 127dB 328 329 330 331 In case of 0.5dB, the Range is: 332 333 -64dB to 63.5dB 334 335 336 337 <legal all> 338 339 normalized_rssi_comb 340 341 Combined rssi of all chains, but normalized back to a 342 single chain. This avoids PDG from having to evaluate this 343 in combination with receive chain mask and perform all kinds 344 of pre-processing algorithms. 345 346 347 348 Based on primary channel RSSI. 349 350 351 352 RSSI is reported as 8b signed values. Nominally value is 353 in dB units above or below the noisefloor(minCCApwr). 354 355 356 357 The resolution can be: 358 359 1dB or 0.5dB. This is statically configured within the 360 PHY and MAC 361 362 In case of 1dB, the Range is: 363 364 -128dB to 127dB 365 366 367 368 In case of 0.5dB, the Range is: 369 370 -64dB to 63.5dB 371 372 373 374 <legal all> 375 376 rssi_comb_ppdu 377 378 Combined rssi of all chains, based on active 379 RUs/subchannels, a.k.a. rssi_pkt_bw_mac 380 381 382 383 RSSI is reported as 8b signed values. Nominally value is 384 in dB units above or below the noisefloor(minCCApwr). 385 386 387 388 The resolution can be: 389 390 1dB or 0.5dB. This is statically configured within the 391 PHY and MAC 392 393 394 395 In case of 1dB, the Range is: 396 397 -128dB to 127dB 398 399 400 401 In case of 0.5dB, the Range is: 402 403 -64dB to 63.5dB 404 405 406 407 When packet BW is 20 MHz, 408 409 rssi_comb_ppdu = rssi_comb. 410 411 412 413 When packet BW > 20 MHz, 414 415 rssi_comb < rssi_comb_ppdu because rssi_comb only 416 includes power of primary 20 MHz while rssi_comb_ppdu 417 includes power of active RUs/subchannels. 418 419 420 421 <legal all> 422 423 rssi_db_to_dbm_offset 424 425 Offset between 'dB' and 'dBm' values. SW can use this 426 value to convert RSSI 'dBm' values back to 'dB,' and report 427 both the values. 428 429 430 431 When rssi_db_to_dbm_offset = 0, 432 433 all rssi_xxx fields are defined in dB. 434 435 436 437 When rssi_db_to_dbm_offset is a large negative value, 438 all rssi_xxx fields are defined in dBm. 439 440 441 442 <legal all> 443 444 rssi_for_spatial_reuse 445 446 RSSI to be used by HWSCH for transmit (power) selection 447 during an SR opportunity, reported as an 8-bit signed value 448 449 450 451 The resolution can be: 452 453 1dB or 0.5dB. This is statically configured within the 454 PHY and MAC 455 456 457 458 In case of 1dB, the Range is: 459 460 -128dB to 127dB 461 462 463 464 In case of 0.5dB, the Range is: 465 466 -64dB to 63.5dB 467 468 469 470 As per 802.11ax draft 3.3 subsubclauses 27.10.2.2/3, for 471 OBSS PD spatial reuse, the received signal strength level 472 should be measured from the L-STF or L-LTF (but not L-SIG), 473 just as measured to indicate CCA. 474 475 476 477 Also, as per 802.11ax draft 3.3, for OBSS PD spatial 478 reuse, MAC should compare this value with its programmed 479 OBSS_PDlevel scaled from 20 MHz to the Rx PPDU bandwidth. 480 Since MAC does not do this scaling, PHY is instead expected 481 to normalize the reported RSSI to 20 MHz. 482 483 484 485 Also as per 802.11ax draft 3.3 subsubclause 27.10.3.2, 486 for SRP spatial reuse, the received power level should be 487 measured from the L-STF or L-LTF (but not L-SIG) and 488 normalized to 20 MHz. 489 490 <legal all> 491 492 rssi_for_trigger_resp 493 494 RSSI to be used by PDG for transmit (power) selection 495 during trigger response, reported as an 8-bit signed value 496 497 498 499 The resolution can be: 500 501 1dB or 0.5dB. This is statically configured within the 502 PHY and MAC 503 504 505 506 In case of 1dB, the Range is: 507 508 -128dB to 127dB 509 510 511 512 In case of 0.5dB, the Range is: 513 514 -64dB to 63.5dB 515 516 517 518 As per 802.11ax draft 3.3 subsubclauses 28.3.14.2, for 519 trigger response, the received power should be measured from 520 the non-HE portion of the preamble of the PPDU containing 521 the trigger, normalized to 20 MHz, averaged over the 522 antennas over which the average pathloss is being computed. 523 524 <legal all> 525 */ 526 527 528 /* Description PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE 529 530 This field helps MAC SW determine which field in this 531 (and following TLVs) will contain valid information. For 532 example some RSSI info not valid in case of uplink_ofdma.. 533 534 535 536 In case of UL MU OFDMA or UL MU-MIMO reception 537 pre-announced by MAC during trigger Tx, e-nums 0 or 1 should 538 be used. 539 540 541 542 In case of UL MU OFDMA+MIMO reception, or in case of UL 543 MU reception when PHY has not been pre-informed, e-num 2 544 should be used. 545 546 If this happens, the UL MU frame in the medium is by 547 definition not for this device. 548 549 As reference, see doc: 550 551 Lithium_mac_phy_interface_hld.docx 552 553 Chapter: 7.15.1: 11ax UL MU Reception TLV sequences when 554 this device is not targeted. 555 556 557 558 <enum 0 reception_is_uplink_ofdma> 559 560 <enum 1 reception_is_uplink_mimo> 561 562 <enum 2 reception_is_other> 563 564 <enum 3 reception_is_frameless> PHY RX has been 565 instructed in advance that the upcoming reception is 566 frameless. This implieas that in advance it is known that 567 all frames will collide in the medium, and nothing can be 568 properly decoded... This can happen during the CTS reception 569 in response to the triggered MU-RTS transmission. 570 571 MAC takes no action when seeing this e_num. For the 572 frameless reception the indication in pkt_end is the final 573 one evaluated by the MAC 574 575 576 577 For the relationship between pkt_type and this field, 578 see the table at the end of this TLV description. 579 580 <legal 0-3> 581 */ 582 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET 0x00000000 583 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB 0 584 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK 0x0000000f 585 586 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE 587 588 Indicates if the field rx_chain_mask represents the mask 589 at start of reception (on which the Rssi_comb value is 590 based), or the setting used during the remainder of the 591 reception 592 593 594 595 1'b0: rxtd.listen_pri80_mask 596 597 1'b1: Final receive mask 598 599 600 601 <legal all> 602 */ 603 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_OFFSET 0x00000000 604 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_LSB 4 605 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_MASK 0x00000010 606 607 /* Description PHYRX_RSSI_LEGACY_0_RESERVED_0 608 609 <legal 0> 610 */ 611 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET 0x00000000 612 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB 5 613 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK 0x00000020 614 615 /* Description PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH 616 617 Full receive Bandwidth 618 619 620 621 <enum 0 full_rx_bw_20_mhz> 622 623 <enum 1 full_rx_bw_40_mhz> 624 625 <enum 2 full_rx_bw_80_mhz> 626 627 <enum 3 full_rx_bw_160_mhz> 628 629 630 631 <legal 0-3> 632 */ 633 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_OFFSET 0x00000000 634 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_LSB 6 635 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_MASK 0x000000c0 636 637 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK 638 639 The chain mask at the start of the reception of this 640 frame. 641 642 643 644 each bit is one antenna 645 646 0: the chain is NOT used 647 648 1: the chain is used 649 650 651 652 Supports up to 8 chains 653 654 655 656 Used in 11ax TPC calculations for UL OFDMA/MIMO and has 657 to be in sync with the rssi_comb value as this is also used 658 by the MAC for the TPC calculations. 659 660 <legal all> 661 */ 662 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET 0x00000000 663 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB 8 664 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK 0x0000ff00 665 666 /* Description PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID 667 668 A ppdu counter value that PHY increments for every PPDU 669 received. The counter value wraps around 670 671 <legal all> 672 */ 673 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET 0x00000000 674 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB 16 675 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK 0xffff0000 676 677 /* Description PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA 678 679 32 bit Meta data that SW can program in a 32 bit PHY 680 register and PHY will insert the value in every 681 RX_RSSI_LEGACY TLV that it generates. 682 683 SW uses this field to embed among other things some SW 684 channel info. 685 */ 686 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET 0x00000004 687 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB 0 688 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK 0xffffffff 689 690 /* Description PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP 691 692 Timestamp that indicates when the PPDU that contained 693 this MPDU started on the medium. 694 695 696 697 Note that PHY will detect the start later, and will have 698 to derive out of the preamble info when the frame actually 699 appeared on the medium 700 701 <legal 0- 10> 702 */ 703 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET 0x00000008 704 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB 0 705 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK 0xffffffff 706 707 /* EXTERNAL REFERENCE : struct receive_rssi_info pre_rssi_info_details */ 708 709 710 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 711 712 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 713 714 Value of 0x80 indicates invalid. 715 */ 716 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000000c 717 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 718 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 719 720 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 721 722 RSSI of RX PPDU on chain 0 of extension 20 MHz 723 bandwidth. 724 725 Value of 0x80 indicates invalid. 726 */ 727 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000000c 728 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 729 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 730 731 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 732 733 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 734 bandwidth. 735 736 Value of 0x80 indicates invalid. 737 */ 738 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000000c 739 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 740 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 741 742 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 743 744 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 745 bandwidth. 746 747 Value of 0x80 indicates invalid. 748 */ 749 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000000c 750 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 751 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 752 753 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 754 755 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 756 bandwidth. 757 758 Value of 0x80 indicates invalid. 759 */ 760 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000010 761 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 762 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 763 764 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 765 766 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 767 MHz bandwidth. 768 769 Value of 0x80 indicates invalid. 770 */ 771 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000010 772 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 773 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 774 775 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 776 777 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 778 MHz bandwidth. 779 780 Value of 0x80 indicates invalid. 781 */ 782 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000010 783 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 784 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 785 786 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 787 788 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 789 bandwidth. 790 791 Value of 0x80 indicates invalid. 792 */ 793 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000010 794 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 795 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 796 797 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 798 799 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 800 801 Value of 0x80 indicates invalid. 802 */ 803 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000014 804 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 805 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 806 807 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 808 809 RSSI of RX PPDU on chain 1 of extension 20 MHz 810 bandwidth. 811 812 Value of 0x80 indicates invalid. 813 */ 814 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000014 815 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 816 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 817 818 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 819 820 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 821 bandwidth. 822 823 Value of 0x80 indicates invalid. 824 */ 825 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000014 826 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 827 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 828 829 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 830 831 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 832 bandwidth. 833 834 Value of 0x80 indicates invalid. 835 */ 836 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000014 837 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 838 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 839 840 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 841 842 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 843 bandwidth. 844 845 Value of 0x80 indicates invalid. 846 */ 847 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000018 848 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 849 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 850 851 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 852 853 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 854 MHz bandwidth. 855 856 Value of 0x80 indicates invalid. 857 */ 858 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000018 859 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 860 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 861 862 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 863 864 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 865 MHz bandwidth. 866 867 Value of 0x80 indicates invalid. 868 */ 869 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000018 870 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 871 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 872 873 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 874 875 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 876 bandwidth. 877 878 Value of 0x80 indicates invalid. 879 */ 880 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000018 881 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 882 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 883 884 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 885 886 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 887 888 Value of 0x80 indicates invalid. 889 */ 890 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000001c 891 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 892 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 893 894 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 895 896 RSSI of RX PPDU on chain 2 of extension 20 MHz 897 bandwidth. 898 899 Value of 0x80 indicates invalid. 900 */ 901 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000001c 902 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 903 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 904 905 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 906 907 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 908 bandwidth. 909 910 Value of 0x80 indicates invalid. 911 */ 912 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000001c 913 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 914 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 915 916 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 917 918 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 919 bandwidth. 920 921 Value of 0x80 indicates invalid. 922 */ 923 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000001c 924 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 925 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 926 927 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 928 929 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 930 bandwidth. 931 932 Value of 0x80 indicates invalid. 933 */ 934 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000020 935 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 936 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 937 938 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 939 940 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 941 MHz bandwidth. 942 943 Value of 0x80 indicates invalid. 944 */ 945 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000020 946 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 947 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 948 949 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 950 951 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 952 MHz bandwidth. 953 954 Value of 0x80 indicates invalid. 955 */ 956 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000020 957 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 958 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 959 960 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 961 962 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 963 bandwidth. 964 965 Value of 0x80 indicates invalid. 966 */ 967 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000020 968 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 969 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 970 971 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 972 973 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 974 975 Value of 0x80 indicates invalid. 976 */ 977 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000024 978 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 979 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 980 981 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 982 983 RSSI of RX PPDU on chain 3 of extension 20 MHz 984 bandwidth. 985 986 Value of 0x80 indicates invalid. 987 */ 988 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000024 989 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 990 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 991 992 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 993 994 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 995 bandwidth. 996 997 Value of 0x80 indicates invalid. 998 */ 999 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000024 1000 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 1001 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 1002 1003 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 1004 1005 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 1006 bandwidth. 1007 1008 Value of 0x80 indicates invalid. 1009 */ 1010 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000024 1011 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 1012 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 1013 1014 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 1015 1016 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 1017 bandwidth. 1018 1019 Value of 0x80 indicates invalid. 1020 */ 1021 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000028 1022 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 1023 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 1024 1025 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 1026 1027 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 1028 MHz bandwidth. 1029 1030 Value of 0x80 indicates invalid. 1031 */ 1032 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000028 1033 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 1034 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 1035 1036 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 1037 1038 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 1039 MHz bandwidth. 1040 1041 Value of 0x80 indicates invalid. 1042 */ 1043 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000028 1044 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 1045 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 1046 1047 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 1048 1049 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 1050 bandwidth. 1051 1052 Value of 0x80 indicates invalid. 1053 */ 1054 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000028 1055 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 1056 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 1057 1058 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 1059 1060 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 1061 1062 Value of 0x80 indicates invalid. 1063 */ 1064 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000002c 1065 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 1066 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 1067 1068 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 1069 1070 RSSI of RX PPDU on chain 4 of extension 20 MHz 1071 bandwidth. 1072 1073 Value of 0x80 indicates invalid. 1074 */ 1075 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000002c 1076 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 1077 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 1078 1079 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 1080 1081 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 1082 bandwidth. 1083 1084 Value of 0x80 indicates invalid. 1085 */ 1086 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000002c 1087 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 1088 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 1089 1090 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 1091 1092 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 1093 bandwidth. 1094 1095 Value of 0x80 indicates invalid. 1096 */ 1097 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000002c 1098 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 1099 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 1100 1101 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 1102 1103 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 1104 bandwidth. 1105 1106 Value of 0x80 indicates invalid. 1107 */ 1108 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000030 1109 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 1110 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 1111 1112 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 1113 1114 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 1115 MHz bandwidth. 1116 1117 Value of 0x80 indicates invalid. 1118 */ 1119 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000030 1120 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 1121 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 1122 1123 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 1124 1125 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 1126 MHz bandwidth. 1127 1128 Value of 0x80 indicates invalid. 1129 */ 1130 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000030 1131 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 1132 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 1133 1134 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 1135 1136 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 1137 bandwidth. 1138 1139 Value of 0x80 indicates invalid. 1140 */ 1141 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000030 1142 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 1143 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 1144 1145 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 1146 1147 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1148 1149 Value of 0x80 indicates invalid. 1150 */ 1151 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000034 1152 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 1153 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 1154 1155 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 1156 1157 RSSI of RX PPDU on chain 5 of extension 20 MHz 1158 bandwidth. 1159 1160 Value of 0x80 indicates invalid. 1161 */ 1162 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000034 1163 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 1164 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 1165 1166 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 1167 1168 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 1169 bandwidth. 1170 1171 Value of 0x80 indicates invalid. 1172 */ 1173 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000034 1174 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 1175 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 1176 1177 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 1178 1179 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 1180 bandwidth. 1181 1182 Value of 0x80 indicates invalid. 1183 */ 1184 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000034 1185 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 1186 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 1187 1188 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 1189 1190 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 1191 bandwidth. 1192 1193 Value of 0x80 indicates invalid. 1194 */ 1195 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000038 1196 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1197 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1198 1199 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1200 1201 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1202 MHz bandwidth. 1203 1204 Value of 0x80 indicates invalid. 1205 */ 1206 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000038 1207 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1208 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1209 1210 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1211 1212 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1213 MHz bandwidth. 1214 1215 Value of 0x80 indicates invalid. 1216 */ 1217 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000038 1218 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1219 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1220 1221 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1222 1223 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1224 bandwidth. 1225 1226 Value of 0x80 indicates invalid. 1227 */ 1228 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000038 1229 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1230 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1231 1232 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1233 1234 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1235 1236 Value of 0x80 indicates invalid. 1237 */ 1238 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000003c 1239 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1240 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1241 1242 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1243 1244 RSSI of RX PPDU on chain 6 of extension 20 MHz 1245 bandwidth. 1246 1247 Value of 0x80 indicates invalid. 1248 */ 1249 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000003c 1250 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1251 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1252 1253 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1254 1255 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1256 bandwidth. 1257 1258 Value of 0x80 indicates invalid. 1259 */ 1260 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000003c 1261 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1262 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1263 1264 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1265 1266 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1267 bandwidth. 1268 1269 Value of 0x80 indicates invalid. 1270 */ 1271 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000003c 1272 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1273 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1274 1275 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1276 1277 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1278 bandwidth. 1279 1280 Value of 0x80 indicates invalid. 1281 */ 1282 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000040 1283 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1284 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1285 1286 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1287 1288 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1289 MHz bandwidth. 1290 1291 Value of 0x80 indicates invalid. 1292 */ 1293 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000040 1294 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1295 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1296 1297 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1298 1299 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1300 MHz bandwidth. 1301 1302 Value of 0x80 indicates invalid. 1303 */ 1304 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000040 1305 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 1306 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 1307 1308 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 1309 1310 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 1311 bandwidth. 1312 1313 Value of 0x80 indicates invalid. 1314 */ 1315 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000040 1316 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 1317 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 1318 1319 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 1320 1321 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 1322 1323 Value of 0x80 indicates invalid. 1324 */ 1325 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000044 1326 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 1327 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 1328 1329 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 1330 1331 RSSI of RX PPDU on chain 7 of extension 20 MHz 1332 bandwidth. 1333 1334 Value of 0x80 indicates invalid. 1335 */ 1336 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000044 1337 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 1338 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 1339 1340 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 1341 1342 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 1343 bandwidth. 1344 1345 Value of 0x80 indicates invalid. 1346 */ 1347 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000044 1348 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 1349 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 1350 1351 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 1352 1353 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 1354 bandwidth. 1355 1356 Value of 0x80 indicates invalid. 1357 */ 1358 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000044 1359 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 1360 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 1361 1362 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 1363 1364 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 1365 bandwidth. 1366 1367 Value of 0x80 indicates invalid. 1368 */ 1369 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000048 1370 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 1371 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 1372 1373 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 1374 1375 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 1376 MHz bandwidth. 1377 1378 Value of 0x80 indicates invalid. 1379 */ 1380 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000048 1381 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 1382 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 1383 1384 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 1385 1386 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 1387 MHz bandwidth. 1388 1389 Value of 0x80 indicates invalid. 1390 */ 1391 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000048 1392 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 1393 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 1394 1395 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 1396 1397 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 1398 bandwidth. 1399 1400 Value of 0x80 indicates invalid. 1401 */ 1402 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000048 1403 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 1404 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 1405 1406 /* EXTERNAL REFERENCE : struct receive_rssi_info preamble_rssi_info_details */ 1407 1408 1409 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 1410 1411 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1412 1413 Value of 0x80 indicates invalid. 1414 */ 1415 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000004c 1416 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 1417 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 1418 1419 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 1420 1421 RSSI of RX PPDU on chain 0 of extension 20 MHz 1422 bandwidth. 1423 1424 Value of 0x80 indicates invalid. 1425 */ 1426 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000004c 1427 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 1428 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 1429 1430 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 1431 1432 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 1433 bandwidth. 1434 1435 Value of 0x80 indicates invalid. 1436 */ 1437 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000004c 1438 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 1439 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 1440 1441 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 1442 1443 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 1444 bandwidth. 1445 1446 Value of 0x80 indicates invalid. 1447 */ 1448 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000004c 1449 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 1450 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 1451 1452 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 1453 1454 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 1455 bandwidth. 1456 1457 Value of 0x80 indicates invalid. 1458 */ 1459 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000050 1460 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 1461 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 1462 1463 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 1464 1465 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 1466 MHz bandwidth. 1467 1468 Value of 0x80 indicates invalid. 1469 */ 1470 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000050 1471 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 1472 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 1473 1474 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 1475 1476 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 1477 MHz bandwidth. 1478 1479 Value of 0x80 indicates invalid. 1480 */ 1481 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000050 1482 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 1483 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 1484 1485 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 1486 1487 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 1488 bandwidth. 1489 1490 Value of 0x80 indicates invalid. 1491 */ 1492 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000050 1493 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 1494 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 1495 1496 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 1497 1498 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 1499 1500 Value of 0x80 indicates invalid. 1501 */ 1502 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000054 1503 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 1504 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 1505 1506 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 1507 1508 RSSI of RX PPDU on chain 1 of extension 20 MHz 1509 bandwidth. 1510 1511 Value of 0x80 indicates invalid. 1512 */ 1513 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000054 1514 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 1515 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 1516 1517 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 1518 1519 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 1520 bandwidth. 1521 1522 Value of 0x80 indicates invalid. 1523 */ 1524 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000054 1525 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 1526 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 1527 1528 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 1529 1530 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 1531 bandwidth. 1532 1533 Value of 0x80 indicates invalid. 1534 */ 1535 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000054 1536 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 1537 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 1538 1539 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 1540 1541 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 1542 bandwidth. 1543 1544 Value of 0x80 indicates invalid. 1545 */ 1546 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000058 1547 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 1548 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 1549 1550 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 1551 1552 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 1553 MHz bandwidth. 1554 1555 Value of 0x80 indicates invalid. 1556 */ 1557 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000058 1558 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 1559 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 1560 1561 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 1562 1563 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 1564 MHz bandwidth. 1565 1566 Value of 0x80 indicates invalid. 1567 */ 1568 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000058 1569 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 1570 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 1571 1572 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 1573 1574 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 1575 bandwidth. 1576 1577 Value of 0x80 indicates invalid. 1578 */ 1579 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000058 1580 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 1581 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 1582 1583 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 1584 1585 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 1586 1587 Value of 0x80 indicates invalid. 1588 */ 1589 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000005c 1590 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 1591 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 1592 1593 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 1594 1595 RSSI of RX PPDU on chain 2 of extension 20 MHz 1596 bandwidth. 1597 1598 Value of 0x80 indicates invalid. 1599 */ 1600 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000005c 1601 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 1602 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 1603 1604 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 1605 1606 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 1607 bandwidth. 1608 1609 Value of 0x80 indicates invalid. 1610 */ 1611 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000005c 1612 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 1613 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 1614 1615 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 1616 1617 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 1618 bandwidth. 1619 1620 Value of 0x80 indicates invalid. 1621 */ 1622 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000005c 1623 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 1624 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 1625 1626 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 1627 1628 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 1629 bandwidth. 1630 1631 Value of 0x80 indicates invalid. 1632 */ 1633 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000060 1634 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 1635 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 1636 1637 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 1638 1639 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 1640 MHz bandwidth. 1641 1642 Value of 0x80 indicates invalid. 1643 */ 1644 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000060 1645 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 1646 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 1647 1648 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 1649 1650 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 1651 MHz bandwidth. 1652 1653 Value of 0x80 indicates invalid. 1654 */ 1655 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000060 1656 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 1657 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 1658 1659 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 1660 1661 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 1662 bandwidth. 1663 1664 Value of 0x80 indicates invalid. 1665 */ 1666 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000060 1667 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 1668 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 1669 1670 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 1671 1672 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 1673 1674 Value of 0x80 indicates invalid. 1675 */ 1676 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000064 1677 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 1678 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 1679 1680 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 1681 1682 RSSI of RX PPDU on chain 3 of extension 20 MHz 1683 bandwidth. 1684 1685 Value of 0x80 indicates invalid. 1686 */ 1687 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000064 1688 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 1689 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 1690 1691 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 1692 1693 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 1694 bandwidth. 1695 1696 Value of 0x80 indicates invalid. 1697 */ 1698 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000064 1699 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 1700 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 1701 1702 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 1703 1704 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 1705 bandwidth. 1706 1707 Value of 0x80 indicates invalid. 1708 */ 1709 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000064 1710 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 1711 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 1712 1713 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 1714 1715 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 1716 bandwidth. 1717 1718 Value of 0x80 indicates invalid. 1719 */ 1720 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000068 1721 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 1722 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 1723 1724 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 1725 1726 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 1727 MHz bandwidth. 1728 1729 Value of 0x80 indicates invalid. 1730 */ 1731 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000068 1732 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 1733 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 1734 1735 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 1736 1737 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 1738 MHz bandwidth. 1739 1740 Value of 0x80 indicates invalid. 1741 */ 1742 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000068 1743 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 1744 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 1745 1746 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 1747 1748 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 1749 bandwidth. 1750 1751 Value of 0x80 indicates invalid. 1752 */ 1753 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000068 1754 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 1755 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 1756 1757 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 1758 1759 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 1760 1761 Value of 0x80 indicates invalid. 1762 */ 1763 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000006c 1764 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 1765 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 1766 1767 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 1768 1769 RSSI of RX PPDU on chain 4 of extension 20 MHz 1770 bandwidth. 1771 1772 Value of 0x80 indicates invalid. 1773 */ 1774 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000006c 1775 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 1776 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 1777 1778 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 1779 1780 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 1781 bandwidth. 1782 1783 Value of 0x80 indicates invalid. 1784 */ 1785 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000006c 1786 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 1787 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 1788 1789 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 1790 1791 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 1792 bandwidth. 1793 1794 Value of 0x80 indicates invalid. 1795 */ 1796 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000006c 1797 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 1798 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 1799 1800 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 1801 1802 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 1803 bandwidth. 1804 1805 Value of 0x80 indicates invalid. 1806 */ 1807 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000070 1808 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 1809 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 1810 1811 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 1812 1813 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 1814 MHz bandwidth. 1815 1816 Value of 0x80 indicates invalid. 1817 */ 1818 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000070 1819 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 1820 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 1821 1822 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 1823 1824 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 1825 MHz bandwidth. 1826 1827 Value of 0x80 indicates invalid. 1828 */ 1829 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000070 1830 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 1831 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 1832 1833 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 1834 1835 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 1836 bandwidth. 1837 1838 Value of 0x80 indicates invalid. 1839 */ 1840 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000070 1841 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 1842 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 1843 1844 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 1845 1846 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1847 1848 Value of 0x80 indicates invalid. 1849 */ 1850 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000074 1851 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 1852 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 1853 1854 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 1855 1856 RSSI of RX PPDU on chain 5 of extension 20 MHz 1857 bandwidth. 1858 1859 Value of 0x80 indicates invalid. 1860 */ 1861 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000074 1862 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 1863 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 1864 1865 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 1866 1867 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 1868 bandwidth. 1869 1870 Value of 0x80 indicates invalid. 1871 */ 1872 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000074 1873 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 1874 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 1875 1876 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 1877 1878 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 1879 bandwidth. 1880 1881 Value of 0x80 indicates invalid. 1882 */ 1883 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000074 1884 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 1885 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 1886 1887 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 1888 1889 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 1890 bandwidth. 1891 1892 Value of 0x80 indicates invalid. 1893 */ 1894 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000078 1895 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1896 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1897 1898 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1899 1900 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1901 MHz bandwidth. 1902 1903 Value of 0x80 indicates invalid. 1904 */ 1905 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000078 1906 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1907 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1908 1909 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1910 1911 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1912 MHz bandwidth. 1913 1914 Value of 0x80 indicates invalid. 1915 */ 1916 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000078 1917 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1918 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1919 1920 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1921 1922 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1923 bandwidth. 1924 1925 Value of 0x80 indicates invalid. 1926 */ 1927 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000078 1928 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1929 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1930 1931 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1932 1933 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1934 1935 Value of 0x80 indicates invalid. 1936 */ 1937 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000007c 1938 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1939 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1940 1941 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1942 1943 RSSI of RX PPDU on chain 6 of extension 20 MHz 1944 bandwidth. 1945 1946 Value of 0x80 indicates invalid. 1947 */ 1948 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000007c 1949 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1950 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1951 1952 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1953 1954 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1955 bandwidth. 1956 1957 Value of 0x80 indicates invalid. 1958 */ 1959 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000007c 1960 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1961 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1962 1963 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1964 1965 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1966 bandwidth. 1967 1968 Value of 0x80 indicates invalid. 1969 */ 1970 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000007c 1971 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1972 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1973 1974 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1975 1976 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1977 bandwidth. 1978 1979 Value of 0x80 indicates invalid. 1980 */ 1981 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000080 1982 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1983 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1984 1985 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1986 1987 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1988 MHz bandwidth. 1989 1990 Value of 0x80 indicates invalid. 1991 */ 1992 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000080 1993 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1994 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1995 1996 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1997 1998 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1999 MHz bandwidth. 2000 2001 Value of 0x80 indicates invalid. 2002 */ 2003 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000080 2004 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 2005 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 2006 2007 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 2008 2009 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 2010 bandwidth. 2011 2012 Value of 0x80 indicates invalid. 2013 */ 2014 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000080 2015 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 2016 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 2017 2018 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 2019 2020 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 2021 2022 Value of 0x80 indicates invalid. 2023 */ 2024 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000084 2025 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 2026 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 2027 2028 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 2029 2030 RSSI of RX PPDU on chain 7 of extension 20 MHz 2031 bandwidth. 2032 2033 Value of 0x80 indicates invalid. 2034 */ 2035 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000084 2036 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 2037 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 2038 2039 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 2040 2041 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 2042 bandwidth. 2043 2044 Value of 0x80 indicates invalid. 2045 */ 2046 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000084 2047 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 2048 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 2049 2050 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 2051 2052 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 2053 bandwidth. 2054 2055 Value of 0x80 indicates invalid. 2056 */ 2057 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000084 2058 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 2059 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 2060 2061 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 2062 2063 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 2064 bandwidth. 2065 2066 Value of 0x80 indicates invalid. 2067 */ 2068 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000088 2069 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 2070 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 2071 2072 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 2073 2074 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 2075 MHz bandwidth. 2076 2077 Value of 0x80 indicates invalid. 2078 */ 2079 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000088 2080 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 2081 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 2082 2083 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 2084 2085 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 2086 MHz bandwidth. 2087 2088 Value of 0x80 indicates invalid. 2089 */ 2090 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000088 2091 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 2092 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 2093 2094 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 2095 2096 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 2097 bandwidth. 2098 2099 Value of 0x80 indicates invalid. 2100 */ 2101 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000088 2102 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 2103 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 2104 2105 /* Description PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB 2106 2107 Combined pre_rssi of all chains. Based on primary 2108 channel RSSI. 2109 2110 2111 2112 RSSI is reported as 8b signed values. Nominally value is 2113 in dB units above or below the noisefloor(minCCApwr). 2114 2115 2116 2117 The resolution can be: 2118 2119 1dB or 0.5dB. This is statically configured within the 2120 PHY and MAC 2121 2122 2123 2124 In case of 1dB, the Range is: 2125 2126 -128dB to 127dB 2127 2128 2129 2130 In case of 0.5dB, the Range is: 2131 2132 -64dB to 63.5dB 2133 2134 2135 2136 <legal all> 2137 */ 2138 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET 0x0000008c 2139 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB 0 2140 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK 0x000000ff 2141 2142 /* Description PHYRX_RSSI_LEGACY_35_RSSI_COMB 2143 2144 Combined rssi of all chains. Based on primary channel 2145 RSSI. 2146 2147 2148 2149 RSSI is reported as 8b signed values. Nominally value is 2150 in dB units above or below the noisefloor(minCCApwr). 2151 2152 2153 2154 The resolution can be: 2155 2156 1dB or 0.5dB. This is statically configured within the 2157 PHY and MAC 2158 2159 2160 2161 In case of 1dB, the Range is: 2162 2163 -128dB to 127dB 2164 2165 2166 2167 In case of 0.5dB, the Range is: 2168 2169 -64dB to 63.5dB 2170 2171 2172 2173 <legal all> 2174 */ 2175 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET 0x0000008c 2176 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB 8 2177 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK 0x0000ff00 2178 2179 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB 2180 2181 Combined pre_rssi of all chains, but normalized back to 2182 a single chain. This avoids PDG from having to evaluate this 2183 in combination with receive chain mask and perform all kinds 2184 of pre-processing algorithms. 2185 2186 2187 2188 Based on primary channel RSSI. 2189 2190 2191 2192 RSSI is reported as 8b signed values. Nominally value is 2193 in dB units above or below the noisefloor(minCCApwr). 2194 2195 2196 2197 The resolution can be: 2198 2199 1dB or 0.5dB. This is statically configured within the 2200 PHY and MAC 2201 2202 2203 2204 In case of 1dB, the Range is: 2205 2206 -128dB to 127dB 2207 2208 2209 2210 In case of 0.5dB, the Range is: 2211 2212 -64dB to 63.5dB 2213 2214 2215 2216 <legal all> 2217 */ 2218 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_OFFSET 0x0000008c 2219 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_LSB 16 2220 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_MASK 0x00ff0000 2221 2222 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB 2223 2224 Combined rssi of all chains, but normalized back to a 2225 single chain. This avoids PDG from having to evaluate this 2226 in combination with receive chain mask and perform all kinds 2227 of pre-processing algorithms. 2228 2229 2230 2231 Based on primary channel RSSI. 2232 2233 2234 2235 RSSI is reported as 8b signed values. Nominally value is 2236 in dB units above or below the noisefloor(minCCApwr). 2237 2238 2239 2240 The resolution can be: 2241 2242 1dB or 0.5dB. This is statically configured within the 2243 PHY and MAC 2244 2245 In case of 1dB, the Range is: 2246 2247 -128dB to 127dB 2248 2249 2250 2251 In case of 0.5dB, the Range is: 2252 2253 -64dB to 63.5dB 2254 2255 2256 2257 <legal all> 2258 */ 2259 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_OFFSET 0x0000008c 2260 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_LSB 24 2261 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_MASK 0xff000000 2262 2263 /* Description PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU 2264 2265 Combined rssi of all chains, based on active 2266 RUs/subchannels, a.k.a. rssi_pkt_bw_mac 2267 2268 2269 2270 RSSI is reported as 8b signed values. Nominally value is 2271 in dB units above or below the noisefloor(minCCApwr). 2272 2273 2274 2275 The resolution can be: 2276 2277 1dB or 0.5dB. This is statically configured within the 2278 PHY and MAC 2279 2280 2281 2282 In case of 1dB, the Range is: 2283 2284 -128dB to 127dB 2285 2286 2287 2288 In case of 0.5dB, the Range is: 2289 2290 -64dB to 63.5dB 2291 2292 2293 2294 When packet BW is 20 MHz, 2295 2296 rssi_comb_ppdu = rssi_comb. 2297 2298 2299 2300 When packet BW > 20 MHz, 2301 2302 rssi_comb < rssi_comb_ppdu because rssi_comb only 2303 includes power of primary 20 MHz while rssi_comb_ppdu 2304 includes power of active RUs/subchannels. 2305 2306 2307 2308 <legal all> 2309 */ 2310 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_OFFSET 0x00000090 2311 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_LSB 0 2312 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_MASK 0x000000ff 2313 2314 /* Description PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET 2315 2316 Offset between 'dB' and 'dBm' values. SW can use this 2317 value to convert RSSI 'dBm' values back to 'dB,' and report 2318 both the values. 2319 2320 2321 2322 When rssi_db_to_dbm_offset = 0, 2323 2324 all rssi_xxx fields are defined in dB. 2325 2326 2327 2328 When rssi_db_to_dbm_offset is a large negative value, 2329 all rssi_xxx fields are defined in dBm. 2330 2331 2332 2333 <legal all> 2334 */ 2335 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_OFFSET 0x00000090 2336 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_LSB 8 2337 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_MASK 0x0000ff00 2338 2339 /* Description PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE 2340 2341 RSSI to be used by HWSCH for transmit (power) selection 2342 during an SR opportunity, reported as an 8-bit signed value 2343 2344 2345 2346 The resolution can be: 2347 2348 1dB or 0.5dB. This is statically configured within the 2349 PHY and MAC 2350 2351 2352 2353 In case of 1dB, the Range is: 2354 2355 -128dB to 127dB 2356 2357 2358 2359 In case of 0.5dB, the Range is: 2360 2361 -64dB to 63.5dB 2362 2363 2364 2365 As per 802.11ax draft 3.3 subsubclauses 27.10.2.2/3, for 2366 OBSS PD spatial reuse, the received signal strength level 2367 should be measured from the L-STF or L-LTF (but not L-SIG), 2368 just as measured to indicate CCA. 2369 2370 2371 2372 Also, as per 802.11ax draft 3.3, for OBSS PD spatial 2373 reuse, MAC should compare this value with its programmed 2374 OBSS_PDlevel scaled from 20 MHz to the Rx PPDU bandwidth. 2375 Since MAC does not do this scaling, PHY is instead expected 2376 to normalize the reported RSSI to 20 MHz. 2377 2378 2379 2380 Also as per 802.11ax draft 3.3 subsubclause 27.10.3.2, 2381 for SRP spatial reuse, the received power level should be 2382 measured from the L-STF or L-LTF (but not L-SIG) and 2383 normalized to 20 MHz. 2384 2385 <legal all> 2386 */ 2387 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_OFFSET 0x00000090 2388 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_LSB 16 2389 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_MASK 0x00ff0000 2390 2391 /* Description PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP 2392 2393 RSSI to be used by PDG for transmit (power) selection 2394 during trigger response, reported as an 8-bit signed value 2395 2396 2397 2398 The resolution can be: 2399 2400 1dB or 0.5dB. This is statically configured within the 2401 PHY and MAC 2402 2403 2404 2405 In case of 1dB, the Range is: 2406 2407 -128dB to 127dB 2408 2409 2410 2411 In case of 0.5dB, the Range is: 2412 2413 -64dB to 63.5dB 2414 2415 2416 2417 As per 802.11ax draft 3.3 subsubclauses 28.3.14.2, for 2418 trigger response, the received power should be measured from 2419 the non-HE portion of the preamble of the PPDU containing 2420 the trigger, normalized to 20 MHz, averaged over the 2421 antennas over which the average pathloss is being computed. 2422 2423 <legal all> 2424 */ 2425 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_OFFSET 0x00000090 2426 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_LSB 24 2427 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_MASK 0xff000000 2428 2429 2430 #endif // _PHYRX_RSSI_LEGACY_H_ 2431