xref: /wlan-driver/fw-api/hw/qca6750/v1/reo_flush_cache.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
5*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
6*5113495bSYour Name  * above copyright notice and this permission notice appear in all
7*5113495bSYour Name  * copies.
8*5113495bSYour Name  *
9*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
17*5113495bSYour Name  */
18*5113495bSYour Name 
19*5113495bSYour Name //
20*5113495bSYour Name // DO NOT EDIT!  This file is automatically generated
21*5113495bSYour Name //               These definitions are tied to a particular hardware layout
22*5113495bSYour Name 
23*5113495bSYour Name 
24*5113495bSYour Name #ifndef _REO_FLUSH_CACHE_H_
25*5113495bSYour Name #define _REO_FLUSH_CACHE_H_
26*5113495bSYour Name #if !defined(__ASSEMBLER__)
27*5113495bSYour Name #endif
28*5113495bSYour Name 
29*5113495bSYour Name #include "uniform_reo_cmd_header.h"
30*5113495bSYour Name 
31*5113495bSYour Name // ################ START SUMMARY #################
32*5113495bSYour Name //
33*5113495bSYour Name //	Dword	Fields
34*5113495bSYour Name //	0	struct uniform_reo_cmd_header cmd_header;
35*5113495bSYour Name //	1	flush_addr_31_0[31:0]
36*5113495bSYour Name //	2	flush_addr_39_32[7:0], forward_all_mpdus_in_queue[8], release_cache_block_index[9], cache_block_resource_index[11:10], flush_without_invalidate[12], block_cache_usage_after_flush[13], flush_entire_cache[14], reserved_2b[31:15]
37*5113495bSYour Name //	3	reserved_3a[31:0]
38*5113495bSYour Name //	4	reserved_4a[31:0]
39*5113495bSYour Name //	5	reserved_5a[31:0]
40*5113495bSYour Name //	6	reserved_6a[31:0]
41*5113495bSYour Name //	7	reserved_7a[31:0]
42*5113495bSYour Name //	8	reserved_8a[31:0]
43*5113495bSYour Name //
44*5113495bSYour Name // ################ END SUMMARY #################
45*5113495bSYour Name 
46*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_CACHE 9
47*5113495bSYour Name 
48*5113495bSYour Name struct reo_flush_cache {
49*5113495bSYour Name     struct            uniform_reo_cmd_header                       cmd_header;
50*5113495bSYour Name              uint32_t flush_addr_31_0                 : 32; //[31:0]
51*5113495bSYour Name              uint32_t flush_addr_39_32                :  8, //[7:0]
52*5113495bSYour Name                       forward_all_mpdus_in_queue      :  1, //[8]
53*5113495bSYour Name                       release_cache_block_index       :  1, //[9]
54*5113495bSYour Name                       cache_block_resource_index      :  2, //[11:10]
55*5113495bSYour Name                       flush_without_invalidate        :  1, //[12]
56*5113495bSYour Name                       block_cache_usage_after_flush   :  1, //[13]
57*5113495bSYour Name                       flush_entire_cache              :  1, //[14]
58*5113495bSYour Name                       reserved_2b                     : 17; //[31:15]
59*5113495bSYour Name              uint32_t reserved_3a                     : 32; //[31:0]
60*5113495bSYour Name              uint32_t reserved_4a                     : 32; //[31:0]
61*5113495bSYour Name              uint32_t reserved_5a                     : 32; //[31:0]
62*5113495bSYour Name              uint32_t reserved_6a                     : 32; //[31:0]
63*5113495bSYour Name              uint32_t reserved_7a                     : 32; //[31:0]
64*5113495bSYour Name              uint32_t reserved_8a                     : 32; //[31:0]
65*5113495bSYour Name };
66*5113495bSYour Name 
67*5113495bSYour Name /*
68*5113495bSYour Name 
69*5113495bSYour Name struct uniform_reo_cmd_header cmd_header
70*5113495bSYour Name 
71*5113495bSYour Name 			Consumer: REO
72*5113495bSYour Name 
73*5113495bSYour Name 			Producer: SW
74*5113495bSYour Name 
75*5113495bSYour Name 
76*5113495bSYour Name 
77*5113495bSYour Name 			Details for command execution tracking purposes.
78*5113495bSYour Name 
79*5113495bSYour Name flush_addr_31_0
80*5113495bSYour Name 
81*5113495bSYour Name 			Consumer: REO
82*5113495bSYour Name 
83*5113495bSYour Name 			Producer: SW
84*5113495bSYour Name 
85*5113495bSYour Name 
86*5113495bSYour Name 
87*5113495bSYour Name 			Address (lower 32 bits) of the descriptor to flush
88*5113495bSYour Name 
89*5113495bSYour Name 			<legal all>
90*5113495bSYour Name 
91*5113495bSYour Name flush_addr_39_32
92*5113495bSYour Name 
93*5113495bSYour Name 			Consumer: REO
94*5113495bSYour Name 
95*5113495bSYour Name 			Producer: SW
96*5113495bSYour Name 
97*5113495bSYour Name 
98*5113495bSYour Name 
99*5113495bSYour Name 			Address (upper 8 bits) of the descriptor to flush
100*5113495bSYour Name 
101*5113495bSYour Name 			<legal all>
102*5113495bSYour Name 
103*5113495bSYour Name forward_all_mpdus_in_queue
104*5113495bSYour Name 
105*5113495bSYour Name 			Is only allowed to be set when the flush address
106*5113495bSYour Name 			corresponds with a REO descriptor.
107*5113495bSYour Name 
108*5113495bSYour Name 
109*5113495bSYour Name 
110*5113495bSYour Name 			When set, REO shall first forward all the MPDUs held in
111*5113495bSYour Name 			the indicated re-order queue, before flushing the descriptor
112*5113495bSYour Name 			from the cache.
113*5113495bSYour Name 
114*5113495bSYour Name 			<legal all>
115*5113495bSYour Name 
116*5113495bSYour Name release_cache_block_index
117*5113495bSYour Name 
118*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
119*5113495bSYour Name 
120*5113495bSYour Name 
121*5113495bSYour Name 
122*5113495bSYour Name 			If SW has previously used a blocking resource that it
123*5113495bSYour Name 			now wants to re-use for this command, this bit shall be set.
124*5113495bSYour Name 			It prevents SW from having to send a separate
125*5113495bSYour Name 			REO_UNBLOCK_CACHE command.
126*5113495bSYour Name 
127*5113495bSYour Name 
128*5113495bSYour Name 
129*5113495bSYour Name 			When set, HW will first release the blocking resource
130*5113495bSYour Name 			(indicated in field 'Cache_block_resouce_index') before this
131*5113495bSYour Name 			command gets executed.
132*5113495bSYour Name 
133*5113495bSYour Name 			If that resource was already unblocked, this will be
134*5113495bSYour Name 			considered an error. This command will not be executed, and
135*5113495bSYour Name 			an error shall be returned.
136*5113495bSYour Name 
137*5113495bSYour Name 			<legal all>
138*5113495bSYour Name 
139*5113495bSYour Name cache_block_resource_index
140*5113495bSYour Name 
141*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
142*5113495bSYour Name 
143*5113495bSYour Name 
144*5113495bSYour Name 
145*5113495bSYour Name 			Indicates which of the four blocking resources in REO
146*5113495bSYour Name 			will be assigned for managing the blocking of this
147*5113495bSYour Name 			(descriptor) address
148*5113495bSYour Name 
149*5113495bSYour Name 			<legal all>
150*5113495bSYour Name 
151*5113495bSYour Name flush_without_invalidate
152*5113495bSYour Name 
153*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
154*5113495bSYour Name 
155*5113495bSYour Name 
156*5113495bSYour Name 
157*5113495bSYour Name 			When set, REO shall flush the cache line contents from
158*5113495bSYour Name 			the cache, but there is NO need to invalidate the cache line
159*5113495bSYour Name 			entry... The contents in the cache can be maintained. This
160*5113495bSYour Name 			feature can be used by SW (and DV) to get a current snapshot
161*5113495bSYour Name 			of the contents in the cache
162*5113495bSYour Name 
163*5113495bSYour Name 
164*5113495bSYour Name 
165*5113495bSYour Name 			<legal all>
166*5113495bSYour Name 
167*5113495bSYour Name block_cache_usage_after_flush
168*5113495bSYour Name 
169*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
170*5113495bSYour Name 
171*5113495bSYour Name 
172*5113495bSYour Name 
173*5113495bSYour Name 			When set, REO shall block any cache accesses to this
174*5113495bSYour Name 			address till explicitly unblocked.
175*5113495bSYour Name 
176*5113495bSYour Name 
177*5113495bSYour Name 
178*5113495bSYour Name 			Whenever SW sets this bit, SW shall also set bit
179*5113495bSYour Name 			'Forward_all_mpdus_in_queue' to ensure all packets are
180*5113495bSYour Name 			flushed out in order to make sure this queue desc is not in
181*5113495bSYour Name 			one of the aging link lists. In case SW does not want to
182*5113495bSYour Name 			flush the MPDUs in the queue, see the recipe description
183*5113495bSYour Name 			below this TLV definition.
184*5113495bSYour Name 
185*5113495bSYour Name 
186*5113495bSYour Name 
187*5113495bSYour Name 			The 'blocking' index to be used for this is indicated in
188*5113495bSYour Name 			field 'cache_block_resource_index'. If SW had previously
189*5113495bSYour Name 			used this blocking resource and was not freed up yet, SW
190*5113495bSYour Name 			shall first unblock that index (by setting bit
191*5113495bSYour Name 			Release_cache_block_index) or use an unblock command.
192*5113495bSYour Name 
193*5113495bSYour Name 
194*5113495bSYour Name 
195*5113495bSYour Name 			If the resource indicated here was already blocked (and
196*5113495bSYour Name 			did not get unblocked in this command), it is considered an
197*5113495bSYour Name 			error scenario...
198*5113495bSYour Name 
199*5113495bSYour Name 			No flush shall happen. The status for this command shall
200*5113495bSYour Name 			indicate error.
201*5113495bSYour Name 
202*5113495bSYour Name 
203*5113495bSYour Name 
204*5113495bSYour Name 			<legal all>
205*5113495bSYour Name 
206*5113495bSYour Name flush_entire_cache
207*5113495bSYour Name 
208*5113495bSYour Name 			When set, the entire cache shall be flushed. The entire
209*5113495bSYour Name 			cache will also remain blocked, till the
210*5113495bSYour Name 			'REO_UNBLOCK_COMMAND' is received with bit unblock type set
211*5113495bSYour Name 			to unblock_cache. All other fields in this command are to be
212*5113495bSYour Name 			ignored.
213*5113495bSYour Name 
214*5113495bSYour Name 
215*5113495bSYour Name 
216*5113495bSYour Name 			Note that flushing the entire cache has no changes to
217*5113495bSYour Name 			the current settings of the blocking resource settings
218*5113495bSYour Name 
219*5113495bSYour Name 
220*5113495bSYour Name 
221*5113495bSYour Name 			<legal all>
222*5113495bSYour Name 
223*5113495bSYour Name reserved_2b
224*5113495bSYour Name 
225*5113495bSYour Name 			<legal 0>
226*5113495bSYour Name 
227*5113495bSYour Name reserved_3a
228*5113495bSYour Name 
229*5113495bSYour Name 			<legal 0>
230*5113495bSYour Name 
231*5113495bSYour Name reserved_4a
232*5113495bSYour Name 
233*5113495bSYour Name 			<legal 0>
234*5113495bSYour Name 
235*5113495bSYour Name reserved_5a
236*5113495bSYour Name 
237*5113495bSYour Name 			<legal 0>
238*5113495bSYour Name 
239*5113495bSYour Name reserved_6a
240*5113495bSYour Name 
241*5113495bSYour Name 			<legal 0>
242*5113495bSYour Name 
243*5113495bSYour Name reserved_7a
244*5113495bSYour Name 
245*5113495bSYour Name 			<legal 0>
246*5113495bSYour Name 
247*5113495bSYour Name reserved_8a
248*5113495bSYour Name 
249*5113495bSYour Name 			<legal 0>
250*5113495bSYour Name */
251*5113495bSYour Name 
252*5113495bSYour Name 
253*5113495bSYour Name  /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
254*5113495bSYour Name 
255*5113495bSYour Name 
256*5113495bSYour Name /* Description		REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER
257*5113495bSYour Name 
258*5113495bSYour Name 			Consumer: REO/SW/DEBUG
259*5113495bSYour Name 
260*5113495bSYour Name 			Producer: SW
261*5113495bSYour Name 
262*5113495bSYour Name 
263*5113495bSYour Name 
264*5113495bSYour Name 			This number can be used by SW to track, identify and
265*5113495bSYour Name 			link the created commands with the command statusses
266*5113495bSYour Name 
267*5113495bSYour Name 
268*5113495bSYour Name 
269*5113495bSYour Name 
270*5113495bSYour Name 
271*5113495bSYour Name 			<legal all>
272*5113495bSYour Name */
273*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET           0x00000000
274*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_LSB              0
275*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_MASK             0x0000ffff
276*5113495bSYour Name 
277*5113495bSYour Name /* Description		REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED
278*5113495bSYour Name 
279*5113495bSYour Name 			Consumer: REO
280*5113495bSYour Name 
281*5113495bSYour Name 			Producer: SW
282*5113495bSYour Name 
283*5113495bSYour Name 
284*5113495bSYour Name 
285*5113495bSYour Name 			<enum 0 NoStatus> REO does not need to generate a status
286*5113495bSYour Name 			TLV for the execution of this command
287*5113495bSYour Name 
288*5113495bSYour Name 			<enum 1 StatusRequired> REO shall generate a status TLV
289*5113495bSYour Name 			for the execution of this command
290*5113495bSYour Name 
291*5113495bSYour Name 
292*5113495bSYour Name 
293*5113495bSYour Name 			<legal all>
294*5113495bSYour Name */
295*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET      0x00000000
296*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB         16
297*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK        0x00010000
298*5113495bSYour Name 
299*5113495bSYour Name /* Description		REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A
300*5113495bSYour Name 
301*5113495bSYour Name 			<legal 0>
302*5113495bSYour Name */
303*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_OFFSET              0x00000000
304*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_LSB                 17
305*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_MASK                0xfffe0000
306*5113495bSYour Name 
307*5113495bSYour Name /* Description		REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0
308*5113495bSYour Name 
309*5113495bSYour Name 			Consumer: REO
310*5113495bSYour Name 
311*5113495bSYour Name 			Producer: SW
312*5113495bSYour Name 
313*5113495bSYour Name 
314*5113495bSYour Name 
315*5113495bSYour Name 			Address (lower 32 bits) of the descriptor to flush
316*5113495bSYour Name 
317*5113495bSYour Name 			<legal all>
318*5113495bSYour Name */
319*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_OFFSET                     0x00000004
320*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_LSB                        0
321*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_MASK                       0xffffffff
322*5113495bSYour Name 
323*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32
324*5113495bSYour Name 
325*5113495bSYour Name 			Consumer: REO
326*5113495bSYour Name 
327*5113495bSYour Name 			Producer: SW
328*5113495bSYour Name 
329*5113495bSYour Name 
330*5113495bSYour Name 
331*5113495bSYour Name 			Address (upper 8 bits) of the descriptor to flush
332*5113495bSYour Name 
333*5113495bSYour Name 			<legal all>
334*5113495bSYour Name */
335*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_OFFSET                    0x00000008
336*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_LSB                       0
337*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_MASK                      0x000000ff
338*5113495bSYour Name 
339*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE
340*5113495bSYour Name 
341*5113495bSYour Name 			Is only allowed to be set when the flush address
342*5113495bSYour Name 			corresponds with a REO descriptor.
343*5113495bSYour Name 
344*5113495bSYour Name 
345*5113495bSYour Name 
346*5113495bSYour Name 			When set, REO shall first forward all the MPDUs held in
347*5113495bSYour Name 			the indicated re-order queue, before flushing the descriptor
348*5113495bSYour Name 			from the cache.
349*5113495bSYour Name 
350*5113495bSYour Name 			<legal all>
351*5113495bSYour Name */
352*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_OFFSET          0x00000008
353*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_LSB             8
354*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_MASK            0x00000100
355*5113495bSYour Name 
356*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX
357*5113495bSYour Name 
358*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
359*5113495bSYour Name 
360*5113495bSYour Name 
361*5113495bSYour Name 
362*5113495bSYour Name 			If SW has previously used a blocking resource that it
363*5113495bSYour Name 			now wants to re-use for this command, this bit shall be set.
364*5113495bSYour Name 			It prevents SW from having to send a separate
365*5113495bSYour Name 			REO_UNBLOCK_CACHE command.
366*5113495bSYour Name 
367*5113495bSYour Name 
368*5113495bSYour Name 
369*5113495bSYour Name 			When set, HW will first release the blocking resource
370*5113495bSYour Name 			(indicated in field 'Cache_block_resouce_index') before this
371*5113495bSYour Name 			command gets executed.
372*5113495bSYour Name 
373*5113495bSYour Name 			If that resource was already unblocked, this will be
374*5113495bSYour Name 			considered an error. This command will not be executed, and
375*5113495bSYour Name 			an error shall be returned.
376*5113495bSYour Name 
377*5113495bSYour Name 			<legal all>
378*5113495bSYour Name */
379*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_OFFSET           0x00000008
380*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_LSB              9
381*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_MASK             0x00000200
382*5113495bSYour Name 
383*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX
384*5113495bSYour Name 
385*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
386*5113495bSYour Name 
387*5113495bSYour Name 
388*5113495bSYour Name 
389*5113495bSYour Name 			Indicates which of the four blocking resources in REO
390*5113495bSYour Name 			will be assigned for managing the blocking of this
391*5113495bSYour Name 			(descriptor) address
392*5113495bSYour Name 
393*5113495bSYour Name 			<legal all>
394*5113495bSYour Name */
395*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_OFFSET          0x00000008
396*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_LSB             10
397*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_MASK            0x00000c00
398*5113495bSYour Name 
399*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE
400*5113495bSYour Name 
401*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
402*5113495bSYour Name 
403*5113495bSYour Name 
404*5113495bSYour Name 
405*5113495bSYour Name 			When set, REO shall flush the cache line contents from
406*5113495bSYour Name 			the cache, but there is NO need to invalidate the cache line
407*5113495bSYour Name 			entry... The contents in the cache can be maintained. This
408*5113495bSYour Name 			feature can be used by SW (and DV) to get a current snapshot
409*5113495bSYour Name 			of the contents in the cache
410*5113495bSYour Name 
411*5113495bSYour Name 
412*5113495bSYour Name 
413*5113495bSYour Name 			<legal all>
414*5113495bSYour Name */
415*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_OFFSET            0x00000008
416*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_LSB               12
417*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_MASK              0x00001000
418*5113495bSYour Name 
419*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH
420*5113495bSYour Name 
421*5113495bSYour Name 			Field not valid when Flush_entire_cache is set.
422*5113495bSYour Name 
423*5113495bSYour Name 
424*5113495bSYour Name 
425*5113495bSYour Name 			When set, REO shall block any cache accesses to this
426*5113495bSYour Name 			address till explicitly unblocked.
427*5113495bSYour Name 
428*5113495bSYour Name 
429*5113495bSYour Name 
430*5113495bSYour Name 			Whenever SW sets this bit, SW shall also set bit
431*5113495bSYour Name 			'Forward_all_mpdus_in_queue' to ensure all packets are
432*5113495bSYour Name 			flushed out in order to make sure this queue desc is not in
433*5113495bSYour Name 			one of the aging link lists. In case SW does not want to
434*5113495bSYour Name 			flush the MPDUs in the queue, see the recipe description
435*5113495bSYour Name 			below this TLV definition.
436*5113495bSYour Name 
437*5113495bSYour Name 
438*5113495bSYour Name 
439*5113495bSYour Name 			The 'blocking' index to be used for this is indicated in
440*5113495bSYour Name 			field 'cache_block_resource_index'. If SW had previously
441*5113495bSYour Name 			used this blocking resource and was not freed up yet, SW
442*5113495bSYour Name 			shall first unblock that index (by setting bit
443*5113495bSYour Name 			Release_cache_block_index) or use an unblock command.
444*5113495bSYour Name 
445*5113495bSYour Name 
446*5113495bSYour Name 
447*5113495bSYour Name 			If the resource indicated here was already blocked (and
448*5113495bSYour Name 			did not get unblocked in this command), it is considered an
449*5113495bSYour Name 			error scenario...
450*5113495bSYour Name 
451*5113495bSYour Name 			No flush shall happen. The status for this command shall
452*5113495bSYour Name 			indicate error.
453*5113495bSYour Name 
454*5113495bSYour Name 
455*5113495bSYour Name 
456*5113495bSYour Name 			<legal all>
457*5113495bSYour Name */
458*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_OFFSET       0x00000008
459*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_LSB          13
460*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_MASK         0x00002000
461*5113495bSYour Name 
462*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE
463*5113495bSYour Name 
464*5113495bSYour Name 			When set, the entire cache shall be flushed. The entire
465*5113495bSYour Name 			cache will also remain blocked, till the
466*5113495bSYour Name 			'REO_UNBLOCK_COMMAND' is received with bit unblock type set
467*5113495bSYour Name 			to unblock_cache. All other fields in this command are to be
468*5113495bSYour Name 			ignored.
469*5113495bSYour Name 
470*5113495bSYour Name 
471*5113495bSYour Name 
472*5113495bSYour Name 			Note that flushing the entire cache has no changes to
473*5113495bSYour Name 			the current settings of the blocking resource settings
474*5113495bSYour Name 
475*5113495bSYour Name 
476*5113495bSYour Name 
477*5113495bSYour Name 			<legal all>
478*5113495bSYour Name */
479*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_OFFSET                  0x00000008
480*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_LSB                     14
481*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_MASK                    0x00004000
482*5113495bSYour Name 
483*5113495bSYour Name /* Description		REO_FLUSH_CACHE_2_RESERVED_2B
484*5113495bSYour Name 
485*5113495bSYour Name 			<legal 0>
486*5113495bSYour Name */
487*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_OFFSET                         0x00000008
488*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_LSB                            15
489*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_MASK                           0xffff8000
490*5113495bSYour Name 
491*5113495bSYour Name /* Description		REO_FLUSH_CACHE_3_RESERVED_3A
492*5113495bSYour Name 
493*5113495bSYour Name 			<legal 0>
494*5113495bSYour Name */
495*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_OFFSET                         0x0000000c
496*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_LSB                            0
497*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_MASK                           0xffffffff
498*5113495bSYour Name 
499*5113495bSYour Name /* Description		REO_FLUSH_CACHE_4_RESERVED_4A
500*5113495bSYour Name 
501*5113495bSYour Name 			<legal 0>
502*5113495bSYour Name */
503*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_OFFSET                         0x00000010
504*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_LSB                            0
505*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_MASK                           0xffffffff
506*5113495bSYour Name 
507*5113495bSYour Name /* Description		REO_FLUSH_CACHE_5_RESERVED_5A
508*5113495bSYour Name 
509*5113495bSYour Name 			<legal 0>
510*5113495bSYour Name */
511*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_OFFSET                         0x00000014
512*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_LSB                            0
513*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_MASK                           0xffffffff
514*5113495bSYour Name 
515*5113495bSYour Name /* Description		REO_FLUSH_CACHE_6_RESERVED_6A
516*5113495bSYour Name 
517*5113495bSYour Name 			<legal 0>
518*5113495bSYour Name */
519*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_OFFSET                         0x00000018
520*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_LSB                            0
521*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_MASK                           0xffffffff
522*5113495bSYour Name 
523*5113495bSYour Name /* Description		REO_FLUSH_CACHE_7_RESERVED_7A
524*5113495bSYour Name 
525*5113495bSYour Name 			<legal 0>
526*5113495bSYour Name */
527*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_OFFSET                         0x0000001c
528*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_LSB                            0
529*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_MASK                           0xffffffff
530*5113495bSYour Name 
531*5113495bSYour Name /* Description		REO_FLUSH_CACHE_8_RESERVED_8A
532*5113495bSYour Name 
533*5113495bSYour Name 			<legal 0>
534*5113495bSYour Name */
535*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_OFFSET                         0x00000020
536*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_LSB                            0
537*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_MASK                           0xffffffff
538*5113495bSYour Name 
539*5113495bSYour Name 
540*5113495bSYour Name #endif // _REO_FLUSH_CACHE_H_
541