xref: /wlan-driver/fw-api/hw/qca6750/v1/reo_get_queue_stats.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _REO_GET_QUEUE_STATS_H_
25 #define _REO_GET_QUEUE_STATS_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "uniform_reo_cmd_header.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	struct uniform_reo_cmd_header cmd_header;
35 //	1	rx_reo_queue_desc_addr_31_0[31:0]
36 //	2	rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9]
37 //	3	reserved_3a[31:0]
38 //	4	reserved_4a[31:0]
39 //	5	reserved_5a[31:0]
40 //	6	reserved_6a[31:0]
41 //	7	reserved_7a[31:0]
42 //	8	reserved_8a[31:0]
43 //
44 // ################ END SUMMARY #################
45 
46 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9
47 
48 struct reo_get_queue_stats {
49     struct            uniform_reo_cmd_header                       cmd_header;
50              uint32_t rx_reo_queue_desc_addr_31_0     : 32; //[31:0]
51              uint32_t rx_reo_queue_desc_addr_39_32    :  8, //[7:0]
52                       clear_stats                     :  1, //[8]
53                       reserved_2a                     : 23; //[31:9]
54              uint32_t reserved_3a                     : 32; //[31:0]
55              uint32_t reserved_4a                     : 32; //[31:0]
56              uint32_t reserved_5a                     : 32; //[31:0]
57              uint32_t reserved_6a                     : 32; //[31:0]
58              uint32_t reserved_7a                     : 32; //[31:0]
59              uint32_t reserved_8a                     : 32; //[31:0]
60 };
61 
62 /*
63 
64 struct uniform_reo_cmd_header cmd_header
65 
66 			Consumer: REO
67 
68 			Producer: SW
69 
70 
71 
72 			Details for command execution tracking purposes.
73 
74 rx_reo_queue_desc_addr_31_0
75 
76 			Consumer: REO
77 
78 			Producer: SW
79 
80 
81 
82 			Address (lower 32 bits) of the REO queue descriptor
83 
84 			<legal all>
85 
86 rx_reo_queue_desc_addr_39_32
87 
88 			Consumer: REO
89 
90 			Producer: SW
91 
92 
93 
94 			Address (upper 8 bits) of the REO queue descriptor
95 
96 			<legal all>
97 
98 clear_stats
99 
100 			Clear stat settings....
101 
102 
103 
104 			<enum 0 no_clear> Do NOT clear the stats after
105 			generating the status
106 
107 			<enum 1 clear_the_stats> Clear the stats after
108 			generating the status.
109 
110 
111 
112 			The stats actually cleared are:
113 
114 			Timeout_count
115 
116 			Forward_due_to_bar_count
117 
118 			Duplicate_count
119 
120 			Frames_in_order_count
121 
122 			BAR_received_count
123 
124 			MPDU_Frames_processed_count
125 
126 			MSDU_Frames_processed_count
127 
128 			Total_processed_byte_count
129 
130 			Late_receive_MPDU_count
131 
132 			window_jump_2k
133 
134 			Hole_count
135 
136 			<legal 0-1>
137 
138 reserved_2a
139 
140 			<legal 0>
141 
142 reserved_3a
143 
144 			<legal 0>
145 
146 reserved_4a
147 
148 			<legal 0>
149 
150 reserved_5a
151 
152 			<legal 0>
153 
154 reserved_6a
155 
156 			<legal 0>
157 
158 reserved_7a
159 
160 			<legal 0>
161 
162 reserved_8a
163 
164 			<legal 0>
165 */
166 
167 
168  /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
169 
170 
171 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER
172 
173 			Consumer: REO/SW/DEBUG
174 
175 			Producer: SW
176 
177 
178 
179 			This number can be used by SW to track, identify and
180 			link the created commands with the command statusses
181 
182 
183 
184 
185 
186 			<legal all>
187 */
188 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET       0x00000000
189 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_LSB          0
190 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_MASK         0x0000ffff
191 
192 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED
193 
194 			Consumer: REO
195 
196 			Producer: SW
197 
198 
199 
200 			<enum 0 NoStatus> REO does not need to generate a status
201 			TLV for the execution of this command
202 
203 			<enum 1 StatusRequired> REO shall generate a status TLV
204 			for the execution of this command
205 
206 
207 
208 			<legal all>
209 */
210 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET  0x00000000
211 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB     16
212 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK    0x00010000
213 
214 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A
215 
216 			<legal 0>
217 */
218 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_OFFSET          0x00000000
219 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_LSB             17
220 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_MASK            0xfffe0000
221 
222 /* Description		REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0
223 
224 			Consumer: REO
225 
226 			Producer: SW
227 
228 
229 
230 			Address (lower 32 bits) of the REO queue descriptor
231 
232 			<legal all>
233 */
234 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET     0x00000004
235 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB        0
236 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK       0xffffffff
237 
238 /* Description		REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32
239 
240 			Consumer: REO
241 
242 			Producer: SW
243 
244 
245 
246 			Address (upper 8 bits) of the REO queue descriptor
247 
248 			<legal all>
249 */
250 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET    0x00000008
251 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB       0
252 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK      0x000000ff
253 
254 /* Description		REO_GET_QUEUE_STATS_2_CLEAR_STATS
255 
256 			Clear stat settings....
257 
258 
259 
260 			<enum 0 no_clear> Do NOT clear the stats after
261 			generating the status
262 
263 			<enum 1 clear_the_stats> Clear the stats after
264 			generating the status.
265 
266 
267 
268 			The stats actually cleared are:
269 
270 			Timeout_count
271 
272 			Forward_due_to_bar_count
273 
274 			Duplicate_count
275 
276 			Frames_in_order_count
277 
278 			BAR_received_count
279 
280 			MPDU_Frames_processed_count
281 
282 			MSDU_Frames_processed_count
283 
284 			Total_processed_byte_count
285 
286 			Late_receive_MPDU_count
287 
288 			window_jump_2k
289 
290 			Hole_count
291 
292 			<legal 0-1>
293 */
294 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET                     0x00000008
295 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB                        8
296 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK                       0x00000100
297 
298 /* Description		REO_GET_QUEUE_STATS_2_RESERVED_2A
299 
300 			<legal 0>
301 */
302 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET                     0x00000008
303 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB                        9
304 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK                       0xfffffe00
305 
306 /* Description		REO_GET_QUEUE_STATS_3_RESERVED_3A
307 
308 			<legal 0>
309 */
310 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET                     0x0000000c
311 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB                        0
312 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK                       0xffffffff
313 
314 /* Description		REO_GET_QUEUE_STATS_4_RESERVED_4A
315 
316 			<legal 0>
317 */
318 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET                     0x00000010
319 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB                        0
320 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK                       0xffffffff
321 
322 /* Description		REO_GET_QUEUE_STATS_5_RESERVED_5A
323 
324 			<legal 0>
325 */
326 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET                     0x00000014
327 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB                        0
328 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK                       0xffffffff
329 
330 /* Description		REO_GET_QUEUE_STATS_6_RESERVED_6A
331 
332 			<legal 0>
333 */
334 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET                     0x00000018
335 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB                        0
336 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK                       0xffffffff
337 
338 /* Description		REO_GET_QUEUE_STATS_7_RESERVED_7A
339 
340 			<legal 0>
341 */
342 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET                     0x0000001c
343 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB                        0
344 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK                       0xffffffff
345 
346 /* Description		REO_GET_QUEUE_STATS_8_RESERVED_8A
347 
348 			<legal 0>
349 */
350 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET                     0x00000020
351 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB                        0
352 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK                       0xffffffff
353 
354 
355 #endif // _REO_GET_QUEUE_STATS_H_
356